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iris/bufmgr: Move iris_bo_reference into hash_find_bo, rename it
[mesa.git] / src / gallium / drivers / svga / svga_format.c
1 /**********************************************************
2 * Copyright 2011 VMware, Inc. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 **********************************************************/
25
26
27 #include "pipe/p_format.h"
28 #include "util/u_debug.h"
29 #include "util/u_format.h"
30 #include "util/u_memory.h"
31
32 #include "svga_winsys.h"
33 #include "svga_screen.h"
34 #include "svga_format.h"
35
36
37 /** Describes mapping from gallium formats to SVGA vertex/pixel formats */
38 struct vgpu10_format_entry
39 {
40 enum pipe_format pformat;
41 SVGA3dSurfaceFormat vertex_format;
42 SVGA3dSurfaceFormat pixel_format;
43 SVGA3dSurfaceFormat view_format; /* view format for texture buffer */
44 unsigned flags;
45 };
46
47 struct format_compat_entry
48 {
49 enum pipe_format pformat;
50 const SVGA3dSurfaceFormat *compat_format;
51 };
52
53
54 /**
55 * Table mapping Gallium formats to SVGA3d vertex/pixel formats.
56 * Note: the table is ordered according to PIPE_FORMAT_x order.
57 */
58 static const struct vgpu10_format_entry format_conversion_table[] =
59 {
60 /* Gallium format SVGA3D vertex format SVGA3D pixel format SVGA3D texbuf view format Flags */
61 { PIPE_FORMAT_NONE, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
62 { PIPE_FORMAT_B8G8R8A8_UNORM, SVGA3D_B8G8R8A8_UNORM, SVGA3D_B8G8R8A8_UNORM, SVGA3D_B8G8R8A8_UNORM, TF_GEN_MIPS },
63 { PIPE_FORMAT_B8G8R8X8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_B8G8R8X8_UNORM, SVGA3D_B8G8R8X8_UNORM, TF_GEN_MIPS },
64 { PIPE_FORMAT_A8R8G8B8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
65 { PIPE_FORMAT_X8R8G8B8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
66 { PIPE_FORMAT_B5G5R5A1_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_B5G5R5A1_UNORM, SVGA3D_B5G5R5A1_UNORM, TF_GEN_MIPS },
67 { PIPE_FORMAT_B4G4R4A4_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
68 { PIPE_FORMAT_B5G6R5_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_B5G6R5_UNORM, SVGA3D_B5G6R5_UNORM, TF_GEN_MIPS },
69 { PIPE_FORMAT_R10G10B10A2_UNORM, SVGA3D_R10G10B10A2_UNORM, SVGA3D_R10G10B10A2_UNORM, SVGA3D_R10G10B10A2_UNORM, TF_GEN_MIPS },
70 { PIPE_FORMAT_L8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8_UNORM, TF_XXX1 },
71 { PIPE_FORMAT_A8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_A8_UNORM, SVGA3D_R8_UNORM, TF_GEN_MIPS | TF_000X},
72 { PIPE_FORMAT_I8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8_UNORM, TF_XXXX },
73 { PIPE_FORMAT_L8A8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8G8_UNORM, TF_XXXY },
74 { PIPE_FORMAT_L16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_UNORM, TF_XXX1 },
75 { PIPE_FORMAT_UYVY, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
76 { PIPE_FORMAT_YUYV, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
77 { PIPE_FORMAT_Z16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_D16_UNORM, SVGA3D_D16_UNORM, 0 },
78 { PIPE_FORMAT_Z32_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
79 { PIPE_FORMAT_Z32_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_D32_FLOAT, SVGA3D_D32_FLOAT, 0 },
80 { PIPE_FORMAT_Z24_UNORM_S8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_D24_UNORM_S8_UINT, SVGA3D_D24_UNORM_S8_UINT, 0 },
81 { PIPE_FORMAT_S8_UINT_Z24_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
82 { PIPE_FORMAT_Z24X8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_D24_UNORM_S8_UINT, SVGA3D_D24_UNORM_S8_UINT, 0 },
83 { PIPE_FORMAT_X8Z24_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
84 { PIPE_FORMAT_S8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
85 { PIPE_FORMAT_R64_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
86 { PIPE_FORMAT_R64G64_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
87 { PIPE_FORMAT_R64G64B64_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
88 { PIPE_FORMAT_R64G64B64A64_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
89 { PIPE_FORMAT_R32_FLOAT, SVGA3D_R32_FLOAT, SVGA3D_R32_FLOAT, SVGA3D_R32_FLOAT, TF_GEN_MIPS },
90 { PIPE_FORMAT_R32G32_FLOAT, SVGA3D_R32G32_FLOAT, SVGA3D_R32G32_FLOAT, SVGA3D_R32G32_FLOAT, TF_GEN_MIPS },
91 { PIPE_FORMAT_R32G32B32_FLOAT, SVGA3D_R32G32B32_FLOAT, SVGA3D_R32G32B32_FLOAT, SVGA3D_R32G32B32_FLOAT, TF_GEN_MIPS },
92 { PIPE_FORMAT_R32G32B32A32_FLOAT, SVGA3D_R32G32B32A32_FLOAT, SVGA3D_R32G32B32A32_FLOAT, SVGA3D_R32G32B32A32_FLOAT, TF_GEN_MIPS },
93 { PIPE_FORMAT_R32_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
94 { PIPE_FORMAT_R32G32_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
95 { PIPE_FORMAT_R32G32B32_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
96 { PIPE_FORMAT_R32G32B32A32_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
97 { PIPE_FORMAT_R32_USCALED, SVGA3D_R32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
98 { PIPE_FORMAT_R32G32_USCALED, SVGA3D_R32G32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
99 { PIPE_FORMAT_R32G32B32_USCALED, SVGA3D_R32G32B32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
100 { PIPE_FORMAT_R32G32B32A32_USCALED, SVGA3D_R32G32B32A32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
101 { PIPE_FORMAT_R32_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
102 { PIPE_FORMAT_R32G32_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
103 { PIPE_FORMAT_R32G32B32_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
104 { PIPE_FORMAT_R32G32B32A32_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
105 { PIPE_FORMAT_R32_SSCALED, SVGA3D_R32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
106 { PIPE_FORMAT_R32G32_SSCALED, SVGA3D_R32G32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
107 { PIPE_FORMAT_R32G32B32_SSCALED, SVGA3D_R32G32B32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
108 { PIPE_FORMAT_R32G32B32A32_SSCALED, SVGA3D_R32G32B32A32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
109 { PIPE_FORMAT_R16_UNORM, SVGA3D_R16_UNORM, SVGA3D_R16_UNORM, SVGA3D_R16_UNORM, TF_GEN_MIPS },
110 { PIPE_FORMAT_R16G16_UNORM, SVGA3D_R16G16_UNORM, SVGA3D_R16G16_UNORM, SVGA3D_R16G16_UNORM, TF_GEN_MIPS },
111 { PIPE_FORMAT_R16G16B16_UNORM, SVGA3D_R16G16B16A16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
112 { PIPE_FORMAT_R16G16B16A16_UNORM, SVGA3D_R16G16B16A16_UNORM, SVGA3D_R16G16B16A16_UNORM, SVGA3D_R16G16B16A16_UNORM, TF_GEN_MIPS },
113 { PIPE_FORMAT_R16_USCALED, SVGA3D_R16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
114 { PIPE_FORMAT_R16G16_USCALED, SVGA3D_R16G16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
115 { PIPE_FORMAT_R16G16B16_USCALED, SVGA3D_R16G16B16A16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 | VF_U_TO_F_CAST },
116 { PIPE_FORMAT_R16G16B16A16_USCALED, SVGA3D_R16G16B16A16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
117 { PIPE_FORMAT_R16_SNORM, SVGA3D_R16_SNORM, SVGA3D_R16_SNORM, SVGA3D_R16_SNORM, 0 },
118 { PIPE_FORMAT_R16G16_SNORM, SVGA3D_R16G16_SNORM, SVGA3D_R16G16_SNORM, SVGA3D_R16G16_SNORM, 0 },
119 { PIPE_FORMAT_R16G16B16_SNORM, SVGA3D_R16G16B16A16_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
120 { PIPE_FORMAT_R16G16B16A16_SNORM, SVGA3D_R16G16B16A16_SNORM, SVGA3D_R16G16B16A16_SNORM, SVGA3D_R16G16B16A16_SNORM, 0 },
121 { PIPE_FORMAT_R16_SSCALED, SVGA3D_R16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
122 { PIPE_FORMAT_R16G16_SSCALED, SVGA3D_R16G16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
123 { PIPE_FORMAT_R16G16B16_SSCALED, SVGA3D_R16G16B16A16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 | VF_I_TO_F_CAST },
124 { PIPE_FORMAT_R16G16B16A16_SSCALED, SVGA3D_R16G16B16A16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
125 { PIPE_FORMAT_R8_UNORM, SVGA3D_R8_UNORM, SVGA3D_R8_UNORM, SVGA3D_R8_UNORM, TF_GEN_MIPS },
126 { PIPE_FORMAT_R8G8_UNORM, SVGA3D_R8G8_UNORM, SVGA3D_R8G8_UNORM, SVGA3D_R8G8_UNORM, TF_GEN_MIPS },
127 { PIPE_FORMAT_R8G8B8_UNORM, SVGA3D_R8G8B8A8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
128 { PIPE_FORMAT_R8G8B8A8_UNORM, SVGA3D_R8G8B8A8_UNORM, SVGA3D_R8G8B8A8_UNORM, SVGA3D_R8G8B8A8_UNORM, TF_GEN_MIPS },
129 { PIPE_FORMAT_X8B8G8R8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
130 { PIPE_FORMAT_R8_USCALED, SVGA3D_R8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
131 { PIPE_FORMAT_R8G8_USCALED, SVGA3D_R8G8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
132 { PIPE_FORMAT_R8G8B8_USCALED, SVGA3D_R8G8B8A8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 | VF_U_TO_F_CAST },
133 { PIPE_FORMAT_R8G8B8A8_USCALED, SVGA3D_R8G8B8A8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
134 { 73, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
135 { PIPE_FORMAT_R8_SNORM, SVGA3D_R8_SNORM, SVGA3D_R8_SNORM, SVGA3D_R8_SNORM, 0 },
136 { PIPE_FORMAT_R8G8_SNORM, SVGA3D_R8G8_SNORM, SVGA3D_R8G8_SNORM, SVGA3D_R8G8_SNORM, 0 },
137 { PIPE_FORMAT_R8G8B8_SNORM, SVGA3D_R8G8B8A8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
138 { PIPE_FORMAT_R8G8B8A8_SNORM, SVGA3D_R8G8B8A8_SNORM, SVGA3D_R8G8B8A8_SNORM, SVGA3D_R8G8B8A8_SNORM, 0 },
139 { 78, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
140 { 79, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
141 { 80, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
142 { 81, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
143 { PIPE_FORMAT_R8_SSCALED, SVGA3D_R8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
144 { PIPE_FORMAT_R8G8_SSCALED, SVGA3D_R8G8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
145 { PIPE_FORMAT_R8G8B8_SSCALED, SVGA3D_R8G8B8A8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 | VF_I_TO_F_CAST },
146 { PIPE_FORMAT_R8G8B8A8_SSCALED, SVGA3D_R8G8B8A8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
147 { 86, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
148 { PIPE_FORMAT_R32_FIXED, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
149 { PIPE_FORMAT_R32G32_FIXED, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
150 { PIPE_FORMAT_R32G32B32_FIXED, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
151 { PIPE_FORMAT_R32G32B32A32_FIXED, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
152 { PIPE_FORMAT_R16_FLOAT, SVGA3D_R16_FLOAT, SVGA3D_R16_FLOAT, SVGA3D_R16_FLOAT, TF_GEN_MIPS },
153 { PIPE_FORMAT_R16G16_FLOAT, SVGA3D_R16G16_FLOAT, SVGA3D_R16G16_FLOAT, SVGA3D_R16G16_FLOAT, TF_GEN_MIPS },
154 { PIPE_FORMAT_R16G16B16_FLOAT, SVGA3D_R16G16B16A16_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
155 { PIPE_FORMAT_R16G16B16A16_FLOAT, SVGA3D_R16G16B16A16_FLOAT, SVGA3D_R16G16B16A16_FLOAT, SVGA3D_R16G16B16A16_FLOAT, TF_GEN_MIPS },
156 { PIPE_FORMAT_L8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
157 { PIPE_FORMAT_L8A8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
158 { PIPE_FORMAT_R8G8B8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
159 { PIPE_FORMAT_A8B8G8R8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
160 { PIPE_FORMAT_X8B8G8R8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
161 { PIPE_FORMAT_B8G8R8A8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_B8G8R8A8_UNORM_SRGB, SVGA3D_FORMAT_INVALID, TF_GEN_MIPS },
162 { PIPE_FORMAT_B8G8R8X8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_B8G8R8X8_UNORM_SRGB, SVGA3D_FORMAT_INVALID, TF_GEN_MIPS },
163 { PIPE_FORMAT_A8R8G8B8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
164 { PIPE_FORMAT_X8R8G8B8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
165 { PIPE_FORMAT_R8G8B8A8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_R8G8B8A8_UNORM_SRGB, SVGA3D_FORMAT_INVALID, TF_GEN_MIPS },
166 { PIPE_FORMAT_DXT1_RGB, SVGA3D_FORMAT_INVALID, SVGA3D_BC1_UNORM, SVGA3D_FORMAT_INVALID, 0 },
167 { PIPE_FORMAT_DXT1_RGBA, SVGA3D_FORMAT_INVALID, SVGA3D_BC1_UNORM, SVGA3D_FORMAT_INVALID, 0 },
168 { PIPE_FORMAT_DXT3_RGBA, SVGA3D_FORMAT_INVALID, SVGA3D_BC2_UNORM, SVGA3D_FORMAT_INVALID, 0 },
169 { PIPE_FORMAT_DXT5_RGBA, SVGA3D_FORMAT_INVALID, SVGA3D_BC3_UNORM, SVGA3D_FORMAT_INVALID, 0 },
170 { PIPE_FORMAT_DXT1_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_BC1_UNORM_SRGB, SVGA3D_FORMAT_INVALID, 0 },
171 { PIPE_FORMAT_DXT1_SRGBA, SVGA3D_FORMAT_INVALID, SVGA3D_BC1_UNORM_SRGB, SVGA3D_FORMAT_INVALID, 0 },
172 { PIPE_FORMAT_DXT3_SRGBA, SVGA3D_FORMAT_INVALID, SVGA3D_BC2_UNORM_SRGB, SVGA3D_FORMAT_INVALID, 0 },
173 { PIPE_FORMAT_DXT5_SRGBA, SVGA3D_FORMAT_INVALID, SVGA3D_BC3_UNORM_SRGB, SVGA3D_FORMAT_INVALID, 0 },
174 { PIPE_FORMAT_RGTC1_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_BC4_UNORM, SVGA3D_FORMAT_INVALID, 0 },
175 { PIPE_FORMAT_RGTC1_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_BC4_SNORM, SVGA3D_FORMAT_INVALID, 0 },
176 { PIPE_FORMAT_RGTC2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_BC5_UNORM, SVGA3D_FORMAT_INVALID, 0 },
177 { PIPE_FORMAT_RGTC2_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_BC5_SNORM, SVGA3D_FORMAT_INVALID, 0 },
178 { PIPE_FORMAT_R8G8_B8G8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
179 { PIPE_FORMAT_G8R8_G8B8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
180 { PIPE_FORMAT_R8SG8SB8UX8U_NORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
181 { PIPE_FORMAT_R5SG5SB6U_NORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
182 { PIPE_FORMAT_A8B8G8R8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
183 { PIPE_FORMAT_B5G5R5X1_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
184 { PIPE_FORMAT_R10G10B10A2_USCALED, SVGA3D_R10G10B10A2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_PUINT_TO_USCALED },
185 { PIPE_FORMAT_R11G11B10_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_R11G11B10_FLOAT, SVGA3D_R11G11B10_FLOAT, TF_GEN_MIPS },
186 { PIPE_FORMAT_R9G9B9E5_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_R9G9B9E5_SHAREDEXP, SVGA3D_FORMAT_INVALID, 0 },
187 { PIPE_FORMAT_Z32_FLOAT_S8X24_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_D32_FLOAT_S8X24_UINT, SVGA3D_FORMAT_INVALID, 0 },
188 { PIPE_FORMAT_R1_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
189 { PIPE_FORMAT_R10G10B10X2_USCALED, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
190 { PIPE_FORMAT_R10G10B10X2_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
191 { PIPE_FORMAT_L4A4_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
192 { PIPE_FORMAT_B10G10R10A2_UNORM, SVGA3D_R10G10B10A2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_BGRA },
193 { PIPE_FORMAT_R10SG10SB10SA2U_NORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
194 { PIPE_FORMAT_R8G8Bx_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
195 { PIPE_FORMAT_R8G8B8X8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
196 { PIPE_FORMAT_B4G4R4X4_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
197 { PIPE_FORMAT_X24S8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
198 { PIPE_FORMAT_S8X24_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
199 { PIPE_FORMAT_X32_S8X24_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
200 { PIPE_FORMAT_B2G3R3_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
201 { PIPE_FORMAT_L16A16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16G16_UNORM, TF_XXXY },
202 { PIPE_FORMAT_A16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_UNORM, TF_000X },
203 { PIPE_FORMAT_I16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_UNORM, TF_XXXX },
204 { PIPE_FORMAT_LATC1_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
205 { PIPE_FORMAT_LATC1_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
206 { PIPE_FORMAT_LATC2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
207 { PIPE_FORMAT_LATC2_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
208 { PIPE_FORMAT_A8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
209 { PIPE_FORMAT_L8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
210 { PIPE_FORMAT_L8A8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
211 { PIPE_FORMAT_I8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
212 { PIPE_FORMAT_A16_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
213 { PIPE_FORMAT_L16_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
214 { PIPE_FORMAT_L16A16_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
215 { PIPE_FORMAT_I16_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
216 { PIPE_FORMAT_A16_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_FLOAT, TF_000X },
217 { PIPE_FORMAT_L16_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_FLOAT, TF_XXX1 },
218 { PIPE_FORMAT_L16A16_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16G16_FLOAT, TF_XXXY },
219 { PIPE_FORMAT_I16_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_FLOAT, TF_XXXX },
220 { PIPE_FORMAT_A32_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32_FLOAT, TF_000X },
221 { PIPE_FORMAT_L32_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32_FLOAT, TF_XXX1 },
222 { PIPE_FORMAT_L32A32_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32G32_FLOAT, TF_XXXY },
223 { PIPE_FORMAT_I32_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32_FLOAT, TF_XXXX },
224 { PIPE_FORMAT_YV12, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
225 { PIPE_FORMAT_YV16, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
226 { PIPE_FORMAT_IYUV, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
227 { PIPE_FORMAT_NV12, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
228 { PIPE_FORMAT_NV21, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
229 { PIPE_FORMAT_A4R4_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
230 { PIPE_FORMAT_R4A4_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
231 { PIPE_FORMAT_R8A8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
232 { PIPE_FORMAT_A8R8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
233 { PIPE_FORMAT_R10G10B10A2_SSCALED, SVGA3D_R32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_PUINT_TO_SSCALED },
234 { PIPE_FORMAT_R10G10B10A2_SNORM, SVGA3D_R10G10B10A2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_PUINT_TO_SNORM },
235 { PIPE_FORMAT_B10G10R10A2_USCALED, SVGA3D_R10G10B10A2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_BGRA | VF_PUINT_TO_USCALED },
236 { PIPE_FORMAT_B10G10R10A2_SSCALED, SVGA3D_R32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_BGRA | VF_PUINT_TO_SSCALED },
237 { PIPE_FORMAT_B10G10R10A2_SNORM, SVGA3D_R10G10B10A2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_BGRA | VF_PUINT_TO_SNORM },
238 { PIPE_FORMAT_R8_UINT, SVGA3D_R8_UINT, SVGA3D_R8_UINT, SVGA3D_R8_UINT, 0 },
239 { PIPE_FORMAT_R8G8_UINT, SVGA3D_R8G8_UINT, SVGA3D_R8G8_UINT, SVGA3D_R8G8_UINT, 0 },
240 { PIPE_FORMAT_R8G8B8_UINT, SVGA3D_R8G8B8A8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
241 { PIPE_FORMAT_R8G8B8A8_UINT, SVGA3D_R8G8B8A8_UINT, SVGA3D_R8G8B8A8_UINT, SVGA3D_R8G8B8A8_UINT, 0 },
242 { PIPE_FORMAT_R8_SINT, SVGA3D_R8_SINT, SVGA3D_R8_SINT, SVGA3D_R8_SINT, 0 },
243 { PIPE_FORMAT_R8G8_SINT, SVGA3D_R8G8_SINT, SVGA3D_R8G8_SINT, SVGA3D_R8G8_SINT, 0 },
244 { PIPE_FORMAT_R8G8B8_SINT, SVGA3D_R8G8B8A8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
245 { PIPE_FORMAT_R8G8B8A8_SINT, SVGA3D_R8G8B8A8_SINT, SVGA3D_R8G8B8A8_SINT, SVGA3D_R8G8B8A8_SINT, 0 },
246 { PIPE_FORMAT_R16_UINT, SVGA3D_R16_UINT, SVGA3D_R16_UINT, SVGA3D_R16_UINT, 0 },
247 { PIPE_FORMAT_R16G16_UINT, SVGA3D_R16G16_UINT, SVGA3D_R16G16_UINT, SVGA3D_R16G16_UINT, 0 },
248 { PIPE_FORMAT_R16G16B16_UINT, SVGA3D_R16G16B16A16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
249 { PIPE_FORMAT_R16G16B16A16_UINT, SVGA3D_R16G16B16A16_UINT, SVGA3D_R16G16B16A16_UINT, SVGA3D_R16G16B16A16_UINT, 0 },
250 { PIPE_FORMAT_R16_SINT, SVGA3D_R16_SINT, SVGA3D_R16_SINT, SVGA3D_R16_SINT, 0 },
251 { PIPE_FORMAT_R16G16_SINT, SVGA3D_R16G16_SINT, SVGA3D_R16G16_SINT, SVGA3D_R16G16_SINT, 0 },
252 { PIPE_FORMAT_R16G16B16_SINT, SVGA3D_R16G16B16A16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
253 { PIPE_FORMAT_R16G16B16A16_SINT, SVGA3D_R16G16B16A16_SINT, SVGA3D_R16G16B16A16_SINT, SVGA3D_R16G16B16A16_SINT, 0 },
254 { PIPE_FORMAT_R32_UINT, SVGA3D_R32_UINT, SVGA3D_R32_UINT, SVGA3D_R32_UINT, 0 },
255 { PIPE_FORMAT_R32G32_UINT, SVGA3D_R32G32_UINT, SVGA3D_R32G32_UINT, SVGA3D_R32G32_UINT, 0 },
256 { PIPE_FORMAT_R32G32B32_UINT, SVGA3D_R32G32B32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
257 { PIPE_FORMAT_R32G32B32A32_UINT, SVGA3D_R32G32B32A32_UINT, SVGA3D_R32G32B32A32_UINT, SVGA3D_R32G32B32A32_UINT, 0 },
258 { PIPE_FORMAT_R32_SINT, SVGA3D_R32_SINT, SVGA3D_R32_SINT, SVGA3D_R32_SINT, 0 },
259 { PIPE_FORMAT_R32G32_SINT, SVGA3D_R32G32_SINT, SVGA3D_R32G32_SINT, SVGA3D_R32G32_SINT, 0 },
260 { PIPE_FORMAT_R32G32B32_SINT, SVGA3D_R32G32B32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
261 { PIPE_FORMAT_R32G32B32A32_SINT, SVGA3D_R32G32B32A32_SINT, SVGA3D_R32G32B32A32_SINT, SVGA3D_R32G32B32A32_SINT, 0 },
262 { PIPE_FORMAT_A8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8_UINT, TF_000X },
263 { PIPE_FORMAT_I8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8_UINT, TF_XXXX },
264 { PIPE_FORMAT_L8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8_UINT, TF_XXX1 },
265 { PIPE_FORMAT_L8A8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8G8_UINT, TF_XXXY },
266 { PIPE_FORMAT_A8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8_SINT, TF_000X },
267 { PIPE_FORMAT_I8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8_SINT, TF_XXXX },
268 { PIPE_FORMAT_L8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8_SINT, TF_XXX1 },
269 { PIPE_FORMAT_L8A8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R8G8_SINT, TF_XXXY },
270 { PIPE_FORMAT_A16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_UINT, TF_000X },
271 { PIPE_FORMAT_I16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_UINT, TF_XXXX },
272 { PIPE_FORMAT_L16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_UINT, TF_XXX1 },
273 { PIPE_FORMAT_L16A16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16G16_UINT, TF_XXXY },
274 { PIPE_FORMAT_A16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_SINT, TF_000X },
275 { PIPE_FORMAT_I16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_SINT, TF_XXXX },
276 { PIPE_FORMAT_L16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16_SINT, TF_XXX1 },
277 { PIPE_FORMAT_L16A16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R16G16_SINT, TF_XXXY },
278 { PIPE_FORMAT_A32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32_UINT, TF_000X },
279 { PIPE_FORMAT_I32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32_UINT, TF_XXXX },
280 { PIPE_FORMAT_L32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32_UINT, TF_XXX1 },
281 { PIPE_FORMAT_L32A32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32G32_UINT, TF_XXXY },
282 { PIPE_FORMAT_A32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32_SINT, TF_000X },
283 { PIPE_FORMAT_I32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32_SINT, TF_XXXX },
284 { PIPE_FORMAT_L32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32_SINT, TF_XXX1 },
285 { PIPE_FORMAT_L32A32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_R32G32_SINT, TF_XXXY },
286 { PIPE_FORMAT_B10G10R10A2_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
287 { PIPE_FORMAT_ETC1_RGB8, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
288 { PIPE_FORMAT_R8G8_R8B8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
289 { PIPE_FORMAT_G8R8_B8R8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
290 { PIPE_FORMAT_R8G8B8X8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
291 { PIPE_FORMAT_R8G8B8X8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
292 { PIPE_FORMAT_R8G8B8X8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
293 { PIPE_FORMAT_R8G8B8X8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
294 { PIPE_FORMAT_B10G10R10X2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
295 { PIPE_FORMAT_R16G16B16X16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
296 { PIPE_FORMAT_R16G16B16X16_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
297 { PIPE_FORMAT_R16G16B16X16_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
298 { PIPE_FORMAT_R16G16B16X16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
299 { PIPE_FORMAT_R16G16B16X16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
300 { PIPE_FORMAT_R32G32B32X32_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
301 { PIPE_FORMAT_R32G32B32X32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
302 { PIPE_FORMAT_R32G32B32X32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
303 { PIPE_FORMAT_R8A8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
304 { PIPE_FORMAT_R16A16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
305 { PIPE_FORMAT_R16A16_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
306 { PIPE_FORMAT_R16A16_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
307 { PIPE_FORMAT_R32A32_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
308 { PIPE_FORMAT_R8A8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
309 { PIPE_FORMAT_R8A8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
310 { PIPE_FORMAT_R16A16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
311 { PIPE_FORMAT_R16A16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
312 { PIPE_FORMAT_R32A32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
313 { PIPE_FORMAT_R32A32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
314 { PIPE_FORMAT_R10G10B10A2_UINT, SVGA3D_R10G10B10A2_UINT, SVGA3D_R10G10B10A2_UINT, SVGA3D_R10G10B10A2_UINT, 0 },
315 { PIPE_FORMAT_B5G6R5_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
316 { PIPE_FORMAT_BPTC_RGBA_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
317 { PIPE_FORMAT_BPTC_SRGBA, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
318 { PIPE_FORMAT_BPTC_RGB_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
319 { PIPE_FORMAT_BPTC_RGB_UFLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
320 { PIPE_FORMAT_A8L8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
321 { PIPE_FORMAT_A8L8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
322 { PIPE_FORMAT_A8L8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
323 { PIPE_FORMAT_A16L16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
324 { PIPE_FORMAT_G8R8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
325 { PIPE_FORMAT_G8R8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
326 { PIPE_FORMAT_G16R16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
327 { PIPE_FORMAT_G16R16_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
328 { PIPE_FORMAT_A8B8G8R8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
329 { PIPE_FORMAT_X8B8G8R8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
330 { PIPE_FORMAT_ETC2_RGB8, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
331 { PIPE_FORMAT_ETC2_SRGB8, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
332 { PIPE_FORMAT_ETC2_RGB8A1, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
333 { PIPE_FORMAT_ETC2_SRGB8A1, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
334 { PIPE_FORMAT_ETC2_RGBA8, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
335 { PIPE_FORMAT_ETC2_SRGBA8, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
336 { PIPE_FORMAT_ETC2_R11_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
337 { PIPE_FORMAT_ETC2_R11_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
338 { PIPE_FORMAT_ETC2_RG11_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
339 { PIPE_FORMAT_ETC2_RG11_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
340 { PIPE_FORMAT_ASTC_4x4, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
341 { PIPE_FORMAT_ASTC_5x4, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
342 { PIPE_FORMAT_ASTC_5x5, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
343 { PIPE_FORMAT_ASTC_6x5, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
344 { PIPE_FORMAT_ASTC_6x6, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
345 { PIPE_FORMAT_ASTC_8x5, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
346 { PIPE_FORMAT_ASTC_8x6, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
347 { PIPE_FORMAT_ASTC_8x8, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
348 { PIPE_FORMAT_ASTC_10x5, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
349 { PIPE_FORMAT_ASTC_10x6, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
350 { PIPE_FORMAT_ASTC_10x8, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
351 { PIPE_FORMAT_ASTC_10x10, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
352 { PIPE_FORMAT_ASTC_12x10, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
353 { PIPE_FORMAT_ASTC_12x12, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
354 { PIPE_FORMAT_ASTC_4x4_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
355 { PIPE_FORMAT_ASTC_5x4_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
356 { PIPE_FORMAT_ASTC_5x5_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
357 { PIPE_FORMAT_ASTC_6x5_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
358 { PIPE_FORMAT_ASTC_6x6_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
359 { PIPE_FORMAT_ASTC_8x5_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
360 { PIPE_FORMAT_ASTC_8x6_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
361 { PIPE_FORMAT_ASTC_8x8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
362 { PIPE_FORMAT_ASTC_10x5_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
363 { PIPE_FORMAT_ASTC_10x6_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
364 { PIPE_FORMAT_ASTC_10x8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
365 { PIPE_FORMAT_ASTC_10x10_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
366 { PIPE_FORMAT_ASTC_12x10_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
367 { PIPE_FORMAT_ASTC_12x12_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
368 { PIPE_FORMAT_P016, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
369 { PIPE_FORMAT_R10G10B10X2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
370 { PIPE_FORMAT_A1B5G5R5_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
371 { PIPE_FORMAT_X1B5G5R5_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
372 { PIPE_FORMAT_A4B4G4R4_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
373 { PIPE_FORMAT_R8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
374 { PIPE_FORMAT_A8L8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
375 { PIPE_FORMAT_G8R8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
376 { PIPE_FORMAT_A8B8G8R8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
377 { PIPE_FORMAT_X8B8G8R8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
378 { PIPE_FORMAT_ATC_RGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
379 { PIPE_FORMAT_ATC_RGBA_EXPLICIT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
380 { PIPE_FORMAT_ATC_RGBA_INTERPOLATED, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
381 { PIPE_FORMAT_Z24_UNORM_S8_UINT_AS_R8G8B8A8, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
382 { PIPE_FORMAT_AYUV, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
383 { PIPE_FORMAT_XYUV, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
384 };
385
386
387 /**
388 * Translate a gallium vertex format to a vgpu10 vertex format.
389 * Also, return any special vertex format flags.
390 */
391 void
392 svga_translate_vertex_format_vgpu10(enum pipe_format format,
393 SVGA3dSurfaceFormat *svga_format,
394 unsigned *vf_flags)
395 {
396 assert(format < ARRAY_SIZE(format_conversion_table));
397 if (format >= ARRAY_SIZE(format_conversion_table)) {
398 format = PIPE_FORMAT_NONE;
399 }
400 *svga_format = format_conversion_table[format].vertex_format;
401 *vf_flags = format_conversion_table[format].flags;
402 }
403
404
405 /**
406 * Translate a gallium pixel format to a vgpu10 format
407 * to be used in a shader resource view for a texture buffer.
408 * Also return any special texture format flags such as
409 * any special swizzle mask.
410 */
411 void
412 svga_translate_texture_buffer_view_format(enum pipe_format format,
413 SVGA3dSurfaceFormat *svga_format,
414 unsigned *tf_flags)
415 {
416 assert(format < ARRAY_SIZE(format_conversion_table));
417 if (format >= ARRAY_SIZE(format_conversion_table)) {
418 format = PIPE_FORMAT_NONE;
419 }
420 *svga_format = format_conversion_table[format].view_format;
421 *tf_flags = format_conversion_table[format].flags;
422 }
423
424
425 /**
426 * Translate a gallium scanout format to a svga format valid
427 * for screen target surface.
428 */
429 static SVGA3dSurfaceFormat
430 svga_translate_screen_target_format_vgpu10(enum pipe_format format)
431 {
432 switch (format) {
433 case PIPE_FORMAT_B8G8R8A8_UNORM:
434 return SVGA3D_B8G8R8A8_UNORM;
435 case PIPE_FORMAT_B8G8R8X8_UNORM:
436 return SVGA3D_B8G8R8X8_UNORM;
437 case PIPE_FORMAT_B5G6R5_UNORM:
438 return SVGA3D_R5G6B5;
439 case PIPE_FORMAT_B5G5R5A1_UNORM:
440 return SVGA3D_A1R5G5B5;
441 default:
442 debug_printf("Invalid format %s specified for screen target\n",
443 svga_format_name(format));
444 return SVGA3D_FORMAT_INVALID;
445 }
446 }
447
448 /*
449 * Translate from gallium format to SVGA3D format.
450 */
451 SVGA3dSurfaceFormat
452 svga_translate_format(const struct svga_screen *ss,
453 enum pipe_format format,
454 unsigned bind)
455 {
456 if (ss->sws->have_vgpu10) {
457 if (bind & (PIPE_BIND_VERTEX_BUFFER | PIPE_BIND_INDEX_BUFFER)) {
458 return format_conversion_table[format].vertex_format;
459 }
460 else if (bind & PIPE_BIND_SCANOUT) {
461 return svga_translate_screen_target_format_vgpu10(format);
462 }
463 else {
464 return format_conversion_table[format].pixel_format;
465 }
466 }
467
468 switch(format) {
469 case PIPE_FORMAT_B8G8R8A8_UNORM:
470 return SVGA3D_A8R8G8B8;
471 case PIPE_FORMAT_B8G8R8X8_UNORM:
472 return SVGA3D_X8R8G8B8;
473
474 /* sRGB required for GL2.1 */
475 case PIPE_FORMAT_B8G8R8A8_SRGB:
476 return SVGA3D_A8R8G8B8;
477 case PIPE_FORMAT_DXT1_SRGB:
478 case PIPE_FORMAT_DXT1_SRGBA:
479 return SVGA3D_DXT1;
480 case PIPE_FORMAT_DXT3_SRGBA:
481 return SVGA3D_DXT3;
482 case PIPE_FORMAT_DXT5_SRGBA:
483 return SVGA3D_DXT5;
484
485 case PIPE_FORMAT_B5G6R5_UNORM:
486 return SVGA3D_R5G6B5;
487 case PIPE_FORMAT_B5G5R5A1_UNORM:
488 return SVGA3D_A1R5G5B5;
489 case PIPE_FORMAT_B4G4R4A4_UNORM:
490 return SVGA3D_A4R4G4B4;
491
492 case PIPE_FORMAT_R16G16B16A16_UNORM:
493 return SVGA3D_A16B16G16R16;
494
495 case PIPE_FORMAT_Z16_UNORM:
496 assert(!ss->sws->have_vgpu10);
497 return bind & PIPE_BIND_SAMPLER_VIEW ? ss->depth.z16 : SVGA3D_Z_D16;
498 case PIPE_FORMAT_S8_UINT_Z24_UNORM:
499 assert(!ss->sws->have_vgpu10);
500 return bind & PIPE_BIND_SAMPLER_VIEW ? ss->depth.s8z24 : SVGA3D_Z_D24S8;
501 case PIPE_FORMAT_X8Z24_UNORM:
502 assert(!ss->sws->have_vgpu10);
503 return bind & PIPE_BIND_SAMPLER_VIEW ? ss->depth.x8z24 : SVGA3D_Z_D24X8;
504
505 case PIPE_FORMAT_A8_UNORM:
506 return SVGA3D_ALPHA8;
507 case PIPE_FORMAT_L8_UNORM:
508 return SVGA3D_LUMINANCE8;
509
510 case PIPE_FORMAT_DXT1_RGB:
511 case PIPE_FORMAT_DXT1_RGBA:
512 return SVGA3D_DXT1;
513 case PIPE_FORMAT_DXT3_RGBA:
514 return SVGA3D_DXT3;
515 case PIPE_FORMAT_DXT5_RGBA:
516 return SVGA3D_DXT5;
517
518 /* Float formats (only 1, 2 and 4-component formats supported) */
519 case PIPE_FORMAT_R32_FLOAT:
520 return SVGA3D_R_S23E8;
521 case PIPE_FORMAT_R32G32_FLOAT:
522 return SVGA3D_RG_S23E8;
523 case PIPE_FORMAT_R32G32B32A32_FLOAT:
524 return SVGA3D_ARGB_S23E8;
525 case PIPE_FORMAT_R16_FLOAT:
526 return SVGA3D_R_S10E5;
527 case PIPE_FORMAT_R16G16_FLOAT:
528 return SVGA3D_RG_S10E5;
529 case PIPE_FORMAT_R16G16B16A16_FLOAT:
530 return SVGA3D_ARGB_S10E5;
531
532 case PIPE_FORMAT_Z32_UNORM:
533 /* SVGA3D_Z_D32 is not yet unsupported */
534 /* fall-through */
535 default:
536 return SVGA3D_FORMAT_INVALID;
537 }
538 }
539
540
541 /*
542 * Format capability description entry.
543 */
544 struct format_cap {
545 const char *name;
546
547 SVGA3dSurfaceFormat format;
548
549 /*
550 * Capability index corresponding to the format.
551 */
552 SVGA3dDevCapIndex devcap;
553
554 /* size of each pixel/block */
555 unsigned block_width, block_height, block_bytes;
556
557 /*
558 * Mask of supported SVGA3dFormatOp operations, to be inferred when the
559 * capability is not explicitly present.
560 */
561 uint32 defaultOperations;
562 };
563
564
565 /*
566 * Format capability description table.
567 *
568 * Ordered by increasing SVGA3dSurfaceFormat value, but with gaps.
569 */
570 static const struct format_cap format_cap_table[] = {
571 {
572 "SVGA3D_FORMAT_INVALID",
573 SVGA3D_FORMAT_INVALID, 0, 0, 0, 0, 0
574 },
575 {
576 "SVGA3D_X8R8G8B8",
577 SVGA3D_X8R8G8B8,
578 SVGA3D_DEVCAP_SURFACEFMT_X8R8G8B8,
579 1, 1, 4,
580 SVGA3DFORMAT_OP_TEXTURE |
581 SVGA3DFORMAT_OP_CUBETEXTURE |
582 SVGA3DFORMAT_OP_VOLUMETEXTURE |
583 SVGA3DFORMAT_OP_DISPLAYMODE |
584 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
585 },
586 {
587 "SVGA3D_A8R8G8B8",
588 SVGA3D_A8R8G8B8,
589 SVGA3D_DEVCAP_SURFACEFMT_A8R8G8B8,
590 1, 1, 4,
591 SVGA3DFORMAT_OP_TEXTURE |
592 SVGA3DFORMAT_OP_CUBETEXTURE |
593 SVGA3DFORMAT_OP_VOLUMETEXTURE |
594 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
595 },
596 {
597 "SVGA3D_R5G6B5",
598 SVGA3D_R5G6B5,
599 SVGA3D_DEVCAP_SURFACEFMT_R5G6B5,
600 1, 1, 2,
601 SVGA3DFORMAT_OP_TEXTURE |
602 SVGA3DFORMAT_OP_CUBETEXTURE |
603 SVGA3DFORMAT_OP_VOLUMETEXTURE |
604 SVGA3DFORMAT_OP_DISPLAYMODE |
605 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
606 },
607 {
608 "SVGA3D_X1R5G5B5",
609 SVGA3D_X1R5G5B5,
610 SVGA3D_DEVCAP_SURFACEFMT_X1R5G5B5,
611 1, 1, 2,
612 SVGA3DFORMAT_OP_TEXTURE |
613 SVGA3DFORMAT_OP_CUBETEXTURE |
614 SVGA3DFORMAT_OP_VOLUMETEXTURE |
615 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
616 },
617 {
618 "SVGA3D_A1R5G5B5",
619 SVGA3D_A1R5G5B5,
620 SVGA3D_DEVCAP_SURFACEFMT_A1R5G5B5,
621 1, 1, 2,
622 SVGA3DFORMAT_OP_TEXTURE |
623 SVGA3DFORMAT_OP_CUBETEXTURE |
624 SVGA3DFORMAT_OP_VOLUMETEXTURE |
625 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
626 },
627 {
628 "SVGA3D_A4R4G4B4",
629 SVGA3D_A4R4G4B4,
630 SVGA3D_DEVCAP_SURFACEFMT_A4R4G4B4,
631 1, 1, 2,
632 SVGA3DFORMAT_OP_TEXTURE |
633 SVGA3DFORMAT_OP_CUBETEXTURE |
634 SVGA3DFORMAT_OP_VOLUMETEXTURE |
635 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
636 },
637 {
638 /*
639 * SVGA3D_Z_D32 is not yet supported, and has no corresponding
640 * SVGA3D_DEVCAP_xxx.
641 */
642 "SVGA3D_Z_D32",
643 SVGA3D_Z_D32, 0, 0, 0, 0, 0
644 },
645 {
646 "SVGA3D_Z_D16",
647 SVGA3D_Z_D16,
648 SVGA3D_DEVCAP_SURFACEFMT_Z_D16,
649 1, 1, 2,
650 SVGA3DFORMAT_OP_ZSTENCIL
651 },
652 {
653 "SVGA3D_Z_D24S8",
654 SVGA3D_Z_D24S8,
655 SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8,
656 1, 1, 4,
657 SVGA3DFORMAT_OP_ZSTENCIL
658 },
659 {
660 "SVGA3D_Z_D15S1",
661 SVGA3D_Z_D15S1,
662 SVGA3D_DEVCAP_MAX,
663 1, 1, 2,
664 SVGA3DFORMAT_OP_ZSTENCIL
665 },
666 {
667 "SVGA3D_LUMINANCE8",
668 SVGA3D_LUMINANCE8,
669 SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8,
670 1, 1, 1,
671 SVGA3DFORMAT_OP_TEXTURE |
672 SVGA3DFORMAT_OP_CUBETEXTURE |
673 SVGA3DFORMAT_OP_VOLUMETEXTURE
674 },
675 {
676 /*
677 * SVGA3D_LUMINANCE4_ALPHA4 is not supported, and has no corresponding
678 * SVGA3D_DEVCAP_xxx.
679 */
680 "SVGA3D_LUMINANCE4_ALPHA4",
681 SVGA3D_LUMINANCE4_ALPHA4, 0, 0, 0, 0, 0
682 },
683 {
684 "SVGA3D_LUMINANCE16",
685 SVGA3D_LUMINANCE16,
686 SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE16,
687 1, 1, 2,
688 SVGA3DFORMAT_OP_TEXTURE |
689 SVGA3DFORMAT_OP_CUBETEXTURE |
690 SVGA3DFORMAT_OP_VOLUMETEXTURE
691 },
692 {
693 "SVGA3D_LUMINANCE8_ALPHA8",
694 SVGA3D_LUMINANCE8_ALPHA8,
695 SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8_ALPHA8,
696 1, 1, 2,
697 SVGA3DFORMAT_OP_TEXTURE |
698 SVGA3DFORMAT_OP_CUBETEXTURE |
699 SVGA3DFORMAT_OP_VOLUMETEXTURE
700 },
701 {
702 "SVGA3D_DXT1",
703 SVGA3D_DXT1,
704 SVGA3D_DEVCAP_SURFACEFMT_DXT1,
705 4, 4, 8,
706 SVGA3DFORMAT_OP_TEXTURE |
707 SVGA3DFORMAT_OP_CUBETEXTURE
708 },
709 {
710 "SVGA3D_DXT2",
711 SVGA3D_DXT2,
712 SVGA3D_DEVCAP_SURFACEFMT_DXT2,
713 4, 4, 8,
714 SVGA3DFORMAT_OP_TEXTURE |
715 SVGA3DFORMAT_OP_CUBETEXTURE
716 },
717 {
718 "SVGA3D_DXT3",
719 SVGA3D_DXT3,
720 SVGA3D_DEVCAP_SURFACEFMT_DXT3,
721 4, 4, 16,
722 SVGA3DFORMAT_OP_TEXTURE |
723 SVGA3DFORMAT_OP_CUBETEXTURE
724 },
725 {
726 "SVGA3D_DXT4",
727 SVGA3D_DXT4,
728 SVGA3D_DEVCAP_SURFACEFMT_DXT4,
729 4, 4, 16,
730 SVGA3DFORMAT_OP_TEXTURE |
731 SVGA3DFORMAT_OP_CUBETEXTURE
732 },
733 {
734 "SVGA3D_DXT5",
735 SVGA3D_DXT5,
736 SVGA3D_DEVCAP_SURFACEFMT_DXT5,
737 4, 4, 8,
738 SVGA3DFORMAT_OP_TEXTURE |
739 SVGA3DFORMAT_OP_CUBETEXTURE
740 },
741 {
742 "SVGA3D_BUMPU8V8",
743 SVGA3D_BUMPU8V8,
744 SVGA3D_DEVCAP_SURFACEFMT_BUMPU8V8,
745 1, 1, 2,
746 SVGA3DFORMAT_OP_TEXTURE |
747 SVGA3DFORMAT_OP_CUBETEXTURE |
748 SVGA3DFORMAT_OP_VOLUMETEXTURE
749 },
750 {
751 /*
752 * SVGA3D_BUMPL6V5U5 is unsupported; it has no corresponding
753 * SVGA3D_DEVCAP_xxx.
754 */
755 "SVGA3D_BUMPL6V5U5",
756 SVGA3D_BUMPL6V5U5, 0, 0, 0, 0, 0
757 },
758 {
759 "SVGA3D_BUMPX8L8V8U8",
760 SVGA3D_BUMPX8L8V8U8,
761 SVGA3D_DEVCAP_SURFACEFMT_BUMPX8L8V8U8,
762 1, 1, 4,
763 SVGA3DFORMAT_OP_TEXTURE |
764 SVGA3DFORMAT_OP_CUBETEXTURE
765 },
766 {
767 "SVGA3D_FORMAT_DEAD1",
768 SVGA3D_FORMAT_DEAD1, 0, 0, 0, 0, 0
769 },
770 {
771 "SVGA3D_ARGB_S10E5",
772 SVGA3D_ARGB_S10E5,
773 SVGA3D_DEVCAP_SURFACEFMT_ARGB_S10E5,
774 1, 1, 2,
775 SVGA3DFORMAT_OP_TEXTURE |
776 SVGA3DFORMAT_OP_CUBETEXTURE |
777 SVGA3DFORMAT_OP_VOLUMETEXTURE |
778 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
779 },
780 {
781 "SVGA3D_ARGB_S23E8",
782 SVGA3D_ARGB_S23E8,
783 SVGA3D_DEVCAP_SURFACEFMT_ARGB_S23E8,
784 1, 1, 4,
785 SVGA3DFORMAT_OP_TEXTURE |
786 SVGA3DFORMAT_OP_CUBETEXTURE |
787 SVGA3DFORMAT_OP_VOLUMETEXTURE |
788 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
789 },
790 {
791 "SVGA3D_A2R10G10B10",
792 SVGA3D_A2R10G10B10,
793 SVGA3D_DEVCAP_SURFACEFMT_A2R10G10B10,
794 1, 1, 4,
795 SVGA3DFORMAT_OP_TEXTURE |
796 SVGA3DFORMAT_OP_CUBETEXTURE |
797 SVGA3DFORMAT_OP_VOLUMETEXTURE |
798 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
799 },
800 {
801 /*
802 * SVGA3D_V8U8 is unsupported; it has no corresponding
803 * SVGA3D_DEVCAP_xxx. SVGA3D_BUMPU8V8 should be used instead.
804 */
805 "SVGA3D_V8U8",
806 SVGA3D_V8U8, 0, 0, 0, 0, 0
807 },
808 {
809 "SVGA3D_Q8W8V8U8",
810 SVGA3D_Q8W8V8U8,
811 SVGA3D_DEVCAP_SURFACEFMT_Q8W8V8U8,
812 1, 1, 4,
813 SVGA3DFORMAT_OP_TEXTURE |
814 SVGA3DFORMAT_OP_CUBETEXTURE
815 },
816 {
817 "SVGA3D_CxV8U8",
818 SVGA3D_CxV8U8,
819 SVGA3D_DEVCAP_SURFACEFMT_CxV8U8,
820 1, 1, 2,
821 SVGA3DFORMAT_OP_TEXTURE
822 },
823 {
824 /*
825 * SVGA3D_X8L8V8U8 is unsupported; it has no corresponding
826 * SVGA3D_DEVCAP_xxx. SVGA3D_BUMPX8L8V8U8 should be used instead.
827 */
828 "SVGA3D_X8L8V8U8",
829 SVGA3D_X8L8V8U8, 0, 0, 0, 0, 0
830 },
831 {
832 "SVGA3D_A2W10V10U10",
833 SVGA3D_A2W10V10U10,
834 SVGA3D_DEVCAP_SURFACEFMT_A2W10V10U10,
835 1, 1, 4,
836 SVGA3DFORMAT_OP_TEXTURE
837 },
838 {
839 "SVGA3D_ALPHA8",
840 SVGA3D_ALPHA8,
841 SVGA3D_DEVCAP_SURFACEFMT_ALPHA8,
842 1, 1, 1,
843 SVGA3DFORMAT_OP_TEXTURE |
844 SVGA3DFORMAT_OP_CUBETEXTURE |
845 SVGA3DFORMAT_OP_VOLUMETEXTURE
846 },
847 {
848 "SVGA3D_R_S10E5",
849 SVGA3D_R_S10E5,
850 SVGA3D_DEVCAP_SURFACEFMT_R_S10E5,
851 1, 1, 2,
852 SVGA3DFORMAT_OP_TEXTURE |
853 SVGA3DFORMAT_OP_VOLUMETEXTURE |
854 SVGA3DFORMAT_OP_CUBETEXTURE |
855 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
856 },
857 {
858 "SVGA3D_R_S23E8",
859 SVGA3D_R_S23E8,
860 SVGA3D_DEVCAP_SURFACEFMT_R_S23E8,
861 1, 1, 4,
862 SVGA3DFORMAT_OP_TEXTURE |
863 SVGA3DFORMAT_OP_VOLUMETEXTURE |
864 SVGA3DFORMAT_OP_CUBETEXTURE |
865 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
866 },
867 {
868 "SVGA3D_RG_S10E5",
869 SVGA3D_RG_S10E5,
870 SVGA3D_DEVCAP_SURFACEFMT_RG_S10E5,
871 1, 1, 2,
872 SVGA3DFORMAT_OP_TEXTURE |
873 SVGA3DFORMAT_OP_VOLUMETEXTURE |
874 SVGA3DFORMAT_OP_CUBETEXTURE |
875 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
876 },
877 {
878 "SVGA3D_RG_S23E8",
879 SVGA3D_RG_S23E8,
880 SVGA3D_DEVCAP_SURFACEFMT_RG_S23E8,
881 1, 1, 4,
882 SVGA3DFORMAT_OP_TEXTURE |
883 SVGA3DFORMAT_OP_VOLUMETEXTURE |
884 SVGA3DFORMAT_OP_CUBETEXTURE |
885 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
886 },
887 {
888 /*
889 * SVGA3D_BUFFER is a placeholder format for index/vertex buffers.
890 */
891 "SVGA3D_BUFFER",
892 SVGA3D_BUFFER, 0, 1, 1, 1, 0
893 },
894 {
895 "SVGA3D_Z_D24X8",
896 SVGA3D_Z_D24X8,
897 SVGA3D_DEVCAP_SURFACEFMT_Z_D24X8,
898 1, 1, 4,
899 SVGA3DFORMAT_OP_ZSTENCIL
900 },
901 {
902 "SVGA3D_V16U16",
903 SVGA3D_V16U16,
904 SVGA3D_DEVCAP_SURFACEFMT_V16U16,
905 1, 1, 4,
906 SVGA3DFORMAT_OP_TEXTURE |
907 SVGA3DFORMAT_OP_CUBETEXTURE |
908 SVGA3DFORMAT_OP_VOLUMETEXTURE
909 },
910 {
911 "SVGA3D_G16R16",
912 SVGA3D_G16R16,
913 SVGA3D_DEVCAP_SURFACEFMT_G16R16,
914 1, 1, 4,
915 SVGA3DFORMAT_OP_TEXTURE |
916 SVGA3DFORMAT_OP_CUBETEXTURE |
917 SVGA3DFORMAT_OP_VOLUMETEXTURE |
918 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
919 },
920 {
921 "SVGA3D_A16B16G16R16",
922 SVGA3D_A16B16G16R16,
923 SVGA3D_DEVCAP_SURFACEFMT_A16B16G16R16,
924 1, 1, 8,
925 SVGA3DFORMAT_OP_TEXTURE |
926 SVGA3DFORMAT_OP_CUBETEXTURE |
927 SVGA3DFORMAT_OP_VOLUMETEXTURE |
928 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
929 },
930 {
931 "SVGA3D_UYVY",
932 SVGA3D_UYVY,
933 SVGA3D_DEVCAP_SURFACEFMT_UYVY,
934 0, 0, 0, 0
935 },
936 {
937 "SVGA3D_YUY2",
938 SVGA3D_YUY2,
939 SVGA3D_DEVCAP_SURFACEFMT_YUY2,
940 0, 0, 0, 0
941 },
942 {
943 "SVGA3D_NV12",
944 SVGA3D_NV12,
945 SVGA3D_DEVCAP_SURFACEFMT_NV12,
946 0, 0, 0, 0
947 },
948 {
949 "SVGA3D_AYUV",
950 SVGA3D_AYUV,
951 SVGA3D_DEVCAP_SURFACEFMT_AYUV,
952 0, 0, 0, 0
953 },
954 {
955 "SVGA3D_R32G32B32A32_TYPELESS",
956 SVGA3D_R32G32B32A32_TYPELESS,
957 SVGA3D_DEVCAP_DXFMT_R32G32B32A32_TYPELESS,
958 1, 1, 16, 0
959 },
960 {
961 "SVGA3D_R32G32B32A32_UINT",
962 SVGA3D_R32G32B32A32_UINT,
963 SVGA3D_DEVCAP_DXFMT_R32G32B32A32_UINT,
964 1, 1, 16, 0
965 },
966 {
967 "SVGA3D_R32G32B32A32_SINT",
968 SVGA3D_R32G32B32A32_SINT,
969 SVGA3D_DEVCAP_DXFMT_R32G32B32A32_SINT,
970 1, 1, 16, 0
971 },
972 {
973 "SVGA3D_R32G32B32_TYPELESS",
974 SVGA3D_R32G32B32_TYPELESS,
975 SVGA3D_DEVCAP_DXFMT_R32G32B32_TYPELESS,
976 1, 1, 12, 0
977 },
978 {
979 "SVGA3D_R32G32B32_FLOAT",
980 SVGA3D_R32G32B32_FLOAT,
981 SVGA3D_DEVCAP_DXFMT_R32G32B32_FLOAT,
982 1, 1, 12, 0
983 },
984 {
985 "SVGA3D_R32G32B32_UINT",
986 SVGA3D_R32G32B32_UINT,
987 SVGA3D_DEVCAP_DXFMT_R32G32B32_UINT,
988 1, 1, 12, 0
989 },
990 {
991 "SVGA3D_R32G32B32_SINT",
992 SVGA3D_R32G32B32_SINT,
993 SVGA3D_DEVCAP_DXFMT_R32G32B32_SINT,
994 1, 1, 12, 0
995 },
996 {
997 "SVGA3D_R16G16B16A16_TYPELESS",
998 SVGA3D_R16G16B16A16_TYPELESS,
999 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_TYPELESS,
1000 1, 1, 8, 0
1001 },
1002 {
1003 "SVGA3D_R16G16B16A16_UINT",
1004 SVGA3D_R16G16B16A16_UINT,
1005 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UINT,
1006 1, 1, 8, 0
1007 },
1008 {
1009 "SVGA3D_R16G16B16A16_SNORM",
1010 SVGA3D_R16G16B16A16_SNORM,
1011 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SNORM,
1012 1, 1, 8, 0
1013 },
1014 {
1015 "SVGA3D_R16G16B16A16_SINT",
1016 SVGA3D_R16G16B16A16_SINT,
1017 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SINT,
1018 1, 1, 8, 0
1019 },
1020 {
1021 "SVGA3D_R32G32_TYPELESS",
1022 SVGA3D_R32G32_TYPELESS,
1023 SVGA3D_DEVCAP_DXFMT_R32G32_TYPELESS,
1024 1, 1, 8, 0
1025 },
1026 {
1027 "SVGA3D_R32G32_UINT",
1028 SVGA3D_R32G32_UINT,
1029 SVGA3D_DEVCAP_DXFMT_R32G32_UINT,
1030 1, 1, 8, 0
1031 },
1032 {
1033 "SVGA3D_R32G32_SINT",
1034 SVGA3D_R32G32_SINT,
1035 SVGA3D_DEVCAP_DXFMT_R32G32_SINT,
1036 1, 1, 8,
1037 0
1038 },
1039 {
1040 "SVGA3D_R32G8X24_TYPELESS",
1041 SVGA3D_R32G8X24_TYPELESS,
1042 SVGA3D_DEVCAP_DXFMT_R32G8X24_TYPELESS,
1043 1, 1, 8, 0
1044 },
1045 {
1046 "SVGA3D_D32_FLOAT_S8X24_UINT",
1047 SVGA3D_D32_FLOAT_S8X24_UINT,
1048 SVGA3D_DEVCAP_DXFMT_D32_FLOAT_S8X24_UINT,
1049 1, 1, 8, 0
1050 },
1051 {
1052 "SVGA3D_R32_FLOAT_X8X24",
1053 SVGA3D_R32_FLOAT_X8X24,
1054 SVGA3D_DEVCAP_DXFMT_R32_FLOAT_X8X24,
1055 1, 1, 8, 0
1056 },
1057 {
1058 "SVGA3D_X32_G8X24_UINT",
1059 SVGA3D_X32_G8X24_UINT,
1060 SVGA3D_DEVCAP_DXFMT_X32_G8X24_UINT,
1061 1, 1, 4, 0
1062 },
1063 {
1064 "SVGA3D_R10G10B10A2_TYPELESS",
1065 SVGA3D_R10G10B10A2_TYPELESS,
1066 SVGA3D_DEVCAP_DXFMT_R10G10B10A2_TYPELESS,
1067 1, 1, 4, 0
1068 },
1069 {
1070 "SVGA3D_R10G10B10A2_UINT",
1071 SVGA3D_R10G10B10A2_UINT,
1072 SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UINT,
1073 1, 1, 4, 0
1074 },
1075 {
1076 "SVGA3D_R11G11B10_FLOAT",
1077 SVGA3D_R11G11B10_FLOAT,
1078 SVGA3D_DEVCAP_DXFMT_R11G11B10_FLOAT,
1079 1, 1, 4, 0
1080 },
1081 {
1082 "SVGA3D_R8G8B8A8_TYPELESS",
1083 SVGA3D_R8G8B8A8_TYPELESS,
1084 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_TYPELESS,
1085 1, 1, 4, 0
1086 },
1087 {
1088 "SVGA3D_R8G8B8A8_UNORM",
1089 SVGA3D_R8G8B8A8_UNORM,
1090 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM,
1091 1, 1, 4, 0
1092 },
1093 {
1094 "SVGA3D_R8G8B8A8_UNORM_SRGB",
1095 SVGA3D_R8G8B8A8_UNORM_SRGB,
1096 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM_SRGB,
1097 1, 1, 4, 0
1098 },
1099 {
1100 "SVGA3D_R8G8B8A8_UINT",
1101 SVGA3D_R8G8B8A8_UINT,
1102 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UINT,
1103 1, 1, 4, 0
1104 },
1105 {
1106 "SVGA3D_R8G8B8A8_SINT",
1107 SVGA3D_R8G8B8A8_SINT,
1108 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SINT,
1109 1, 1, 4, 0
1110 },
1111 {
1112 "SVGA3D_R16G16_TYPELESS",
1113 SVGA3D_R16G16_TYPELESS,
1114 SVGA3D_DEVCAP_DXFMT_R16G16_TYPELESS,
1115 1, 1, 4, 0
1116 },
1117 {
1118 "SVGA3D_R16G16_UINT",
1119 SVGA3D_R16G16_UINT,
1120 SVGA3D_DEVCAP_DXFMT_R16G16_UINT,
1121 1, 1, 4, 0
1122 },
1123 {
1124 "SVGA3D_R16G16_SINT",
1125 SVGA3D_R16G16_SINT,
1126 SVGA3D_DEVCAP_DXFMT_R16G16_SINT,
1127 1, 1, 4, 0
1128 },
1129 {
1130 "SVGA3D_R32_TYPELESS",
1131 SVGA3D_R32_TYPELESS,
1132 SVGA3D_DEVCAP_DXFMT_R32_TYPELESS,
1133 1, 1, 4, 0
1134 },
1135 {
1136 "SVGA3D_D32_FLOAT",
1137 SVGA3D_D32_FLOAT,
1138 SVGA3D_DEVCAP_DXFMT_D32_FLOAT,
1139 1, 1, 4, 0
1140 },
1141 {
1142 "SVGA3D_R32_UINT",
1143 SVGA3D_R32_UINT,
1144 SVGA3D_DEVCAP_DXFMT_R32_UINT,
1145 1, 1, 4, 0
1146 },
1147 {
1148 "SVGA3D_R32_SINT",
1149 SVGA3D_R32_SINT,
1150 SVGA3D_DEVCAP_DXFMT_R32_SINT,
1151 1, 1, 4, 0
1152 },
1153 {
1154 "SVGA3D_R24G8_TYPELESS",
1155 SVGA3D_R24G8_TYPELESS,
1156 SVGA3D_DEVCAP_DXFMT_R24G8_TYPELESS,
1157 1, 1, 4, 0
1158 },
1159 {
1160 "SVGA3D_D24_UNORM_S8_UINT",
1161 SVGA3D_D24_UNORM_S8_UINT,
1162 SVGA3D_DEVCAP_DXFMT_D24_UNORM_S8_UINT,
1163 1, 1, 4, 0
1164 },
1165 {
1166 "SVGA3D_R24_UNORM_X8",
1167 SVGA3D_R24_UNORM_X8,
1168 SVGA3D_DEVCAP_DXFMT_R24_UNORM_X8,
1169 1, 1, 4, 0
1170 },
1171 {
1172 "SVGA3D_X24_G8_UINT",
1173 SVGA3D_X24_G8_UINT,
1174 SVGA3D_DEVCAP_DXFMT_X24_G8_UINT,
1175 1, 1, 4, 0
1176 },
1177 {
1178 "SVGA3D_R8G8_TYPELESS",
1179 SVGA3D_R8G8_TYPELESS,
1180 SVGA3D_DEVCAP_DXFMT_R8G8_TYPELESS,
1181 1, 1, 2, 0
1182 },
1183 {
1184 "SVGA3D_R8G8_UNORM",
1185 SVGA3D_R8G8_UNORM,
1186 SVGA3D_DEVCAP_DXFMT_R8G8_UNORM,
1187 1, 1, 2, 0
1188 },
1189 {
1190 "SVGA3D_R8G8_UINT",
1191 SVGA3D_R8G8_UINT,
1192 SVGA3D_DEVCAP_DXFMT_R8G8_UINT,
1193 1, 1, 2, 0
1194 },
1195 {
1196 "SVGA3D_R8G8_SINT",
1197 SVGA3D_R8G8_SINT,
1198 SVGA3D_DEVCAP_DXFMT_R8G8_SINT,
1199 1, 1, 2, 0
1200 },
1201 {
1202 "SVGA3D_R16_TYPELESS",
1203 SVGA3D_R16_TYPELESS,
1204 SVGA3D_DEVCAP_DXFMT_R16_TYPELESS,
1205 1, 1, 2, 0
1206 },
1207 {
1208 "SVGA3D_R16_UNORM",
1209 SVGA3D_R16_UNORM,
1210 SVGA3D_DEVCAP_DXFMT_R16_UNORM,
1211 1, 1, 2, 0
1212 },
1213 {
1214 "SVGA3D_R16_UINT",
1215 SVGA3D_R16_UINT,
1216 SVGA3D_DEVCAP_DXFMT_R16_UINT,
1217 1, 1, 2, 0
1218 },
1219 {
1220 "SVGA3D_R16_SNORM",
1221 SVGA3D_R16_SNORM,
1222 SVGA3D_DEVCAP_DXFMT_R16_SNORM,
1223 1, 1, 2, 0
1224 },
1225 {
1226 "SVGA3D_R16_SINT",
1227 SVGA3D_R16_SINT,
1228 SVGA3D_DEVCAP_DXFMT_R16_SINT,
1229 1, 1, 2, 0
1230 },
1231 {
1232 "SVGA3D_R8_TYPELESS",
1233 SVGA3D_R8_TYPELESS,
1234 SVGA3D_DEVCAP_DXFMT_R8_TYPELESS,
1235 1, 1, 1, 0
1236 },
1237 {
1238 "SVGA3D_R8_UNORM",
1239 SVGA3D_R8_UNORM,
1240 SVGA3D_DEVCAP_DXFMT_R8_UNORM,
1241 1, 1, 1, 0
1242 },
1243 {
1244 "SVGA3D_R8_UINT",
1245 SVGA3D_R8_UINT,
1246 SVGA3D_DEVCAP_DXFMT_R8_UINT,
1247 1, 1, 1, 0
1248 },
1249 {
1250 "SVGA3D_R8_SNORM",
1251 SVGA3D_R8_SNORM,
1252 SVGA3D_DEVCAP_DXFMT_R8_SNORM,
1253 1, 1, 1, 0
1254 },
1255 {
1256 "SVGA3D_R8_SINT",
1257 SVGA3D_R8_SINT,
1258 SVGA3D_DEVCAP_DXFMT_R8_SINT,
1259 1, 1, 1, 0
1260 },
1261 {
1262 "SVGA3D_P8",
1263 SVGA3D_P8, 0, 0, 0, 0, 0
1264 },
1265 {
1266 "SVGA3D_R9G9B9E5_SHAREDEXP",
1267 SVGA3D_R9G9B9E5_SHAREDEXP,
1268 SVGA3D_DEVCAP_DXFMT_R9G9B9E5_SHAREDEXP,
1269 1, 1, 4, 0
1270 },
1271 {
1272 "SVGA3D_R8G8_B8G8_UNORM",
1273 SVGA3D_R8G8_B8G8_UNORM, 0, 0, 0, 0, 0
1274 },
1275 {
1276 "SVGA3D_G8R8_G8B8_UNORM",
1277 SVGA3D_G8R8_G8B8_UNORM, 0, 0, 0, 0, 0
1278 },
1279 {
1280 "SVGA3D_BC1_TYPELESS",
1281 SVGA3D_BC1_TYPELESS,
1282 SVGA3D_DEVCAP_DXFMT_BC1_TYPELESS,
1283 4, 4, 8, 0
1284 },
1285 {
1286 "SVGA3D_BC1_UNORM_SRGB",
1287 SVGA3D_BC1_UNORM_SRGB,
1288 SVGA3D_DEVCAP_DXFMT_BC1_UNORM_SRGB,
1289 4, 4, 8, 0
1290 },
1291 {
1292 "SVGA3D_BC2_TYPELESS",
1293 SVGA3D_BC2_TYPELESS,
1294 SVGA3D_DEVCAP_DXFMT_BC2_TYPELESS,
1295 4, 4, 16, 0
1296 },
1297 {
1298 "SVGA3D_BC2_UNORM_SRGB",
1299 SVGA3D_BC2_UNORM_SRGB,
1300 SVGA3D_DEVCAP_DXFMT_BC2_UNORM_SRGB,
1301 4, 4, 16, 0
1302 },
1303 {
1304 "SVGA3D_BC3_TYPELESS",
1305 SVGA3D_BC3_TYPELESS,
1306 SVGA3D_DEVCAP_DXFMT_BC3_TYPELESS,
1307 4, 4, 16, 0
1308 },
1309 {
1310 "SVGA3D_BC3_UNORM_SRGB",
1311 SVGA3D_BC3_UNORM_SRGB,
1312 SVGA3D_DEVCAP_DXFMT_BC3_UNORM_SRGB,
1313 4, 4, 16, 0
1314 },
1315 {
1316 "SVGA3D_BC4_TYPELESS",
1317 SVGA3D_BC4_TYPELESS,
1318 SVGA3D_DEVCAP_DXFMT_BC4_TYPELESS,
1319 4, 4, 8, 0
1320 },
1321 {
1322 "SVGA3D_ATI1",
1323 SVGA3D_ATI1, 0, 0, 0, 0, 0
1324 },
1325 {
1326 "SVGA3D_BC4_SNORM",
1327 SVGA3D_BC4_SNORM,
1328 SVGA3D_DEVCAP_DXFMT_BC4_SNORM,
1329 4, 4, 8, 0
1330 },
1331 {
1332 "SVGA3D_BC5_TYPELESS",
1333 SVGA3D_BC5_TYPELESS,
1334 SVGA3D_DEVCAP_DXFMT_BC5_TYPELESS,
1335 4, 4, 16, 0
1336 },
1337 {
1338 "SVGA3D_ATI2",
1339 SVGA3D_ATI2, 0, 0, 0, 0, 0
1340 },
1341 {
1342 "SVGA3D_BC5_SNORM",
1343 SVGA3D_BC5_SNORM,
1344 SVGA3D_DEVCAP_DXFMT_BC5_SNORM,
1345 4, 4, 16, 0
1346 },
1347 {
1348 "SVGA3D_R10G10B10_XR_BIAS_A2_UNORM",
1349 SVGA3D_R10G10B10_XR_BIAS_A2_UNORM, 0, 0, 0, 0, 0
1350 },
1351 {
1352 "SVGA3D_B8G8R8A8_TYPELESS",
1353 SVGA3D_B8G8R8A8_TYPELESS,
1354 SVGA3D_DEVCAP_DXFMT_B8G8R8A8_TYPELESS,
1355 1, 1, 4, 0
1356 },
1357 {
1358 "SVGA3D_B8G8R8A8_UNORM_SRGB",
1359 SVGA3D_B8G8R8A8_UNORM_SRGB,
1360 SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM_SRGB,
1361 1, 1, 4, 0
1362 },
1363 {
1364 "SVGA3D_B8G8R8X8_TYPELESS",
1365 SVGA3D_B8G8R8X8_TYPELESS,
1366 SVGA3D_DEVCAP_DXFMT_B8G8R8X8_TYPELESS,
1367 1, 1, 4, 0
1368 },
1369 {
1370 "SVGA3D_B8G8R8X8_UNORM_SRGB",
1371 SVGA3D_B8G8R8X8_UNORM_SRGB,
1372 SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM_SRGB,
1373 1, 1, 4, 0
1374 },
1375 {
1376 "SVGA3D_Z_DF16",
1377 SVGA3D_Z_DF16,
1378 SVGA3D_DEVCAP_SURFACEFMT_Z_DF16,
1379 1, 1, 2, 0
1380 },
1381 {
1382 "SVGA3D_Z_DF24",
1383 SVGA3D_Z_DF24,
1384 SVGA3D_DEVCAP_SURFACEFMT_Z_DF24,
1385 1, 1, 4, 0
1386 },
1387 {
1388 "SVGA3D_Z_D24S8_INT",
1389 SVGA3D_Z_D24S8_INT,
1390 SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8_INT,
1391 1, 1, 4, 0
1392 },
1393 {
1394 "SVGA3D_YV12",
1395 SVGA3D_YV12, 0, 0, 0, 0, 0
1396 },
1397 {
1398 "SVGA3D_R32G32B32A32_FLOAT",
1399 SVGA3D_R32G32B32A32_FLOAT,
1400 SVGA3D_DEVCAP_DXFMT_R32G32B32A32_FLOAT,
1401 1, 1, 16, 0
1402 },
1403 {
1404 "SVGA3D_R16G16B16A16_FLOAT",
1405 SVGA3D_R16G16B16A16_FLOAT,
1406 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_FLOAT,
1407 1, 1, 8, 0
1408 },
1409 {
1410 "SVGA3D_R16G16B16A16_UNORM",
1411 SVGA3D_R16G16B16A16_UNORM,
1412 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UNORM,
1413 1, 1, 8, 0
1414 },
1415 {
1416 "SVGA3D_R32G32_FLOAT",
1417 SVGA3D_R32G32_FLOAT,
1418 SVGA3D_DEVCAP_DXFMT_R32G32_FLOAT,
1419 1, 1, 8, 0
1420 },
1421 {
1422 "SVGA3D_R10G10B10A2_UNORM",
1423 SVGA3D_R10G10B10A2_UNORM,
1424 SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UNORM,
1425 1, 1, 4, 0
1426 },
1427 {
1428 "SVGA3D_R8G8B8A8_SNORM",
1429 SVGA3D_R8G8B8A8_SNORM,
1430 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SNORM,
1431 1, 1, 4, 0
1432 },
1433 {
1434 "SVGA3D_R16G16_FLOAT",
1435 SVGA3D_R16G16_FLOAT,
1436 SVGA3D_DEVCAP_DXFMT_R16G16_FLOAT,
1437 1, 1, 4, 0
1438 },
1439 {
1440 "SVGA3D_R16G16_UNORM",
1441 SVGA3D_R16G16_UNORM,
1442 SVGA3D_DEVCAP_DXFMT_R16G16_UNORM,
1443 1, 1, 4, 0
1444 },
1445 {
1446 "SVGA3D_R16G16_SNORM",
1447 SVGA3D_R16G16_SNORM,
1448 SVGA3D_DEVCAP_DXFMT_R16G16_SNORM,
1449 1, 1, 4, 0
1450 },
1451 {
1452 "SVGA3D_R32_FLOAT",
1453 SVGA3D_R32_FLOAT,
1454 SVGA3D_DEVCAP_DXFMT_R32_FLOAT,
1455 1, 1, 4, 0
1456 },
1457 {
1458 "SVGA3D_R8G8_SNORM",
1459 SVGA3D_R8G8_SNORM,
1460 SVGA3D_DEVCAP_DXFMT_R8G8_SNORM,
1461 1, 1, 2, 0
1462 },
1463 {
1464 "SVGA3D_R16_FLOAT",
1465 SVGA3D_R16_FLOAT,
1466 SVGA3D_DEVCAP_DXFMT_R16_FLOAT,
1467 1, 1, 2, 0
1468 },
1469 {
1470 "SVGA3D_D16_UNORM",
1471 SVGA3D_D16_UNORM,
1472 SVGA3D_DEVCAP_DXFMT_D16_UNORM,
1473 1, 1, 2, 0
1474 },
1475 {
1476 "SVGA3D_A8_UNORM",
1477 SVGA3D_A8_UNORM,
1478 SVGA3D_DEVCAP_DXFMT_A8_UNORM,
1479 1, 1, 1, 0
1480 },
1481 {
1482 "SVGA3D_BC1_UNORM",
1483 SVGA3D_BC1_UNORM,
1484 SVGA3D_DEVCAP_DXFMT_BC1_UNORM,
1485 4, 4, 8, 0
1486 },
1487 {
1488 "SVGA3D_BC2_UNORM",
1489 SVGA3D_BC2_UNORM,
1490 SVGA3D_DEVCAP_DXFMT_BC2_UNORM,
1491 4, 4, 16, 0
1492 },
1493 {
1494 "SVGA3D_BC3_UNORM",
1495 SVGA3D_BC3_UNORM,
1496 SVGA3D_DEVCAP_DXFMT_BC3_UNORM,
1497 4, 4, 16, 0
1498 },
1499 {
1500 "SVGA3D_B5G6R5_UNORM",
1501 SVGA3D_B5G6R5_UNORM,
1502 SVGA3D_DEVCAP_DXFMT_B5G6R5_UNORM,
1503 1, 1, 2, 0
1504 },
1505 {
1506 "SVGA3D_B5G5R5A1_UNORM",
1507 SVGA3D_B5G5R5A1_UNORM,
1508 SVGA3D_DEVCAP_DXFMT_B5G5R5A1_UNORM,
1509 1, 1, 2, 0
1510 },
1511 {
1512 "SVGA3D_B8G8R8A8_UNORM",
1513 SVGA3D_B8G8R8A8_UNORM,
1514 SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM,
1515 1, 1, 4, 0
1516 },
1517 {
1518 "SVGA3D_B8G8R8X8_UNORM",
1519 SVGA3D_B8G8R8X8_UNORM,
1520 SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM,
1521 1, 1, 4, 0
1522 },
1523 {
1524 "SVGA3D_BC4_UNORM",
1525 SVGA3D_BC4_UNORM,
1526 SVGA3D_DEVCAP_DXFMT_BC4_UNORM,
1527 4, 4, 8, 0
1528 },
1529 {
1530 "SVGA3D_BC5_UNORM",
1531 SVGA3D_BC5_UNORM,
1532 SVGA3D_DEVCAP_DXFMT_BC5_UNORM,
1533 4, 4, 16, 0
1534 }
1535 };
1536
1537 static const SVGA3dSurfaceFormat compat_x8r8g8b8[] = {
1538 SVGA3D_X8R8G8B8, SVGA3D_A8R8G8B8, SVGA3D_B8G8R8X8_UNORM,
1539 SVGA3D_B8G8R8A8_UNORM, 0
1540 };
1541 static const SVGA3dSurfaceFormat compat_r8[] = {
1542 SVGA3D_R8_UNORM, SVGA3D_NV12, SVGA3D_YV12, 0
1543 };
1544 static const SVGA3dSurfaceFormat compat_g8r8[] = {
1545 SVGA3D_R8G8_UNORM, SVGA3D_NV12, 0
1546 };
1547 static const SVGA3dSurfaceFormat compat_r5g6b5[] = {
1548 SVGA3D_R5G6B5, SVGA3D_B5G6R5_UNORM, 0
1549 };
1550
1551 static const struct format_compat_entry format_compats[] = {
1552 {PIPE_FORMAT_B8G8R8X8_UNORM, compat_x8r8g8b8},
1553 {PIPE_FORMAT_B8G8R8A8_UNORM, compat_x8r8g8b8},
1554 {PIPE_FORMAT_R8_UNORM, compat_r8},
1555 {PIPE_FORMAT_R8G8_UNORM, compat_g8r8},
1556 {PIPE_FORMAT_B5G6R5_UNORM, compat_r5g6b5}
1557 };
1558
1559 /**
1560 * Debug only:
1561 * 1. check that format_cap_table[i] matches the i-th SVGA3D format.
1562 * 2. check that format_conversion_table[i].pformat == i.
1563 */
1564 static void
1565 check_format_tables(void)
1566 {
1567 static boolean first_call = TRUE;
1568
1569 if (first_call) {
1570 unsigned i;
1571
1572 STATIC_ASSERT(ARRAY_SIZE(format_cap_table) == SVGA3D_FORMAT_MAX);
1573 for (i = 0; i < ARRAY_SIZE(format_cap_table); i++) {
1574 assert(format_cap_table[i].format == i);
1575 }
1576
1577 STATIC_ASSERT(ARRAY_SIZE(format_conversion_table) == PIPE_FORMAT_COUNT);
1578 for (i = 0; i < ARRAY_SIZE(format_conversion_table); i++) {
1579 assert(format_conversion_table[i].pformat == i);
1580 }
1581
1582 first_call = FALSE;
1583 }
1584 }
1585
1586
1587 /**
1588 * Return string name of an SVGA3dDevCapIndex value.
1589 * For debugging.
1590 */
1591 static const char *
1592 svga_devcap_name(SVGA3dDevCapIndex cap)
1593 {
1594 static const struct debug_named_value devcap_names[] = {
1595 /* Note, we only list the DXFMT devcaps so far */
1596 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_X8R8G8B8),
1597 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_A8R8G8B8),
1598 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R5G6B5),
1599 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_X1R5G5B5),
1600 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_A1R5G5B5),
1601 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_A4R4G4B4),
1602 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Z_D32),
1603 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Z_D16),
1604 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Z_D24S8),
1605 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Z_D15S1),
1606 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_LUMINANCE8),
1607 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_LUMINANCE4_ALPHA4),
1608 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_LUMINANCE16),
1609 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_LUMINANCE8_ALPHA8),
1610 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_DXT1),
1611 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_DXT2),
1612 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_DXT3),
1613 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_DXT4),
1614 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_DXT5),
1615 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BUMPU8V8),
1616 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BUMPL6V5U5),
1617 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BUMPX8L8V8U8),
1618 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD1),
1619 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_ARGB_S10E5),
1620 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_ARGB_S23E8),
1621 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_A2R10G10B10),
1622 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_V8U8),
1623 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Q8W8V8U8),
1624 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_CxV8U8),
1625 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_X8L8V8U8),
1626 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_A2W10V10U10),
1627 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_ALPHA8),
1628 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R_S10E5),
1629 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R_S23E8),
1630 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_RG_S10E5),
1631 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_RG_S23E8),
1632 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BUFFER),
1633 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Z_D24X8),
1634 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_V16U16),
1635 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_G16R16),
1636 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_A16B16G16R16),
1637 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_UYVY),
1638 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_YUY2),
1639 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_NV12),
1640 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_AYUV),
1641 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32B32A32_TYPELESS),
1642 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32B32A32_UINT),
1643 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32B32A32_SINT),
1644 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32B32_TYPELESS),
1645 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32B32_FLOAT),
1646 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32B32_UINT),
1647 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32B32_SINT),
1648 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16B16A16_TYPELESS),
1649 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UINT),
1650 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SNORM),
1651 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SINT),
1652 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32_TYPELESS),
1653 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32_UINT),
1654 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32_SINT),
1655 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G8X24_TYPELESS),
1656 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_D32_FLOAT_S8X24_UINT),
1657 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32_FLOAT_X8X24),
1658 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_X32_G8X24_UINT),
1659 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R10G10B10A2_TYPELESS),
1660 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UINT),
1661 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R11G11B10_FLOAT),
1662 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8B8A8_TYPELESS),
1663 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM),
1664 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM_SRGB),
1665 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UINT),
1666 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SINT),
1667 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16_TYPELESS),
1668 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16_UINT),
1669 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16_SINT),
1670 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32_TYPELESS),
1671 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_D32_FLOAT),
1672 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32_UINT),
1673 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32_SINT),
1674 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R24G8_TYPELESS),
1675 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_D24_UNORM_S8_UINT),
1676 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R24_UNORM_X8),
1677 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_X24_G8_UINT),
1678 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8_TYPELESS),
1679 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8_UNORM),
1680 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8_UINT),
1681 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8_SINT),
1682 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16_TYPELESS),
1683 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16_UNORM),
1684 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16_UINT),
1685 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16_SNORM),
1686 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16_SINT),
1687 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8_TYPELESS),
1688 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8_UNORM),
1689 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8_UINT),
1690 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8_SNORM),
1691 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8_SINT),
1692 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_P8),
1693 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R9G9B9E5_SHAREDEXP),
1694 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8_B8G8_UNORM),
1695 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_G8R8_G8B8_UNORM),
1696 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC1_TYPELESS),
1697 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC1_UNORM_SRGB),
1698 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC2_TYPELESS),
1699 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC2_UNORM_SRGB),
1700 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC3_TYPELESS),
1701 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC3_UNORM_SRGB),
1702 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC4_TYPELESS),
1703 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_ATI1),
1704 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC4_SNORM),
1705 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC5_TYPELESS),
1706 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_ATI2),
1707 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC5_SNORM),
1708 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R10G10B10_XR_BIAS_A2_UNORM),
1709 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_B8G8R8A8_TYPELESS),
1710 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM_SRGB),
1711 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_B8G8R8X8_TYPELESS),
1712 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM_SRGB),
1713 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Z_DF16),
1714 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Z_DF24),
1715 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Z_D24S8_INT),
1716 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_YV12),
1717 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32B32A32_FLOAT),
1718 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16B16A16_FLOAT),
1719 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UNORM),
1720 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32_FLOAT),
1721 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UNORM),
1722 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SNORM),
1723 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16_FLOAT),
1724 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16_UNORM),
1725 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16_SNORM),
1726 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32_FLOAT),
1727 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8_SNORM),
1728 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16_FLOAT),
1729 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_D16_UNORM),
1730 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_A8_UNORM),
1731 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC1_UNORM),
1732 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC2_UNORM),
1733 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC3_UNORM),
1734 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_B5G6R5_UNORM),
1735 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_B5G5R5A1_UNORM),
1736 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM),
1737 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM),
1738 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC4_UNORM),
1739 DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC5_UNORM),
1740 DEBUG_NAMED_VALUE_END,
1741 };
1742 return debug_dump_enum(devcap_names, cap);
1743 }
1744
1745
1746 /**
1747 * Return string for a bitmask of name of SVGA3D_DXFMT_x flags.
1748 * For debugging.
1749 */
1750 static const char *
1751 svga_devcap_format_flags(unsigned flags)
1752 {
1753 static const struct debug_named_value devcap_flags[] = {
1754 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_SUPPORTED),
1755 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_SHADER_SAMPLE),
1756 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_COLOR_RENDERTARGET),
1757 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_DEPTH_RENDERTARGET),
1758 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_BLENDABLE),
1759 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_MIPS),
1760 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_ARRAY),
1761 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_VOLUME),
1762 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_DX_VERTEX_BUFFER),
1763 DEBUG_NAMED_VALUE(SVGA3D_DXFMT_MULTISAMPLE),
1764 DEBUG_NAMED_VALUE_END
1765 };
1766
1767 return debug_dump_flags(devcap_flags, flags);
1768 }
1769
1770
1771 /*
1772 * Get format capabilities from the host. It takes in consideration
1773 * deprecated/unsupported formats, and formats which are implicitely assumed to
1774 * be supported when the host does not provide an explicit capability entry.
1775 */
1776 void
1777 svga_get_format_cap(struct svga_screen *ss,
1778 SVGA3dSurfaceFormat format,
1779 SVGA3dSurfaceFormatCaps *caps)
1780 {
1781 struct svga_winsys_screen *sws = ss->sws;
1782 SVGA3dDevCapResult result;
1783 const struct format_cap *entry;
1784
1785 #ifdef DEBUG
1786 check_format_tables();
1787 #else
1788 (void) check_format_tables;
1789 #endif
1790
1791 assert(format < ARRAY_SIZE(format_cap_table));
1792 entry = &format_cap_table[format];
1793 assert(entry->format == format);
1794
1795 if (entry->devcap && sws->get_cap(sws, entry->devcap, &result)) {
1796 assert(format < SVGA3D_UYVY || entry->defaultOperations == 0);
1797 caps->value = result.u;
1798 } else {
1799 /* Implicitly advertised format -- use default caps */
1800 caps->value = entry->defaultOperations;
1801 }
1802 }
1803
1804
1805 /*
1806 * Get DX format capabilities from VGPU10 device.
1807 */
1808 static void
1809 svga_get_dx_format_cap(struct svga_screen *ss,
1810 SVGA3dSurfaceFormat format,
1811 SVGA3dDevCapResult *caps)
1812 {
1813 struct svga_winsys_screen *sws = ss->sws;
1814 const struct format_cap *entry;
1815
1816 #ifdef DEBUG
1817 check_format_tables();
1818 #else
1819 (void) check_format_tables;
1820 #endif
1821
1822 assert(sws->have_vgpu10);
1823 assert(format < ARRAY_SIZE(format_cap_table));
1824 entry = &format_cap_table[format];
1825 assert(entry->format == format);
1826 assert(entry->devcap > SVGA3D_DEVCAP_DXCONTEXT);
1827
1828 caps->u = 0;
1829 if (entry->devcap) {
1830 sws->get_cap(sws, entry->devcap, caps);
1831
1832 /* pre-SM41 capabable svga device supports SHADER_SAMPLE capability for
1833 * these formats but does not advertise the devcap.
1834 * So enable this bit here.
1835 */
1836 if (!sws->have_sm4_1 &&
1837 (format == SVGA3D_R32_FLOAT_X8X24 ||
1838 format == SVGA3D_R24_UNORM_X8)) {
1839 caps->u |= SVGA3D_DXFMT_SHADER_SAMPLE;
1840 }
1841 }
1842
1843 if (0) {
1844 debug_printf("Format %s, devcap %s = 0x%x (%s)\n",
1845 svga_format_name(format),
1846 svga_devcap_name(entry->devcap),
1847 caps->u,
1848 svga_devcap_format_flags(caps->u));
1849 }
1850 }
1851
1852
1853 void
1854 svga_format_size(SVGA3dSurfaceFormat format,
1855 unsigned *block_width,
1856 unsigned *block_height,
1857 unsigned *bytes_per_block)
1858 {
1859 assert(format < ARRAY_SIZE(format_cap_table));
1860 *block_width = format_cap_table[format].block_width;
1861 *block_height = format_cap_table[format].block_height;
1862 *bytes_per_block = format_cap_table[format].block_bytes;
1863 /* Make sure the table entry was valid */
1864 if (*block_width == 0)
1865 debug_printf("Bad table entry for %s\n", svga_format_name(format));
1866 assert(*block_width);
1867 assert(*block_height);
1868 assert(*bytes_per_block);
1869 }
1870
1871
1872 const char *
1873 svga_format_name(SVGA3dSurfaceFormat format)
1874 {
1875 assert(format < ARRAY_SIZE(format_cap_table));
1876 return format_cap_table[format].name;
1877 }
1878
1879
1880 /**
1881 * Is the given SVGA3dSurfaceFormat a signed or unsigned integer color format?
1882 */
1883 boolean
1884 svga_format_is_integer(SVGA3dSurfaceFormat format)
1885 {
1886 switch (format) {
1887 case SVGA3D_R32G32B32A32_SINT:
1888 case SVGA3D_R32G32B32_SINT:
1889 case SVGA3D_R32G32_SINT:
1890 case SVGA3D_R32_SINT:
1891 case SVGA3D_R16G16B16A16_SINT:
1892 case SVGA3D_R16G16_SINT:
1893 case SVGA3D_R16_SINT:
1894 case SVGA3D_R8G8B8A8_SINT:
1895 case SVGA3D_R8G8_SINT:
1896 case SVGA3D_R8_SINT:
1897 case SVGA3D_R32G32B32A32_UINT:
1898 case SVGA3D_R32G32B32_UINT:
1899 case SVGA3D_R32G32_UINT:
1900 case SVGA3D_R32_UINT:
1901 case SVGA3D_R16G16B16A16_UINT:
1902 case SVGA3D_R16G16_UINT:
1903 case SVGA3D_R16_UINT:
1904 case SVGA3D_R8G8B8A8_UINT:
1905 case SVGA3D_R8G8_UINT:
1906 case SVGA3D_R8_UINT:
1907 case SVGA3D_R10G10B10A2_UINT:
1908 return TRUE;
1909 default:
1910 return FALSE;
1911 }
1912 }
1913
1914 boolean
1915 svga_format_support_gen_mips(enum pipe_format format)
1916 {
1917 assert(format < ARRAY_SIZE(format_conversion_table));
1918 return ((format_conversion_table[format].flags & TF_GEN_MIPS) > 0);
1919 }
1920
1921
1922 /**
1923 * Given a texture format, return the expected data type returned from
1924 * the texture sampler. For example, UNORM8 formats return floating point
1925 * values while SINT formats returned signed integer values.
1926 * Note: this function could be moved into the gallum u_format.[ch] code
1927 * if it's useful to anyone else.
1928 */
1929 enum tgsi_return_type
1930 svga_get_texture_datatype(enum pipe_format format)
1931 {
1932 const struct util_format_description *desc = util_format_description(format);
1933 enum tgsi_return_type t;
1934
1935 if (desc->layout == UTIL_FORMAT_LAYOUT_PLAIN ) {
1936 if (util_format_is_depth_or_stencil(format)) {
1937 t = TGSI_RETURN_TYPE_FLOAT; /* XXX revisit this */
1938 }
1939 else if (desc->channel[0].type == UTIL_FORMAT_TYPE_FLOAT) {
1940 t = TGSI_RETURN_TYPE_FLOAT;
1941 }
1942 else if (desc->channel[0].type == UTIL_FORMAT_TYPE_UNSIGNED) {
1943 t = desc->channel[0].normalized ? TGSI_RETURN_TYPE_UNORM : TGSI_RETURN_TYPE_UINT;
1944 }
1945 else if (desc->channel[0].type == UTIL_FORMAT_TYPE_SIGNED) {
1946 t = desc->channel[0].normalized ? TGSI_RETURN_TYPE_SNORM : TGSI_RETURN_TYPE_SINT;
1947 }
1948 else {
1949 assert(!"Unexpected channel type in svga_get_texture_datatype()");
1950 t = TGSI_RETURN_TYPE_FLOAT;
1951 }
1952 }
1953 else {
1954 /* compressed format, shared exponent format, etc. */
1955 switch (format) {
1956 case PIPE_FORMAT_DXT1_RGB:
1957 case PIPE_FORMAT_DXT1_RGBA:
1958 case PIPE_FORMAT_DXT3_RGBA:
1959 case PIPE_FORMAT_DXT5_RGBA:
1960 case PIPE_FORMAT_DXT1_SRGB:
1961 case PIPE_FORMAT_DXT1_SRGBA:
1962 case PIPE_FORMAT_DXT3_SRGBA:
1963 case PIPE_FORMAT_DXT5_SRGBA:
1964 case PIPE_FORMAT_RGTC1_UNORM:
1965 case PIPE_FORMAT_RGTC2_UNORM:
1966 case PIPE_FORMAT_LATC1_UNORM:
1967 case PIPE_FORMAT_LATC2_UNORM:
1968 case PIPE_FORMAT_ETC1_RGB8:
1969 t = TGSI_RETURN_TYPE_UNORM;
1970 break;
1971 case PIPE_FORMAT_RGTC1_SNORM:
1972 case PIPE_FORMAT_RGTC2_SNORM:
1973 case PIPE_FORMAT_LATC1_SNORM:
1974 case PIPE_FORMAT_LATC2_SNORM:
1975 case PIPE_FORMAT_R10G10B10X2_SNORM:
1976 t = TGSI_RETURN_TYPE_SNORM;
1977 break;
1978 case PIPE_FORMAT_R11G11B10_FLOAT:
1979 case PIPE_FORMAT_R9G9B9E5_FLOAT:
1980 t = TGSI_RETURN_TYPE_FLOAT;
1981 break;
1982 default:
1983 assert(!"Unexpected channel type in svga_get_texture_datatype()");
1984 t = TGSI_RETURN_TYPE_FLOAT;
1985 }
1986 }
1987
1988 return t;
1989 }
1990
1991
1992 /**
1993 * Given an svga context, return true iff there are currently any integer color
1994 * buffers attached to the framebuffer.
1995 */
1996 boolean
1997 svga_has_any_integer_cbufs(const struct svga_context *svga)
1998 {
1999 unsigned i;
2000 for (i = 0; i < PIPE_MAX_COLOR_BUFS; ++i) {
2001 struct pipe_surface *cbuf = svga->curr.framebuffer.cbufs[i];
2002
2003 if (cbuf && util_format_is_pure_integer(cbuf->format)) {
2004 return TRUE;
2005 }
2006 }
2007 return FALSE;
2008 }
2009
2010
2011 /**
2012 * Given an SVGA format, return the corresponding typeless format.
2013 * If there is no typeless format, return the format unchanged.
2014 */
2015 SVGA3dSurfaceFormat
2016 svga_typeless_format(SVGA3dSurfaceFormat format)
2017 {
2018 switch (format) {
2019 case SVGA3D_R32G32B32A32_UINT:
2020 case SVGA3D_R32G32B32A32_SINT:
2021 case SVGA3D_R32G32B32A32_FLOAT:
2022 return SVGA3D_R32G32B32A32_TYPELESS;
2023 case SVGA3D_R32G32B32_FLOAT:
2024 case SVGA3D_R32G32B32_UINT:
2025 case SVGA3D_R32G32B32_SINT:
2026 return SVGA3D_R32G32B32_TYPELESS;
2027 case SVGA3D_R16G16B16A16_UINT:
2028 case SVGA3D_R16G16B16A16_UNORM:
2029 case SVGA3D_R16G16B16A16_SNORM:
2030 case SVGA3D_R16G16B16A16_SINT:
2031 case SVGA3D_R16G16B16A16_FLOAT:
2032 return SVGA3D_R16G16B16A16_TYPELESS;
2033 case SVGA3D_R32G32_UINT:
2034 case SVGA3D_R32G32_SINT:
2035 case SVGA3D_R32G32_FLOAT:
2036 return SVGA3D_R32G32_TYPELESS;
2037 case SVGA3D_D32_FLOAT_S8X24_UINT:
2038 case SVGA3D_X32_G8X24_UINT:
2039 case SVGA3D_R32G8X24_TYPELESS:
2040 return SVGA3D_R32G8X24_TYPELESS;
2041 case SVGA3D_R10G10B10A2_UINT:
2042 case SVGA3D_R10G10B10A2_UNORM:
2043 return SVGA3D_R10G10B10A2_TYPELESS;
2044 case SVGA3D_R8G8B8A8_UNORM:
2045 case SVGA3D_R8G8B8A8_SNORM:
2046 case SVGA3D_R8G8B8A8_UNORM_SRGB:
2047 case SVGA3D_R8G8B8A8_UINT:
2048 case SVGA3D_R8G8B8A8_SINT:
2049 case SVGA3D_R8G8B8A8_TYPELESS:
2050 return SVGA3D_R8G8B8A8_TYPELESS;
2051 case SVGA3D_R16G16_UINT:
2052 case SVGA3D_R16G16_SINT:
2053 case SVGA3D_R16G16_UNORM:
2054 case SVGA3D_R16G16_SNORM:
2055 case SVGA3D_R16G16_FLOAT:
2056 return SVGA3D_R16G16_TYPELESS;
2057 case SVGA3D_D32_FLOAT:
2058 case SVGA3D_R32_FLOAT:
2059 case SVGA3D_R32_UINT:
2060 case SVGA3D_R32_SINT:
2061 case SVGA3D_R32_TYPELESS:
2062 return SVGA3D_R32_TYPELESS;
2063 case SVGA3D_D24_UNORM_S8_UINT:
2064 case SVGA3D_R24G8_TYPELESS:
2065 return SVGA3D_R24G8_TYPELESS;
2066 case SVGA3D_X24_G8_UINT:
2067 return SVGA3D_R24_UNORM_X8;
2068 case SVGA3D_R8G8_UNORM:
2069 case SVGA3D_R8G8_SNORM:
2070 case SVGA3D_R8G8_UINT:
2071 case SVGA3D_R8G8_SINT:
2072 return SVGA3D_R8G8_TYPELESS;
2073 case SVGA3D_D16_UNORM:
2074 case SVGA3D_R16_UNORM:
2075 case SVGA3D_R16_UINT:
2076 case SVGA3D_R16_SNORM:
2077 case SVGA3D_R16_SINT:
2078 case SVGA3D_R16_FLOAT:
2079 case SVGA3D_R16_TYPELESS:
2080 return SVGA3D_R16_TYPELESS;
2081 case SVGA3D_R8_UNORM:
2082 case SVGA3D_R8_UINT:
2083 case SVGA3D_R8_SNORM:
2084 case SVGA3D_R8_SINT:
2085 return SVGA3D_R8_TYPELESS;
2086 case SVGA3D_B8G8R8A8_UNORM_SRGB:
2087 case SVGA3D_B8G8R8A8_UNORM:
2088 case SVGA3D_B8G8R8A8_TYPELESS:
2089 return SVGA3D_B8G8R8A8_TYPELESS;
2090 case SVGA3D_B8G8R8X8_UNORM_SRGB:
2091 case SVGA3D_B8G8R8X8_UNORM:
2092 case SVGA3D_B8G8R8X8_TYPELESS:
2093 return SVGA3D_B8G8R8X8_TYPELESS;
2094 case SVGA3D_BC1_UNORM:
2095 case SVGA3D_BC1_UNORM_SRGB:
2096 case SVGA3D_BC1_TYPELESS:
2097 return SVGA3D_BC1_TYPELESS;
2098 case SVGA3D_BC2_UNORM:
2099 case SVGA3D_BC2_UNORM_SRGB:
2100 case SVGA3D_BC2_TYPELESS:
2101 return SVGA3D_BC2_TYPELESS;
2102 case SVGA3D_BC3_UNORM:
2103 case SVGA3D_BC3_UNORM_SRGB:
2104 case SVGA3D_BC3_TYPELESS:
2105 return SVGA3D_BC3_TYPELESS;
2106 case SVGA3D_BC4_UNORM:
2107 case SVGA3D_BC4_SNORM:
2108 return SVGA3D_BC4_TYPELESS;
2109 case SVGA3D_BC5_UNORM:
2110 case SVGA3D_BC5_SNORM:
2111 return SVGA3D_BC5_TYPELESS;
2112
2113 /* Special cases (no corresponding _TYPELESS formats) */
2114 case SVGA3D_A8_UNORM:
2115 case SVGA3D_B5G5R5A1_UNORM:
2116 case SVGA3D_B5G6R5_UNORM:
2117 case SVGA3D_R11G11B10_FLOAT:
2118 case SVGA3D_R9G9B9E5_SHAREDEXP:
2119 return format;
2120 default:
2121 debug_printf("Unexpected format %s in %s\n",
2122 svga_format_name(format), __FUNCTION__);
2123 return format;
2124 }
2125 }
2126
2127
2128 /**
2129 * Given a surface format, return the corresponding format to use for
2130 * a texture sampler. In most cases, it's the format unchanged, but there
2131 * are some special cases.
2132 */
2133 SVGA3dSurfaceFormat
2134 svga_sampler_format(SVGA3dSurfaceFormat format)
2135 {
2136 switch (format) {
2137 case SVGA3D_D16_UNORM:
2138 return SVGA3D_R16_UNORM;
2139 case SVGA3D_D24_UNORM_S8_UINT:
2140 return SVGA3D_R24_UNORM_X8;
2141 case SVGA3D_D32_FLOAT:
2142 return SVGA3D_R32_FLOAT;
2143 case SVGA3D_D32_FLOAT_S8X24_UINT:
2144 return SVGA3D_R32_FLOAT_X8X24;
2145 default:
2146 return format;
2147 }
2148 }
2149
2150
2151 /**
2152 * Is the given format an uncompressed snorm format?
2153 */
2154 bool
2155 svga_format_is_uncompressed_snorm(SVGA3dSurfaceFormat format)
2156 {
2157 switch (format) {
2158 case SVGA3D_R8G8B8A8_SNORM:
2159 case SVGA3D_R8G8_SNORM:
2160 case SVGA3D_R8_SNORM:
2161 case SVGA3D_R16G16B16A16_SNORM:
2162 case SVGA3D_R16G16_SNORM:
2163 case SVGA3D_R16_SNORM:
2164 return true;
2165 default:
2166 return false;
2167 }
2168 }
2169
2170
2171 bool
2172 svga_format_is_typeless(SVGA3dSurfaceFormat format)
2173 {
2174 switch (format) {
2175 case SVGA3D_R32G32B32A32_TYPELESS:
2176 case SVGA3D_R32G32B32_TYPELESS:
2177 case SVGA3D_R16G16B16A16_TYPELESS:
2178 case SVGA3D_R32G32_TYPELESS:
2179 case SVGA3D_R32G8X24_TYPELESS:
2180 case SVGA3D_R10G10B10A2_TYPELESS:
2181 case SVGA3D_R8G8B8A8_TYPELESS:
2182 case SVGA3D_R16G16_TYPELESS:
2183 case SVGA3D_R32_TYPELESS:
2184 case SVGA3D_R24G8_TYPELESS:
2185 case SVGA3D_R8G8_TYPELESS:
2186 case SVGA3D_R16_TYPELESS:
2187 case SVGA3D_R8_TYPELESS:
2188 case SVGA3D_BC1_TYPELESS:
2189 case SVGA3D_BC2_TYPELESS:
2190 case SVGA3D_BC3_TYPELESS:
2191 case SVGA3D_BC4_TYPELESS:
2192 case SVGA3D_BC5_TYPELESS:
2193 case SVGA3D_B8G8R8A8_TYPELESS:
2194 case SVGA3D_B8G8R8X8_TYPELESS:
2195 return true;
2196 default:
2197 return false;
2198 }
2199 }
2200
2201
2202 /**
2203 * \brief Can we import a surface with a given SVGA3D format as a texture?
2204 *
2205 * \param ss[in] pointer to the svga screen.
2206 * \param pformat[in] pipe format of the local texture.
2207 * \param sformat[in] svga3d format of the imported surface.
2208 * \param bind[in] bind flags of the imported texture.
2209 * \param verbose[in] Print out incompatibilities in debug mode.
2210 */
2211 bool
2212 svga_format_is_shareable(const struct svga_screen *ss,
2213 enum pipe_format pformat,
2214 SVGA3dSurfaceFormat sformat,
2215 unsigned bind,
2216 bool verbose)
2217 {
2218 SVGA3dSurfaceFormat default_format =
2219 svga_translate_format(ss, pformat, bind);
2220 int i;
2221
2222 if (default_format == SVGA3D_FORMAT_INVALID)
2223 return false;
2224 if (default_format == sformat)
2225 return true;
2226
2227 for (i = 0; i < ARRAY_SIZE(format_compats); ++i) {
2228 if (format_compats[i].pformat == pformat) {
2229 const SVGA3dSurfaceFormat *compat_format =
2230 format_compats[i].compat_format;
2231 while (*compat_format != 0) {
2232 if (*compat_format == sformat)
2233 return true;
2234 compat_format++;
2235 }
2236 }
2237 }
2238
2239 if (verbose) {
2240 debug_printf("Incompatible imported surface format.\n");
2241 debug_printf("Texture format: \"%s\". Imported format: \"%s\".\n",
2242 svga_format_name(default_format),
2243 svga_format_name(sformat));
2244 }
2245
2246 return false;
2247 }
2248
2249
2250 /**
2251 * Return the sRGB format which corresponds to the given (linear) format.
2252 * If there's no such sRGB format, return the format as-is.
2253 */
2254 SVGA3dSurfaceFormat
2255 svga_linear_to_srgb(SVGA3dSurfaceFormat format)
2256 {
2257 switch (format) {
2258 case SVGA3D_R8G8B8A8_UNORM:
2259 return SVGA3D_R8G8B8A8_UNORM_SRGB;
2260 case SVGA3D_BC1_UNORM:
2261 return SVGA3D_BC1_UNORM_SRGB;
2262 case SVGA3D_BC2_UNORM:
2263 return SVGA3D_BC2_UNORM_SRGB;
2264 case SVGA3D_BC3_UNORM:
2265 return SVGA3D_BC3_UNORM_SRGB;
2266 case SVGA3D_B8G8R8A8_UNORM:
2267 return SVGA3D_B8G8R8A8_UNORM_SRGB;
2268 case SVGA3D_B8G8R8X8_UNORM:
2269 return SVGA3D_B8G8R8X8_UNORM_SRGB;
2270 default:
2271 return format;
2272 }
2273 }
2274
2275
2276 /**
2277 * Implement pipe_screen::is_format_supported().
2278 * \param bindings bitmask of PIPE_BIND_x flags
2279 */
2280 bool
2281 svga_is_format_supported(struct pipe_screen *screen,
2282 enum pipe_format format,
2283 enum pipe_texture_target target,
2284 unsigned sample_count,
2285 unsigned storage_sample_count,
2286 unsigned bindings)
2287 {
2288 struct svga_screen *ss = svga_screen(screen);
2289 SVGA3dSurfaceFormat svga_format;
2290 SVGA3dSurfaceFormatCaps caps;
2291 SVGA3dSurfaceFormatCaps mask;
2292
2293 assert(bindings);
2294 assert(!ss->sws->have_vgpu10);
2295
2296 /* Multisamples is not supported in VGPU9 device */
2297 if (sample_count > 1)
2298 return false;
2299
2300 svga_format = svga_translate_format(ss, format, bindings);
2301 if (svga_format == SVGA3D_FORMAT_INVALID) {
2302 return false;
2303 }
2304
2305 if (util_format_is_srgb(format) &&
2306 (bindings & PIPE_BIND_DISPLAY_TARGET)) {
2307 /* We only support sRGB rendering with vgpu10 */
2308 return false;
2309 }
2310
2311 /*
2312 * Override host capabilities, so that we end up with the same
2313 * visuals for all virtual hardware implementations.
2314 */
2315 if (bindings & PIPE_BIND_DISPLAY_TARGET) {
2316 switch (svga_format) {
2317 case SVGA3D_A8R8G8B8:
2318 case SVGA3D_X8R8G8B8:
2319 case SVGA3D_R5G6B5:
2320 break;
2321
2322 /* VGPU10 formats */
2323 case SVGA3D_B8G8R8A8_UNORM:
2324 case SVGA3D_B8G8R8X8_UNORM:
2325 case SVGA3D_B5G6R5_UNORM:
2326 case SVGA3D_B8G8R8X8_UNORM_SRGB:
2327 case SVGA3D_B8G8R8A8_UNORM_SRGB:
2328 case SVGA3D_R8G8B8A8_UNORM_SRGB:
2329 break;
2330
2331 /* Often unsupported/problematic. This means we end up with the same
2332 * visuals for all virtual hardware implementations.
2333 */
2334 case SVGA3D_A4R4G4B4:
2335 case SVGA3D_A1R5G5B5:
2336 return false;
2337
2338 default:
2339 return false;
2340 }
2341 }
2342
2343 /*
2344 * Query the host capabilities.
2345 */
2346 svga_get_format_cap(ss, svga_format, &caps);
2347
2348 if (bindings & PIPE_BIND_RENDER_TARGET) {
2349 /* Check that the color surface is blendable, unless it's an
2350 * integer format.
2351 */
2352 if (!svga_format_is_integer(svga_format) &&
2353 (caps.value & SVGA3DFORMAT_OP_NOALPHABLEND)) {
2354 return false;
2355 }
2356 }
2357
2358 mask.value = 0;
2359 if (bindings & PIPE_BIND_RENDER_TARGET)
2360 mask.value |= SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET;
2361
2362 if (bindings & PIPE_BIND_DEPTH_STENCIL)
2363 mask.value |= SVGA3DFORMAT_OP_ZSTENCIL;
2364
2365 if (bindings & PIPE_BIND_SAMPLER_VIEW)
2366 mask.value |= SVGA3DFORMAT_OP_TEXTURE;
2367
2368 if (target == PIPE_TEXTURE_CUBE)
2369 mask.value |= SVGA3DFORMAT_OP_CUBETEXTURE;
2370 else if (target == PIPE_TEXTURE_3D)
2371 mask.value |= SVGA3DFORMAT_OP_VOLUMETEXTURE;
2372
2373 return (caps.value & mask.value) == mask.value;
2374 }
2375
2376
2377 /**
2378 * Implement pipe_screen::is_format_supported() for VGPU10 device.
2379 * \param bindings bitmask of PIPE_BIND_x flags
2380 */
2381 bool
2382 svga_is_dx_format_supported(struct pipe_screen *screen,
2383 enum pipe_format format,
2384 enum pipe_texture_target target,
2385 unsigned sample_count,
2386 unsigned storage_sample_count,
2387 unsigned bindings)
2388 {
2389 struct svga_screen *ss = svga_screen(screen);
2390 SVGA3dSurfaceFormat svga_format;
2391 SVGA3dDevCapResult caps;
2392 unsigned int mask = 0;
2393
2394 assert(bindings);
2395 assert(ss->sws->have_vgpu10);
2396
2397 if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
2398 return false;
2399
2400 if (sample_count > 1) {
2401 /* In ms_samples, if bit N is set it means that we support
2402 * multisample with N+1 samples per pixel.
2403 */
2404 if ((ss->ms_samples & (1 << (sample_count - 1))) == 0) {
2405 return false;
2406 }
2407 mask |= SVGA3D_DXFMT_MULTISAMPLE;
2408 }
2409
2410 /*
2411 * For VGPU10 vertex formats, skip querying host capabilities
2412 */
2413
2414 if (bindings & PIPE_BIND_VERTEX_BUFFER) {
2415 SVGA3dSurfaceFormat svga_format;
2416 unsigned flags;
2417 svga_translate_vertex_format_vgpu10(format, &svga_format, &flags);
2418 return svga_format != SVGA3D_FORMAT_INVALID;
2419 }
2420
2421 svga_format = svga_translate_format(ss, format, bindings);
2422 if (svga_format == SVGA3D_FORMAT_INVALID) {
2423 return false;
2424 }
2425
2426 /*
2427 * Override host capabilities, so that we end up with the same
2428 * visuals for all virtual hardware implementations.
2429 */
2430 if (bindings & PIPE_BIND_DISPLAY_TARGET) {
2431 switch (svga_format) {
2432 case SVGA3D_A8R8G8B8:
2433 case SVGA3D_X8R8G8B8:
2434 case SVGA3D_R5G6B5:
2435 break;
2436
2437 /* VGPU10 formats */
2438 case SVGA3D_B8G8R8A8_UNORM:
2439 case SVGA3D_B8G8R8X8_UNORM:
2440 case SVGA3D_B5G6R5_UNORM:
2441 case SVGA3D_B8G8R8X8_UNORM_SRGB:
2442 case SVGA3D_B8G8R8A8_UNORM_SRGB:
2443 case SVGA3D_R8G8B8A8_UNORM_SRGB:
2444 break;
2445
2446 /* Often unsupported/problematic. This means we end up with the same
2447 * visuals for all virtual hardware implementations.
2448 */
2449 case SVGA3D_A4R4G4B4:
2450 case SVGA3D_A1R5G5B5:
2451 return false;
2452
2453 default:
2454 return false;
2455 }
2456 }
2457
2458 /*
2459 * Query the host capabilities.
2460 */
2461 svga_get_dx_format_cap(ss, svga_format, &caps);
2462
2463 if (bindings & PIPE_BIND_RENDER_TARGET) {
2464 /* Check that the color surface is blendable, unless it's an
2465 * integer format.
2466 */
2467 if (!(svga_format_is_integer(svga_format) ||
2468 (caps.u & SVGA3D_DXFMT_BLENDABLE))) {
2469 return false;
2470 }
2471 mask |= SVGA3D_DXFMT_COLOR_RENDERTARGET;
2472 }
2473
2474 if (bindings & PIPE_BIND_DEPTH_STENCIL)
2475 mask |= SVGA3D_DXFMT_DEPTH_RENDERTARGET;
2476
2477 switch (target) {
2478 case PIPE_TEXTURE_3D:
2479 mask |= SVGA3D_DXFMT_VOLUME;
2480 break;
2481 case PIPE_TEXTURE_1D_ARRAY:
2482 case PIPE_TEXTURE_2D_ARRAY:
2483 case PIPE_TEXTURE_CUBE_ARRAY:
2484 mask |= SVGA3D_DXFMT_ARRAY;
2485 break;
2486 default:
2487 break;
2488 }
2489
2490 /* Is the format supported for rendering */
2491 if ((caps.u & mask) != mask)
2492 return false;
2493
2494 if (bindings & PIPE_BIND_SAMPLER_VIEW) {
2495 SVGA3dSurfaceFormat sampler_format;
2496
2497 /* Get the sampler view format */
2498 sampler_format = svga_sampler_format(svga_format);
2499 if (sampler_format != svga_format) {
2500 caps.u = 0;
2501 svga_get_dx_format_cap(ss, sampler_format, &caps);
2502 mask &= SVGA3D_DXFMT_VOLUME;
2503 mask |= SVGA3D_DXFMT_SHADER_SAMPLE;
2504 if ((caps.u & mask) != mask)
2505 return false;
2506 }
2507 }
2508
2509 return true;
2510 }