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svga: clean up format_cap_table
[mesa.git] / src / gallium / drivers / svga / svga_format.c
1 /**********************************************************
2 * Copyright 2011 VMware, Inc. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 **********************************************************/
25
26
27 #include "pipe/p_format.h"
28 #include "util/u_debug.h"
29 #include "util/u_format.h"
30 #include "util/u_memory.h"
31
32 #include "svga_winsys.h"
33 #include "svga_screen.h"
34 #include "svga_format.h"
35
36
37 /** Describes mapping from gallium formats to SVGA vertex/pixel formats */
38 struct vgpu10_format_entry
39 {
40 enum pipe_format pformat;
41 SVGA3dSurfaceFormat vertex_format;
42 SVGA3dSurfaceFormat pixel_format;
43 unsigned flags;
44 };
45
46 struct format_compat_entry
47 {
48 enum pipe_format pformat;
49 const SVGA3dSurfaceFormat *compat_format;
50 };
51
52 static const struct vgpu10_format_entry format_conversion_table[] =
53 {
54 /* Gallium format SVGA3D vertex format SVGA3D pixel format Flags */
55 { PIPE_FORMAT_NONE, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
56 { PIPE_FORMAT_B8G8R8A8_UNORM, SVGA3D_B8G8R8A8_UNORM, SVGA3D_B8G8R8A8_UNORM, TF_GEN_MIPS },
57 { PIPE_FORMAT_B8G8R8X8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_B8G8R8X8_UNORM, TF_GEN_MIPS },
58 { PIPE_FORMAT_A8R8G8B8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
59 { PIPE_FORMAT_X8R8G8B8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
60 { PIPE_FORMAT_B5G5R5A1_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_B5G5R5A1_UNORM, TF_GEN_MIPS },
61 { PIPE_FORMAT_B4G4R4A4_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
62 { PIPE_FORMAT_B5G6R5_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_B5G6R5_UNORM, TF_GEN_MIPS },
63 { PIPE_FORMAT_R10G10B10A2_UNORM, SVGA3D_R10G10B10A2_UNORM, SVGA3D_R10G10B10A2_UNORM, TF_GEN_MIPS },
64 { PIPE_FORMAT_L8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
65 { PIPE_FORMAT_A8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_A8_UNORM, TF_GEN_MIPS },
66 { PIPE_FORMAT_I8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
67 { PIPE_FORMAT_L8A8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
68 { PIPE_FORMAT_L16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
69 { PIPE_FORMAT_UYVY, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
70 { PIPE_FORMAT_YUYV, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
71 { PIPE_FORMAT_Z16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_D16_UNORM, 0 },
72 { PIPE_FORMAT_Z32_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
73 { PIPE_FORMAT_Z32_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_D32_FLOAT, 0 },
74 { PIPE_FORMAT_Z24_UNORM_S8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_D24_UNORM_S8_UINT, 0 },
75 { PIPE_FORMAT_S8_UINT_Z24_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
76 { PIPE_FORMAT_Z24X8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_D24_UNORM_S8_UINT, 0 },
77 { PIPE_FORMAT_X8Z24_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
78 { PIPE_FORMAT_S8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
79 { PIPE_FORMAT_R64_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
80 { PIPE_FORMAT_R64G64_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
81 { PIPE_FORMAT_R64G64B64_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
82 { PIPE_FORMAT_R64G64B64A64_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
83 { PIPE_FORMAT_R32_FLOAT, SVGA3D_R32_FLOAT, SVGA3D_R32_FLOAT, TF_GEN_MIPS },
84 { PIPE_FORMAT_R32G32_FLOAT, SVGA3D_R32G32_FLOAT, SVGA3D_R32G32_FLOAT, TF_GEN_MIPS },
85 { PIPE_FORMAT_R32G32B32_FLOAT, SVGA3D_R32G32B32_FLOAT, SVGA3D_R32G32B32_FLOAT, TF_GEN_MIPS },
86 { PIPE_FORMAT_R32G32B32A32_FLOAT, SVGA3D_R32G32B32A32_FLOAT, SVGA3D_R32G32B32A32_FLOAT, TF_GEN_MIPS },
87 { PIPE_FORMAT_R32_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
88 { PIPE_FORMAT_R32G32_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
89 { PIPE_FORMAT_R32G32B32_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
90 { PIPE_FORMAT_R32G32B32A32_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
91 { PIPE_FORMAT_R32_USCALED, SVGA3D_R32_UINT, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
92 { PIPE_FORMAT_R32G32_USCALED, SVGA3D_R32G32_UINT, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
93 { PIPE_FORMAT_R32G32B32_USCALED, SVGA3D_R32G32B32_UINT, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
94 { PIPE_FORMAT_R32G32B32A32_USCALED, SVGA3D_R32G32B32A32_UINT, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
95 { PIPE_FORMAT_R32_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
96 { PIPE_FORMAT_R32G32_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
97 { PIPE_FORMAT_R32G32B32_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
98 { PIPE_FORMAT_R32G32B32A32_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
99 { PIPE_FORMAT_R32_SSCALED, SVGA3D_R32_SINT, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
100 { PIPE_FORMAT_R32G32_SSCALED, SVGA3D_R32G32_SINT, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
101 { PIPE_FORMAT_R32G32B32_SSCALED, SVGA3D_R32G32B32_SINT, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
102 { PIPE_FORMAT_R32G32B32A32_SSCALED, SVGA3D_R32G32B32A32_SINT, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
103 { PIPE_FORMAT_R16_UNORM, SVGA3D_R16_UNORM, SVGA3D_R16_UNORM, TF_GEN_MIPS },
104 { PIPE_FORMAT_R16G16_UNORM, SVGA3D_R16G16_UNORM, SVGA3D_R16G16_UNORM, TF_GEN_MIPS },
105 { PIPE_FORMAT_R16G16B16_UNORM, SVGA3D_R16G16B16A16_UNORM, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
106 { PIPE_FORMAT_R16G16B16A16_UNORM, SVGA3D_R16G16B16A16_UNORM, SVGA3D_R16G16B16A16_UNORM, TF_GEN_MIPS },
107 { PIPE_FORMAT_R16_USCALED, SVGA3D_R16_UINT, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
108 { PIPE_FORMAT_R16G16_USCALED, SVGA3D_R16G16_UINT, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
109 { PIPE_FORMAT_R16G16B16_USCALED, SVGA3D_R16G16B16A16_UINT, SVGA3D_FORMAT_INVALID, VF_W_TO_1 | VF_U_TO_F_CAST },
110 { PIPE_FORMAT_R16G16B16A16_USCALED, SVGA3D_R16G16B16A16_UINT, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
111 { PIPE_FORMAT_R16_SNORM, SVGA3D_R16_SNORM, SVGA3D_R16_SNORM, 0 },
112 { PIPE_FORMAT_R16G16_SNORM, SVGA3D_R16G16_SNORM, SVGA3D_R16G16_SNORM, 0 },
113 { PIPE_FORMAT_R16G16B16_SNORM, SVGA3D_R16G16B16A16_SNORM, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
114 { PIPE_FORMAT_R16G16B16A16_SNORM, SVGA3D_R16G16B16A16_SNORM, SVGA3D_R16G16B16A16_SNORM, 0 },
115 { PIPE_FORMAT_R16_SSCALED, SVGA3D_R16_SINT, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
116 { PIPE_FORMAT_R16G16_SSCALED, SVGA3D_R16G16_SINT, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
117 { PIPE_FORMAT_R16G16B16_SSCALED, SVGA3D_R16G16B16A16_SINT, SVGA3D_FORMAT_INVALID, VF_W_TO_1 | VF_I_TO_F_CAST },
118 { PIPE_FORMAT_R16G16B16A16_SSCALED, SVGA3D_R16G16B16A16_SINT, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
119 { PIPE_FORMAT_R8_UNORM, SVGA3D_R8_UNORM, SVGA3D_R8_UNORM, TF_GEN_MIPS },
120 { PIPE_FORMAT_R8G8_UNORM, SVGA3D_R8G8_UNORM, SVGA3D_R8G8_UNORM, TF_GEN_MIPS },
121 { PIPE_FORMAT_R8G8B8_UNORM, SVGA3D_R8G8B8A8_UNORM, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
122 { PIPE_FORMAT_R8G8B8A8_UNORM, SVGA3D_R8G8B8A8_UNORM, SVGA3D_R8G8B8A8_UNORM, TF_GEN_MIPS },
123 { PIPE_FORMAT_X8B8G8R8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
124 { PIPE_FORMAT_R8_USCALED, SVGA3D_R8_UINT, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
125 { PIPE_FORMAT_R8G8_USCALED, SVGA3D_R8G8_UINT, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
126 { PIPE_FORMAT_R8G8B8_USCALED, SVGA3D_R8G8B8A8_UINT, SVGA3D_FORMAT_INVALID, VF_W_TO_1 | VF_U_TO_F_CAST },
127 { PIPE_FORMAT_R8G8B8A8_USCALED, SVGA3D_R8G8B8A8_UINT, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
128 { 73, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
129 { PIPE_FORMAT_R8_SNORM, SVGA3D_R8_SNORM, SVGA3D_R8_SNORM, 0 },
130 { PIPE_FORMAT_R8G8_SNORM, SVGA3D_R8G8_SNORM, SVGA3D_R8G8_SNORM, 0 },
131 { PIPE_FORMAT_R8G8B8_SNORM, SVGA3D_R8G8B8A8_SNORM, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
132 { PIPE_FORMAT_R8G8B8A8_SNORM, SVGA3D_R8G8B8A8_SNORM, SVGA3D_R8G8B8A8_SNORM, 0 },
133 { 78, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
134 { 79, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
135 { 80, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
136 { 81, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
137 { PIPE_FORMAT_R8_SSCALED, SVGA3D_R8_SINT, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
138 { PIPE_FORMAT_R8G8_SSCALED, SVGA3D_R8G8_SINT, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
139 { PIPE_FORMAT_R8G8B8_SSCALED, SVGA3D_R8G8B8A8_SINT, SVGA3D_FORMAT_INVALID, VF_W_TO_1 | VF_I_TO_F_CAST },
140 { PIPE_FORMAT_R8G8B8A8_SSCALED, SVGA3D_R8G8B8A8_SINT, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
141 { 86, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
142 { PIPE_FORMAT_R32_FIXED, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
143 { PIPE_FORMAT_R32G32_FIXED, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
144 { PIPE_FORMAT_R32G32B32_FIXED, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
145 { PIPE_FORMAT_R32G32B32A32_FIXED, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
146 { PIPE_FORMAT_R16_FLOAT, SVGA3D_R16_FLOAT, SVGA3D_R16_FLOAT, TF_GEN_MIPS },
147 { PIPE_FORMAT_R16G16_FLOAT, SVGA3D_R16G16_FLOAT, SVGA3D_R16G16_FLOAT, TF_GEN_MIPS },
148 { PIPE_FORMAT_R16G16B16_FLOAT, SVGA3D_R16G16B16A16_FLOAT, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
149 { PIPE_FORMAT_R16G16B16A16_FLOAT, SVGA3D_R16G16B16A16_FLOAT, SVGA3D_R16G16B16A16_FLOAT, TF_GEN_MIPS },
150 { PIPE_FORMAT_L8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
151 { PIPE_FORMAT_L8A8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
152 { PIPE_FORMAT_R8G8B8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
153 { PIPE_FORMAT_A8B8G8R8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
154 { PIPE_FORMAT_X8B8G8R8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
155 { PIPE_FORMAT_B8G8R8A8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_B8G8R8A8_UNORM_SRGB, TF_GEN_MIPS },
156 { PIPE_FORMAT_B8G8R8X8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_B8G8R8X8_UNORM_SRGB, TF_GEN_MIPS },
157 { PIPE_FORMAT_A8R8G8B8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
158 { PIPE_FORMAT_X8R8G8B8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
159 { PIPE_FORMAT_R8G8B8A8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_R8G8B8A8_UNORM_SRGB, TF_GEN_MIPS },
160 { PIPE_FORMAT_DXT1_RGB, SVGA3D_FORMAT_INVALID, SVGA3D_BC1_UNORM, 0 },
161 { PIPE_FORMAT_DXT1_RGBA, SVGA3D_FORMAT_INVALID, SVGA3D_BC1_UNORM, 0 },
162 { PIPE_FORMAT_DXT3_RGBA, SVGA3D_FORMAT_INVALID, SVGA3D_BC2_UNORM, 0 },
163 { PIPE_FORMAT_DXT5_RGBA, SVGA3D_FORMAT_INVALID, SVGA3D_BC3_UNORM, 0 },
164 { PIPE_FORMAT_DXT1_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_BC1_UNORM_SRGB, 0 },
165 { PIPE_FORMAT_DXT1_SRGBA, SVGA3D_FORMAT_INVALID, SVGA3D_BC1_UNORM_SRGB, 0 },
166 { PIPE_FORMAT_DXT3_SRGBA, SVGA3D_FORMAT_INVALID, SVGA3D_BC2_UNORM_SRGB, 0 },
167 { PIPE_FORMAT_DXT5_SRGBA, SVGA3D_FORMAT_INVALID, SVGA3D_BC3_UNORM_SRGB, 0 },
168 { PIPE_FORMAT_RGTC1_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_BC4_UNORM, 0 },
169 { PIPE_FORMAT_RGTC1_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_BC4_SNORM, 0 },
170 { PIPE_FORMAT_RGTC2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_BC5_UNORM, 0 },
171 { PIPE_FORMAT_RGTC2_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_BC5_SNORM, 0 },
172 { PIPE_FORMAT_R8G8_B8G8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
173 { PIPE_FORMAT_G8R8_G8B8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
174 { PIPE_FORMAT_R8SG8SB8UX8U_NORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
175 { PIPE_FORMAT_R5SG5SB6U_NORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
176 { PIPE_FORMAT_A8B8G8R8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
177 { PIPE_FORMAT_B5G5R5X1_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
178 { PIPE_FORMAT_R10G10B10A2_USCALED, SVGA3D_R10G10B10A2_UNORM, SVGA3D_FORMAT_INVALID, VF_PUINT_TO_USCALED },
179 { PIPE_FORMAT_R11G11B10_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_R11G11B10_FLOAT, TF_GEN_MIPS },
180 { PIPE_FORMAT_R9G9B9E5_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_R9G9B9E5_SHAREDEXP, 0 },
181 { PIPE_FORMAT_Z32_FLOAT_S8X24_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_D32_FLOAT_S8X24_UINT, 0 },
182 { PIPE_FORMAT_R1_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
183 { PIPE_FORMAT_R10G10B10X2_USCALED, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
184 { PIPE_FORMAT_R10G10B10X2_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
185 { PIPE_FORMAT_L4A4_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
186 { PIPE_FORMAT_B10G10R10A2_UNORM, SVGA3D_R10G10B10A2_UNORM, SVGA3D_FORMAT_INVALID, VF_BGRA },
187 { PIPE_FORMAT_R10SG10SB10SA2U_NORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
188 { PIPE_FORMAT_R8G8Bx_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
189 { PIPE_FORMAT_R8G8B8X8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
190 { PIPE_FORMAT_B4G4R4X4_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
191 { PIPE_FORMAT_X24S8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
192 { PIPE_FORMAT_S8X24_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
193 { PIPE_FORMAT_X32_S8X24_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
194 { PIPE_FORMAT_B2G3R3_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
195 { PIPE_FORMAT_L16A16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
196 { PIPE_FORMAT_A16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
197 { PIPE_FORMAT_I16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
198 { PIPE_FORMAT_LATC1_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
199 { PIPE_FORMAT_LATC1_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
200 { PIPE_FORMAT_LATC2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
201 { PIPE_FORMAT_LATC2_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
202 { PIPE_FORMAT_A8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
203 { PIPE_FORMAT_L8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
204 { PIPE_FORMAT_L8A8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
205 { PIPE_FORMAT_I8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
206 { PIPE_FORMAT_A16_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
207 { PIPE_FORMAT_L16_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
208 { PIPE_FORMAT_L16A16_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
209 { PIPE_FORMAT_I16_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
210 { PIPE_FORMAT_A16_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
211 { PIPE_FORMAT_L16_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
212 { PIPE_FORMAT_L16A16_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
213 { PIPE_FORMAT_I16_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
214 { PIPE_FORMAT_A32_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
215 { PIPE_FORMAT_L32_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
216 { PIPE_FORMAT_L32A32_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
217 { PIPE_FORMAT_I32_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
218 { PIPE_FORMAT_YV12, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
219 { PIPE_FORMAT_YV16, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
220 { PIPE_FORMAT_IYUV, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
221 { PIPE_FORMAT_NV12, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
222 { PIPE_FORMAT_NV21, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
223 { PIPE_FORMAT_A4R4_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
224 { PIPE_FORMAT_R4A4_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
225 { PIPE_FORMAT_R8A8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
226 { PIPE_FORMAT_A8R8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
227 { PIPE_FORMAT_R10G10B10A2_SSCALED, SVGA3D_R32_UINT, SVGA3D_FORMAT_INVALID, VF_PUINT_TO_SSCALED },
228 { PIPE_FORMAT_R10G10B10A2_SNORM, SVGA3D_R10G10B10A2_UNORM, SVGA3D_FORMAT_INVALID, VF_PUINT_TO_SNORM },
229 { PIPE_FORMAT_B10G10R10A2_USCALED, SVGA3D_R10G10B10A2_UNORM, SVGA3D_FORMAT_INVALID, VF_BGRA | VF_PUINT_TO_USCALED },
230 { PIPE_FORMAT_B10G10R10A2_SSCALED, SVGA3D_R32_UINT, SVGA3D_FORMAT_INVALID, VF_BGRA | VF_PUINT_TO_SSCALED },
231 { PIPE_FORMAT_B10G10R10A2_SNORM, SVGA3D_R10G10B10A2_UNORM, SVGA3D_FORMAT_INVALID, VF_BGRA | VF_PUINT_TO_SNORM },
232 { PIPE_FORMAT_R8_UINT, SVGA3D_R8_UINT, SVGA3D_R8_UINT, 0 },
233 { PIPE_FORMAT_R8G8_UINT, SVGA3D_R8G8_UINT, SVGA3D_R8G8_UINT, 0 },
234 { PIPE_FORMAT_R8G8B8_UINT, SVGA3D_R8G8B8A8_UINT, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
235 { PIPE_FORMAT_R8G8B8A8_UINT, SVGA3D_R8G8B8A8_UINT, SVGA3D_R8G8B8A8_UINT, 0 },
236 { PIPE_FORMAT_R8_SINT, SVGA3D_R8_SINT, SVGA3D_R8_SINT, 0 },
237 { PIPE_FORMAT_R8G8_SINT, SVGA3D_R8G8_SINT, SVGA3D_R8G8_SINT, 0 },
238 { PIPE_FORMAT_R8G8B8_SINT, SVGA3D_R8G8B8A8_SINT, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
239 { PIPE_FORMAT_R8G8B8A8_SINT, SVGA3D_R8G8B8A8_SINT, SVGA3D_R8G8B8A8_SINT, 0 },
240 { PIPE_FORMAT_R16_UINT, SVGA3D_R16_UINT, SVGA3D_R16_UINT, 0 },
241 { PIPE_FORMAT_R16G16_UINT, SVGA3D_R16G16_UINT, SVGA3D_R16G16_UINT, 0 },
242 { PIPE_FORMAT_R16G16B16_UINT, SVGA3D_R16G16B16A16_UINT, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
243 { PIPE_FORMAT_R16G16B16A16_UINT, SVGA3D_R16G16B16A16_UINT, SVGA3D_R16G16B16A16_UINT, 0 },
244 { PIPE_FORMAT_R16_SINT, SVGA3D_R16_SINT, SVGA3D_R16_SINT, 0 },
245 { PIPE_FORMAT_R16G16_SINT, SVGA3D_R16G16_SINT, SVGA3D_R16G16_SINT, 0 },
246 { PIPE_FORMAT_R16G16B16_SINT, SVGA3D_R16G16B16A16_SINT, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
247 { PIPE_FORMAT_R16G16B16A16_SINT, SVGA3D_R16G16B16A16_SINT, SVGA3D_R16G16B16A16_SINT, 0 },
248 { PIPE_FORMAT_R32_UINT, SVGA3D_R32_UINT, SVGA3D_R32_UINT, 0 },
249 { PIPE_FORMAT_R32G32_UINT, SVGA3D_R32G32_UINT, SVGA3D_R32G32_UINT, 0 },
250 { PIPE_FORMAT_R32G32B32_UINT, SVGA3D_R32G32B32_UINT, SVGA3D_FORMAT_INVALID, 0 },
251 { PIPE_FORMAT_R32G32B32A32_UINT, SVGA3D_R32G32B32A32_UINT, SVGA3D_R32G32B32A32_UINT, 0 },
252 { PIPE_FORMAT_R32_SINT, SVGA3D_R32_SINT, SVGA3D_R32_SINT, 0 },
253 { PIPE_FORMAT_R32G32_SINT, SVGA3D_R32G32_SINT, SVGA3D_R32G32_SINT, 0 },
254 { PIPE_FORMAT_R32G32B32_SINT, SVGA3D_R32G32B32_SINT, SVGA3D_FORMAT_INVALID, 0 },
255 { PIPE_FORMAT_R32G32B32A32_SINT, SVGA3D_R32G32B32A32_SINT, SVGA3D_R32G32B32A32_SINT, 0 },
256 { PIPE_FORMAT_A8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
257 { PIPE_FORMAT_I8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
258 { PIPE_FORMAT_L8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
259 { PIPE_FORMAT_L8A8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
260 { PIPE_FORMAT_A8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
261 { PIPE_FORMAT_I8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
262 { PIPE_FORMAT_L8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
263 { PIPE_FORMAT_L8A8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
264 { PIPE_FORMAT_A16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
265 { PIPE_FORMAT_I16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
266 { PIPE_FORMAT_L16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
267 { PIPE_FORMAT_L16A16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
268 { PIPE_FORMAT_A16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
269 { PIPE_FORMAT_I16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
270 { PIPE_FORMAT_L16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
271 { PIPE_FORMAT_L16A16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
272 { PIPE_FORMAT_A32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
273 { PIPE_FORMAT_I32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
274 { PIPE_FORMAT_L32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
275 { PIPE_FORMAT_L32A32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
276 { PIPE_FORMAT_A32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
277 { PIPE_FORMAT_I32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
278 { PIPE_FORMAT_L32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
279 { PIPE_FORMAT_L32A32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
280 { PIPE_FORMAT_B10G10R10A2_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
281 { PIPE_FORMAT_ETC1_RGB8, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
282 { PIPE_FORMAT_R8G8_R8B8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
283 { PIPE_FORMAT_G8R8_B8R8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
284 { PIPE_FORMAT_R8G8B8X8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
285 { PIPE_FORMAT_R8G8B8X8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
286 { PIPE_FORMAT_R8G8B8X8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
287 { PIPE_FORMAT_R8G8B8X8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
288 { PIPE_FORMAT_B10G10R10X2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
289 { PIPE_FORMAT_R16G16B16X16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
290 { PIPE_FORMAT_R16G16B16X16_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
291 { PIPE_FORMAT_R16G16B16X16_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
292 { PIPE_FORMAT_R16G16B16X16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
293 { PIPE_FORMAT_R16G16B16X16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
294 { PIPE_FORMAT_R32G32B32X32_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
295 { PIPE_FORMAT_R32G32B32X32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
296 { PIPE_FORMAT_R32G32B32X32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
297 { PIPE_FORMAT_R8A8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
298 { PIPE_FORMAT_R16A16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
299 { PIPE_FORMAT_R16A16_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
300 { PIPE_FORMAT_R16A16_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
301 { PIPE_FORMAT_R32A32_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
302 { PIPE_FORMAT_R8A8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
303 { PIPE_FORMAT_R8A8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
304 { PIPE_FORMAT_R16A16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
305 { PIPE_FORMAT_R16A16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
306 { PIPE_FORMAT_R32A32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
307 { PIPE_FORMAT_R32A32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
308 { PIPE_FORMAT_R10G10B10A2_UINT, SVGA3D_R10G10B10A2_UINT, SVGA3D_R10G10B10A2_UINT, 0 },
309 { PIPE_FORMAT_B5G6R5_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
310 { PIPE_FORMAT_BPTC_RGBA_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
311 { PIPE_FORMAT_BPTC_SRGBA, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
312 { PIPE_FORMAT_BPTC_RGB_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
313 { PIPE_FORMAT_BPTC_RGB_UFLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
314 { PIPE_FORMAT_A8L8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
315 { PIPE_FORMAT_A8L8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
316 { PIPE_FORMAT_A8L8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
317 { PIPE_FORMAT_A16L16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
318 { PIPE_FORMAT_G8R8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
319 { PIPE_FORMAT_G8R8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
320 { PIPE_FORMAT_G16R16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
321 { PIPE_FORMAT_G16R16_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
322 { PIPE_FORMAT_A8B8G8R8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
323 { PIPE_FORMAT_X8B8G8R8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
324 { PIPE_FORMAT_ETC2_RGB8, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
325 { PIPE_FORMAT_ETC2_SRGB8, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
326 { PIPE_FORMAT_ETC2_RGB8A1, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
327 { PIPE_FORMAT_ETC2_SRGB8A1, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
328 { PIPE_FORMAT_ETC2_RGBA8, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
329 { PIPE_FORMAT_ETC2_SRGBA8, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
330 { PIPE_FORMAT_ETC2_R11_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
331 { PIPE_FORMAT_ETC2_R11_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
332 { PIPE_FORMAT_ETC2_RG11_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
333 { PIPE_FORMAT_ETC2_RG11_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
334 { PIPE_FORMAT_ASTC_4x4, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
335 { PIPE_FORMAT_ASTC_5x4, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
336 { PIPE_FORMAT_ASTC_5x5, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
337 { PIPE_FORMAT_ASTC_6x5, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
338 { PIPE_FORMAT_ASTC_6x6, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
339 { PIPE_FORMAT_ASTC_8x5, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
340 { PIPE_FORMAT_ASTC_8x6, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
341 { PIPE_FORMAT_ASTC_8x8, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
342 { PIPE_FORMAT_ASTC_10x5, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
343 { PIPE_FORMAT_ASTC_10x6, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
344 { PIPE_FORMAT_ASTC_10x8, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
345 { PIPE_FORMAT_ASTC_10x10, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
346 { PIPE_FORMAT_ASTC_12x10, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
347 { PIPE_FORMAT_ASTC_12x12, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
348 { PIPE_FORMAT_ASTC_4x4_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
349 { PIPE_FORMAT_ASTC_5x4_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
350 { PIPE_FORMAT_ASTC_5x5_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
351 { PIPE_FORMAT_ASTC_6x5_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
352 { PIPE_FORMAT_ASTC_6x6_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
353 { PIPE_FORMAT_ASTC_8x5_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
354 { PIPE_FORMAT_ASTC_8x6_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
355 { PIPE_FORMAT_ASTC_8x8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
356 { PIPE_FORMAT_ASTC_10x5_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
357 { PIPE_FORMAT_ASTC_10x6_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
358 { PIPE_FORMAT_ASTC_10x8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
359 { PIPE_FORMAT_ASTC_10x10_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
360 { PIPE_FORMAT_ASTC_12x10_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
361 { PIPE_FORMAT_ASTC_12x12_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
362 { PIPE_FORMAT_P016, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
363 };
364
365
366 /**
367 * Translate a gallium vertex format to a vgpu10 vertex format.
368 * Also, return any special vertex format flags.
369 */
370 void
371 svga_translate_vertex_format_vgpu10(enum pipe_format format,
372 SVGA3dSurfaceFormat *svga_format,
373 unsigned *vf_flags)
374 {
375 assert(format < ARRAY_SIZE(format_conversion_table));
376 if (format >= ARRAY_SIZE(format_conversion_table)) {
377 format = PIPE_FORMAT_NONE;
378 }
379 *svga_format = format_conversion_table[format].vertex_format;
380 *vf_flags = format_conversion_table[format].flags;
381 }
382
383
384 /**
385 * Translate a gallium scanout format to a svga format valid
386 * for screen target surface.
387 */
388 static SVGA3dSurfaceFormat
389 svga_translate_screen_target_format_vgpu10(enum pipe_format format)
390 {
391 switch (format) {
392 case PIPE_FORMAT_B8G8R8A8_UNORM:
393 return SVGA3D_B8G8R8A8_UNORM;
394 case PIPE_FORMAT_B8G8R8X8_UNORM:
395 return SVGA3D_B8G8R8X8_UNORM;
396 case PIPE_FORMAT_B5G6R5_UNORM:
397 return SVGA3D_R5G6B5;
398 case PIPE_FORMAT_B5G5R5A1_UNORM:
399 return SVGA3D_A1R5G5B5;
400 default:
401 debug_printf("Invalid format %s specified for screen target\n",
402 svga_format_name(format));
403 return SVGA3D_FORMAT_INVALID;
404 }
405 }
406
407 /*
408 * Translate from gallium format to SVGA3D format.
409 */
410 SVGA3dSurfaceFormat
411 svga_translate_format(const struct svga_screen *ss,
412 enum pipe_format format,
413 unsigned bind)
414 {
415 if (ss->sws->have_vgpu10) {
416 if (bind & (PIPE_BIND_VERTEX_BUFFER | PIPE_BIND_INDEX_BUFFER)) {
417 return format_conversion_table[format].vertex_format;
418 }
419 else if (bind & PIPE_BIND_SCANOUT) {
420 return svga_translate_screen_target_format_vgpu10(format);
421 }
422 else {
423 return format_conversion_table[format].pixel_format;
424 }
425 }
426
427 switch(format) {
428 case PIPE_FORMAT_B8G8R8A8_UNORM:
429 return SVGA3D_A8R8G8B8;
430 case PIPE_FORMAT_B8G8R8X8_UNORM:
431 return SVGA3D_X8R8G8B8;
432
433 /* sRGB required for GL2.1 */
434 case PIPE_FORMAT_B8G8R8A8_SRGB:
435 return SVGA3D_A8R8G8B8;
436 case PIPE_FORMAT_DXT1_SRGB:
437 case PIPE_FORMAT_DXT1_SRGBA:
438 return SVGA3D_DXT1;
439 case PIPE_FORMAT_DXT3_SRGBA:
440 return SVGA3D_DXT3;
441 case PIPE_FORMAT_DXT5_SRGBA:
442 return SVGA3D_DXT5;
443
444 case PIPE_FORMAT_B5G6R5_UNORM:
445 return SVGA3D_R5G6B5;
446 case PIPE_FORMAT_B5G5R5A1_UNORM:
447 return SVGA3D_A1R5G5B5;
448 case PIPE_FORMAT_B4G4R4A4_UNORM:
449 return SVGA3D_A4R4G4B4;
450
451 case PIPE_FORMAT_R16G16B16A16_UNORM:
452 return SVGA3D_A16B16G16R16;
453
454 case PIPE_FORMAT_Z16_UNORM:
455 assert(!ss->sws->have_vgpu10);
456 return bind & PIPE_BIND_SAMPLER_VIEW ? ss->depth.z16 : SVGA3D_Z_D16;
457 case PIPE_FORMAT_S8_UINT_Z24_UNORM:
458 assert(!ss->sws->have_vgpu10);
459 return bind & PIPE_BIND_SAMPLER_VIEW ? ss->depth.s8z24 : SVGA3D_Z_D24S8;
460 case PIPE_FORMAT_X8Z24_UNORM:
461 assert(!ss->sws->have_vgpu10);
462 return bind & PIPE_BIND_SAMPLER_VIEW ? ss->depth.x8z24 : SVGA3D_Z_D24X8;
463
464 case PIPE_FORMAT_A8_UNORM:
465 return SVGA3D_ALPHA8;
466 case PIPE_FORMAT_L8_UNORM:
467 return SVGA3D_LUMINANCE8;
468
469 case PIPE_FORMAT_DXT1_RGB:
470 case PIPE_FORMAT_DXT1_RGBA:
471 return SVGA3D_DXT1;
472 case PIPE_FORMAT_DXT3_RGBA:
473 return SVGA3D_DXT3;
474 case PIPE_FORMAT_DXT5_RGBA:
475 return SVGA3D_DXT5;
476
477 /* Float formats (only 1, 2 and 4-component formats supported) */
478 case PIPE_FORMAT_R32_FLOAT:
479 return SVGA3D_R_S23E8;
480 case PIPE_FORMAT_R32G32_FLOAT:
481 return SVGA3D_RG_S23E8;
482 case PIPE_FORMAT_R32G32B32A32_FLOAT:
483 return SVGA3D_ARGB_S23E8;
484 case PIPE_FORMAT_R16_FLOAT:
485 return SVGA3D_R_S10E5;
486 case PIPE_FORMAT_R16G16_FLOAT:
487 return SVGA3D_RG_S10E5;
488 case PIPE_FORMAT_R16G16B16A16_FLOAT:
489 return SVGA3D_ARGB_S10E5;
490
491 case PIPE_FORMAT_Z32_UNORM:
492 /* SVGA3D_Z_D32 is not yet unsupported */
493 /* fall-through */
494 default:
495 return SVGA3D_FORMAT_INVALID;
496 }
497 }
498
499
500 /*
501 * Format capability description entry.
502 */
503 struct format_cap {
504 const char *name;
505
506 SVGA3dSurfaceFormat format;
507
508 /*
509 * Capability index corresponding to the format.
510 */
511 SVGA3dDevCapIndex devcap;
512
513 /* size of each pixel/block */
514 unsigned block_width, block_height, block_bytes;
515
516 /*
517 * Mask of supported SVGA3dFormatOp operations, to be inferred when the
518 * capability is not explicitly present.
519 */
520 uint32 defaultOperations;
521 };
522
523
524 /*
525 * Format capability description table.
526 *
527 * Ordered by increasing SVGA3dSurfaceFormat value, but with gaps.
528 *
529 * Note: there are some special cases below where we set devcap=0 and
530 * avoid querying the host. In particular, depth/stencil formats which
531 * can be rendered to and sampled from. For example, the gallium format
532 * PIPE_FORMAT_Z24_UNORM_S8_UINT is converted to SVGA3D_D24_UNORM_S8_UINT
533 * for rendering but converted to SVGA3D_R24_UNORM_X8_TYPELESS for sampling.
534 * If we want to query if a format supports both rendering and sampling the
535 * host will tell us no for SVGA3D_D24_UNORM_S8_UINT, SVGA3D_D16_UNORM and
536 * SVGA3D_R24_UNORM_X8_TYPELESS. So we override the host query for those
537 * formats and report that both can do rendering and sampling.
538 */
539 static const struct format_cap format_cap_table[] = {
540 {
541 "SVGA3D_FORMAT_INVALID",
542 SVGA3D_FORMAT_INVALID, 0, 0, 0, 0, 0
543 },
544 {
545 "SVGA3D_X8R8G8B8",
546 SVGA3D_X8R8G8B8,
547 SVGA3D_DEVCAP_SURFACEFMT_X8R8G8B8,
548 1, 1, 4,
549 SVGA3DFORMAT_OP_TEXTURE |
550 SVGA3DFORMAT_OP_CUBETEXTURE |
551 SVGA3DFORMAT_OP_VOLUMETEXTURE |
552 SVGA3DFORMAT_OP_DISPLAYMODE |
553 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
554 },
555 {
556 "SVGA3D_A8R8G8B8",
557 SVGA3D_A8R8G8B8,
558 SVGA3D_DEVCAP_SURFACEFMT_A8R8G8B8,
559 1, 1, 4,
560 SVGA3DFORMAT_OP_TEXTURE |
561 SVGA3DFORMAT_OP_CUBETEXTURE |
562 SVGA3DFORMAT_OP_VOLUMETEXTURE |
563 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
564 },
565 {
566 "SVGA3D_R5G6B5",
567 SVGA3D_R5G6B5,
568 SVGA3D_DEVCAP_SURFACEFMT_R5G6B5,
569 1, 1, 2,
570 SVGA3DFORMAT_OP_TEXTURE |
571 SVGA3DFORMAT_OP_CUBETEXTURE |
572 SVGA3DFORMAT_OP_VOLUMETEXTURE |
573 SVGA3DFORMAT_OP_DISPLAYMODE |
574 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
575 },
576 {
577 "SVGA3D_X1R5G5B5",
578 SVGA3D_X1R5G5B5,
579 SVGA3D_DEVCAP_SURFACEFMT_X1R5G5B5,
580 1, 1, 2,
581 SVGA3DFORMAT_OP_TEXTURE |
582 SVGA3DFORMAT_OP_CUBETEXTURE |
583 SVGA3DFORMAT_OP_VOLUMETEXTURE |
584 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
585 },
586 {
587 "SVGA3D_A1R5G5B5",
588 SVGA3D_A1R5G5B5,
589 SVGA3D_DEVCAP_SURFACEFMT_A1R5G5B5,
590 1, 1, 2,
591 SVGA3DFORMAT_OP_TEXTURE |
592 SVGA3DFORMAT_OP_CUBETEXTURE |
593 SVGA3DFORMAT_OP_VOLUMETEXTURE |
594 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
595 },
596 {
597 "SVGA3D_A4R4G4B4",
598 SVGA3D_A4R4G4B4,
599 SVGA3D_DEVCAP_SURFACEFMT_A4R4G4B4,
600 1, 1, 2,
601 SVGA3DFORMAT_OP_TEXTURE |
602 SVGA3DFORMAT_OP_CUBETEXTURE |
603 SVGA3DFORMAT_OP_VOLUMETEXTURE |
604 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
605 },
606 {
607 /*
608 * SVGA3D_Z_D32 is not yet supported, and has no corresponding
609 * SVGA3D_DEVCAP_xxx.
610 */
611 "SVGA3D_Z_D32",
612 SVGA3D_Z_D32, 0, 0, 0, 0, 0
613 },
614 {
615 "SVGA3D_Z_D16",
616 SVGA3D_Z_D16,
617 SVGA3D_DEVCAP_SURFACEFMT_Z_D16,
618 1, 1, 2,
619 SVGA3DFORMAT_OP_ZSTENCIL
620 },
621 {
622 "SVGA3D_Z_D24S8",
623 SVGA3D_Z_D24S8,
624 SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8,
625 1, 1, 4,
626 SVGA3DFORMAT_OP_ZSTENCIL
627 },
628 {
629 "SVGA3D_Z_D15S1",
630 SVGA3D_Z_D15S1,
631 SVGA3D_DEVCAP_MAX,
632 1, 1, 2,
633 SVGA3DFORMAT_OP_ZSTENCIL
634 },
635 {
636 "SVGA3D_LUMINANCE8",
637 SVGA3D_LUMINANCE8,
638 SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8,
639 1, 1, 1,
640 SVGA3DFORMAT_OP_TEXTURE |
641 SVGA3DFORMAT_OP_CUBETEXTURE |
642 SVGA3DFORMAT_OP_VOLUMETEXTURE
643 },
644 {
645 /*
646 * SVGA3D_LUMINANCE4_ALPHA4 is not supported, and has no corresponding
647 * SVGA3D_DEVCAP_xxx.
648 */
649 "SVGA3D_LUMINANCE4_ALPHA4",
650 SVGA3D_LUMINANCE4_ALPHA4, 0, 0, 0, 0, 0
651 },
652 {
653 "SVGA3D_LUMINANCE16",
654 SVGA3D_LUMINANCE16,
655 SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE16,
656 1, 1, 2,
657 SVGA3DFORMAT_OP_TEXTURE |
658 SVGA3DFORMAT_OP_CUBETEXTURE |
659 SVGA3DFORMAT_OP_VOLUMETEXTURE
660 },
661 {
662 "SVGA3D_LUMINANCE8_ALPHA8",
663 SVGA3D_LUMINANCE8_ALPHA8,
664 SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8_ALPHA8,
665 1, 1, 2,
666 SVGA3DFORMAT_OP_TEXTURE |
667 SVGA3DFORMAT_OP_CUBETEXTURE |
668 SVGA3DFORMAT_OP_VOLUMETEXTURE
669 },
670 {
671 "SVGA3D_DXT1",
672 SVGA3D_DXT1,
673 SVGA3D_DEVCAP_SURFACEFMT_DXT1,
674 4, 4, 8,
675 SVGA3DFORMAT_OP_TEXTURE |
676 SVGA3DFORMAT_OP_CUBETEXTURE
677 },
678 {
679 "SVGA3D_DXT2",
680 SVGA3D_DXT2,
681 SVGA3D_DEVCAP_SURFACEFMT_DXT2,
682 4, 4, 8,
683 SVGA3DFORMAT_OP_TEXTURE |
684 SVGA3DFORMAT_OP_CUBETEXTURE
685 },
686 {
687 "SVGA3D_DXT3",
688 SVGA3D_DXT3,
689 SVGA3D_DEVCAP_SURFACEFMT_DXT3,
690 4, 4, 16,
691 SVGA3DFORMAT_OP_TEXTURE |
692 SVGA3DFORMAT_OP_CUBETEXTURE
693 },
694 {
695 "SVGA3D_DXT4",
696 SVGA3D_DXT4,
697 SVGA3D_DEVCAP_SURFACEFMT_DXT4,
698 4, 4, 16,
699 SVGA3DFORMAT_OP_TEXTURE |
700 SVGA3DFORMAT_OP_CUBETEXTURE
701 },
702 {
703 "SVGA3D_DXT5",
704 SVGA3D_DXT5,
705 SVGA3D_DEVCAP_SURFACEFMT_DXT5,
706 4, 4, 8,
707 SVGA3DFORMAT_OP_TEXTURE |
708 SVGA3DFORMAT_OP_CUBETEXTURE
709 },
710 {
711 "SVGA3D_BUMPU8V8",
712 SVGA3D_BUMPU8V8,
713 SVGA3D_DEVCAP_SURFACEFMT_BUMPU8V8,
714 1, 1, 2,
715 SVGA3DFORMAT_OP_TEXTURE |
716 SVGA3DFORMAT_OP_CUBETEXTURE |
717 SVGA3DFORMAT_OP_VOLUMETEXTURE
718 },
719 {
720 /*
721 * SVGA3D_BUMPL6V5U5 is unsupported; it has no corresponding
722 * SVGA3D_DEVCAP_xxx.
723 */
724 "SVGA3D_BUMPL6V5U5",
725 SVGA3D_BUMPL6V5U5, 0, 0, 0, 0, 0
726 },
727 {
728 "SVGA3D_BUMPX8L8V8U8",
729 SVGA3D_BUMPX8L8V8U8,
730 SVGA3D_DEVCAP_SURFACEFMT_BUMPX8L8V8U8,
731 1, 1, 4,
732 SVGA3DFORMAT_OP_TEXTURE |
733 SVGA3DFORMAT_OP_CUBETEXTURE
734 },
735 {
736 "SVGA3D_FORMAT_DEAD1",
737 SVGA3D_FORMAT_DEAD1, 0, 0, 0, 0, 0
738 },
739 {
740 "SVGA3D_ARGB_S10E5",
741 SVGA3D_ARGB_S10E5,
742 SVGA3D_DEVCAP_SURFACEFMT_ARGB_S10E5,
743 1, 1, 2,
744 SVGA3DFORMAT_OP_TEXTURE |
745 SVGA3DFORMAT_OP_CUBETEXTURE |
746 SVGA3DFORMAT_OP_VOLUMETEXTURE |
747 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
748 },
749 {
750 "SVGA3D_ARGB_S23E8",
751 SVGA3D_ARGB_S23E8,
752 SVGA3D_DEVCAP_SURFACEFMT_ARGB_S23E8,
753 1, 1, 4,
754 SVGA3DFORMAT_OP_TEXTURE |
755 SVGA3DFORMAT_OP_CUBETEXTURE |
756 SVGA3DFORMAT_OP_VOLUMETEXTURE |
757 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
758 },
759 {
760 "SVGA3D_A2R10G10B10",
761 SVGA3D_A2R10G10B10,
762 SVGA3D_DEVCAP_SURFACEFMT_A2R10G10B10,
763 1, 1, 4,
764 SVGA3DFORMAT_OP_TEXTURE |
765 SVGA3DFORMAT_OP_CUBETEXTURE |
766 SVGA3DFORMAT_OP_VOLUMETEXTURE |
767 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
768 },
769 {
770 /*
771 * SVGA3D_V8U8 is unsupported; it has no corresponding
772 * SVGA3D_DEVCAP_xxx. SVGA3D_BUMPU8V8 should be used instead.
773 */
774 "SVGA3D_V8U8",
775 SVGA3D_V8U8, 0, 0, 0, 0, 0
776 },
777 {
778 "SVGA3D_Q8W8V8U8",
779 SVGA3D_Q8W8V8U8,
780 SVGA3D_DEVCAP_SURFACEFMT_Q8W8V8U8,
781 1, 1, 4,
782 SVGA3DFORMAT_OP_TEXTURE |
783 SVGA3DFORMAT_OP_CUBETEXTURE
784 },
785 {
786 "SVGA3D_CxV8U8",
787 SVGA3D_CxV8U8,
788 SVGA3D_DEVCAP_SURFACEFMT_CxV8U8,
789 1, 1, 2,
790 SVGA3DFORMAT_OP_TEXTURE
791 },
792 {
793 /*
794 * SVGA3D_X8L8V8U8 is unsupported; it has no corresponding
795 * SVGA3D_DEVCAP_xxx. SVGA3D_BUMPX8L8V8U8 should be used instead.
796 */
797 "SVGA3D_X8L8V8U8",
798 SVGA3D_X8L8V8U8, 0, 0, 0, 0, 0
799 },
800 {
801 "SVGA3D_A2W10V10U10",
802 SVGA3D_A2W10V10U10,
803 SVGA3D_DEVCAP_SURFACEFMT_A2W10V10U10,
804 1, 1, 4,
805 SVGA3DFORMAT_OP_TEXTURE
806 },
807 {
808 "SVGA3D_ALPHA8",
809 SVGA3D_ALPHA8,
810 SVGA3D_DEVCAP_SURFACEFMT_ALPHA8,
811 1, 1, 1,
812 SVGA3DFORMAT_OP_TEXTURE |
813 SVGA3DFORMAT_OP_CUBETEXTURE |
814 SVGA3DFORMAT_OP_VOLUMETEXTURE
815 },
816 {
817 "SVGA3D_R_S10E5",
818 SVGA3D_R_S10E5,
819 SVGA3D_DEVCAP_SURFACEFMT_R_S10E5,
820 1, 1, 2,
821 SVGA3DFORMAT_OP_TEXTURE |
822 SVGA3DFORMAT_OP_VOLUMETEXTURE |
823 SVGA3DFORMAT_OP_CUBETEXTURE |
824 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
825 },
826 {
827 "SVGA3D_R_S23E8",
828 SVGA3D_R_S23E8,
829 SVGA3D_DEVCAP_SURFACEFMT_R_S23E8,
830 1, 1, 4,
831 SVGA3DFORMAT_OP_TEXTURE |
832 SVGA3DFORMAT_OP_VOLUMETEXTURE |
833 SVGA3DFORMAT_OP_CUBETEXTURE |
834 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
835 },
836 {
837 "SVGA3D_RG_S10E5",
838 SVGA3D_RG_S10E5,
839 SVGA3D_DEVCAP_SURFACEFMT_RG_S10E5,
840 1, 1, 2,
841 SVGA3DFORMAT_OP_TEXTURE |
842 SVGA3DFORMAT_OP_VOLUMETEXTURE |
843 SVGA3DFORMAT_OP_CUBETEXTURE |
844 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
845 },
846 {
847 "SVGA3D_RG_S23E8",
848 SVGA3D_RG_S23E8,
849 SVGA3D_DEVCAP_SURFACEFMT_RG_S23E8,
850 1, 1, 4,
851 SVGA3DFORMAT_OP_TEXTURE |
852 SVGA3DFORMAT_OP_VOLUMETEXTURE |
853 SVGA3DFORMAT_OP_CUBETEXTURE |
854 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
855 },
856 {
857 /*
858 * SVGA3D_BUFFER is a placeholder format for index/vertex buffers.
859 */
860 "SVGA3D_BUFFER",
861 SVGA3D_BUFFER, 0, 1, 1, 1, 0
862 },
863 {
864 "SVGA3D_Z_D24X8",
865 SVGA3D_Z_D24X8,
866 SVGA3D_DEVCAP_SURFACEFMT_Z_D24X8,
867 1, 1, 4,
868 SVGA3DFORMAT_OP_ZSTENCIL
869 },
870 {
871 "SVGA3D_V16U16",
872 SVGA3D_V16U16,
873 SVGA3D_DEVCAP_SURFACEFMT_V16U16,
874 1, 1, 4,
875 SVGA3DFORMAT_OP_TEXTURE |
876 SVGA3DFORMAT_OP_CUBETEXTURE |
877 SVGA3DFORMAT_OP_VOLUMETEXTURE
878 },
879 {
880 "SVGA3D_G16R16",
881 SVGA3D_G16R16,
882 SVGA3D_DEVCAP_SURFACEFMT_G16R16,
883 1, 1, 4,
884 SVGA3DFORMAT_OP_TEXTURE |
885 SVGA3DFORMAT_OP_CUBETEXTURE |
886 SVGA3DFORMAT_OP_VOLUMETEXTURE |
887 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
888 },
889 {
890 "SVGA3D_A16B16G16R16",
891 SVGA3D_A16B16G16R16,
892 SVGA3D_DEVCAP_SURFACEFMT_A16B16G16R16,
893 1, 1, 8,
894 SVGA3DFORMAT_OP_TEXTURE |
895 SVGA3DFORMAT_OP_CUBETEXTURE |
896 SVGA3DFORMAT_OP_VOLUMETEXTURE |
897 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
898 },
899 {
900 "SVGA3D_UYVY",
901 SVGA3D_UYVY,
902 SVGA3D_DEVCAP_SURFACEFMT_UYVY,
903 0, 0, 0, 0
904 },
905 {
906 "SVGA3D_YUY2",
907 SVGA3D_YUY2,
908 SVGA3D_DEVCAP_SURFACEFMT_YUY2,
909 0, 0, 0, 0
910 },
911 {
912 "SVGA3D_NV12",
913 SVGA3D_NV12,
914 SVGA3D_DEVCAP_SURFACEFMT_NV12,
915 0, 0, 0, 0
916 },
917 {
918 "SVGA3D_AYUV",
919 SVGA3D_AYUV,
920 SVGA3D_DEVCAP_SURFACEFMT_AYUV,
921 0, 0, 0, 0
922 },
923 {
924 "SVGA3D_R32G32B32A32_TYPELESS",
925 SVGA3D_R32G32B32A32_TYPELESS,
926 SVGA3D_DEVCAP_DXFMT_R32G32B32A32_TYPELESS,
927 1, 1, 16, 0
928 },
929 {
930 "SVGA3D_R32G32B32A32_UINT",
931 SVGA3D_R32G32B32A32_UINT,
932 SVGA3D_DEVCAP_DXFMT_R32G32B32A32_UINT,
933 1, 1, 16, 0
934 },
935 {
936 "SVGA3D_R32G32B32A32_SINT",
937 SVGA3D_R32G32B32A32_SINT,
938 SVGA3D_DEVCAP_DXFMT_R32G32B32A32_SINT,
939 1, 1, 16, 0
940 },
941 {
942 "SVGA3D_R32G32B32_TYPELESS",
943 SVGA3D_R32G32B32_TYPELESS,
944 SVGA3D_DEVCAP_DXFMT_R32G32B32_TYPELESS,
945 1, 1, 12, 0
946 },
947 {
948 "SVGA3D_R32G32B32_FLOAT",
949 SVGA3D_R32G32B32_FLOAT,
950 SVGA3D_DEVCAP_DXFMT_R32G32B32_FLOAT,
951 1, 1, 12, 0
952 },
953 {
954 "SVGA3D_R32G32B32_UINT",
955 SVGA3D_R32G32B32_UINT,
956 SVGA3D_DEVCAP_DXFMT_R32G32B32_UINT,
957 1, 1, 12, 0
958 },
959 {
960 "SVGA3D_R32G32B32_SINT",
961 SVGA3D_R32G32B32_SINT,
962 SVGA3D_DEVCAP_DXFMT_R32G32B32_SINT,
963 1, 1, 12, 0
964 },
965 {
966 "SVGA3D_R16G16B16A16_TYPELESS",
967 SVGA3D_R16G16B16A16_TYPELESS,
968 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_TYPELESS,
969 1, 1, 8, 0
970 },
971 {
972 "SVGA3D_R16G16B16A16_UINT",
973 SVGA3D_R16G16B16A16_UINT,
974 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UINT,
975 1, 1, 8, 0
976 },
977 {
978 "SVGA3D_R16G16B16A16_SNORM",
979 SVGA3D_R16G16B16A16_SNORM,
980 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SNORM,
981 1, 1, 8, 0
982 },
983 {
984 "SVGA3D_R16G16B16A16_SINT",
985 SVGA3D_R16G16B16A16_SINT,
986 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SINT,
987 1, 1, 8, 0
988 },
989 {
990 "SVGA3D_R32G32_TYPELESS",
991 SVGA3D_R32G32_TYPELESS,
992 SVGA3D_DEVCAP_DXFMT_R32G32_TYPELESS,
993 1, 1, 8, 0
994 },
995 {
996 "SVGA3D_R32G32_UINT",
997 SVGA3D_R32G32_UINT,
998 SVGA3D_DEVCAP_DXFMT_R32G32_UINT,
999 1, 1, 8, 0
1000 },
1001 {
1002 "SVGA3D_R32G32_SINT",
1003 SVGA3D_R32G32_SINT,
1004 SVGA3D_DEVCAP_DXFMT_R32G32_SINT,
1005 1, 1, 8,
1006 0
1007 },
1008 {
1009 "SVGA3D_R32G8X24_TYPELESS",
1010 SVGA3D_R32G8X24_TYPELESS,
1011 SVGA3D_DEVCAP_DXFMT_R32G8X24_TYPELESS,
1012 1, 1, 8, 0
1013 },
1014 {
1015 /* Special case: no devcap / report sampler and depth/stencil ability
1016 */
1017 "SVGA3D_D32_FLOAT_S8X24_UINT",
1018 SVGA3D_D32_FLOAT_S8X24_UINT,
1019 0, /*SVGA3D_DEVCAP_DXFMT_D32_FLOAT_S8X24_UINT*/
1020 1, 1, 8,
1021 SVGA3DFORMAT_OP_TEXTURE |
1022 SVGA3DFORMAT_OP_CUBETEXTURE |
1023 SVGA3DFORMAT_OP_VOLUMETEXTURE |
1024 SVGA3DFORMAT_OP_ZSTENCIL
1025 },
1026 {
1027 /* Special case: no devcap / report sampler and depth/stencil ability
1028 */
1029 "SVGA3D_R32_FLOAT_X8X24_TYPELESS",
1030 SVGA3D_R32_FLOAT_X8X24_TYPELESS,
1031 0, /*SVGA3D_DEVCAP_DXFMT_R32_FLOAT_X8X24_TYPELESS*/
1032 1, 1, 8,
1033 SVGA3DFORMAT_OP_TEXTURE |
1034 SVGA3DFORMAT_OP_CUBETEXTURE |
1035 SVGA3DFORMAT_OP_VOLUMETEXTURE |
1036 SVGA3DFORMAT_OP_ZSTENCIL
1037 },
1038 {
1039 "SVGA3D_X32_TYPELESS_G8X24_UINT",
1040 SVGA3D_X32_TYPELESS_G8X24_UINT,
1041 SVGA3D_DEVCAP_DXFMT_X32_TYPELESS_G8X24_UINT,
1042 1, 1, 4, 0
1043 },
1044 {
1045 "SVGA3D_R10G10B10A2_TYPELESS",
1046 SVGA3D_R10G10B10A2_TYPELESS,
1047 SVGA3D_DEVCAP_DXFMT_R10G10B10A2_TYPELESS,
1048 1, 1, 4, 0
1049 },
1050 {
1051 "SVGA3D_R10G10B10A2_UINT",
1052 SVGA3D_R10G10B10A2_UINT,
1053 SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UINT,
1054 1, 1, 4, 0
1055 },
1056 {
1057 "SVGA3D_R11G11B10_FLOAT",
1058 SVGA3D_R11G11B10_FLOAT,
1059 SVGA3D_DEVCAP_DXFMT_R11G11B10_FLOAT,
1060 1, 1, 4, 0
1061 },
1062 {
1063 "SVGA3D_R8G8B8A8_TYPELESS",
1064 SVGA3D_R8G8B8A8_TYPELESS,
1065 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_TYPELESS,
1066 1, 1, 4, 0
1067 },
1068 {
1069 "SVGA3D_R8G8B8A8_UNORM",
1070 SVGA3D_R8G8B8A8_UNORM,
1071 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM,
1072 1, 1, 4, 0
1073 },
1074 {
1075 "SVGA3D_R8G8B8A8_UNORM_SRGB",
1076 SVGA3D_R8G8B8A8_UNORM_SRGB,
1077 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM_SRGB,
1078 1, 1, 4, 0
1079 },
1080 {
1081 "SVGA3D_R8G8B8A8_UINT",
1082 SVGA3D_R8G8B8A8_UINT,
1083 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UINT,
1084 1, 1, 4, 0
1085 },
1086 {
1087 "SVGA3D_R8G8B8A8_SINT",
1088 SVGA3D_R8G8B8A8_SINT,
1089 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SINT,
1090 1, 1, 4, 0
1091 },
1092 {
1093 "SVGA3D_R16G16_TYPELESS",
1094 SVGA3D_R16G16_TYPELESS,
1095 SVGA3D_DEVCAP_DXFMT_R16G16_TYPELESS,
1096 1, 1, 4, 0
1097 },
1098 {
1099 "SVGA3D_R16G16_UINT",
1100 SVGA3D_R16G16_UINT,
1101 SVGA3D_DEVCAP_DXFMT_R16G16_UINT,
1102 1, 1, 4, 0
1103 },
1104 {
1105 "SVGA3D_R16G16_SINT",
1106 SVGA3D_R16G16_SINT,
1107 SVGA3D_DEVCAP_DXFMT_R16G16_SINT,
1108 1, 1, 4, 0
1109 },
1110 {
1111 "SVGA3D_R32_TYPELESS",
1112 SVGA3D_R32_TYPELESS,
1113 SVGA3D_DEVCAP_DXFMT_R32_TYPELESS,
1114 1, 1, 4, 0
1115 },
1116 {
1117 /* Special case: no devcap / report sampler and depth/stencil ability
1118 */
1119 "SVGA3D_D32_FLOAT",
1120 SVGA3D_D32_FLOAT,
1121 0, /*SVGA3D_DEVCAP_DXFMT_D32_FLOAT*/
1122 1, 1, 4,
1123 SVGA3DFORMAT_OP_TEXTURE |
1124 SVGA3DFORMAT_OP_CUBETEXTURE |
1125 SVGA3DFORMAT_OP_VOLUMETEXTURE |
1126 SVGA3DFORMAT_OP_ZSTENCIL
1127 },
1128 {
1129 "SVGA3D_R32_UINT",
1130 SVGA3D_R32_UINT,
1131 SVGA3D_DEVCAP_DXFMT_R32_UINT,
1132 1, 1, 4, 0
1133 },
1134 {
1135 "SVGA3D_R32_SINT",
1136 SVGA3D_R32_SINT,
1137 SVGA3D_DEVCAP_DXFMT_R32_SINT,
1138 1, 1, 4, 0
1139 },
1140 {
1141 "SVGA3D_R24G8_TYPELESS",
1142 SVGA3D_R24G8_TYPELESS,
1143 SVGA3D_DEVCAP_DXFMT_R24G8_TYPELESS,
1144 1, 1, 4, 0
1145 },
1146 {
1147 /* Special case: no devcap / report sampler and depth/stencil ability
1148 */
1149 "SVGA3D_D24_UNORM_S8_UINT",
1150 SVGA3D_D24_UNORM_S8_UINT,
1151 0, /*SVGA3D_DEVCAP_DXFMT_D24_UNORM_S8_UINT*/
1152 1, 1, 4,
1153 SVGA3DFORMAT_OP_TEXTURE |
1154 SVGA3DFORMAT_OP_CUBETEXTURE |
1155 SVGA3DFORMAT_OP_VOLUMETEXTURE |
1156 SVGA3DFORMAT_OP_ZSTENCIL
1157 },
1158 {
1159 /* Special case: no devcap / report sampler and depth/stencil ability
1160 */
1161 "SVGA3D_R24_UNORM_X8_TYPELESS",
1162 SVGA3D_R24_UNORM_X8_TYPELESS,
1163 0, /*SVGA3D_DEVCAP_DXFMT_R24_UNORM_X8_TYPELESS*/
1164 1, 1, 4,
1165 SVGA3DFORMAT_OP_TEXTURE |
1166 SVGA3DFORMAT_OP_CUBETEXTURE |
1167 SVGA3DFORMAT_OP_VOLUMETEXTURE |
1168 SVGA3DFORMAT_OP_ZSTENCIL
1169 },
1170 {
1171 "SVGA3D_X24_TYPELESS_G8_UINT",
1172 SVGA3D_X24_TYPELESS_G8_UINT,
1173 SVGA3D_DEVCAP_DXFMT_X24_TYPELESS_G8_UINT,
1174 1, 1, 4, 0
1175 },
1176 {
1177 "SVGA3D_R8G8_TYPELESS",
1178 SVGA3D_R8G8_TYPELESS,
1179 SVGA3D_DEVCAP_DXFMT_R8G8_TYPELESS,
1180 1, 1, 2, 0
1181 },
1182 {
1183 "SVGA3D_R8G8_UNORM",
1184 SVGA3D_R8G8_UNORM,
1185 SVGA3D_DEVCAP_DXFMT_R8G8_UNORM,
1186 1, 1, 2, 0
1187 },
1188 {
1189 "SVGA3D_R8G8_UINT",
1190 SVGA3D_R8G8_UINT,
1191 SVGA3D_DEVCAP_DXFMT_R8G8_UINT,
1192 1, 1, 2, 0
1193 },
1194 {
1195 "SVGA3D_R8G8_SINT",
1196 SVGA3D_R8G8_SINT,
1197 SVGA3D_DEVCAP_DXFMT_R8G8_SINT,
1198 1, 1, 2, 0
1199 },
1200 {
1201 "SVGA3D_R16_TYPELESS",
1202 SVGA3D_R16_TYPELESS,
1203 SVGA3D_DEVCAP_DXFMT_R16_TYPELESS,
1204 1, 1, 2, 0
1205 },
1206 {
1207 "SVGA3D_R16_UNORM",
1208 SVGA3D_R16_UNORM,
1209 SVGA3D_DEVCAP_DXFMT_R16_UNORM,
1210 1, 1, 2, 0
1211 },
1212 {
1213 "SVGA3D_R16_UINT",
1214 SVGA3D_R16_UINT,
1215 SVGA3D_DEVCAP_DXFMT_R16_UINT,
1216 1, 1, 2, 0
1217 },
1218 {
1219 "SVGA3D_R16_SNORM",
1220 SVGA3D_R16_SNORM,
1221 SVGA3D_DEVCAP_DXFMT_R16_SNORM,
1222 1, 1, 2, 0
1223 },
1224 {
1225 "SVGA3D_R16_SINT",
1226 SVGA3D_R16_SINT,
1227 SVGA3D_DEVCAP_DXFMT_R16_SINT,
1228 1, 1, 2, 0
1229 },
1230 {
1231 "SVGA3D_R8_TYPELESS",
1232 SVGA3D_R8_TYPELESS,
1233 SVGA3D_DEVCAP_DXFMT_R8_TYPELESS,
1234 1, 1, 1, 0
1235 },
1236 {
1237 "SVGA3D_R8_UNORM",
1238 SVGA3D_R8_UNORM,
1239 SVGA3D_DEVCAP_DXFMT_R8_UNORM,
1240 1, 1, 1, 0
1241 },
1242 {
1243 "SVGA3D_R8_UINT",
1244 SVGA3D_R8_UINT,
1245 SVGA3D_DEVCAP_DXFMT_R8_UINT,
1246 1, 1, 1, 0
1247 },
1248 {
1249 "SVGA3D_R8_SNORM",
1250 SVGA3D_R8_SNORM,
1251 SVGA3D_DEVCAP_DXFMT_R8_SNORM,
1252 1, 1, 1, 0
1253 },
1254 {
1255 "SVGA3D_R8_SINT",
1256 SVGA3D_R8_SINT,
1257 SVGA3D_DEVCAP_DXFMT_R8_SINT,
1258 1, 1, 1, 0
1259 },
1260 {
1261 "SVGA3D_P8",
1262 SVGA3D_P8, 0, 0, 0, 0, 0
1263 },
1264 {
1265 "SVGA3D_R9G9B9E5_SHAREDEXP",
1266 SVGA3D_R9G9B9E5_SHAREDEXP,
1267 SVGA3D_DEVCAP_DXFMT_R9G9B9E5_SHAREDEXP,
1268 1, 1, 4, 0
1269 },
1270 {
1271 "SVGA3D_R8G8_B8G8_UNORM",
1272 SVGA3D_R8G8_B8G8_UNORM, 0, 0, 0, 0, 0
1273 },
1274 {
1275 "SVGA3D_G8R8_G8B8_UNORM",
1276 SVGA3D_G8R8_G8B8_UNORM, 0, 0, 0, 0, 0
1277 },
1278 {
1279 "SVGA3D_BC1_TYPELESS",
1280 SVGA3D_BC1_TYPELESS,
1281 SVGA3D_DEVCAP_DXFMT_BC1_TYPELESS,
1282 4, 4, 8, 0
1283 },
1284 {
1285 "SVGA3D_BC1_UNORM_SRGB",
1286 SVGA3D_BC1_UNORM_SRGB,
1287 SVGA3D_DEVCAP_DXFMT_BC1_UNORM_SRGB,
1288 4, 4, 8, 0
1289 },
1290 {
1291 "SVGA3D_BC2_TYPELESS",
1292 SVGA3D_BC2_TYPELESS,
1293 SVGA3D_DEVCAP_DXFMT_BC2_TYPELESS,
1294 4, 4, 16, 0
1295 },
1296 {
1297 "SVGA3D_BC2_UNORM_SRGB",
1298 SVGA3D_BC2_UNORM_SRGB,
1299 SVGA3D_DEVCAP_DXFMT_BC2_UNORM_SRGB,
1300 4, 4, 16, 0
1301 },
1302 {
1303 "SVGA3D_BC3_TYPELESS",
1304 SVGA3D_BC3_TYPELESS,
1305 SVGA3D_DEVCAP_DXFMT_BC3_TYPELESS,
1306 4, 4, 16, 0
1307 },
1308 {
1309 "SVGA3D_BC3_UNORM_SRGB",
1310 SVGA3D_BC3_UNORM_SRGB,
1311 4, 4, 16, 0
1312 },
1313 {
1314 "SVGA3D_BC4_TYPELESS",
1315 SVGA3D_BC4_TYPELESS,
1316 SVGA3D_DEVCAP_DXFMT_BC4_TYPELESS,
1317 4, 4, 8, 0
1318 },
1319 {
1320 "SVGA3D_ATI1",
1321 SVGA3D_ATI1, 0, 0, 0, 0, 0
1322 },
1323 {
1324 "SVGA3D_BC4_SNORM",
1325 SVGA3D_BC4_SNORM,
1326 SVGA3D_DEVCAP_DXFMT_BC4_SNORM,
1327 4, 4, 8, 0
1328 },
1329 {
1330 "SVGA3D_BC5_TYPELESS",
1331 SVGA3D_BC5_TYPELESS,
1332 SVGA3D_DEVCAP_DXFMT_BC5_TYPELESS,
1333 4, 4, 16, 0
1334 },
1335 {
1336 "SVGA3D_ATI2",
1337 SVGA3D_ATI2, 0, 0, 0, 0, 0
1338 },
1339 {
1340 "SVGA3D_BC5_SNORM",
1341 SVGA3D_BC5_SNORM,
1342 SVGA3D_DEVCAP_DXFMT_BC5_SNORM,
1343 4, 4, 16, 0
1344 },
1345 {
1346 "SVGA3D_R10G10B10_XR_BIAS_A2_UNORM",
1347 SVGA3D_R10G10B10_XR_BIAS_A2_UNORM, 0, 0, 0, 0, 0
1348 },
1349 {
1350 "SVGA3D_B8G8R8A8_TYPELESS",
1351 SVGA3D_B8G8R8A8_TYPELESS,
1352 SVGA3D_DEVCAP_DXFMT_B8G8R8A8_TYPELESS,
1353 1, 1, 4, 0
1354 },
1355 {
1356 "SVGA3D_B8G8R8A8_UNORM_SRGB",
1357 SVGA3D_B8G8R8A8_UNORM_SRGB,
1358 SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM_SRGB,
1359 1, 1, 4, 0
1360 },
1361 {
1362 "SVGA3D_B8G8R8X8_TYPELESS",
1363 SVGA3D_B8G8R8X8_TYPELESS,
1364 SVGA3D_DEVCAP_DXFMT_B8G8R8X8_TYPELESS,
1365 1, 1, 4, 0
1366 },
1367 {
1368 "SVGA3D_B8G8R8X8_UNORM_SRGB",
1369 SVGA3D_B8G8R8X8_UNORM_SRGB,
1370 SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM_SRGB,
1371 1, 1, 4, 0
1372 },
1373 {
1374 "SVGA3D_Z_DF16",
1375 SVGA3D_Z_DF16,
1376 SVGA3D_DEVCAP_SURFACEFMT_Z_DF16,
1377 1, 1, 2, 0
1378 },
1379 {
1380 "SVGA3D_Z_DF24",
1381 SVGA3D_Z_DF24,
1382 SVGA3D_DEVCAP_SURFACEFMT_Z_DF24,
1383 1, 1, 4, 0
1384 },
1385 {
1386 "SVGA3D_Z_D24S8_INT",
1387 SVGA3D_Z_D24S8_INT,
1388 SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8_INT,
1389 1, 1, 4, 0
1390 },
1391 {
1392 "SVGA3D_YV12",
1393 SVGA3D_YV12, 0, 0, 0, 0, 0
1394 },
1395 {
1396 "SVGA3D_R32G32B32A32_FLOAT",
1397 SVGA3D_R32G32B32A32_FLOAT,
1398 SVGA3D_DEVCAP_DXFMT_R32G32B32A32_FLOAT,
1399 1, 1, 16, 0
1400 },
1401 {
1402 "SVGA3D_R16G16B16A16_FLOAT",
1403 SVGA3D_R16G16B16A16_FLOAT,
1404 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_FLOAT,
1405 1, 1, 8, 0
1406 },
1407 {
1408 "SVGA3D_R16G16B16A16_UNORM",
1409 SVGA3D_R16G16B16A16_UNORM,
1410 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UNORM,
1411 1, 1, 8, 0
1412 },
1413 {
1414 "SVGA3D_R32G32_FLOAT",
1415 SVGA3D_R32G32_FLOAT,
1416 SVGA3D_DEVCAP_DXFMT_R32G32_FLOAT,
1417 1, 1, 8, 0
1418 },
1419 {
1420 "SVGA3D_R10G10B10A2_UNORM",
1421 SVGA3D_R10G10B10A2_UNORM,
1422 SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UNORM,
1423 1, 1, 4, 0
1424 },
1425 {
1426 "SVGA3D_R8G8B8A8_SNORM",
1427 SVGA3D_R8G8B8A8_SNORM,
1428 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SNORM,
1429 1, 1, 4, 0
1430 },
1431 {
1432 "SVGA3D_R16G16_FLOAT",
1433 SVGA3D_R16G16_FLOAT,
1434 SVGA3D_DEVCAP_DXFMT_R16G16_FLOAT,
1435 1, 1, 4, 0
1436 },
1437 {
1438 "SVGA3D_R16G16_UNORM",
1439 SVGA3D_R16G16_UNORM,
1440 SVGA3D_DEVCAP_DXFMT_R16G16_UNORM,
1441 1, 1, 4, 0
1442 },
1443 {
1444 "SVGA3D_R16G16_SNORM",
1445 SVGA3D_R16G16_SNORM,
1446 SVGA3D_DEVCAP_DXFMT_R16G16_SNORM,
1447 1, 1, 4, 0
1448 },
1449 {
1450 "SVGA3D_R32_FLOAT",
1451 SVGA3D_R32_FLOAT,
1452 SVGA3D_DEVCAP_DXFMT_R32_FLOAT,
1453 1, 1, 4, 0
1454 },
1455 {
1456 "SVGA3D_R8G8_SNORM",
1457 SVGA3D_R8G8_SNORM,
1458 SVGA3D_DEVCAP_DXFMT_R8G8_SNORM,
1459 1, 1, 2, 0
1460 },
1461 {
1462 "SVGA3D_R16_FLOAT",
1463 SVGA3D_R16_FLOAT,
1464 SVGA3D_DEVCAP_DXFMT_R16_FLOAT,
1465 1, 1, 2, 0
1466 },
1467 {
1468 "SVGA3D_D16_UNORM",
1469 SVGA3D_D16_UNORM,
1470 0, /*SVGA3D_DEVCAP_DXFMT_D16_UNORM*/
1471 1, 1, 2,
1472 SVGA3DFORMAT_OP_TEXTURE |
1473 SVGA3DFORMAT_OP_CUBETEXTURE |
1474 SVGA3DFORMAT_OP_VOLUMETEXTURE |
1475 SVGA3DFORMAT_OP_ZSTENCIL
1476 },
1477 {
1478 "SVGA3D_A8_UNORM",
1479 SVGA3D_A8_UNORM,
1480 SVGA3D_DEVCAP_DXFMT_A8_UNORM,
1481 1, 1, 1, 0
1482 },
1483 {
1484 "SVGA3D_BC1_UNORM",
1485 SVGA3D_BC1_UNORM,
1486 SVGA3D_DEVCAP_DXFMT_BC1_UNORM,
1487 4, 4, 8, 0
1488 },
1489 {
1490 "SVGA3D_BC2_UNORM",
1491 SVGA3D_BC2_UNORM,
1492 SVGA3D_DEVCAP_DXFMT_BC2_UNORM,
1493 4, 4, 16, 0
1494 },
1495 {
1496 "SVGA3D_BC3_UNORM",
1497 SVGA3D_BC3_UNORM,
1498 SVGA3D_DEVCAP_DXFMT_BC3_UNORM,
1499 4, 4, 16, 0
1500 },
1501 {
1502 "SVGA3D_B5G6R5_UNORM",
1503 SVGA3D_B5G6R5_UNORM,
1504 SVGA3D_DEVCAP_DXFMT_B5G6R5_UNORM,
1505 1, 1, 2, 0
1506 },
1507 {
1508 "SVGA3D_B5G5R5A1_UNORM",
1509 SVGA3D_B5G5R5A1_UNORM,
1510 SVGA3D_DEVCAP_DXFMT_B5G5R5A1_UNORM,
1511 1, 1, 2, 0
1512 },
1513 {
1514 "SVGA3D_B8G8R8A8_UNORM",
1515 SVGA3D_B8G8R8A8_UNORM,
1516 SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM,
1517 1, 1, 4, 0
1518 },
1519 {
1520 "SVGA3D_B8G8R8X8_UNORM",
1521 SVGA3D_B8G8R8X8_UNORM,
1522 SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM,
1523 1, 1, 4, 0
1524 },
1525 {
1526 "SVGA3D_BC4_UNORM",
1527 SVGA3D_BC4_UNORM,
1528 SVGA3D_DEVCAP_DXFMT_BC4_UNORM,
1529 4, 4, 8, 0
1530 },
1531 {
1532 "SVGA3D_BC5_UNORM",
1533 SVGA3D_BC5_UNORM,
1534 SVGA3D_DEVCAP_DXFMT_BC5_UNORM,
1535 4, 4, 16, 0
1536 }
1537 };
1538
1539 static const SVGA3dSurfaceFormat compat_x8r8g8b8[] = {
1540 SVGA3D_X8R8G8B8, SVGA3D_A8R8G8B8, SVGA3D_B8G8R8X8_UNORM,
1541 SVGA3D_B8G8R8A8_UNORM, 0
1542 };
1543 static const SVGA3dSurfaceFormat compat_r8[] = {
1544 SVGA3D_R8_UNORM, SVGA3D_NV12, SVGA3D_YV12, 0
1545 };
1546 static const SVGA3dSurfaceFormat compat_g8r8[] = {
1547 SVGA3D_R8G8_UNORM, SVGA3D_NV12, 0
1548 };
1549 static const SVGA3dSurfaceFormat compat_r5g6b5[] = {
1550 SVGA3D_R5G6B5, SVGA3D_B5G6R5_UNORM, 0
1551 };
1552
1553 static const struct format_compat_entry format_compats[] = {
1554 {PIPE_FORMAT_B8G8R8X8_UNORM, compat_x8r8g8b8},
1555 {PIPE_FORMAT_B8G8R8A8_UNORM, compat_x8r8g8b8},
1556 {PIPE_FORMAT_R8_UNORM, compat_r8},
1557 {PIPE_FORMAT_R8G8_UNORM, compat_g8r8},
1558 {PIPE_FORMAT_B5G6R5_UNORM, compat_r5g6b5}
1559 };
1560
1561 /**
1562 * Debug only:
1563 * 1. check that format_cap_table[i] matches the i-th SVGA3D format.
1564 * 2. check that format_conversion_table[i].pformat == i.
1565 */
1566 static void
1567 check_format_tables(void)
1568 {
1569 static boolean first_call = TRUE;
1570
1571 if (first_call) {
1572 unsigned i;
1573
1574 STATIC_ASSERT(ARRAY_SIZE(format_cap_table) == SVGA3D_FORMAT_MAX);
1575 for (i = 0; i < ARRAY_SIZE(format_cap_table); i++) {
1576 assert(format_cap_table[i].format == i);
1577 }
1578
1579 STATIC_ASSERT(ARRAY_SIZE(format_conversion_table) == PIPE_FORMAT_COUNT);
1580 for (i = 0; i < ARRAY_SIZE(format_conversion_table); i++) {
1581 assert(format_conversion_table[i].pformat == i);
1582 }
1583
1584 first_call = FALSE;
1585 }
1586 }
1587
1588
1589 /*
1590 * Get format capabilities from the host. It takes in consideration
1591 * deprecated/unsupported formats, and formats which are implicitely assumed to
1592 * be supported when the host does not provide an explicit capability entry.
1593 */
1594 void
1595 svga_get_format_cap(struct svga_screen *ss,
1596 SVGA3dSurfaceFormat format,
1597 SVGA3dSurfaceFormatCaps *caps)
1598 {
1599 struct svga_winsys_screen *sws = ss->sws;
1600 SVGA3dDevCapResult result;
1601 const struct format_cap *entry;
1602
1603 #ifdef DEBUG
1604 check_format_tables();
1605 #else
1606 (void) check_format_tables;
1607 #endif
1608
1609 assert(format < ARRAY_SIZE(format_cap_table));
1610 entry = &format_cap_table[format];
1611 assert(entry->format == format);
1612
1613 if (entry->devcap && sws->get_cap(sws, entry->devcap, &result)) {
1614 assert(format < SVGA3D_UYVY || entry->defaultOperations == 0);
1615
1616 /* Explicitly advertised format */
1617 if (entry->devcap > SVGA3D_DEVCAP_DX) {
1618 /* Translate DX/VGPU10 format cap to VGPU9 cap */
1619 caps->value = 0;
1620 if (result.u & SVGA3D_DXFMT_COLOR_RENDERTARGET)
1621 caps->value |= SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET;
1622 if (!(result.u & SVGA3D_DXFMT_BLENDABLE))
1623 caps->value |= SVGA3DFORMAT_OP_NOALPHABLEND;
1624 if (result.u & SVGA3D_DXFMT_DEPTH_RENDERTARGET)
1625 caps->value |= SVGA3DFORMAT_OP_ZSTENCIL;
1626 if (result.u & SVGA3D_DXFMT_SHADER_SAMPLE)
1627 caps->value |= (SVGA3DFORMAT_OP_TEXTURE |
1628 SVGA3DFORMAT_OP_CUBETEXTURE);
1629 if (result.u & SVGA3D_DXFMT_VOLUME)
1630 caps->value |= SVGA3DFORMAT_OP_VOLUMETEXTURE;
1631 }
1632 else {
1633 /* Return VGPU9 format cap as-is */
1634 caps->value = result.u;
1635 }
1636
1637 } else {
1638 /* Implicitly advertised format -- use default caps */
1639 caps->value = entry->defaultOperations;
1640 }
1641 }
1642
1643
1644 void
1645 svga_format_size(SVGA3dSurfaceFormat format,
1646 unsigned *block_width,
1647 unsigned *block_height,
1648 unsigned *bytes_per_block)
1649 {
1650 assert(format < ARRAY_SIZE(format_cap_table));
1651 *block_width = format_cap_table[format].block_width;
1652 *block_height = format_cap_table[format].block_height;
1653 *bytes_per_block = format_cap_table[format].block_bytes;
1654 /* Make sure the table entry was valid */
1655 if (*block_width == 0)
1656 debug_printf("Bad table entry for %s\n", svga_format_name(format));
1657 assert(*block_width);
1658 assert(*block_height);
1659 assert(*bytes_per_block);
1660 }
1661
1662
1663 const char *
1664 svga_format_name(SVGA3dSurfaceFormat format)
1665 {
1666 assert(format < ARRAY_SIZE(format_cap_table));
1667 return format_cap_table[format].name;
1668 }
1669
1670
1671 /**
1672 * Is the given SVGA3dSurfaceFormat a signed or unsigned integer color format?
1673 */
1674 boolean
1675 svga_format_is_integer(SVGA3dSurfaceFormat format)
1676 {
1677 switch (format) {
1678 case SVGA3D_R32G32B32A32_SINT:
1679 case SVGA3D_R32G32B32_SINT:
1680 case SVGA3D_R32G32_SINT:
1681 case SVGA3D_R32_SINT:
1682 case SVGA3D_R16G16B16A16_SINT:
1683 case SVGA3D_R16G16_SINT:
1684 case SVGA3D_R16_SINT:
1685 case SVGA3D_R8G8B8A8_SINT:
1686 case SVGA3D_R8G8_SINT:
1687 case SVGA3D_R8_SINT:
1688 case SVGA3D_R32G32B32A32_UINT:
1689 case SVGA3D_R32G32B32_UINT:
1690 case SVGA3D_R32G32_UINT:
1691 case SVGA3D_R32_UINT:
1692 case SVGA3D_R16G16B16A16_UINT:
1693 case SVGA3D_R16G16_UINT:
1694 case SVGA3D_R16_UINT:
1695 case SVGA3D_R8G8B8A8_UINT:
1696 case SVGA3D_R8G8_UINT:
1697 case SVGA3D_R8_UINT:
1698 case SVGA3D_R10G10B10A2_UINT:
1699 return TRUE;
1700 default:
1701 return FALSE;
1702 }
1703 }
1704
1705 boolean
1706 svga_format_support_gen_mips(enum pipe_format format)
1707 {
1708 assert(format < ARRAY_SIZE(format_conversion_table));
1709 return ((format_conversion_table[format].flags & TF_GEN_MIPS) > 0);
1710 }
1711
1712
1713 /**
1714 * Given a texture format, return the expected data type returned from
1715 * the texture sampler. For example, UNORM8 formats return floating point
1716 * values while SINT formats returned signed integer values.
1717 * Note: this function could be moved into the gallum u_format.[ch] code
1718 * if it's useful to anyone else.
1719 */
1720 enum tgsi_return_type
1721 svga_get_texture_datatype(enum pipe_format format)
1722 {
1723 const struct util_format_description *desc = util_format_description(format);
1724 enum tgsi_return_type t;
1725
1726 if (desc->layout == UTIL_FORMAT_LAYOUT_PLAIN ) {
1727 if (util_format_is_depth_or_stencil(format)) {
1728 t = TGSI_RETURN_TYPE_FLOAT; /* XXX revisit this */
1729 }
1730 else if (desc->channel[0].type == UTIL_FORMAT_TYPE_FLOAT) {
1731 t = TGSI_RETURN_TYPE_FLOAT;
1732 }
1733 else if (desc->channel[0].type == UTIL_FORMAT_TYPE_UNSIGNED) {
1734 t = desc->channel[0].normalized ? TGSI_RETURN_TYPE_UNORM : TGSI_RETURN_TYPE_UINT;
1735 }
1736 else if (desc->channel[0].type == UTIL_FORMAT_TYPE_SIGNED) {
1737 t = desc->channel[0].normalized ? TGSI_RETURN_TYPE_SNORM : TGSI_RETURN_TYPE_SINT;
1738 }
1739 else {
1740 assert(!"Unexpected channel type in svga_get_texture_datatype()");
1741 t = TGSI_RETURN_TYPE_FLOAT;
1742 }
1743 }
1744 else {
1745 /* compressed format, shared exponent format, etc. */
1746 switch (format) {
1747 case PIPE_FORMAT_DXT1_RGB:
1748 case PIPE_FORMAT_DXT1_RGBA:
1749 case PIPE_FORMAT_DXT3_RGBA:
1750 case PIPE_FORMAT_DXT5_RGBA:
1751 case PIPE_FORMAT_DXT1_SRGB:
1752 case PIPE_FORMAT_DXT1_SRGBA:
1753 case PIPE_FORMAT_DXT3_SRGBA:
1754 case PIPE_FORMAT_DXT5_SRGBA:
1755 case PIPE_FORMAT_RGTC1_UNORM:
1756 case PIPE_FORMAT_RGTC2_UNORM:
1757 case PIPE_FORMAT_LATC1_UNORM:
1758 case PIPE_FORMAT_LATC2_UNORM:
1759 case PIPE_FORMAT_ETC1_RGB8:
1760 t = TGSI_RETURN_TYPE_UNORM;
1761 break;
1762 case PIPE_FORMAT_RGTC1_SNORM:
1763 case PIPE_FORMAT_RGTC2_SNORM:
1764 case PIPE_FORMAT_LATC1_SNORM:
1765 case PIPE_FORMAT_LATC2_SNORM:
1766 case PIPE_FORMAT_R10G10B10X2_SNORM:
1767 t = TGSI_RETURN_TYPE_SNORM;
1768 break;
1769 case PIPE_FORMAT_R11G11B10_FLOAT:
1770 case PIPE_FORMAT_R9G9B9E5_FLOAT:
1771 t = TGSI_RETURN_TYPE_FLOAT;
1772 break;
1773 default:
1774 assert(!"Unexpected channel type in svga_get_texture_datatype()");
1775 t = TGSI_RETURN_TYPE_FLOAT;
1776 }
1777 }
1778
1779 return t;
1780 }
1781
1782
1783 /**
1784 * Given an svga context, return true iff there are currently any integer color
1785 * buffers attached to the framebuffer.
1786 */
1787 boolean
1788 svga_has_any_integer_cbufs(const struct svga_context *svga)
1789 {
1790 unsigned i;
1791 for (i = 0; i < PIPE_MAX_COLOR_BUFS; ++i) {
1792 struct pipe_surface *cbuf = svga->curr.framebuffer.cbufs[i];
1793
1794 if (cbuf && util_format_is_pure_integer(cbuf->format)) {
1795 return TRUE;
1796 }
1797 }
1798 return FALSE;
1799 }
1800
1801
1802 /**
1803 * Given an SVGA format, return the corresponding typeless format.
1804 * If there is no typeless format, return the format unchanged.
1805 */
1806 SVGA3dSurfaceFormat
1807 svga_typeless_format(SVGA3dSurfaceFormat format)
1808 {
1809 switch (format) {
1810 case SVGA3D_R32G32B32A32_UINT:
1811 case SVGA3D_R32G32B32A32_SINT:
1812 case SVGA3D_R32G32B32A32_FLOAT:
1813 return SVGA3D_R32G32B32A32_TYPELESS;
1814 case SVGA3D_R32G32B32_FLOAT:
1815 case SVGA3D_R32G32B32_UINT:
1816 case SVGA3D_R32G32B32_SINT:
1817 return SVGA3D_R32G32B32_TYPELESS;
1818 case SVGA3D_R16G16B16A16_UINT:
1819 case SVGA3D_R16G16B16A16_UNORM:
1820 case SVGA3D_R16G16B16A16_SNORM:
1821 case SVGA3D_R16G16B16A16_SINT:
1822 case SVGA3D_R16G16B16A16_FLOAT:
1823 return SVGA3D_R16G16B16A16_TYPELESS;
1824 case SVGA3D_R32G32_UINT:
1825 case SVGA3D_R32G32_SINT:
1826 case SVGA3D_R32G32_FLOAT:
1827 return SVGA3D_R32G32_TYPELESS;
1828 case SVGA3D_D32_FLOAT_S8X24_UINT:
1829 return SVGA3D_R32G8X24_TYPELESS;
1830 case SVGA3D_X32_TYPELESS_G8X24_UINT:
1831 return SVGA3D_R32_FLOAT_X8X24_TYPELESS;
1832 case SVGA3D_R10G10B10A2_UINT:
1833 case SVGA3D_R10G10B10A2_UNORM:
1834 return SVGA3D_R10G10B10A2_TYPELESS;
1835 case SVGA3D_R8G8B8A8_UNORM:
1836 case SVGA3D_R8G8B8A8_SNORM:
1837 case SVGA3D_R8G8B8A8_UNORM_SRGB:
1838 case SVGA3D_R8G8B8A8_UINT:
1839 case SVGA3D_R8G8B8A8_SINT:
1840 return SVGA3D_R8G8B8A8_TYPELESS;
1841 case SVGA3D_R16G16_UINT:
1842 case SVGA3D_R16G16_SINT:
1843 case SVGA3D_R16G16_UNORM:
1844 case SVGA3D_R16G16_SNORM:
1845 case SVGA3D_R16G16_FLOAT:
1846 return SVGA3D_R16G16_TYPELESS;
1847 case SVGA3D_D32_FLOAT:
1848 case SVGA3D_R32_FLOAT:
1849 case SVGA3D_R32_UINT:
1850 case SVGA3D_R32_SINT:
1851 return SVGA3D_R32_TYPELESS;
1852 case SVGA3D_D24_UNORM_S8_UINT:
1853 return SVGA3D_R24G8_TYPELESS;
1854 case SVGA3D_X24_TYPELESS_G8_UINT:
1855 return SVGA3D_R24_UNORM_X8_TYPELESS;
1856 case SVGA3D_R8G8_UNORM:
1857 case SVGA3D_R8G8_SNORM:
1858 case SVGA3D_R8G8_UINT:
1859 case SVGA3D_R8G8_SINT:
1860 return SVGA3D_R8G8_TYPELESS;
1861 case SVGA3D_D16_UNORM:
1862 case SVGA3D_R16_UNORM:
1863 case SVGA3D_R16_UINT:
1864 case SVGA3D_R16_SNORM:
1865 case SVGA3D_R16_SINT:
1866 case SVGA3D_R16_FLOAT:
1867 return SVGA3D_R16_TYPELESS;
1868 case SVGA3D_R8_UNORM:
1869 case SVGA3D_R8_UINT:
1870 case SVGA3D_R8_SNORM:
1871 case SVGA3D_R8_SINT:
1872 return SVGA3D_R8_TYPELESS;
1873 case SVGA3D_B8G8R8A8_UNORM_SRGB:
1874 case SVGA3D_B8G8R8A8_UNORM:
1875 return SVGA3D_B8G8R8A8_TYPELESS;
1876 case SVGA3D_B8G8R8X8_UNORM_SRGB:
1877 case SVGA3D_B8G8R8X8_UNORM:
1878 return SVGA3D_B8G8R8X8_TYPELESS;
1879 case SVGA3D_BC1_UNORM:
1880 case SVGA3D_BC1_UNORM_SRGB:
1881 return SVGA3D_BC1_TYPELESS;
1882 case SVGA3D_BC2_UNORM:
1883 case SVGA3D_BC2_UNORM_SRGB:
1884 return SVGA3D_BC2_TYPELESS;
1885 case SVGA3D_BC3_UNORM:
1886 case SVGA3D_BC3_UNORM_SRGB:
1887 return SVGA3D_BC3_TYPELESS;
1888 case SVGA3D_BC4_UNORM:
1889 case SVGA3D_BC4_SNORM:
1890 return SVGA3D_BC4_TYPELESS;
1891 case SVGA3D_BC5_UNORM:
1892 case SVGA3D_BC5_SNORM:
1893 return SVGA3D_BC5_TYPELESS;
1894
1895 /* Special cases (no corresponding _TYPELESS formats) */
1896 case SVGA3D_A8_UNORM:
1897 case SVGA3D_B5G5R5A1_UNORM:
1898 case SVGA3D_B5G6R5_UNORM:
1899 case SVGA3D_R11G11B10_FLOAT:
1900 case SVGA3D_R9G9B9E5_SHAREDEXP:
1901 return format;
1902 default:
1903 debug_printf("Unexpected format %s in %s\n",
1904 svga_format_name(format), __FUNCTION__);
1905 return format;
1906 }
1907 }
1908
1909
1910 /**
1911 * Given a surface format, return the corresponding format to use for
1912 * a texture sampler. In most cases, it's the format unchanged, but there
1913 * are some special cases.
1914 */
1915 SVGA3dSurfaceFormat
1916 svga_sampler_format(SVGA3dSurfaceFormat format)
1917 {
1918 switch (format) {
1919 case SVGA3D_D16_UNORM:
1920 return SVGA3D_R16_UNORM;
1921 case SVGA3D_D24_UNORM_S8_UINT:
1922 return SVGA3D_R24_UNORM_X8_TYPELESS;
1923 case SVGA3D_D32_FLOAT:
1924 return SVGA3D_R32_FLOAT;
1925 case SVGA3D_D32_FLOAT_S8X24_UINT:
1926 return SVGA3D_R32_FLOAT_X8X24_TYPELESS;
1927 default:
1928 return format;
1929 }
1930 }
1931
1932
1933 /**
1934 * Is the given format an uncompressed snorm format?
1935 */
1936 bool
1937 svga_format_is_uncompressed_snorm(SVGA3dSurfaceFormat format)
1938 {
1939 switch (format) {
1940 case SVGA3D_R8G8B8A8_SNORM:
1941 case SVGA3D_R8G8_SNORM:
1942 case SVGA3D_R8_SNORM:
1943 case SVGA3D_R16G16B16A16_SNORM:
1944 case SVGA3D_R16G16_SNORM:
1945 case SVGA3D_R16_SNORM:
1946 return true;
1947 default:
1948 return false;
1949 }
1950 }
1951
1952
1953 bool
1954 svga_format_is_typeless(SVGA3dSurfaceFormat format)
1955 {
1956 switch (format) {
1957 case SVGA3D_R32G32B32A32_TYPELESS:
1958 case SVGA3D_R32G32B32_TYPELESS:
1959 case SVGA3D_R16G16B16A16_TYPELESS:
1960 case SVGA3D_R32G32_TYPELESS:
1961 case SVGA3D_R32G8X24_TYPELESS:
1962 case SVGA3D_R10G10B10A2_TYPELESS:
1963 case SVGA3D_R8G8B8A8_TYPELESS:
1964 case SVGA3D_R16G16_TYPELESS:
1965 case SVGA3D_R32_TYPELESS:
1966 case SVGA3D_R24G8_TYPELESS:
1967 case SVGA3D_R8G8_TYPELESS:
1968 case SVGA3D_R16_TYPELESS:
1969 case SVGA3D_R8_TYPELESS:
1970 case SVGA3D_BC1_TYPELESS:
1971 case SVGA3D_BC2_TYPELESS:
1972 case SVGA3D_BC3_TYPELESS:
1973 case SVGA3D_BC4_TYPELESS:
1974 case SVGA3D_BC5_TYPELESS:
1975 case SVGA3D_B8G8R8A8_TYPELESS:
1976 case SVGA3D_B8G8R8X8_TYPELESS:
1977 return true;
1978 default:
1979 return false;
1980 }
1981 }
1982
1983
1984 /**
1985 * \brief Can we import a surface with a given SVGA3D format as a texture?
1986 *
1987 * \param ss[in] pointer to the svga screen.
1988 * \param pformat[in] pipe format of the local texture.
1989 * \param sformat[in] svga3d format of the imported surface.
1990 * \param bind[in] bind flags of the imported texture.
1991 * \param verbose[in] Print out incompatibilities in debug mode.
1992 */
1993 bool
1994 svga_format_is_shareable(const struct svga_screen *ss,
1995 enum pipe_format pformat,
1996 SVGA3dSurfaceFormat sformat,
1997 unsigned bind,
1998 bool verbose)
1999 {
2000 SVGA3dSurfaceFormat default_format =
2001 svga_translate_format(ss, pformat, bind);
2002 int i;
2003
2004 if (default_format == SVGA3D_FORMAT_INVALID)
2005 return false;
2006 if (default_format == sformat)
2007 return true;
2008
2009 for (i = 0; i < ARRAY_SIZE(format_compats); ++i) {
2010 if (format_compats[i].pformat == pformat) {
2011 const SVGA3dSurfaceFormat *compat_format =
2012 format_compats[i].compat_format;
2013 while (*compat_format != 0) {
2014 if (*compat_format == sformat)
2015 return true;
2016 compat_format++;
2017 }
2018 }
2019 }
2020
2021 if (verbose) {
2022 debug_printf("Incompatible imported surface format.\n");
2023 debug_printf("Texture format: \"%s\". Imported format: \"%s\".\n",
2024 svga_format_name(default_format),
2025 svga_format_name(sformat));
2026 }
2027
2028 return false;
2029 }
2030
2031
2032 /**
2033 * Return the sRGB format which corresponds to the given (linear) format.
2034 * If there's no such sRGB format, return the format as-is.
2035 */
2036 SVGA3dSurfaceFormat
2037 svga_linear_to_srgb(SVGA3dSurfaceFormat format)
2038 {
2039 switch (format) {
2040 case SVGA3D_R8G8B8A8_UNORM:
2041 return SVGA3D_R8G8B8A8_UNORM_SRGB;
2042 case SVGA3D_BC1_UNORM:
2043 return SVGA3D_BC1_UNORM_SRGB;
2044 case SVGA3D_BC2_UNORM:
2045 return SVGA3D_BC2_UNORM_SRGB;
2046 case SVGA3D_BC3_UNORM:
2047 return SVGA3D_BC3_UNORM_SRGB;
2048 case SVGA3D_B8G8R8A8_UNORM:
2049 return SVGA3D_B8G8R8A8_UNORM_SRGB;
2050 case SVGA3D_B8G8R8X8_UNORM:
2051 return SVGA3D_B8G8R8X8_UNORM_SRGB;
2052 default:
2053 return format;
2054 }
2055 }