7764a855391e16749446bdd62ec7d0cee9e389fd
[mesa.git] / src / gallium / drivers / svga / svga_pipe_rasterizer.c
1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 **********************************************************/
25
26 #include "pipe/p_defines.h"
27 #include "draw/draw_context.h"
28 #include "util/u_bitmask.h"
29 #include "util/u_inlines.h"
30 #include "util/u_math.h"
31 #include "util/u_memory.h"
32
33 #include "svga_cmd.h"
34 #include "svga_context.h"
35 #include "svga_hw_reg.h"
36 #include "svga_screen.h"
37
38
39 /* Hardware frontwinding is always set up as SVGA3D_FRONTWINDING_CW.
40 */
41 static SVGA3dFace
42 svga_translate_cullmode(unsigned mode, unsigned front_ccw)
43 {
44 const int hw_front_ccw = 0; /* hardware is always CW */
45 switch (mode) {
46 case PIPE_FACE_NONE:
47 return SVGA3D_FACE_NONE;
48 case PIPE_FACE_FRONT:
49 return front_ccw == hw_front_ccw ? SVGA3D_FACE_FRONT : SVGA3D_FACE_BACK;
50 case PIPE_FACE_BACK:
51 return front_ccw == hw_front_ccw ? SVGA3D_FACE_BACK : SVGA3D_FACE_FRONT;
52 case PIPE_FACE_FRONT_AND_BACK:
53 return SVGA3D_FACE_FRONT_BACK;
54 default:
55 assert(0);
56 return SVGA3D_FACE_NONE;
57 }
58 }
59
60 static SVGA3dShadeMode
61 svga_translate_flatshade(unsigned mode)
62 {
63 return mode ? SVGA3D_SHADEMODE_FLAT : SVGA3D_SHADEMODE_SMOOTH;
64 }
65
66
67 static unsigned
68 translate_fill_mode(unsigned fill)
69 {
70 switch (fill) {
71 case PIPE_POLYGON_MODE_POINT:
72 return SVGA3D_FILLMODE_POINT;
73 case PIPE_POLYGON_MODE_LINE:
74 return SVGA3D_FILLMODE_LINE;
75 case PIPE_POLYGON_MODE_FILL:
76 return SVGA3D_FILLMODE_FILL;
77 default:
78 assert(!"Bad fill mode");
79 return SVGA3D_FILLMODE_FILL;
80 }
81 }
82
83
84 static unsigned
85 translate_cull_mode(unsigned cull)
86 {
87 switch (cull) {
88 case PIPE_FACE_NONE:
89 return SVGA3D_CULL_NONE;
90 case PIPE_FACE_FRONT:
91 return SVGA3D_CULL_FRONT;
92 case PIPE_FACE_BACK:
93 return SVGA3D_CULL_BACK;
94 case PIPE_FACE_FRONT_AND_BACK:
95 /* NOTE: we simply no-op polygon drawing in svga_draw_vbo() */
96 return SVGA3D_CULL_NONE;
97 default:
98 assert(!"Bad cull mode");
99 return SVGA3D_CULL_NONE;
100 }
101 }
102
103
104 static void
105 define_rasterizer_object(struct svga_context *svga,
106 struct svga_rasterizer_state *rast)
107 {
108 struct svga_screen *svgascreen = svga_screen(svga->pipe.screen);
109 unsigned fill_mode = translate_fill_mode(rast->templ.fill_front);
110 const unsigned cull_mode = translate_cull_mode(rast->templ.cull_face);
111 const int depth_bias = rast->templ.offset_units;
112 const float slope_scaled_depth_bias = rast->templ.offset_scale;
113 /* PIPE_CAP_POLYGON_OFFSET_CLAMP not supported: */
114 const float depth_bias_clamp = 0.0;
115 const float line_width = rast->templ.line_width > 0.0f ?
116 rast->templ.line_width : 1.0f;
117 const uint8 line_factor = rast->templ.line_stipple_enable ?
118 rast->templ.line_stipple_factor : 0;
119 const uint16 line_pattern = rast->templ.line_stipple_enable ?
120 rast->templ.line_stipple_pattern : 0;
121 const uint8 pv_last = !rast->templ.flatshade_first &&
122 svgascreen->haveProvokingVertex;
123
124 unsigned try;
125
126 rast->id = util_bitmask_add(svga->rast_object_id_bm);
127
128 if (rast->templ.fill_front != rast->templ.fill_back) {
129 /* The VGPU10 device can't handle different front/back fill modes.
130 * We'll handle that with a swtnl/draw fallback. But we need to
131 * make sure we always fill triangles in that case.
132 */
133 fill_mode = SVGA3D_FILLMODE_FILL;
134 }
135
136 for (try = 0; try < 2; try++) {
137 const uint8 pv_last = !rast->templ.flatshade_first &&
138 svgascreen->haveProvokingVertex;
139 enum pipe_error ret =
140 SVGA3D_vgpu10_DefineRasterizerState(svga->swc,
141 rast->id,
142 fill_mode,
143 cull_mode,
144 rast->templ.front_ccw,
145 depth_bias,
146 depth_bias_clamp,
147 slope_scaled_depth_bias,
148 rast->templ.depth_clip_near,
149 rast->templ.scissor,
150 rast->templ.multisample,
151 rast->templ.line_smooth,
152 line_width,
153 rast->templ.line_stipple_enable,
154 line_factor,
155 line_pattern,
156 pv_last);
157 if (ret == PIPE_OK)
158 return;
159 svga_context_flush(svga, NULL);
160 }
161 }
162
163
164 static void *
165 svga_create_rasterizer_state(struct pipe_context *pipe,
166 const struct pipe_rasterizer_state *templ)
167 {
168 struct svga_context *svga = svga_context(pipe);
169 struct svga_rasterizer_state *rast = CALLOC_STRUCT(svga_rasterizer_state);
170 struct svga_screen *screen = svga_screen(pipe->screen);
171
172 if (!rast)
173 return NULL;
174
175 /* need this for draw module. */
176 rast->templ = *templ;
177
178 rast->shademode = svga_translate_flatshade(templ->flatshade);
179 rast->cullmode = svga_translate_cullmode(templ->cull_face, templ->front_ccw);
180 rast->scissortestenable = templ->scissor;
181 rast->multisampleantialias = templ->multisample;
182 rast->antialiasedlineenable = templ->line_smooth;
183 rast->lastpixel = templ->line_last_pixel;
184 rast->pointsprite = templ->point_quad_rasterization;
185
186 if (rast->templ.multisample) {
187 /* The OpenGL 3.0 spec says points are always drawn as circles when
188 * MSAA is enabled. Note that our implementation isn't 100% correct,
189 * though. Our smooth point implementation involves drawing a square,
190 * computing fragment distance from point center, then attenuating
191 * the fragment alpha value. We should not attenuate alpha if msaa
192 * is enabled. We should kill fragments entirely outside the circle
193 * and let the GPU compute per-fragment coverage.
194 * But as-is, our implementation gives acceptable results and passes
195 * Piglit's MSAA point smooth test.
196 */
197 rast->templ.point_smooth = TRUE;
198 }
199
200 if (rast->templ.point_smooth &&
201 rast->templ.point_size_per_vertex == 0 &&
202 rast->templ.point_size <= screen->pointSmoothThreshold) {
203 /* If the point size is less than the threshold, disable smoothing.
204 * Note that this only effects point rendering when we use the
205 * pipe_rasterizer_state::point_size value, not when the point size
206 * is set in the VS.
207 */
208 rast->templ.point_smooth = FALSE;
209 }
210
211 if (rast->templ.point_smooth) {
212 /* For smooth points we need to generate fragments for at least
213 * a 2x2 region. Otherwise the quad we draw may be too small and
214 * we may generate no fragments at all.
215 */
216 rast->pointsize = MAX2(2.0f, templ->point_size);
217 }
218 else {
219 rast->pointsize = templ->point_size;
220 }
221
222 rast->hw_fillmode = PIPE_POLYGON_MODE_FILL;
223
224 /* Use swtnl + decomposition implement these:
225 */
226
227 if (templ->line_width <= screen->maxLineWidth) {
228 /* pass line width to device */
229 rast->linewidth = MAX2(1.0F, templ->line_width);
230 }
231 else if (svga->debug.no_line_width) {
232 /* nothing */
233 }
234 else {
235 /* use 'draw' pipeline for wide line */
236 rast->need_pipeline |= SVGA_PIPELINE_FLAG_LINES;
237 rast->need_pipeline_lines_str = "line width";
238 }
239
240 if (templ->line_stipple_enable) {
241 if (screen->haveLineStipple || svga->debug.force_hw_line_stipple) {
242 SVGA3dLinePattern lp;
243 lp.repeat = templ->line_stipple_factor + 1;
244 lp.pattern = templ->line_stipple_pattern;
245 rast->linepattern = lp.uintValue;
246 }
247 else {
248 /* use 'draw' module to decompose into short line segments */
249 rast->need_pipeline |= SVGA_PIPELINE_FLAG_LINES;
250 rast->need_pipeline_lines_str = "line stipple";
251 }
252 }
253
254 if (!svga_have_vgpu10(svga) && rast->templ.point_smooth) {
255 rast->need_pipeline |= SVGA_PIPELINE_FLAG_POINTS;
256 rast->need_pipeline_points_str = "smooth points";
257 }
258
259 if (templ->line_smooth && !screen->haveLineSmooth) {
260 /*
261 * XXX: Enabling the pipeline slows down performance immensely, so ignore
262 * line smooth state, where there is very little visual improvement.
263 * Smooth lines will still be drawn for wide lines.
264 */
265 #if 0
266 rast->need_pipeline |= SVGA_PIPELINE_FLAG_LINES;
267 rast->need_pipeline_lines_str = "smooth lines";
268 #endif
269 }
270
271 {
272 int fill_front = templ->fill_front;
273 int fill_back = templ->fill_back;
274 int fill = PIPE_POLYGON_MODE_FILL;
275 boolean offset_front = util_get_offset(templ, fill_front);
276 boolean offset_back = util_get_offset(templ, fill_back);
277 boolean offset = FALSE;
278
279 switch (templ->cull_face) {
280 case PIPE_FACE_FRONT_AND_BACK:
281 offset = FALSE;
282 fill = PIPE_POLYGON_MODE_FILL;
283 break;
284
285 case PIPE_FACE_FRONT:
286 offset = offset_back;
287 fill = fill_back;
288 break;
289
290 case PIPE_FACE_BACK:
291 offset = offset_front;
292 fill = fill_front;
293 break;
294
295 case PIPE_FACE_NONE:
296 if (fill_front != fill_back || offset_front != offset_back) {
297 /* Always need the draw module to work out different
298 * front/back fill modes:
299 */
300 rast->need_pipeline |= SVGA_PIPELINE_FLAG_TRIS;
301 rast->need_pipeline_tris_str = "different front/back fillmodes";
302 fill = PIPE_POLYGON_MODE_FILL;
303 }
304 else {
305 offset = offset_front;
306 fill = fill_front;
307 }
308 break;
309
310 default:
311 assert(0);
312 break;
313 }
314
315 /* Unfilled primitive modes aren't implemented on all virtual
316 * hardware. We can do some unfilled processing with index
317 * translation, but otherwise need the draw module:
318 */
319 if (fill != PIPE_POLYGON_MODE_FILL &&
320 (templ->flatshade ||
321 templ->light_twoside ||
322 offset)) {
323 fill = PIPE_POLYGON_MODE_FILL;
324 rast->need_pipeline |= SVGA_PIPELINE_FLAG_TRIS;
325 rast->need_pipeline_tris_str = "unfilled primitives with no index manipulation";
326 }
327
328 /* If we are decomposing to lines, and lines need the pipeline,
329 * then we also need the pipeline for tris.
330 */
331 if (fill == PIPE_POLYGON_MODE_LINE &&
332 (rast->need_pipeline & SVGA_PIPELINE_FLAG_LINES)) {
333 fill = PIPE_POLYGON_MODE_FILL;
334 rast->need_pipeline |= SVGA_PIPELINE_FLAG_TRIS;
335 rast->need_pipeline_tris_str = "decomposing lines";
336 }
337
338 /* Similarly for points:
339 */
340 if (fill == PIPE_POLYGON_MODE_POINT &&
341 (rast->need_pipeline & SVGA_PIPELINE_FLAG_POINTS)) {
342 fill = PIPE_POLYGON_MODE_FILL;
343 rast->need_pipeline |= SVGA_PIPELINE_FLAG_TRIS;
344 rast->need_pipeline_tris_str = "decomposing points";
345 }
346
347 if (offset) {
348 rast->slopescaledepthbias = templ->offset_scale;
349 rast->depthbias = templ->offset_units;
350 }
351
352 rast->hw_fillmode = fill;
353 }
354
355 if (rast->need_pipeline & SVGA_PIPELINE_FLAG_TRIS) {
356 /* Turn off stuff which will get done in the draw module:
357 */
358 rast->hw_fillmode = PIPE_POLYGON_MODE_FILL;
359 rast->slopescaledepthbias = 0;
360 rast->depthbias = 0;
361 }
362
363 if (0 && rast->need_pipeline) {
364 debug_printf("svga: rast need_pipeline = 0x%x\n", rast->need_pipeline);
365 debug_printf(" pnts: %s \n", rast->need_pipeline_points_str);
366 debug_printf(" lins: %s \n", rast->need_pipeline_lines_str);
367 debug_printf(" tris: %s \n", rast->need_pipeline_tris_str);
368 }
369
370 if (svga_have_vgpu10(svga)) {
371 define_rasterizer_object(svga, rast);
372 }
373
374 if (templ->poly_smooth) {
375 pipe_debug_message(&svga->debug.callback, CONFORMANCE,
376 "GL_POLYGON_SMOOTH not supported");
377 }
378
379 svga->hud.num_rasterizer_objects++;
380 SVGA_STATS_COUNT_INC(svga_screen(svga->pipe.screen)->sws,
381 SVGA_STATS_COUNT_RASTERIZERSTATE);
382
383 return rast;
384 }
385
386
387 static void
388 svga_bind_rasterizer_state(struct pipe_context *pipe, void *state)
389 {
390 struct svga_context *svga = svga_context(pipe);
391 struct svga_rasterizer_state *raster = (struct svga_rasterizer_state *)state;
392
393 if (!raster || !svga->curr.rast) {
394 svga->dirty |= SVGA_NEW_STIPPLE | SVGA_NEW_DEPTH_STENCIL_ALPHA;
395 }
396 else {
397 if (raster->templ.poly_stipple_enable !=
398 svga->curr.rast->templ.poly_stipple_enable) {
399 svga->dirty |= SVGA_NEW_STIPPLE;
400 }
401 if (raster->templ.rasterizer_discard !=
402 svga->curr.rast->templ.rasterizer_discard) {
403 svga->dirty |= SVGA_NEW_DEPTH_STENCIL_ALPHA;
404 }
405 }
406
407 svga->curr.rast = raster;
408
409 svga->dirty |= SVGA_NEW_RAST;
410 }
411
412
413 static void
414 svga_delete_rasterizer_state(struct pipe_context *pipe, void *state)
415 {
416 struct svga_context *svga = svga_context(pipe);
417 struct svga_rasterizer_state *raster =
418 (struct svga_rasterizer_state *) state;
419
420 if (svga_have_vgpu10(svga)) {
421 enum pipe_error ret =
422 SVGA3D_vgpu10_DestroyRasterizerState(svga->swc, raster->id);
423 if (ret != PIPE_OK) {
424 svga_context_flush(svga, NULL);
425 ret = SVGA3D_vgpu10_DestroyRasterizerState(svga->swc, raster->id);
426 }
427
428 if (raster->id == svga->state.hw_draw.rasterizer_id)
429 svga->state.hw_draw.rasterizer_id = SVGA3D_INVALID_ID;
430
431 util_bitmask_clear(svga->rast_object_id_bm, raster->id);
432 }
433
434 FREE(state);
435 svga->hud.num_rasterizer_objects--;
436 }
437
438
439 void
440 svga_init_rasterizer_functions(struct svga_context *svga)
441 {
442 svga->pipe.create_rasterizer_state = svga_create_rasterizer_state;
443 svga->pipe.bind_rasterizer_state = svga_bind_rasterizer_state;
444 svga->pipe.delete_rasterizer_state = svga_delete_rasterizer_state;
445 }