Merge remote-tracking branch 'jekstrand/wip/i965-uniforms' into vulkan
[mesa.git] / src / gallium / drivers / svga / svga_pipe_rasterizer.c
1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 **********************************************************/
25
26 #include "pipe/p_defines.h"
27 #include "draw/draw_context.h"
28 #include "util/u_bitmask.h"
29 #include "util/u_inlines.h"
30 #include "util/u_math.h"
31 #include "util/u_memory.h"
32
33 #include "svga_cmd.h"
34 #include "svga_context.h"
35 #include "svga_hw_reg.h"
36 #include "svga_screen.h"
37
38
39 /* Hardware frontwinding is always set up as SVGA3D_FRONTWINDING_CW.
40 */
41 static SVGA3dFace svga_translate_cullmode( unsigned mode,
42 unsigned front_ccw )
43 {
44 const int hw_front_ccw = 0; /* hardware is always CW */
45 switch (mode) {
46 case PIPE_FACE_NONE:
47 return SVGA3D_FACE_NONE;
48 case PIPE_FACE_FRONT:
49 return front_ccw == hw_front_ccw ? SVGA3D_FACE_FRONT : SVGA3D_FACE_BACK;
50 case PIPE_FACE_BACK:
51 return front_ccw == hw_front_ccw ? SVGA3D_FACE_BACK : SVGA3D_FACE_FRONT;
52 case PIPE_FACE_FRONT_AND_BACK:
53 return SVGA3D_FACE_FRONT_BACK;
54 default:
55 assert(0);
56 return SVGA3D_FACE_NONE;
57 }
58 }
59
60 static SVGA3dShadeMode svga_translate_flatshade( unsigned mode )
61 {
62 return mode ? SVGA3D_SHADEMODE_FLAT : SVGA3D_SHADEMODE_SMOOTH;
63 }
64
65
66 static unsigned
67 translate_fill_mode(unsigned fill)
68 {
69 switch (fill) {
70 case PIPE_POLYGON_MODE_POINT:
71 return SVGA3D_FILLMODE_POINT;
72 case PIPE_POLYGON_MODE_LINE:
73 return SVGA3D_FILLMODE_LINE;
74 case PIPE_POLYGON_MODE_FILL:
75 return SVGA3D_FILLMODE_FILL;
76 default:
77 assert(!"Bad fill mode");
78 return SVGA3D_FILLMODE_FILL;
79 }
80 }
81
82
83 static unsigned
84 translate_cull_mode(unsigned cull)
85 {
86 switch (cull) {
87 case PIPE_FACE_NONE:
88 return SVGA3D_CULL_NONE;
89 case PIPE_FACE_FRONT:
90 return SVGA3D_CULL_FRONT;
91 case PIPE_FACE_BACK:
92 return SVGA3D_CULL_BACK;
93 case PIPE_FACE_FRONT_AND_BACK:
94 /* NOTE: we simply no-op polygon drawing in svga_draw_vbo() */
95 return SVGA3D_CULL_NONE;
96 default:
97 assert(!"Bad cull mode");
98 return SVGA3D_CULL_NONE;
99 }
100 }
101
102
103 static void
104 define_rasterizer_object(struct svga_context *svga,
105 struct svga_rasterizer_state *rast)
106 {
107 unsigned fill_mode = translate_fill_mode(rast->templ.fill_front);
108 unsigned cull_mode = translate_cull_mode(rast->templ.cull_face);
109 int depth_bias = rast->templ.offset_units;
110 float slope_scaled_depth_bias = rast->templ.offset_scale;
111 float depth_bias_clamp = 0.0; /* XXX fix me */
112 unsigned try;
113 const float line_width = rast->templ.line_width > 0.0f ?
114 rast->templ.line_width : 1.0f;
115 const uint8 line_factor = rast->templ.line_stipple_enable ?
116 rast->templ.line_stipple_factor : 0;
117 const uint16 line_pattern = rast->templ.line_stipple_enable ?
118 rast->templ.line_stipple_pattern : 0;
119
120 rast->id = util_bitmask_add(svga->rast_object_id_bm);
121
122 if (rast->templ.fill_front != rast->templ.fill_back) {
123 /* The VGPU10 device can't handle different front/back fill modes.
124 * We'll handle that with a swtnl/draw fallback. But we need to
125 * make sure we always fill triangles in that case.
126 */
127 fill_mode = SVGA3D_FILLMODE_FILL;
128 }
129
130 for (try = 0; try < 2; try++) {
131 enum pipe_error ret =
132 SVGA3D_vgpu10_DefineRasterizerState(svga->swc,
133 rast->id,
134 fill_mode,
135 cull_mode,
136 rast->templ.front_ccw,
137 depth_bias,
138 depth_bias_clamp,
139 slope_scaled_depth_bias,
140 rast->templ.depth_clip,
141 rast->templ.scissor,
142 rast->templ.multisample,
143 rast->templ.line_smooth,
144 line_width,
145 rast->templ.line_stipple_enable,
146 line_factor,
147 line_pattern,
148 !rast->templ.flatshade_first);
149 if (ret == PIPE_OK)
150 return;
151 svga_context_flush(svga, NULL);
152 }
153 }
154
155
156 static void *
157 svga_create_rasterizer_state(struct pipe_context *pipe,
158 const struct pipe_rasterizer_state *templ)
159 {
160 struct svga_context *svga = svga_context(pipe);
161 struct svga_rasterizer_state *rast = CALLOC_STRUCT( svga_rasterizer_state );
162 struct svga_screen *screen = svga_screen(pipe->screen);
163
164 /* need this for draw module. */
165 rast->templ = *templ;
166
167 /* light_twoside - XXX: need fragment shader variant */
168 /* poly_smooth - XXX: no fallback available */
169 /* poly_stipple_enable - draw module */
170 /* sprite_coord_enable - ? */
171 /* point_quad_rasterization - ? */
172 /* point_size_per_vertex - ? */
173 /* sprite_coord_mode - ??? */
174 /* flatshade_first - handled by index translation */
175 /* half_pixel_center - XXX - viewport code */
176 /* line_width - draw module */
177 /* fill_cw, fill_ccw - draw module or index translation */
178
179 rast->shademode = svga_translate_flatshade( templ->flatshade );
180 rast->cullmode = svga_translate_cullmode( templ->cull_face,
181 templ->front_ccw );
182 rast->scissortestenable = templ->scissor;
183 rast->multisampleantialias = templ->multisample;
184 rast->antialiasedlineenable = templ->line_smooth;
185 rast->lastpixel = templ->line_last_pixel;
186 rast->pointsprite = templ->sprite_coord_enable != 0x0;
187
188 if (templ->point_smooth) {
189 /* For smooth points we need to generate fragments for at least
190 * a 2x2 region. Otherwise the quad we draw may be too small and
191 * we may generate no fragments at all.
192 */
193 rast->pointsize = MAX2(2.0f, templ->point_size);
194 }
195 else {
196 rast->pointsize = templ->point_size;
197 }
198
199 rast->hw_fillmode = PIPE_POLYGON_MODE_FILL;
200
201 /* Use swtnl + decomposition implement these:
202 */
203
204 if (templ->line_width <= screen->maxLineWidth) {
205 /* pass line width to device */
206 rast->linewidth = MAX2(1.0F, templ->line_width);
207 }
208 else if (svga->debug.no_line_width) {
209 /* nothing */
210 }
211 else {
212 /* use 'draw' pipeline for wide line */
213 rast->need_pipeline |= SVGA_PIPELINE_FLAG_LINES;
214 rast->need_pipeline_lines_str = "line width";
215 }
216
217 if (templ->line_stipple_enable) {
218 if (screen->haveLineStipple || svga->debug.force_hw_line_stipple) {
219 SVGA3dLinePattern lp;
220 lp.repeat = templ->line_stipple_factor + 1;
221 lp.pattern = templ->line_stipple_pattern;
222 rast->linepattern = lp.uintValue;
223 }
224 else {
225 /* use 'draw' module to decompose into short line segments */
226 rast->need_pipeline |= SVGA_PIPELINE_FLAG_LINES;
227 rast->need_pipeline_lines_str = "line stipple";
228 }
229 }
230
231 if (!svga_have_vgpu10(svga) && templ->point_smooth) {
232 rast->need_pipeline |= SVGA_PIPELINE_FLAG_POINTS;
233 rast->need_pipeline_points_str = "smooth points";
234 }
235
236 if (templ->line_smooth && !screen->haveLineSmooth) {
237 /*
238 * XXX: Enabling the pipeline slows down performance immensely, so ignore
239 * line smooth state, where there is very little visual improvement.
240 * Smooth lines will still be drawn for wide lines.
241 */
242 #if 0
243 rast->need_pipeline |= SVGA_PIPELINE_FLAG_LINES;
244 rast->need_pipeline_lines_str = "smooth lines";
245 #endif
246 }
247
248 {
249 int fill_front = templ->fill_front;
250 int fill_back = templ->fill_back;
251 int fill = PIPE_POLYGON_MODE_FILL;
252 boolean offset_front = util_get_offset(templ, fill_front);
253 boolean offset_back = util_get_offset(templ, fill_back);
254 boolean offset = FALSE;
255
256 switch (templ->cull_face) {
257 case PIPE_FACE_FRONT_AND_BACK:
258 offset = FALSE;
259 fill = PIPE_POLYGON_MODE_FILL;
260 break;
261
262 case PIPE_FACE_FRONT:
263 offset = offset_front;
264 fill = fill_front;
265 break;
266
267 case PIPE_FACE_BACK:
268 offset = offset_back;
269 fill = fill_back;
270 break;
271
272 case PIPE_FACE_NONE:
273 if (fill_front != fill_back || offset_front != offset_back)
274 {
275 /* Always need the draw module to work out different
276 * front/back fill modes:
277 */
278 rast->need_pipeline |= SVGA_PIPELINE_FLAG_TRIS;
279 rast->need_pipeline_tris_str = "different front/back fillmodes";
280 }
281 else {
282 offset = offset_front;
283 fill = fill_front;
284 }
285 break;
286
287 default:
288 assert(0);
289 break;
290 }
291
292 /* Unfilled primitive modes aren't implemented on all virtual
293 * hardware. We can do some unfilled processing with index
294 * translation, but otherwise need the draw module:
295 */
296 if (fill != PIPE_POLYGON_MODE_FILL &&
297 (templ->flatshade ||
298 templ->light_twoside ||
299 offset ||
300 templ->cull_face != PIPE_FACE_NONE))
301 {
302 fill = PIPE_POLYGON_MODE_FILL;
303 rast->need_pipeline |= SVGA_PIPELINE_FLAG_TRIS;
304 rast->need_pipeline_tris_str = "unfilled primitives with no index manipulation";
305 }
306
307 /* If we are decomposing to lines, and lines need the pipeline,
308 * then we also need the pipeline for tris.
309 */
310 if (fill == PIPE_POLYGON_MODE_LINE &&
311 (rast->need_pipeline & SVGA_PIPELINE_FLAG_LINES))
312 {
313 fill = PIPE_POLYGON_MODE_FILL;
314 rast->need_pipeline |= SVGA_PIPELINE_FLAG_TRIS;
315 rast->need_pipeline_tris_str = "decomposing lines";
316 }
317
318 /* Similarly for points:
319 */
320 if (fill == PIPE_POLYGON_MODE_POINT &&
321 (rast->need_pipeline & SVGA_PIPELINE_FLAG_POINTS))
322 {
323 fill = PIPE_POLYGON_MODE_FILL;
324 rast->need_pipeline |= SVGA_PIPELINE_FLAG_TRIS;
325 rast->need_pipeline_tris_str = "decomposing points";
326 }
327
328 if (offset) {
329 rast->slopescaledepthbias = templ->offset_scale;
330 rast->depthbias = templ->offset_units;
331 }
332
333 rast->hw_fillmode = fill;
334 }
335
336 if (rast->need_pipeline & SVGA_PIPELINE_FLAG_TRIS) {
337 /* Turn off stuff which will get done in the draw module:
338 */
339 rast->hw_fillmode = PIPE_POLYGON_MODE_FILL;
340 rast->slopescaledepthbias = 0;
341 rast->depthbias = 0;
342 }
343
344 if (0 && rast->need_pipeline) {
345 debug_printf("svga: rast need_pipeline = 0x%x\n", rast->need_pipeline);
346 debug_printf(" pnts: %s \n", rast->need_pipeline_points_str);
347 debug_printf(" lins: %s \n", rast->need_pipeline_lines_str);
348 debug_printf(" tris: %s \n", rast->need_pipeline_tris_str);
349 }
350
351 if (svga_have_vgpu10(svga)) {
352 define_rasterizer_object(svga, rast);
353 }
354
355 if (templ->poly_smooth) {
356 pipe_debug_message(&svga->debug.callback, CONFORMANCE,
357 "GL_POLYGON_SMOOTH not supported");
358 }
359
360 svga->hud.num_state_objects++;
361
362 return rast;
363 }
364
365 static void svga_bind_rasterizer_state( struct pipe_context *pipe,
366 void *state )
367 {
368 struct svga_context *svga = svga_context(pipe);
369 struct svga_rasterizer_state *raster = (struct svga_rasterizer_state *)state;
370
371 if (!raster ||
372 !svga->curr.rast ||
373 raster->templ.poly_stipple_enable !=
374 svga->curr.rast->templ.poly_stipple_enable) {
375 svga->dirty |= SVGA_NEW_STIPPLE;
376 }
377
378 svga->curr.rast = raster;
379
380 svga->dirty |= SVGA_NEW_RAST;
381 }
382
383 static void
384 svga_delete_rasterizer_state(struct pipe_context *pipe, void *state)
385 {
386 struct svga_context *svga = svga_context(pipe);
387 struct svga_rasterizer_state *raster =
388 (struct svga_rasterizer_state *) state;
389
390 if (svga_have_vgpu10(svga)) {
391 enum pipe_error ret =
392 SVGA3D_vgpu10_DestroyRasterizerState(svga->swc, raster->id);
393 if (ret != PIPE_OK) {
394 svga_context_flush(svga, NULL);
395 ret = SVGA3D_vgpu10_DestroyRasterizerState(svga->swc, raster->id);
396 }
397
398 if (raster->id == svga->state.hw_draw.rasterizer_id)
399 svga->state.hw_draw.rasterizer_id = SVGA3D_INVALID_ID;
400
401 util_bitmask_clear(svga->rast_object_id_bm, raster->id);
402 }
403
404 FREE(state);
405 svga->hud.num_state_objects--;
406 }
407
408
409 void svga_init_rasterizer_functions( struct svga_context *svga )
410 {
411 svga->pipe.create_rasterizer_state = svga_create_rasterizer_state;
412 svga->pipe.bind_rasterizer_state = svga_bind_rasterizer_state;
413 svga->pipe.delete_rasterizer_state = svga_delete_rasterizer_state;
414 }
415
416
417 /***********************************************************************
418 * Hardware state update
419 */
420