1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
24 **********************************************************/
28 #include "pipe/p_state.h"
29 #include "pipe/p_defines.h"
30 #include "util/u_inlines.h"
31 #include "os/os_thread.h"
32 #include "util/u_math.h"
33 #include "util/u_memory.h"
34 #include "util/u_resource.h"
36 #include "svga_context.h"
37 #include "svga_screen.h"
38 #include "svga_resource_buffer.h"
39 #include "svga_resource_buffer_upload.h"
40 #include "svga_winsys.h"
41 #include "svga_debug.h"
45 * Determine what buffers eventually need hardware backing.
47 * Vertex- and index buffers need hardware backing. Constant buffers
48 * do on vgpu10. Staging texture-upload buffers do when they are
52 svga_buffer_needs_hw_storage(const struct svga_screen
*ss
,
53 const struct pipe_resource
*template)
55 unsigned bind_mask
= (PIPE_BIND_VERTEX_BUFFER
| PIPE_BIND_INDEX_BUFFER
|
56 PIPE_BIND_SAMPLER_VIEW
| PIPE_BIND_STREAM_OUTPUT
);
58 if (ss
->sws
->have_vgpu10
) {
60 * Driver-created upload const0- and staging texture upload buffers
61 * tagged with PIPE_BIND_CUSTOM
63 bind_mask
|= PIPE_BIND_CUSTOM
;
64 /* Uniform buffer objects.
65 * Make sure we don't create hardware storage for state-tracker
66 * const0 buffers, because we frequently map them for reading.
67 * They are distinguished by having PIPE_USAGE_STREAM, but not
70 if (template->usage
!= PIPE_USAGE_STREAM
)
71 bind_mask
|= PIPE_BIND_CONSTANT_BUFFER
;
74 if (template->flags
& PIPE_RESOURCE_FLAG_MAP_PERSISTENT
)
77 return !!(template->bind
& bind_mask
);
81 * Create a buffer transfer.
83 * Unlike texture DMAs (which are written immediately to the command buffer and
84 * therefore inherently serialized with other context operations), for buffers
85 * we try to coalesce multiple range mappings (i.e, multiple calls to this
86 * function) into a single DMA command, for better efficiency in command
87 * processing. This means we need to exercise extra care here to ensure that
88 * the end result is exactly the same as if one DMA was used for every mapped
92 svga_buffer_transfer_map(struct pipe_context
*pipe
,
93 struct pipe_resource
*resource
,
96 const struct pipe_box
*box
,
97 struct pipe_transfer
**ptransfer
)
99 struct svga_context
*svga
= svga_context(pipe
);
100 struct svga_screen
*ss
= svga_screen(pipe
->screen
);
101 struct svga_buffer
*sbuf
= svga_buffer(resource
);
102 struct pipe_transfer
*transfer
;
104 int64_t begin
= svga_get_time(svga
);
106 SVGA_STATS_TIME_PUSH(svga_sws(svga
), SVGA_STATS_TIME_BUFFERTRANSFERMAP
);
110 assert(box
->height
== 1);
111 assert(box
->depth
== 1);
113 transfer
= MALLOC_STRUCT(pipe_transfer
);
118 transfer
->resource
= resource
;
119 transfer
->level
= level
;
120 transfer
->usage
= usage
;
121 transfer
->box
= *box
;
122 transfer
->stride
= 0;
123 transfer
->layer_stride
= 0;
125 if (usage
& PIPE_TRANSFER_WRITE
) {
126 /* If we write to the buffer for any reason, free any saved translated
129 pipe_resource_reference(&sbuf
->translated_indices
.buffer
, NULL
);
132 if ((usage
& PIPE_TRANSFER_READ
) && sbuf
->dirty
&&
133 !sbuf
->key
.coherent
&& !svga
->swc
->force_coherent
) {
136 /* Host-side buffers can only be dirtied with vgpu10 features
137 * (streamout and buffer copy).
139 assert(svga_have_vgpu10(svga
));
142 (void) svga_buffer_handle(svga
, resource
, sbuf
->bind_flags
);
145 if (sbuf
->dma
.pending
) {
146 svga_buffer_upload_flush(svga
, sbuf
);
147 svga_context_finish(svga
);
150 assert(sbuf
->handle
);
152 ret
= SVGA3D_vgpu10_ReadbackSubResource(svga
->swc
, sbuf
->handle
, 0);
153 if (ret
!= PIPE_OK
) {
154 svga_context_flush(svga
, NULL
);
155 ret
= SVGA3D_vgpu10_ReadbackSubResource(svga
->swc
, sbuf
->handle
, 0);
156 assert(ret
== PIPE_OK
);
159 svga
->hud
.num_readbacks
++;
161 svga_context_finish(svga
);
166 if (usage
& PIPE_TRANSFER_WRITE
) {
167 if ((usage
& PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE
) &&
168 !(resource
->flags
& PIPE_RESOURCE_FLAG_MAP_PERSISTENT
)) {
170 * Flush any pending primitives, finish writing any pending DMA
171 * commands, and tell the host to discard the buffer contents on
172 * the next DMA operation.
175 svga_hwtnl_flush_buffer(svga
, resource
);
177 if (sbuf
->dma
.pending
) {
178 svga_buffer_upload_flush(svga
, sbuf
);
181 * Instead of flushing the context command buffer, simply discard
182 * the current hwbuf, and start a new one.
183 * With GB objects, the map operation takes care of this
184 * if passed the PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE flag,
185 * and the old backing store is busy.
188 if (!svga_have_gb_objects(svga
))
189 svga_buffer_destroy_hw_storage(ss
, sbuf
);
192 sbuf
->map
.num_ranges
= 0;
193 sbuf
->dma
.flags
.discard
= TRUE
;
196 if (usage
& PIPE_TRANSFER_UNSYNCHRONIZED
) {
197 if (!sbuf
->map
.num_ranges
) {
199 * No pending ranges to upload so far, so we can tell the host to
200 * not synchronize on the next DMA command.
203 sbuf
->dma
.flags
.unsynchronized
= TRUE
;
207 * Synchronizing, so flush any pending primitives, finish writing any
208 * pending DMA command, and ensure the next DMA will be done in order.
211 svga_hwtnl_flush_buffer(svga
, resource
);
213 if (sbuf
->dma
.pending
) {
214 svga_buffer_upload_flush(svga
, sbuf
);
216 if (svga_buffer_has_hw_storage(sbuf
)) {
218 * We have a pending DMA upload from a hardware buffer, therefore
219 * we need to ensure that the host finishes processing that DMA
220 * command before the state tracker can start overwriting the
223 * XXX: This could be avoided by tying the hardware buffer to
224 * the transfer (just as done with textures), which would allow
225 * overlapping DMAs commands to be queued on the same context
226 * buffer. However, due to the likelihood of software vertex
227 * processing, it is more convenient to hold on to the hardware
228 * buffer, allowing to quickly access the contents from the CPU
229 * without having to do a DMA download from the host.
232 if (usage
& PIPE_TRANSFER_DONTBLOCK
) {
234 * Flushing the command buffer here will most likely cause
235 * the map of the hwbuf below to block, so preemptively
236 * return NULL here if DONTBLOCK is set to prevent unnecessary
237 * command buffer flushes.
244 svga_context_flush(svga
, NULL
);
248 sbuf
->dma
.flags
.unsynchronized
= FALSE
;
252 if (!sbuf
->swbuf
&& !svga_buffer_has_hw_storage(sbuf
)) {
253 if (svga_buffer_create_hw_storage(ss
, sbuf
, sbuf
->bind_flags
) != PIPE_OK
) {
255 * We can't create a hardware buffer big enough, so create a malloc
259 debug_printf("%s: failed to allocate %u KB of DMA, "
260 "splitting DMA transfers\n",
262 (sbuf
->b
.b
.width0
+ 1023)/1024);
265 sbuf
->swbuf
= align_malloc(sbuf
->b
.b
.width0
, 16);
274 /* User/malloc buffer */
277 else if (svga_buffer_has_hw_storage(sbuf
)) {
280 map
= svga_buffer_hw_storage_map(svga
, sbuf
, transfer
->usage
, &retry
);
281 if (map
== NULL
&& retry
) {
283 * At this point, svga_buffer_get_transfer() has already
284 * hit the DISCARD_WHOLE_RESOURCE path and flushed HWTNL
287 svga_context_flush(svga
, NULL
);
288 map
= svga_buffer_hw_storage_map(svga
, sbuf
, transfer
->usage
, &retry
);
297 map
+= transfer
->box
.x
;
298 *ptransfer
= transfer
;
303 svga
->hud
.map_buffer_time
+= (svga_get_time(svga
) - begin
);
306 SVGA_STATS_TIME_POP(svga_sws(svga
));
312 svga_buffer_transfer_flush_region(struct pipe_context
*pipe
,
313 struct pipe_transfer
*transfer
,
314 const struct pipe_box
*box
)
316 struct svga_screen
*ss
= svga_screen(pipe
->screen
);
317 struct svga_buffer
*sbuf
= svga_buffer(transfer
->resource
);
318 struct svga_context
*svga
= svga_context(pipe
);
319 unsigned offset
= transfer
->box
.x
+ box
->x
;
320 unsigned length
= box
->width
;
322 assert(transfer
->usage
& PIPE_TRANSFER_WRITE
);
323 assert(transfer
->usage
& PIPE_TRANSFER_FLUSH_EXPLICIT
);
325 if (!(svga
->swc
->force_coherent
|| sbuf
->key
.coherent
) || sbuf
->swbuf
) {
326 mtx_lock(&ss
->swc_mutex
);
327 svga_buffer_add_range(sbuf
, offset
, offset
+ length
);
328 mtx_unlock(&ss
->swc_mutex
);
334 svga_buffer_transfer_unmap(struct pipe_context
*pipe
,
335 struct pipe_transfer
*transfer
)
337 struct svga_screen
*ss
= svga_screen(pipe
->screen
);
338 struct svga_context
*svga
= svga_context(pipe
);
339 struct svga_buffer
*sbuf
= svga_buffer(transfer
->resource
);
341 SVGA_STATS_TIME_PUSH(svga_sws(svga
), SVGA_STATS_TIME_BUFFERTRANSFERUNMAP
);
343 mtx_lock(&ss
->swc_mutex
);
345 assert(sbuf
->map
.count
);
346 if (sbuf
->map
.count
) {
350 if (svga_buffer_has_hw_storage(sbuf
)) {
351 /* Note: we may wind up flushing here and unmapping other buffers
352 * which leads to recursively locking ss->swc_mutex.
354 svga_buffer_hw_storage_unmap(svga
, sbuf
);
357 if (transfer
->usage
& PIPE_TRANSFER_WRITE
) {
358 if (!(transfer
->usage
& PIPE_TRANSFER_FLUSH_EXPLICIT
)) {
360 * Mapped range not flushed explicitly, so flush the whole buffer,
361 * and tell the host to discard the contents when processing the DMA
365 SVGA_DBG(DEBUG_DMA
, "flushing the whole buffer\n");
367 sbuf
->dma
.flags
.discard
= TRUE
;
369 if (!(svga
->swc
->force_coherent
|| sbuf
->key
.coherent
) || sbuf
->swbuf
)
370 svga_buffer_add_range(sbuf
, 0, sbuf
->b
.b
.width0
);
374 mtx_unlock(&ss
->swc_mutex
);
376 SVGA_STATS_TIME_POP(svga_sws(svga
));
381 svga_buffer_destroy(struct pipe_screen
*screen
,
382 struct pipe_resource
*buf
)
384 struct svga_screen
*ss
= svga_screen(screen
);
385 struct svga_buffer
*sbuf
= svga_buffer(buf
);
387 assert(!p_atomic_read(&buf
->reference
.count
));
389 assert(!sbuf
->dma
.pending
);
392 svga_buffer_destroy_host_surface(ss
, sbuf
);
394 if (sbuf
->uploaded
.buffer
)
395 pipe_resource_reference(&sbuf
->uploaded
.buffer
, NULL
);
398 svga_buffer_destroy_hw_storage(ss
, sbuf
);
400 if (sbuf
->swbuf
&& !sbuf
->user
)
401 align_free(sbuf
->swbuf
);
403 pipe_resource_reference(&sbuf
->translated_indices
.buffer
, NULL
);
405 ss
->hud
.total_resource_bytes
-= sbuf
->size
;
406 assert(ss
->hud
.num_resources
> 0);
407 if (ss
->hud
.num_resources
> 0)
408 ss
->hud
.num_resources
--;
414 struct u_resource_vtbl svga_buffer_vtbl
=
416 u_default_resource_get_handle
, /* get_handle */
417 svga_buffer_destroy
, /* resource_destroy */
418 svga_buffer_transfer_map
, /* transfer_map */
419 svga_buffer_transfer_flush_region
, /* transfer_flush_region */
420 svga_buffer_transfer_unmap
, /* transfer_unmap */
425 struct pipe_resource
*
426 svga_buffer_create(struct pipe_screen
*screen
,
427 const struct pipe_resource
*template)
429 struct svga_screen
*ss
= svga_screen(screen
);
430 struct svga_buffer
*sbuf
;
433 SVGA_STATS_TIME_PUSH(ss
->sws
, SVGA_STATS_TIME_CREATEBUFFER
);
435 sbuf
= CALLOC_STRUCT(svga_buffer
);
439 sbuf
->b
.b
= *template;
440 sbuf
->b
.vtbl
= &svga_buffer_vtbl
;
441 pipe_reference_init(&sbuf
->b
.b
.reference
, 1);
442 sbuf
->b
.b
.screen
= screen
;
443 bind_flags
= template->bind
& ~PIPE_BIND_CUSTOM
;
445 LIST_INITHEAD(&sbuf
->surfaces
);
447 if (bind_flags
& PIPE_BIND_CONSTANT_BUFFER
) {
448 /* Constant buffers can only have the PIPE_BIND_CONSTANT_BUFFER
451 if (ss
->sws
->have_vgpu10
) {
452 bind_flags
= PIPE_BIND_CONSTANT_BUFFER
;
456 /* Although svga device only requires constant buffer size to be
457 * in multiples of 16, in order to allow bind_flags promotion,
458 * we are mandating all buffer size to be in multiples of 16.
460 sbuf
->b
.b
.width0
= align(sbuf
->b
.b
.width0
, 16);
462 if (svga_buffer_needs_hw_storage(ss
, template)) {
464 /* If the buffer is not used for constant buffer, set
465 * the vertex/index bind flags as well so that the buffer will be
466 * accepted for those uses.
467 * Note that the PIPE_BIND_ flags we get from the state tracker are
468 * just a hint about how the buffer may be used. And OpenGL buffer
469 * object may be used for many different things.
470 * Also note that we do not unconditionally set the streamout
471 * bind flag since streamout buffer is an output buffer and
472 * might have performance implication.
474 if (!(template->bind
& PIPE_BIND_CONSTANT_BUFFER
) &&
475 !(template->bind
& PIPE_BIND_CUSTOM
)) {
476 /* Not a constant- or staging buffer.
477 * The buffer may be used for vertex data or indexes.
479 bind_flags
|= (PIPE_BIND_VERTEX_BUFFER
|
480 PIPE_BIND_INDEX_BUFFER
);
483 if (svga_buffer_create_host_surface(ss
, sbuf
, bind_flags
) != PIPE_OK
)
487 sbuf
->swbuf
= align_malloc(sbuf
->b
.b
.width0
, 64);
492 debug_reference(&sbuf
->b
.b
.reference
,
493 (debug_reference_descriptor
)debug_describe_resource
, 0);
495 sbuf
->bind_flags
= bind_flags
;
496 sbuf
->size
= util_resource_size(&sbuf
->b
.b
);
497 ss
->hud
.total_resource_bytes
+= sbuf
->size
;
499 ss
->hud
.num_resources
++;
500 SVGA_STATS_TIME_POP(ss
->sws
);
507 SVGA_STATS_TIME_POP(ss
->sws
);
512 struct pipe_resource
*
513 svga_user_buffer_create(struct pipe_screen
*screen
,
518 struct svga_buffer
*sbuf
;
519 struct svga_screen
*ss
= svga_screen(screen
);
521 sbuf
= CALLOC_STRUCT(svga_buffer
);
525 pipe_reference_init(&sbuf
->b
.b
.reference
, 1);
526 sbuf
->b
.vtbl
= &svga_buffer_vtbl
;
527 sbuf
->b
.b
.screen
= screen
;
528 sbuf
->b
.b
.format
= PIPE_FORMAT_R8_UNORM
; /* ?? */
529 sbuf
->b
.b
.usage
= PIPE_USAGE_IMMUTABLE
;
530 sbuf
->b
.b
.bind
= bind
;
531 sbuf
->b
.b
.width0
= bytes
;
532 sbuf
->b
.b
.height0
= 1;
533 sbuf
->b
.b
.depth0
= 1;
534 sbuf
->b
.b
.array_size
= 1;
536 sbuf
->bind_flags
= bind
;
540 debug_reference(&sbuf
->b
.b
.reference
,
541 (debug_reference_descriptor
)debug_describe_resource
, 0);
543 ss
->hud
.num_resources
++;