1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
24 **********************************************************/
28 #include "pipe/p_state.h"
29 #include "pipe/p_defines.h"
30 #include "util/u_inlines.h"
31 #include "os/os_thread.h"
32 #include "util/u_math.h"
33 #include "util/u_memory.h"
34 #include "util/u_resource.h"
36 #include "svga_context.h"
37 #include "svga_screen.h"
38 #include "svga_resource_buffer.h"
39 #include "svga_resource_buffer_upload.h"
40 #include "svga_winsys.h"
41 #include "svga_debug.h"
45 * Vertex and index buffers need hardware backing. Constant buffers
46 * do not. No other types of buffers currently supported.
49 svga_buffer_needs_hw_storage(unsigned usage
)
51 return (usage
& (PIPE_BIND_VERTEX_BUFFER
| PIPE_BIND_INDEX_BUFFER
|
52 PIPE_BIND_SAMPLER_VIEW
| PIPE_BIND_STREAM_OUTPUT
)) != 0;
57 * Create a buffer transfer.
59 * Unlike texture DMAs (which are written immediately to the command buffer and
60 * therefore inherently serialized with other context operations), for buffers
61 * we try to coalesce multiple range mappings (i.e, multiple calls to this
62 * function) into a single DMA command, for better efficiency in command
63 * processing. This means we need to exercise extra care here to ensure that
64 * the end result is exactly the same as if one DMA was used for every mapped
68 svga_buffer_transfer_map(struct pipe_context
*pipe
,
69 struct pipe_resource
*resource
,
72 const struct pipe_box
*box
,
73 struct pipe_transfer
**ptransfer
)
75 struct svga_context
*svga
= svga_context(pipe
);
76 struct svga_screen
*ss
= svga_screen(pipe
->screen
);
77 struct svga_buffer
*sbuf
= svga_buffer(resource
);
78 struct pipe_transfer
*transfer
;
80 int64_t begin
= svga_get_time(svga
);
84 assert(box
->height
== 1);
85 assert(box
->depth
== 1);
87 transfer
= MALLOC_STRUCT(pipe_transfer
);
92 transfer
->resource
= resource
;
93 transfer
->level
= level
;
94 transfer
->usage
= usage
;
97 transfer
->layer_stride
= 0;
99 if ((usage
& PIPE_TRANSFER_READ
) && sbuf
->dirty
) {
102 /* Host-side buffers can only be dirtied with vgpu10 features
103 * (streamout and buffer copy).
105 assert(svga_have_vgpu10(svga
));
108 (void) svga_buffer_handle(svga
, resource
);
111 if (sbuf
->dma
.pending
> 0) {
112 svga_buffer_upload_flush(svga
, sbuf
);
113 svga_context_finish(svga
);
116 assert(sbuf
->handle
);
118 ret
= SVGA3D_vgpu10_ReadbackSubResource(svga
->swc
, sbuf
->handle
, 0);
119 if (ret
!= PIPE_OK
) {
120 svga_context_flush(svga
, NULL
);
121 ret
= SVGA3D_vgpu10_ReadbackSubResource(svga
->swc
, sbuf
->handle
, 0);
122 assert(ret
== PIPE_OK
);
125 svga
->hud
.num_readbacks
++;
127 svga_context_finish(svga
);
132 if (usage
& PIPE_TRANSFER_WRITE
) {
133 if (usage
& PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE
) {
135 * Flush any pending primitives, finish writing any pending DMA
136 * commands, and tell the host to discard the buffer contents on
137 * the next DMA operation.
140 svga_hwtnl_flush_buffer(svga
, resource
);
142 if (sbuf
->dma
.pending
) {
143 svga_buffer_upload_flush(svga
, sbuf
);
146 * Instead of flushing the context command buffer, simply discard
147 * the current hwbuf, and start a new one.
148 * With GB objects, the map operation takes care of this
149 * if passed the PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE flag,
150 * and the old backing store is busy.
153 if (!svga_have_gb_objects(svga
))
154 svga_buffer_destroy_hw_storage(ss
, sbuf
);
157 sbuf
->map
.num_ranges
= 0;
158 sbuf
->dma
.flags
.discard
= TRUE
;
161 if (usage
& PIPE_TRANSFER_UNSYNCHRONIZED
) {
162 if (!sbuf
->map
.num_ranges
) {
164 * No pending ranges to upload so far, so we can tell the host to
165 * not synchronize on the next DMA command.
168 sbuf
->dma
.flags
.unsynchronized
= TRUE
;
172 * Synchronizing, so flush any pending primitives, finish writing any
173 * pending DMA command, and ensure the next DMA will be done in order.
176 svga_hwtnl_flush_buffer(svga
, resource
);
178 if (sbuf
->dma
.pending
) {
179 svga_buffer_upload_flush(svga
, sbuf
);
181 if (svga_buffer_has_hw_storage(sbuf
)) {
183 * We have a pending DMA upload from a hardware buffer, therefore
184 * we need to ensure that the host finishes processing that DMA
185 * command before the state tracker can start overwriting the
188 * XXX: This could be avoided by tying the hardware buffer to
189 * the transfer (just as done with textures), which would allow
190 * overlapping DMAs commands to be queued on the same context
191 * buffer. However, due to the likelihood of software vertex
192 * processing, it is more convenient to hold on to the hardware
193 * buffer, allowing to quickly access the contents from the CPU
194 * without having to do a DMA download from the host.
197 if (usage
& PIPE_TRANSFER_DONTBLOCK
) {
199 * Flushing the command buffer here will most likely cause
200 * the map of the hwbuf below to block, so preemptively
201 * return NULL here if DONTBLOCK is set to prevent unnecessary
202 * command buffer flushes.
209 svga_context_flush(svga
, NULL
);
213 sbuf
->dma
.flags
.unsynchronized
= FALSE
;
217 if (!sbuf
->swbuf
&& !svga_buffer_has_hw_storage(sbuf
)) {
218 if (svga_buffer_create_hw_storage(ss
, sbuf
) != PIPE_OK
) {
220 * We can't create a hardware buffer big enough, so create a malloc
224 debug_printf("%s: failed to allocate %u KB of DMA, "
225 "splitting DMA transfers\n",
227 (sbuf
->b
.b
.width0
+ 1023)/1024);
230 sbuf
->swbuf
= align_malloc(sbuf
->b
.b
.width0
, 16);
239 /* User/malloc buffer */
242 else if (svga_buffer_has_hw_storage(sbuf
)) {
245 map
= svga_buffer_hw_storage_map(svga
, sbuf
, transfer
->usage
, &retry
);
246 if (map
== NULL
&& retry
) {
248 * At this point, svga_buffer_get_transfer() has already
249 * hit the DISCARD_WHOLE_RESOURCE path and flushed HWTNL
252 svga_context_flush(svga
, NULL
);
253 map
= svga_buffer_hw_storage_map(svga
, sbuf
, transfer
->usage
, &retry
);
262 map
+= transfer
->box
.x
;
263 *ptransfer
= transfer
;
268 svga
->hud
.map_buffer_time
+= (svga_get_time(svga
) - begin
);
275 svga_buffer_transfer_flush_region( struct pipe_context
*pipe
,
276 struct pipe_transfer
*transfer
,
277 const struct pipe_box
*box
)
279 struct svga_screen
*ss
= svga_screen(pipe
->screen
);
280 struct svga_buffer
*sbuf
= svga_buffer(transfer
->resource
);
282 unsigned offset
= transfer
->box
.x
+ box
->x
;
283 unsigned length
= box
->width
;
285 assert(transfer
->usage
& PIPE_TRANSFER_WRITE
);
286 assert(transfer
->usage
& PIPE_TRANSFER_FLUSH_EXPLICIT
);
288 pipe_mutex_lock(ss
->swc_mutex
);
289 svga_buffer_add_range(sbuf
, offset
, offset
+ length
);
290 pipe_mutex_unlock(ss
->swc_mutex
);
295 svga_buffer_transfer_unmap( struct pipe_context
*pipe
,
296 struct pipe_transfer
*transfer
)
298 struct svga_screen
*ss
= svga_screen(pipe
->screen
);
299 struct svga_context
*svga
= svga_context(pipe
);
300 struct svga_buffer
*sbuf
= svga_buffer(transfer
->resource
);
302 pipe_mutex_lock(ss
->swc_mutex
);
304 assert(sbuf
->map
.count
);
305 if (sbuf
->map
.count
) {
309 if (svga_buffer_has_hw_storage(sbuf
)) {
310 svga_buffer_hw_storage_unmap(svga
, sbuf
);
313 if (transfer
->usage
& PIPE_TRANSFER_WRITE
) {
314 if (!(transfer
->usage
& PIPE_TRANSFER_FLUSH_EXPLICIT
)) {
316 * Mapped range not flushed explicitly, so flush the whole buffer,
317 * and tell the host to discard the contents when processing the DMA
321 SVGA_DBG(DEBUG_DMA
, "flushing the whole buffer\n");
323 sbuf
->dma
.flags
.discard
= TRUE
;
325 svga_buffer_add_range(sbuf
, 0, sbuf
->b
.b
.width0
);
329 pipe_mutex_unlock(ss
->swc_mutex
);
335 svga_buffer_destroy( struct pipe_screen
*screen
,
336 struct pipe_resource
*buf
)
338 struct svga_screen
*ss
= svga_screen(screen
);
339 struct svga_buffer
*sbuf
= svga_buffer( buf
);
341 assert(!p_atomic_read(&buf
->reference
.count
));
343 assert(!sbuf
->dma
.pending
);
346 svga_buffer_destroy_host_surface(ss
, sbuf
);
348 if (sbuf
->uploaded
.buffer
)
349 pipe_resource_reference(&sbuf
->uploaded
.buffer
, NULL
);
352 svga_buffer_destroy_hw_storage(ss
, sbuf
);
354 if (sbuf
->swbuf
&& !sbuf
->user
)
355 align_free(sbuf
->swbuf
);
357 ss
->hud
.total_resource_bytes
-= sbuf
->size
;
358 assert(ss
->hud
.num_resources
> 0);
359 if (ss
->hud
.num_resources
> 0)
360 ss
->hud
.num_resources
--;
366 struct u_resource_vtbl svga_buffer_vtbl
=
368 u_default_resource_get_handle
, /* get_handle */
369 svga_buffer_destroy
, /* resource_destroy */
370 svga_buffer_transfer_map
, /* transfer_map */
371 svga_buffer_transfer_flush_region
, /* transfer_flush_region */
372 svga_buffer_transfer_unmap
, /* transfer_unmap */
377 struct pipe_resource
*
378 svga_buffer_create(struct pipe_screen
*screen
,
379 const struct pipe_resource
*template)
381 struct svga_screen
*ss
= svga_screen(screen
);
382 struct svga_buffer
*sbuf
;
384 sbuf
= CALLOC_STRUCT(svga_buffer
);
388 sbuf
->b
.b
= *template;
389 sbuf
->b
.vtbl
= &svga_buffer_vtbl
;
390 pipe_reference_init(&sbuf
->b
.b
.reference
, 1);
391 sbuf
->b
.b
.screen
= screen
;
392 sbuf
->bind_flags
= template->bind
;
394 if (template->bind
& PIPE_BIND_CONSTANT_BUFFER
) {
395 /* Constant buffers can only have the PIPE_BIND_CONSTANT_BUFFER
398 if (ss
->sws
->have_vgpu10
) {
399 sbuf
->bind_flags
= PIPE_BIND_CONSTANT_BUFFER
;
401 /* Constant buffer size needs to be in multiples of 16. */
402 sbuf
->b
.b
.width0
= align(sbuf
->b
.b
.width0
, 16);
406 if (svga_buffer_needs_hw_storage(template->bind
)) {
408 /* If the buffer will be used for vertex/index/stream data, set all
409 * the flags so that the buffer will be accepted for all those uses.
410 * Note that the PIPE_BIND_ flags we get from the state tracker are
411 * just a hint about how the buffer may be used. And OpenGL buffer
412 * object may be used for many different things.
414 if (!(template->bind
& PIPE_BIND_CONSTANT_BUFFER
)) {
415 /* Not a constant buffer. The buffer may be used for vertex data,
416 * indexes or stream-out.
418 sbuf
->bind_flags
|= (PIPE_BIND_VERTEX_BUFFER
|
419 PIPE_BIND_INDEX_BUFFER
);
420 if (ss
->sws
->have_vgpu10
)
421 sbuf
->bind_flags
|= PIPE_BIND_STREAM_OUTPUT
;
424 if (svga_buffer_create_host_surface(ss
, sbuf
) != PIPE_OK
)
428 sbuf
->swbuf
= align_malloc(sbuf
->b
.b
.width0
, 64);
433 debug_reference(&sbuf
->b
.b
.reference
,
434 (debug_reference_descriptor
)debug_describe_resource
, 0);
436 sbuf
->size
= util_resource_size(&sbuf
->b
.b
);
437 ss
->hud
.total_resource_bytes
+= sbuf
->size
;
439 ss
->hud
.num_resources
++;
450 struct pipe_resource
*
451 svga_user_buffer_create(struct pipe_screen
*screen
,
456 struct svga_buffer
*sbuf
;
457 struct svga_screen
*ss
= svga_screen(screen
);
459 sbuf
= CALLOC_STRUCT(svga_buffer
);
463 pipe_reference_init(&sbuf
->b
.b
.reference
, 1);
464 sbuf
->b
.vtbl
= &svga_buffer_vtbl
;
465 sbuf
->b
.b
.screen
= screen
;
466 sbuf
->b
.b
.format
= PIPE_FORMAT_R8_UNORM
; /* ?? */
467 sbuf
->b
.b
.usage
= PIPE_USAGE_IMMUTABLE
;
468 sbuf
->b
.b
.bind
= bind
;
469 sbuf
->b
.b
.width0
= bytes
;
470 sbuf
->b
.b
.height0
= 1;
471 sbuf
->b
.b
.depth0
= 1;
472 sbuf
->b
.b
.array_size
= 1;
474 sbuf
->bind_flags
= bind
;
478 debug_reference(&sbuf
->b
.b
.reference
,
479 (debug_reference_descriptor
)debug_describe_resource
, 0);
481 ss
->hud
.num_resources
++;