src/gallium/drivers/svga/svga_resource_buffer.c

   1 /**********************************************************
   2  * Copyright 2008-2009 VMware, Inc.  All rights reserved.
   3  *
   4  * Permission is hereby granted, free of charge, to any person
   5  * obtaining a copy of this software and associated documentation
   6  * files (the "Software"), to deal in the Software without
   7  * restriction, including without limitation the rights to use, copy,
   8  * modify, merge, publish, distribute, sublicense, and/or sell copies
   9  * of the Software, and to permit persons to whom the Software is
  10  * furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be
  13  * included in all copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  16  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  17  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  18  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  19  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  20  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  21  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  22  * SOFTWARE.
  23  *
  24  **********************************************************/
  25
  26 #include "svga_cmd.h"
  27
  28 #include "pipe/p_state.h"
  29 #include "pipe/p_defines.h"
  30 #include "util/u_inlines.h"
  31 #include "os/os_thread.h"
  32 #include "os/os_time.h"
  33 #include "util/u_math.h"
  34 #include "util/u_memory.h"
  35 #include "util/u_resource.h"
  36
  37 #include "svga_context.h"
  38 #include "svga_screen.h"
  39 #include "svga_resource_buffer.h"
  40 #include "svga_resource_buffer_upload.h"
  41 #include "svga_winsys.h"
  42 #include "svga_debug.h"
  43
  44
  45 /**
  46  * Vertex and index buffers need hardware backing.  Constant buffers
  47  * do not.  No other types of buffers currently supported.
  48  */
  49 static inline boolean
  50 svga_buffer_needs_hw_storage(unsigned usage)
  51 {
  52    return (usage & (PIPE_BIND_VERTEX_BUFFER | PIPE_BIND_INDEX_BUFFER |
  53                     PIPE_BIND_SAMPLER_VIEW | PIPE_BIND_STREAM_OUTPUT)) != 0;
  54 }
  55
  56
  57 /**
  58  * Create a buffer transfer.
  59  *
  60  * Unlike texture DMAs (which are written immediately to the command buffer and
  61  * therefore inherently serialized with other context operations), for buffers
  62  * we try to coalesce multiple range mappings (i.e, multiple calls to this
  63  * function) into a single DMA command, for better efficiency in command
  64  * processing.  This means we need to exercise extra care here to ensure that
  65  * the end result is exactly the same as if one DMA was used for every mapped
  66  * range.
  67  */
  68 static void *
  69 svga_buffer_transfer_map(struct pipe_context *pipe,
  70                          struct pipe_resource *resource,
  71                          unsigned level,
  72                          unsigned usage,
  73                          const struct pipe_box *box,
  74                          struct pipe_transfer **ptransfer)
  75 {
  76    struct svga_context *svga = svga_context(pipe);
  77    struct svga_screen *ss = svga_screen(pipe->screen);
  78    struct svga_buffer *sbuf = svga_buffer(resource);
  79    struct pipe_transfer *transfer;
  80    uint8_t *map;
  81    int64_t begin = os_time_get();
  82
  83    assert(box->y == 0);
  84    assert(box->z == 0);
  85    assert(box->height == 1);
  86    assert(box->depth == 1);
  87
  88    transfer = CALLOC_STRUCT(pipe_transfer);
  89    if (!transfer) {
  90       return NULL;
  91    }
  92
  93    transfer->resource = resource;
  94    transfer->level = level;
  95    transfer->usage = usage;
  96    transfer->box = *box;
  97
  98    if ((usage & PIPE_TRANSFER_READ) && sbuf->dirty) {
  99       /* Only need to test for vgpu10 since only vgpu10 features (streamout,
 100        * buffer copy) can modify buffers on the device.
 101        */
 102       if (svga_have_vgpu10(svga)) {
 103          enum pipe_error ret;
 104          assert(sbuf->handle);
 105          ret = SVGA3D_vgpu10_ReadbackSubResource(svga->swc, sbuf->handle, 0);
 106          if (ret != PIPE_OK) {
 107             svga_context_flush(svga, NULL);
 108             ret = SVGA3D_vgpu10_ReadbackSubResource(svga->swc, sbuf->handle, 0);
 109             assert(ret == PIPE_OK);
 110          }
 111
 112          svga_context_finish(svga);
 113
 114          sbuf->dirty = FALSE;
 115       }
 116    }
 117
 118    if (usage & PIPE_TRANSFER_WRITE) {
 119       if (usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) {
 120          /*
 121           * Flush any pending primitives, finish writing any pending DMA
 122           * commands, and tell the host to discard the buffer contents on
 123           * the next DMA operation.
 124           */
 125
 126          svga_hwtnl_flush_buffer(svga, resource);
 127
 128          if (sbuf->dma.pending) {
 129             svga_buffer_upload_flush(svga, sbuf);
 130
 131             /*
 132              * Instead of flushing the context command buffer, simply discard
 133              * the current hwbuf, and start a new one.
 134              * With GB objects, the map operation takes care of this
 135              * if passed the PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE flag,
 136              * and the old backing store is busy.
 137              */
 138
 139             if (!svga_have_gb_objects(svga))
 140                svga_buffer_destroy_hw_storage(ss, sbuf);
 141          }
 142
 143          sbuf->map.num_ranges = 0;
 144          sbuf->dma.flags.discard = TRUE;
 145       }
 146
 147       if (usage & PIPE_TRANSFER_UNSYNCHRONIZED) {
 148          if (!sbuf->map.num_ranges) {
 149             /*
 150              * No pending ranges to upload so far, so we can tell the host to
 151              * not synchronize on the next DMA command.
 152              */
 153
 154             sbuf->dma.flags.unsynchronized = TRUE;
 155          }
 156       } else {
 157          /*
 158           * Synchronizing, so flush any pending primitives, finish writing any
 159           * pending DMA command, and ensure the next DMA will be done in order.
 160           */
 161
 162          svga_hwtnl_flush_buffer(svga, resource);
 163
 164          if (sbuf->dma.pending) {
 165             svga_buffer_upload_flush(svga, sbuf);
 166
 167             if (svga_buffer_has_hw_storage(sbuf)) {
 168                /*
 169                 * We have a pending DMA upload from a hardware buffer, therefore
 170                 * we need to ensure that the host finishes processing that DMA
 171                 * command before the state tracker can start overwriting the
 172                 * hardware buffer.
 173                 *
 174                 * XXX: This could be avoided by tying the hardware buffer to
 175                 * the transfer (just as done with textures), which would allow
 176                 * overlapping DMAs commands to be queued on the same context
 177                 * buffer. However, due to the likelihood of software vertex
 178                 * processing, it is more convenient to hold on to the hardware
 179                 * buffer, allowing to quickly access the contents from the CPU
 180                 * without having to do a DMA download from the host.
 181                 */
 182
 183                if (usage & PIPE_TRANSFER_DONTBLOCK) {
 184                   /*
 185                    * Flushing the command buffer here will most likely cause
 186                    * the map of the hwbuf below to block, so preemptively
 187                    * return NULL here if DONTBLOCK is set to prevent unnecessary
 188                    * command buffer flushes.
 189                    */
 190
 191                   FREE(transfer);
 192                   return NULL;
 193                }
 194
 195                svga_context_flush(svga, NULL);
 196             }
 197          }
 198
 199          sbuf->dma.flags.unsynchronized = FALSE;
 200       }
 201    }
 202
 203    if (!sbuf->swbuf && !svga_buffer_has_hw_storage(sbuf)) {
 204       if (svga_buffer_create_hw_storage(ss, sbuf) != PIPE_OK) {
 205          /*
 206           * We can't create a hardware buffer big enough, so create a malloc
 207           * buffer instead.
 208           */
 209          if (0) {
 210             debug_printf("%s: failed to allocate %u KB of DMA, "
 211                          "splitting DMA transfers\n",
 212                          __FUNCTION__,
 213                          (sbuf->b.b.width0 + 1023)/1024);
 214          }
 215
 216          sbuf->swbuf = align_malloc(sbuf->b.b.width0, 16);
 217          if (!sbuf->swbuf) {
 218             FREE(transfer);
 219             return NULL;
 220          }
 221       }
 222    }
 223
 224    if (sbuf->swbuf) {
 225       /* User/malloc buffer */
 226       map = sbuf->swbuf;
 227    }
 228    else if (svga_buffer_has_hw_storage(sbuf)) {
 229       boolean retry;
 230
 231       map = svga_buffer_hw_storage_map(svga, sbuf, transfer->usage, &retry);
 232       if (map == NULL && retry) {
 233          /*
 234           * At this point, svga_buffer_get_transfer() has already
 235           * hit the DISCARD_WHOLE_RESOURCE path and flushed HWTNL
 236           * for this buffer.
 237           */
 238          svga_context_flush(svga, NULL);
 239          map = svga_buffer_hw_storage_map(svga, sbuf, transfer->usage, &retry);
 240       }
 241    }
 242    else {
 243       map = NULL;
 244    }
 245
 246    if (map) {
 247       ++sbuf->map.count;
 248       map += transfer->box.x;
 249       *ptransfer = transfer;
 250    } else {
 251       FREE(transfer);
 252    }
 253
 254    svga->hud.map_buffer_time += (os_time_get() - begin);
 255
 256    return map;
 257 }
 258
 259
 260 static void
 261 svga_buffer_transfer_flush_region( struct pipe_context *pipe,
 262                                    struct pipe_transfer *transfer,
 263                                    const struct pipe_box *box)
 264 {
 265    struct svga_screen *ss = svga_screen(pipe->screen);
 266    struct svga_buffer *sbuf = svga_buffer(transfer->resource);
 267
 268    unsigned offset = transfer->box.x + box->x;
 269    unsigned length = box->width;
 270
 271    assert(transfer->usage & PIPE_TRANSFER_WRITE);
 272    assert(transfer->usage & PIPE_TRANSFER_FLUSH_EXPLICIT);
 273
 274    pipe_mutex_lock(ss->swc_mutex);
 275    svga_buffer_add_range(sbuf, offset, offset + length);
 276    pipe_mutex_unlock(ss->swc_mutex);
 277 }
 278
 279
 280 static void
 281 svga_buffer_transfer_unmap( struct pipe_context *pipe,
 282                             struct pipe_transfer *transfer )
 283 {
 284    struct svga_screen *ss = svga_screen(pipe->screen);
 285    struct svga_context *svga = svga_context(pipe);
 286    struct svga_buffer *sbuf = svga_buffer(transfer->resource);
 287
 288    pipe_mutex_lock(ss->swc_mutex);
 289
 290    assert(sbuf->map.count);
 291    if (sbuf->map.count) {
 292       --sbuf->map.count;
 293    }
 294
 295    if (svga_buffer_has_hw_storage(sbuf)) {
 296       svga_buffer_hw_storage_unmap(svga, sbuf);
 297    }
 298
 299    if (transfer->usage & PIPE_TRANSFER_WRITE) {
 300       if (!(transfer->usage & PIPE_TRANSFER_FLUSH_EXPLICIT)) {
 301          /*
 302           * Mapped range not flushed explicitly, so flush the whole buffer,
 303           * and tell the host to discard the contents when processing the DMA
 304           * command.
 305           */
 306
 307          SVGA_DBG(DEBUG_DMA, "flushing the whole buffer\n");
 308
 309          sbuf->dma.flags.discard = TRUE;
 310
 311          svga_buffer_add_range(sbuf, 0, sbuf->b.b.width0);
 312       }
 313    }
 314
 315    pipe_mutex_unlock(ss->swc_mutex);
 316    FREE(transfer);
 317 }
 318
 319
 320 static void
 321 svga_buffer_destroy( struct pipe_screen *screen,
 322                      struct pipe_resource *buf )
 323 {
 324    struct svga_screen *ss = svga_screen(screen);
 325    struct svga_buffer *sbuf = svga_buffer( buf );
 326
 327    assert(!p_atomic_read(&buf->reference.count));
 328
 329    assert(!sbuf->dma.pending);
 330
 331    if (sbuf->handle)
 332       svga_buffer_destroy_host_surface(ss, sbuf);
 333
 334    if (sbuf->uploaded.buffer)
 335       pipe_resource_reference(&sbuf->uploaded.buffer, NULL);
 336
 337    if (sbuf->hwbuf)
 338       svga_buffer_destroy_hw_storage(ss, sbuf);
 339
 340    if (sbuf->swbuf && !sbuf->user)
 341       align_free(sbuf->swbuf);
 342
 343    ss->hud.total_resource_bytes -= sbuf->size;
 344    assert(ss->hud.num_resources > 0);
 345    if (ss->hud.num_resources > 0)
 346       ss->hud.num_resources--;
 347
 348    FREE(sbuf);
 349 }
 350
 351
 352 struct u_resource_vtbl svga_buffer_vtbl =
 353 {
 354    u_default_resource_get_handle,      /* get_handle */
 355    svga_buffer_destroy,              /* resource_destroy */
 356    svga_buffer_transfer_map,         /* transfer_map */
 357    svga_buffer_transfer_flush_region,  /* transfer_flush_region */
 358    svga_buffer_transfer_unmap,       /* transfer_unmap */
 359    u_default_transfer_inline_write   /* transfer_inline_write */
 360 };
 361
 362
 363
 364 struct pipe_resource *
 365 svga_buffer_create(struct pipe_screen *screen,
 366                    const struct pipe_resource *template)
 367 {
 368    struct svga_screen *ss = svga_screen(screen);
 369    struct svga_buffer *sbuf;
 370
 371    sbuf = CALLOC_STRUCT(svga_buffer);
 372    if (!sbuf)
 373       goto error1;
 374
 375    sbuf->b.b = *template;
 376    sbuf->b.vtbl = &svga_buffer_vtbl;
 377    pipe_reference_init(&sbuf->b.b.reference, 1);
 378    sbuf->b.b.screen = screen;
 379    sbuf->bind_flags = template->bind;
 380
 381    if (template->bind & PIPE_BIND_CONSTANT_BUFFER) {
 382       /* Constant buffers can only have the PIPE_BIND_CONSTANT_BUFFER
 383        * flag set.
 384        */
 385       if (ss->sws->have_vgpu10) {
 386          sbuf->bind_flags = PIPE_BIND_CONSTANT_BUFFER;
 387
 388          /* Constant buffer size needs to be in multiples of 16. */
 389          sbuf->b.b.width0 = align(sbuf->b.b.width0, 16);
 390       }
 391    }
 392
 393    if (svga_buffer_needs_hw_storage(template->bind)) {
 394
 395       /* If the buffer will be used for vertex/index/stream data, set all
 396        * the flags so that the buffer will be accepted for all those uses.
 397        * Note that the PIPE_BIND_ flags we get from the state tracker are
 398        * just a hint about how the buffer may be used.  And OpenGL buffer
 399        * object may be used for many different things.
 400        */
 401       if (!(template->bind & PIPE_BIND_CONSTANT_BUFFER)) {
 402          /* Not a constant buffer.  The buffer may be used for vertex data,
 403           * indexes or stream-out.
 404           */
 405          sbuf->bind_flags |= (PIPE_BIND_VERTEX_BUFFER |
 406                               PIPE_BIND_INDEX_BUFFER);
 407          if (ss->sws->have_vgpu10)
 408             sbuf->bind_flags |= PIPE_BIND_STREAM_OUTPUT;
 409       }
 410
 411       if (svga_buffer_create_host_surface(ss, sbuf) != PIPE_OK)
 412          goto error2;
 413    }
 414    else {
 415       sbuf->swbuf = align_malloc(sbuf->b.b.width0, 64);
 416       if (!sbuf->swbuf)
 417          goto error2;
 418    }
 419
 420    debug_reference(&sbuf->b.b.reference,
 421                    (debug_reference_descriptor)debug_describe_resource, 0);
 422
 423    sbuf->size = util_resource_size(&sbuf->b.b);
 424    ss->hud.total_resource_bytes += sbuf->size;
 425
 426    ss->hud.num_resources++;
 427
 428    return &sbuf->b.b;
 429
 430 error2:
 431    FREE(sbuf);
 432 error1:
 433    return NULL;
 434 }
 435
 436
 437 struct pipe_resource *
 438 svga_user_buffer_create(struct pipe_screen *screen,
 439                         void *ptr,
 440                         unsigned bytes,
 441                         unsigned bind)
 442 {
 443    struct svga_buffer *sbuf;
 444    struct svga_screen *ss = svga_screen(screen);
 445
 446    sbuf = CALLOC_STRUCT(svga_buffer);
 447    if (!sbuf)
 448       goto no_sbuf;
 449
 450    pipe_reference_init(&sbuf->b.b.reference, 1);
 451    sbuf->b.vtbl = &svga_buffer_vtbl;
 452    sbuf->b.b.screen = screen;
 453    sbuf->b.b.format = PIPE_FORMAT_R8_UNORM; /* ?? */
 454    sbuf->b.b.usage = PIPE_USAGE_IMMUTABLE;
 455    sbuf->b.b.bind = bind;
 456    sbuf->b.b.width0 = bytes;
 457    sbuf->b.b.height0 = 1;
 458    sbuf->b.b.depth0 = 1;
 459    sbuf->b.b.array_size = 1;
 460
 461    sbuf->bind_flags = bind;
 462    sbuf->swbuf = ptr;
 463    sbuf->user = TRUE;
 464
 465    debug_reference(&sbuf->b.b.reference,
 466                    (debug_reference_descriptor)debug_describe_resource, 0);
 467
 468    ss->hud.num_resources++;
 469
 470    return &sbuf->b.b;
 471
 472 no_sbuf:
 473    return NULL;
 474 }
 475
 476
 477