src/gallium/drivers/svga/svga_resource_buffer.c

   1 /**********************************************************
   2  * Copyright 2008-2009 VMware, Inc.  All rights reserved.
   3  *
   4  * Permission is hereby granted, free of charge, to any person
   5  * obtaining a copy of this software and associated documentation
   6  * files (the "Software"), to deal in the Software without
   7  * restriction, including without limitation the rights to use, copy,
   8  * modify, merge, publish, distribute, sublicense, and/or sell copies
   9  * of the Software, and to permit persons to whom the Software is
  10  * furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be
  13  * included in all copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  16  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  17  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  18  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  19  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  20  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  21  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  22  * SOFTWARE.
  23  *
  24  **********************************************************/
  25
  26 #include "svga_cmd.h"
  27
  28 #include "pipe/p_state.h"
  29 #include "pipe/p_defines.h"
  30 #include "util/u_inlines.h"
  31 #include "os/os_thread.h"
  32 #include "util/u_math.h"
  33 #include "util/u_memory.h"
  34
  35 #include "svga_context.h"
  36 #include "svga_screen.h"
  37 #include "svga_resource_buffer.h"
  38 #include "svga_resource_buffer_upload.h"
  39 #include "svga_winsys.h"
  40 #include "svga_debug.h"
  41
  42
  43 /**
  44  * Vertex and index buffers need hardware backing.  Constant buffers
  45  * do not.  No other types of buffers currently supported.
  46  */
  47 static INLINE boolean
  48 svga_buffer_needs_hw_storage(unsigned usage)
  49 {
  50    return usage & (PIPE_BIND_VERTEX_BUFFER | PIPE_BIND_INDEX_BUFFER);
  51 }
  52
  53
  54 /**
  55  * Create a buffer transfer.
  56  *
  57  * Unlike texture DMAs (which are written immediately to the command buffer and
  58  * therefore inherently serialized with other context operations), for buffers
  59  * we try to coalesce multiple range mappings (i.e, multiple calls to this
  60  * function) into a single DMA command, for better efficiency in command
  61  * processing.  This means we need to exercise extra care here to ensure that
  62  * the end result is exactly the same as if one DMA was used for every mapped
  63  * range.
  64  */
  65 static struct pipe_transfer *
  66 svga_buffer_get_transfer(struct pipe_context *pipe,
  67                          struct pipe_resource *resource,
  68                          unsigned level,
  69                          unsigned usage,
  70                          const struct pipe_box *box)
  71 {
  72    struct svga_context *svga = svga_context(pipe);
  73    struct svga_screen *ss = svga_screen(pipe->screen);
  74    struct svga_buffer *sbuf = svga_buffer(resource);
  75    struct pipe_transfer *transfer;
  76
  77    if (usage & PIPE_TRANSFER_MAP_PERMANENTLY) {
  78       return NULL;
  79    }
  80
  81    transfer = CALLOC_STRUCT(pipe_transfer);
  82    if (transfer == NULL) {
  83       return NULL;
  84    }
  85
  86    transfer->resource = resource;
  87    transfer->level = level;
  88    transfer->usage = usage;
  89    transfer->box = *box;
  90
  91    if (usage & PIPE_TRANSFER_WRITE) {
  92       if (usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) {
  93          /*
  94           * Flush any pending primitives, finish writing any pending DMA
  95           * commands, and tell the host to discard the buffer contents on
  96           * the next DMA operation.
  97           */
  98
  99          svga_hwtnl_flush_buffer(svga, resource);
 100
 101          if (sbuf->dma.pending) {
 102             svga_buffer_upload_flush(svga, sbuf);
 103
 104             /*
 105              * Instead of flushing the context command buffer, simply discard
 106              * the current hwbuf, and start a new one.
 107              */
 108
 109             svga_buffer_destroy_hw_storage(ss, sbuf);
 110          }
 111
 112          sbuf->map.num_ranges = 0;
 113          sbuf->dma.flags.discard = TRUE;
 114       }
 115
 116       if (usage & PIPE_TRANSFER_UNSYNCHRONIZED) {
 117          if (!sbuf->map.num_ranges) {
 118             /*
 119              * No pending ranges to upload so far, so we can tell the host to
 120              * not synchronize on the next DMA command.
 121              */
 122
 123             sbuf->dma.flags.unsynchronized = TRUE;
 124          }
 125       } else {
 126          /*
 127           * Synchronizing, so flush any pending primitives, finish writing any
 128           * pending DMA command, and ensure the next DMA will be done in order.
 129           */
 130
 131          svga_hwtnl_flush_buffer(svga, resource);
 132
 133          if (sbuf->dma.pending) {
 134             svga_buffer_upload_flush(svga, sbuf);
 135
 136             if (sbuf->hwbuf) {
 137                /*
 138                 * We have a pending DMA upload from a hardware buffer, therefore
 139                 * we need to ensure that the host finishes processing that DMA
 140                 * command before the state tracker can start overwriting the
 141                 * hardware buffer.
 142                 *
 143                 * XXX: This could be avoided by tying the hardware buffer to
 144                 * the transfer (just as done with textures), which would allow
 145                 * overlapping DMAs commands to be queued on the same context
 146                 * buffer. However, due to the likelihood of software vertex
 147                 * processing, it is more convenient to hold on to the hardware
 148                 * buffer, allowing to quickly access the contents from the CPU
 149                 * without having to do a DMA download from the host.
 150                 */
 151
 152                if (usage & PIPE_TRANSFER_DONTBLOCK) {
 153                   /*
 154                    * Flushing the command buffer here will most likely cause
 155                    * the map of the hwbuf below to block, so preemptively
 156                    * return NULL here if DONTBLOCK is set to prevent unnecessary
 157                    * command buffer flushes.
 158                    */
 159
 160                   FREE(transfer);
 161                   return NULL;
 162                }
 163
 164                svga_context_flush(svga, NULL);
 165             }
 166          }
 167
 168          sbuf->dma.flags.unsynchronized = FALSE;
 169       }
 170    }
 171
 172    if (!sbuf->swbuf && !sbuf->hwbuf) {
 173       if (svga_buffer_create_hw_storage(ss, sbuf) != PIPE_OK) {
 174          /*
 175           * We can't create a hardware buffer big enough, so create a malloc
 176           * buffer instead.
 177           */
 178          if (0) {
 179             debug_printf("%s: failed to allocate %u KB of DMA, "
 180                          "splitting DMA transfers\n",
 181                          __FUNCTION__,
 182                          (sbuf->b.b.width0 + 1023)/1024);
 183          }
 184
 185          sbuf->swbuf = align_malloc(sbuf->b.b.width0, 16);
 186          if (!sbuf->swbuf) {
 187             FREE(transfer);
 188             return NULL;
 189          }
 190       }
 191    }
 192
 193    return transfer;
 194 }
 195
 196
 197 /**
 198  * Map a range of a buffer.
 199  */
 200 static void *
 201 svga_buffer_transfer_map( struct pipe_context *pipe,
 202                           struct pipe_transfer *transfer )
 203 {
 204    struct svga_buffer *sbuf = svga_buffer(transfer->resource);
 205
 206    uint8_t *map;
 207
 208    if (sbuf->swbuf) {
 209       /* User/malloc buffer */
 210       map = sbuf->swbuf;
 211    }
 212    else if (sbuf->hwbuf) {
 213       struct svga_screen *ss = svga_screen(pipe->screen);
 214       struct svga_winsys_screen *sws = ss->sws;
 215
 216       map = sws->buffer_map(sws, sbuf->hwbuf, transfer->usage);
 217    }
 218    else {
 219       map = NULL;
 220    }
 221
 222    if (map) {
 223       ++sbuf->map.count;
 224       map += transfer->box.x;
 225    }
 226
 227    return map;
 228 }
 229
 230
 231 static void
 232 svga_buffer_transfer_flush_region( struct pipe_context *pipe,
 233                                    struct pipe_transfer *transfer,
 234                                    const struct pipe_box *box)
 235 {
 236    struct svga_screen *ss = svga_screen(pipe->screen);
 237    struct svga_buffer *sbuf = svga_buffer(transfer->resource);
 238
 239    unsigned offset = transfer->box.x + box->x;
 240    unsigned length = box->width;
 241
 242    assert(transfer->usage & PIPE_TRANSFER_WRITE);
 243    assert(transfer->usage & PIPE_TRANSFER_FLUSH_EXPLICIT);
 244
 245    pipe_mutex_lock(ss->swc_mutex);
 246    svga_buffer_add_range(sbuf, offset, offset + length);
 247    pipe_mutex_unlock(ss->swc_mutex);
 248 }
 249
 250
 251 static void
 252 svga_buffer_transfer_unmap( struct pipe_context *pipe,
 253                             struct pipe_transfer *transfer )
 254 {
 255    struct svga_screen *ss = svga_screen(pipe->screen);
 256    struct svga_winsys_screen *sws = ss->sws;
 257    struct svga_buffer *sbuf = svga_buffer(transfer->resource);
 258
 259    pipe_mutex_lock(ss->swc_mutex);
 260
 261    assert(sbuf->map.count);
 262    if (sbuf->map.count) {
 263       --sbuf->map.count;
 264    }
 265
 266    if (sbuf->hwbuf) {
 267       sws->buffer_unmap(sws, sbuf->hwbuf);
 268    }
 269
 270    if (transfer->usage & PIPE_TRANSFER_WRITE) {
 271       if (!(transfer->usage & PIPE_TRANSFER_FLUSH_EXPLICIT)) {
 272          /*
 273           * Mapped range not flushed explicitly, so flush the whole buffer,
 274           * and tell the host to discard the contents when processing the DMA
 275           * command.
 276           */
 277
 278          SVGA_DBG(DEBUG_DMA, "flushing the whole buffer\n");
 279
 280          sbuf->dma.flags.discard = TRUE;
 281
 282          svga_buffer_add_range(sbuf, 0, sbuf->b.b.width0);
 283       }
 284    }
 285
 286    pipe_mutex_unlock(ss->swc_mutex);
 287 }
 288
 289
 290 /**
 291  * Destroy transfer
 292  */
 293 static void
 294 svga_buffer_transfer_destroy(struct pipe_context *pipe,
 295                              struct pipe_transfer *transfer)
 296 {
 297    FREE(transfer);
 298 }
 299
 300
 301 static void
 302 svga_buffer_destroy( struct pipe_screen *screen,
 303                      struct pipe_resource *buf )
 304 {
 305    struct svga_screen *ss = svga_screen(screen);
 306    struct svga_buffer *sbuf = svga_buffer( buf );
 307
 308    assert(!p_atomic_read(&buf->reference.count));
 309
 310    assert(!sbuf->dma.pending);
 311
 312    if(sbuf->handle)
 313       svga_buffer_destroy_host_surface(ss, sbuf);
 314
 315    if(sbuf->uploaded.buffer)
 316       pipe_resource_reference(&sbuf->uploaded.buffer, NULL);
 317
 318    if(sbuf->hwbuf)
 319       svga_buffer_destroy_hw_storage(ss, sbuf);
 320
 321    if(sbuf->swbuf && !sbuf->user)
 322       align_free(sbuf->swbuf);
 323
 324    FREE(sbuf);
 325 }
 326
 327
 328 struct u_resource_vtbl svga_buffer_vtbl =
 329 {
 330    u_default_resource_get_handle,      /* get_handle */
 331    svga_buffer_destroy,              /* resource_destroy */
 332    svga_buffer_get_transfer,         /* get_transfer */
 333    svga_buffer_transfer_destroy,     /* transfer_destroy */
 334    svga_buffer_transfer_map,         /* transfer_map */
 335    svga_buffer_transfer_flush_region,  /* transfer_flush_region */
 336    svga_buffer_transfer_unmap,       /* transfer_unmap */
 337    u_default_transfer_inline_write   /* transfer_inline_write */
 338 };
 339
 340
 341
 342 struct pipe_resource *
 343 svga_buffer_create(struct pipe_screen *screen,
 344                    const struct pipe_resource *template)
 345 {
 346    struct svga_screen *ss = svga_screen(screen);
 347    struct svga_buffer *sbuf;
 348
 349    sbuf = CALLOC_STRUCT(svga_buffer);
 350    if(!sbuf)
 351       goto error1;
 352
 353    sbuf->b.b = *template;
 354    sbuf->b.vtbl = &svga_buffer_vtbl;
 355    pipe_reference_init(&sbuf->b.b.reference, 1);
 356    sbuf->b.b.screen = screen;
 357
 358    if(svga_buffer_needs_hw_storage(template->bind)) {
 359       if(svga_buffer_create_host_surface(ss, sbuf) != PIPE_OK)
 360          goto error2;
 361    }
 362    else {
 363       sbuf->swbuf = align_malloc(template->width0, 64);
 364       if(!sbuf->swbuf)
 365          goto error2;
 366    }
 367
 368    debug_reference(&sbuf->b.b.reference,
 369                    (debug_reference_descriptor)debug_describe_resource, 0);
 370
 371    return &sbuf->b.b;
 372
 373 error2:
 374    FREE(sbuf);
 375 error1:
 376    return NULL;
 377 }
 378
 379 struct pipe_resource *
 380 svga_user_buffer_create(struct pipe_screen *screen,
 381                         void *ptr,
 382                         unsigned bytes,
 383                         unsigned bind)
 384 {
 385    struct svga_buffer *sbuf;
 386
 387    sbuf = CALLOC_STRUCT(svga_buffer);
 388    if(!sbuf)
 389       goto no_sbuf;
 390
 391    pipe_reference_init(&sbuf->b.b.reference, 1);
 392    sbuf->b.vtbl = &svga_buffer_vtbl;
 393    sbuf->b.b.screen = screen;
 394    sbuf->b.b.format = PIPE_FORMAT_R8_UNORM; /* ?? */
 395    sbuf->b.b.usage = PIPE_USAGE_IMMUTABLE;
 396    sbuf->b.b.bind = bind;
 397    sbuf->b.b.width0 = bytes;
 398    sbuf->b.b.height0 = 1;
 399    sbuf->b.b.depth0 = 1;
 400    sbuf->b.b.array_size = 1;
 401
 402    sbuf->swbuf = ptr;
 403    sbuf->user = TRUE;
 404
 405    debug_reference(&sbuf->b.b.reference,
 406                    (debug_reference_descriptor)debug_describe_resource, 0);
 407
 408    return &sbuf->b.b;
 409
 410 no_sbuf:
 411    return NULL;
 412 }
 413
 414
 415