svga: flush buffers when mapping for reading
[mesa.git] / src / gallium / drivers / svga / svga_resource_buffer.c
1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person
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25
26 #include "svga_cmd.h"
27
28 #include "pipe/p_state.h"
29 #include "pipe/p_defines.h"
30 #include "util/u_inlines.h"
31 #include "os/os_thread.h"
32 #include "os/os_time.h"
33 #include "util/u_math.h"
34 #include "util/u_memory.h"
35 #include "util/u_resource.h"
36
37 #include "svga_context.h"
38 #include "svga_screen.h"
39 #include "svga_resource_buffer.h"
40 #include "svga_resource_buffer_upload.h"
41 #include "svga_winsys.h"
42 #include "svga_debug.h"
43
44
45 /**
46 * Vertex and index buffers need hardware backing. Constant buffers
47 * do not. No other types of buffers currently supported.
48 */
49 static inline boolean
50 svga_buffer_needs_hw_storage(unsigned usage)
51 {
52 return (usage & (PIPE_BIND_VERTEX_BUFFER | PIPE_BIND_INDEX_BUFFER |
53 PIPE_BIND_SAMPLER_VIEW | PIPE_BIND_STREAM_OUTPUT)) != 0;
54 }
55
56
57 /**
58 * Create a buffer transfer.
59 *
60 * Unlike texture DMAs (which are written immediately to the command buffer and
61 * therefore inherently serialized with other context operations), for buffers
62 * we try to coalesce multiple range mappings (i.e, multiple calls to this
63 * function) into a single DMA command, for better efficiency in command
64 * processing. This means we need to exercise extra care here to ensure that
65 * the end result is exactly the same as if one DMA was used for every mapped
66 * range.
67 */
68 static void *
69 svga_buffer_transfer_map(struct pipe_context *pipe,
70 struct pipe_resource *resource,
71 unsigned level,
72 unsigned usage,
73 const struct pipe_box *box,
74 struct pipe_transfer **ptransfer)
75 {
76 struct svga_context *svga = svga_context(pipe);
77 struct svga_screen *ss = svga_screen(pipe->screen);
78 struct svga_buffer *sbuf = svga_buffer(resource);
79 struct pipe_transfer *transfer;
80 uint8_t *map;
81 int64_t begin = os_time_get();
82
83 assert(box->y == 0);
84 assert(box->z == 0);
85 assert(box->height == 1);
86 assert(box->depth == 1);
87
88 transfer = CALLOC_STRUCT(pipe_transfer);
89 if (!transfer) {
90 return NULL;
91 }
92
93 transfer->resource = resource;
94 transfer->level = level;
95 transfer->usage = usage;
96 transfer->box = *box;
97
98 if ((usage & PIPE_TRANSFER_READ) && sbuf->dirty) {
99 enum pipe_error ret;
100
101 /* Host-side buffers can only be dirtied with vgpu10 features
102 * (streamout and buffer copy).
103 */
104 assert(svga_have_vgpu10(svga));
105
106 if (!sbuf->user) {
107 (void) svga_buffer_handle(svga, resource);
108 }
109
110 if (sbuf->dma.pending > 0) {
111 svga_buffer_upload_flush(svga, sbuf);
112 svga_context_finish(svga);
113 }
114
115 assert(sbuf->handle);
116
117 ret = SVGA3D_vgpu10_ReadbackSubResource(svga->swc, sbuf->handle, 0);
118 if (ret != PIPE_OK) {
119 svga_context_flush(svga, NULL);
120 ret = SVGA3D_vgpu10_ReadbackSubResource(svga->swc, sbuf->handle, 0);
121 assert(ret == PIPE_OK);
122 }
123
124 svga->hud.num_readbacks++;
125
126 svga_context_finish(svga);
127
128 sbuf->dirty = FALSE;
129 }
130
131 if (usage & PIPE_TRANSFER_WRITE) {
132 if (usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) {
133 /*
134 * Flush any pending primitives, finish writing any pending DMA
135 * commands, and tell the host to discard the buffer contents on
136 * the next DMA operation.
137 */
138
139 svga_hwtnl_flush_buffer(svga, resource);
140
141 if (sbuf->dma.pending) {
142 svga_buffer_upload_flush(svga, sbuf);
143
144 /*
145 * Instead of flushing the context command buffer, simply discard
146 * the current hwbuf, and start a new one.
147 * With GB objects, the map operation takes care of this
148 * if passed the PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE flag,
149 * and the old backing store is busy.
150 */
151
152 if (!svga_have_gb_objects(svga))
153 svga_buffer_destroy_hw_storage(ss, sbuf);
154 }
155
156 sbuf->map.num_ranges = 0;
157 sbuf->dma.flags.discard = TRUE;
158 }
159
160 if (usage & PIPE_TRANSFER_UNSYNCHRONIZED) {
161 if (!sbuf->map.num_ranges) {
162 /*
163 * No pending ranges to upload so far, so we can tell the host to
164 * not synchronize on the next DMA command.
165 */
166
167 sbuf->dma.flags.unsynchronized = TRUE;
168 }
169 } else {
170 /*
171 * Synchronizing, so flush any pending primitives, finish writing any
172 * pending DMA command, and ensure the next DMA will be done in order.
173 */
174
175 svga_hwtnl_flush_buffer(svga, resource);
176
177 if (sbuf->dma.pending) {
178 svga_buffer_upload_flush(svga, sbuf);
179
180 if (svga_buffer_has_hw_storage(sbuf)) {
181 /*
182 * We have a pending DMA upload from a hardware buffer, therefore
183 * we need to ensure that the host finishes processing that DMA
184 * command before the state tracker can start overwriting the
185 * hardware buffer.
186 *
187 * XXX: This could be avoided by tying the hardware buffer to
188 * the transfer (just as done with textures), which would allow
189 * overlapping DMAs commands to be queued on the same context
190 * buffer. However, due to the likelihood of software vertex
191 * processing, it is more convenient to hold on to the hardware
192 * buffer, allowing to quickly access the contents from the CPU
193 * without having to do a DMA download from the host.
194 */
195
196 if (usage & PIPE_TRANSFER_DONTBLOCK) {
197 /*
198 * Flushing the command buffer here will most likely cause
199 * the map of the hwbuf below to block, so preemptively
200 * return NULL here if DONTBLOCK is set to prevent unnecessary
201 * command buffer flushes.
202 */
203
204 FREE(transfer);
205 return NULL;
206 }
207
208 svga_context_flush(svga, NULL);
209 }
210 }
211
212 sbuf->dma.flags.unsynchronized = FALSE;
213 }
214 }
215
216 if (!sbuf->swbuf && !svga_buffer_has_hw_storage(sbuf)) {
217 if (svga_buffer_create_hw_storage(ss, sbuf) != PIPE_OK) {
218 /*
219 * We can't create a hardware buffer big enough, so create a malloc
220 * buffer instead.
221 */
222 if (0) {
223 debug_printf("%s: failed to allocate %u KB of DMA, "
224 "splitting DMA transfers\n",
225 __FUNCTION__,
226 (sbuf->b.b.width0 + 1023)/1024);
227 }
228
229 sbuf->swbuf = align_malloc(sbuf->b.b.width0, 16);
230 if (!sbuf->swbuf) {
231 FREE(transfer);
232 return NULL;
233 }
234 }
235 }
236
237 if (sbuf->swbuf) {
238 /* User/malloc buffer */
239 map = sbuf->swbuf;
240 }
241 else if (svga_buffer_has_hw_storage(sbuf)) {
242 boolean retry;
243
244 map = svga_buffer_hw_storage_map(svga, sbuf, transfer->usage, &retry);
245 if (map == NULL && retry) {
246 /*
247 * At this point, svga_buffer_get_transfer() has already
248 * hit the DISCARD_WHOLE_RESOURCE path and flushed HWTNL
249 * for this buffer.
250 */
251 svga_context_flush(svga, NULL);
252 map = svga_buffer_hw_storage_map(svga, sbuf, transfer->usage, &retry);
253 }
254 }
255 else {
256 map = NULL;
257 }
258
259 if (map) {
260 ++sbuf->map.count;
261 map += transfer->box.x;
262 *ptransfer = transfer;
263 } else {
264 FREE(transfer);
265 }
266
267 svga->hud.map_buffer_time += (os_time_get() - begin);
268
269 return map;
270 }
271
272
273 static void
274 svga_buffer_transfer_flush_region( struct pipe_context *pipe,
275 struct pipe_transfer *transfer,
276 const struct pipe_box *box)
277 {
278 struct svga_screen *ss = svga_screen(pipe->screen);
279 struct svga_buffer *sbuf = svga_buffer(transfer->resource);
280
281 unsigned offset = transfer->box.x + box->x;
282 unsigned length = box->width;
283
284 assert(transfer->usage & PIPE_TRANSFER_WRITE);
285 assert(transfer->usage & PIPE_TRANSFER_FLUSH_EXPLICIT);
286
287 pipe_mutex_lock(ss->swc_mutex);
288 svga_buffer_add_range(sbuf, offset, offset + length);
289 pipe_mutex_unlock(ss->swc_mutex);
290 }
291
292
293 static void
294 svga_buffer_transfer_unmap( struct pipe_context *pipe,
295 struct pipe_transfer *transfer )
296 {
297 struct svga_screen *ss = svga_screen(pipe->screen);
298 struct svga_context *svga = svga_context(pipe);
299 struct svga_buffer *sbuf = svga_buffer(transfer->resource);
300
301 pipe_mutex_lock(ss->swc_mutex);
302
303 assert(sbuf->map.count);
304 if (sbuf->map.count) {
305 --sbuf->map.count;
306 }
307
308 if (svga_buffer_has_hw_storage(sbuf)) {
309 svga_buffer_hw_storage_unmap(svga, sbuf);
310 }
311
312 if (transfer->usage & PIPE_TRANSFER_WRITE) {
313 if (!(transfer->usage & PIPE_TRANSFER_FLUSH_EXPLICIT)) {
314 /*
315 * Mapped range not flushed explicitly, so flush the whole buffer,
316 * and tell the host to discard the contents when processing the DMA
317 * command.
318 */
319
320 SVGA_DBG(DEBUG_DMA, "flushing the whole buffer\n");
321
322 sbuf->dma.flags.discard = TRUE;
323
324 svga_buffer_add_range(sbuf, 0, sbuf->b.b.width0);
325 }
326 }
327
328 pipe_mutex_unlock(ss->swc_mutex);
329 FREE(transfer);
330 }
331
332
333 static void
334 svga_buffer_destroy( struct pipe_screen *screen,
335 struct pipe_resource *buf )
336 {
337 struct svga_screen *ss = svga_screen(screen);
338 struct svga_buffer *sbuf = svga_buffer( buf );
339
340 assert(!p_atomic_read(&buf->reference.count));
341
342 assert(!sbuf->dma.pending);
343
344 if (sbuf->handle)
345 svga_buffer_destroy_host_surface(ss, sbuf);
346
347 if (sbuf->uploaded.buffer)
348 pipe_resource_reference(&sbuf->uploaded.buffer, NULL);
349
350 if (sbuf->hwbuf)
351 svga_buffer_destroy_hw_storage(ss, sbuf);
352
353 if (sbuf->swbuf && !sbuf->user)
354 align_free(sbuf->swbuf);
355
356 ss->hud.total_resource_bytes -= sbuf->size;
357 assert(ss->hud.num_resources > 0);
358 if (ss->hud.num_resources > 0)
359 ss->hud.num_resources--;
360
361 FREE(sbuf);
362 }
363
364
365 struct u_resource_vtbl svga_buffer_vtbl =
366 {
367 u_default_resource_get_handle, /* get_handle */
368 svga_buffer_destroy, /* resource_destroy */
369 svga_buffer_transfer_map, /* transfer_map */
370 svga_buffer_transfer_flush_region, /* transfer_flush_region */
371 svga_buffer_transfer_unmap, /* transfer_unmap */
372 u_default_transfer_inline_write /* transfer_inline_write */
373 };
374
375
376
377 struct pipe_resource *
378 svga_buffer_create(struct pipe_screen *screen,
379 const struct pipe_resource *template)
380 {
381 struct svga_screen *ss = svga_screen(screen);
382 struct svga_buffer *sbuf;
383
384 sbuf = CALLOC_STRUCT(svga_buffer);
385 if (!sbuf)
386 goto error1;
387
388 sbuf->b.b = *template;
389 sbuf->b.vtbl = &svga_buffer_vtbl;
390 pipe_reference_init(&sbuf->b.b.reference, 1);
391 sbuf->b.b.screen = screen;
392 sbuf->bind_flags = template->bind;
393
394 if (template->bind & PIPE_BIND_CONSTANT_BUFFER) {
395 /* Constant buffers can only have the PIPE_BIND_CONSTANT_BUFFER
396 * flag set.
397 */
398 if (ss->sws->have_vgpu10) {
399 sbuf->bind_flags = PIPE_BIND_CONSTANT_BUFFER;
400
401 /* Constant buffer size needs to be in multiples of 16. */
402 sbuf->b.b.width0 = align(sbuf->b.b.width0, 16);
403 }
404 }
405
406 if (svga_buffer_needs_hw_storage(template->bind)) {
407
408 /* If the buffer will be used for vertex/index/stream data, set all
409 * the flags so that the buffer will be accepted for all those uses.
410 * Note that the PIPE_BIND_ flags we get from the state tracker are
411 * just a hint about how the buffer may be used. And OpenGL buffer
412 * object may be used for many different things.
413 */
414 if (!(template->bind & PIPE_BIND_CONSTANT_BUFFER)) {
415 /* Not a constant buffer. The buffer may be used for vertex data,
416 * indexes or stream-out.
417 */
418 sbuf->bind_flags |= (PIPE_BIND_VERTEX_BUFFER |
419 PIPE_BIND_INDEX_BUFFER);
420 if (ss->sws->have_vgpu10)
421 sbuf->bind_flags |= PIPE_BIND_STREAM_OUTPUT;
422 }
423
424 if (svga_buffer_create_host_surface(ss, sbuf) != PIPE_OK)
425 goto error2;
426 }
427 else {
428 sbuf->swbuf = align_malloc(sbuf->b.b.width0, 64);
429 if (!sbuf->swbuf)
430 goto error2;
431 }
432
433 debug_reference(&sbuf->b.b.reference,
434 (debug_reference_descriptor)debug_describe_resource, 0);
435
436 sbuf->size = util_resource_size(&sbuf->b.b);
437 ss->hud.total_resource_bytes += sbuf->size;
438
439 ss->hud.num_resources++;
440
441 return &sbuf->b.b;
442
443 error2:
444 FREE(sbuf);
445 error1:
446 return NULL;
447 }
448
449
450 struct pipe_resource *
451 svga_user_buffer_create(struct pipe_screen *screen,
452 void *ptr,
453 unsigned bytes,
454 unsigned bind)
455 {
456 struct svga_buffer *sbuf;
457 struct svga_screen *ss = svga_screen(screen);
458
459 sbuf = CALLOC_STRUCT(svga_buffer);
460 if (!sbuf)
461 goto no_sbuf;
462
463 pipe_reference_init(&sbuf->b.b.reference, 1);
464 sbuf->b.vtbl = &svga_buffer_vtbl;
465 sbuf->b.b.screen = screen;
466 sbuf->b.b.format = PIPE_FORMAT_R8_UNORM; /* ?? */
467 sbuf->b.b.usage = PIPE_USAGE_IMMUTABLE;
468 sbuf->b.b.bind = bind;
469 sbuf->b.b.width0 = bytes;
470 sbuf->b.b.height0 = 1;
471 sbuf->b.b.depth0 = 1;
472 sbuf->b.b.array_size = 1;
473
474 sbuf->bind_flags = bind;
475 sbuf->swbuf = ptr;
476 sbuf->user = TRUE;
477
478 debug_reference(&sbuf->b.b.reference,
479 (debug_reference_descriptor)debug_describe_resource, 0);
480
481 ss->hud.num_resources++;
482
483 return &sbuf->b.b;
484
485 no_sbuf:
486 return NULL;
487 }
488
489
490