1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
24 **********************************************************/
28 #include "pipe/p_state.h"
29 #include "pipe/p_defines.h"
30 #include "util/u_inlines.h"
31 #include "os/os_thread.h"
32 #include "os/os_time.h"
33 #include "util/u_math.h"
34 #include "util/u_memory.h"
35 #include "util/u_resource.h"
37 #include "svga_context.h"
38 #include "svga_screen.h"
39 #include "svga_resource_buffer.h"
40 #include "svga_resource_buffer_upload.h"
41 #include "svga_winsys.h"
42 #include "svga_debug.h"
46 * Vertex and index buffers need hardware backing. Constant buffers
47 * do not. No other types of buffers currently supported.
50 svga_buffer_needs_hw_storage(unsigned usage
)
52 return (usage
& (PIPE_BIND_VERTEX_BUFFER
| PIPE_BIND_INDEX_BUFFER
|
53 PIPE_BIND_SAMPLER_VIEW
| PIPE_BIND_STREAM_OUTPUT
)) != 0;
58 * Create a buffer transfer.
60 * Unlike texture DMAs (which are written immediately to the command buffer and
61 * therefore inherently serialized with other context operations), for buffers
62 * we try to coalesce multiple range mappings (i.e, multiple calls to this
63 * function) into a single DMA command, for better efficiency in command
64 * processing. This means we need to exercise extra care here to ensure that
65 * the end result is exactly the same as if one DMA was used for every mapped
69 svga_buffer_transfer_map(struct pipe_context
*pipe
,
70 struct pipe_resource
*resource
,
73 const struct pipe_box
*box
,
74 struct pipe_transfer
**ptransfer
)
76 struct svga_context
*svga
= svga_context(pipe
);
77 struct svga_screen
*ss
= svga_screen(pipe
->screen
);
78 struct svga_buffer
*sbuf
= svga_buffer(resource
);
79 struct pipe_transfer
*transfer
;
81 int64_t begin
= os_time_get();
85 assert(box
->height
== 1);
86 assert(box
->depth
== 1);
88 transfer
= CALLOC_STRUCT(pipe_transfer
);
93 transfer
->resource
= resource
;
94 transfer
->level
= level
;
95 transfer
->usage
= usage
;
98 if ((usage
& PIPE_TRANSFER_READ
) && sbuf
->dirty
) {
101 /* Host-side buffers can only be dirtied with vgpu10 features
102 * (streamout and buffer copy).
104 assert(svga_have_vgpu10(svga
));
107 (void) svga_buffer_handle(svga
, resource
);
110 if (sbuf
->dma
.pending
> 0) {
111 svga_buffer_upload_flush(svga
, sbuf
);
112 svga_context_finish(svga
);
115 assert(sbuf
->handle
);
117 ret
= SVGA3D_vgpu10_ReadbackSubResource(svga
->swc
, sbuf
->handle
, 0);
118 if (ret
!= PIPE_OK
) {
119 svga_context_flush(svga
, NULL
);
120 ret
= SVGA3D_vgpu10_ReadbackSubResource(svga
->swc
, sbuf
->handle
, 0);
121 assert(ret
== PIPE_OK
);
124 svga
->hud
.num_readbacks
++;
126 svga_context_finish(svga
);
131 if (usage
& PIPE_TRANSFER_WRITE
) {
132 if (usage
& PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE
) {
134 * Flush any pending primitives, finish writing any pending DMA
135 * commands, and tell the host to discard the buffer contents on
136 * the next DMA operation.
139 svga_hwtnl_flush_buffer(svga
, resource
);
141 if (sbuf
->dma
.pending
) {
142 svga_buffer_upload_flush(svga
, sbuf
);
145 * Instead of flushing the context command buffer, simply discard
146 * the current hwbuf, and start a new one.
147 * With GB objects, the map operation takes care of this
148 * if passed the PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE flag,
149 * and the old backing store is busy.
152 if (!svga_have_gb_objects(svga
))
153 svga_buffer_destroy_hw_storage(ss
, sbuf
);
156 sbuf
->map
.num_ranges
= 0;
157 sbuf
->dma
.flags
.discard
= TRUE
;
160 if (usage
& PIPE_TRANSFER_UNSYNCHRONIZED
) {
161 if (!sbuf
->map
.num_ranges
) {
163 * No pending ranges to upload so far, so we can tell the host to
164 * not synchronize on the next DMA command.
167 sbuf
->dma
.flags
.unsynchronized
= TRUE
;
171 * Synchronizing, so flush any pending primitives, finish writing any
172 * pending DMA command, and ensure the next DMA will be done in order.
175 svga_hwtnl_flush_buffer(svga
, resource
);
177 if (sbuf
->dma
.pending
) {
178 svga_buffer_upload_flush(svga
, sbuf
);
180 if (svga_buffer_has_hw_storage(sbuf
)) {
182 * We have a pending DMA upload from a hardware buffer, therefore
183 * we need to ensure that the host finishes processing that DMA
184 * command before the state tracker can start overwriting the
187 * XXX: This could be avoided by tying the hardware buffer to
188 * the transfer (just as done with textures), which would allow
189 * overlapping DMAs commands to be queued on the same context
190 * buffer. However, due to the likelihood of software vertex
191 * processing, it is more convenient to hold on to the hardware
192 * buffer, allowing to quickly access the contents from the CPU
193 * without having to do a DMA download from the host.
196 if (usage
& PIPE_TRANSFER_DONTBLOCK
) {
198 * Flushing the command buffer here will most likely cause
199 * the map of the hwbuf below to block, so preemptively
200 * return NULL here if DONTBLOCK is set to prevent unnecessary
201 * command buffer flushes.
208 svga_context_flush(svga
, NULL
);
212 sbuf
->dma
.flags
.unsynchronized
= FALSE
;
216 if (!sbuf
->swbuf
&& !svga_buffer_has_hw_storage(sbuf
)) {
217 if (svga_buffer_create_hw_storage(ss
, sbuf
) != PIPE_OK
) {
219 * We can't create a hardware buffer big enough, so create a malloc
223 debug_printf("%s: failed to allocate %u KB of DMA, "
224 "splitting DMA transfers\n",
226 (sbuf
->b
.b
.width0
+ 1023)/1024);
229 sbuf
->swbuf
= align_malloc(sbuf
->b
.b
.width0
, 16);
238 /* User/malloc buffer */
241 else if (svga_buffer_has_hw_storage(sbuf
)) {
244 map
= svga_buffer_hw_storage_map(svga
, sbuf
, transfer
->usage
, &retry
);
245 if (map
== NULL
&& retry
) {
247 * At this point, svga_buffer_get_transfer() has already
248 * hit the DISCARD_WHOLE_RESOURCE path and flushed HWTNL
251 svga_context_flush(svga
, NULL
);
252 map
= svga_buffer_hw_storage_map(svga
, sbuf
, transfer
->usage
, &retry
);
261 map
+= transfer
->box
.x
;
262 *ptransfer
= transfer
;
267 svga
->hud
.map_buffer_time
+= (os_time_get() - begin
);
274 svga_buffer_transfer_flush_region( struct pipe_context
*pipe
,
275 struct pipe_transfer
*transfer
,
276 const struct pipe_box
*box
)
278 struct svga_screen
*ss
= svga_screen(pipe
->screen
);
279 struct svga_buffer
*sbuf
= svga_buffer(transfer
->resource
);
281 unsigned offset
= transfer
->box
.x
+ box
->x
;
282 unsigned length
= box
->width
;
284 assert(transfer
->usage
& PIPE_TRANSFER_WRITE
);
285 assert(transfer
->usage
& PIPE_TRANSFER_FLUSH_EXPLICIT
);
287 pipe_mutex_lock(ss
->swc_mutex
);
288 svga_buffer_add_range(sbuf
, offset
, offset
+ length
);
289 pipe_mutex_unlock(ss
->swc_mutex
);
294 svga_buffer_transfer_unmap( struct pipe_context
*pipe
,
295 struct pipe_transfer
*transfer
)
297 struct svga_screen
*ss
= svga_screen(pipe
->screen
);
298 struct svga_context
*svga
= svga_context(pipe
);
299 struct svga_buffer
*sbuf
= svga_buffer(transfer
->resource
);
301 pipe_mutex_lock(ss
->swc_mutex
);
303 assert(sbuf
->map
.count
);
304 if (sbuf
->map
.count
) {
308 if (svga_buffer_has_hw_storage(sbuf
)) {
309 svga_buffer_hw_storage_unmap(svga
, sbuf
);
312 if (transfer
->usage
& PIPE_TRANSFER_WRITE
) {
313 if (!(transfer
->usage
& PIPE_TRANSFER_FLUSH_EXPLICIT
)) {
315 * Mapped range not flushed explicitly, so flush the whole buffer,
316 * and tell the host to discard the contents when processing the DMA
320 SVGA_DBG(DEBUG_DMA
, "flushing the whole buffer\n");
322 sbuf
->dma
.flags
.discard
= TRUE
;
324 svga_buffer_add_range(sbuf
, 0, sbuf
->b
.b
.width0
);
328 pipe_mutex_unlock(ss
->swc_mutex
);
334 svga_buffer_destroy( struct pipe_screen
*screen
,
335 struct pipe_resource
*buf
)
337 struct svga_screen
*ss
= svga_screen(screen
);
338 struct svga_buffer
*sbuf
= svga_buffer( buf
);
340 assert(!p_atomic_read(&buf
->reference
.count
));
342 assert(!sbuf
->dma
.pending
);
345 svga_buffer_destroy_host_surface(ss
, sbuf
);
347 if (sbuf
->uploaded
.buffer
)
348 pipe_resource_reference(&sbuf
->uploaded
.buffer
, NULL
);
351 svga_buffer_destroy_hw_storage(ss
, sbuf
);
353 if (sbuf
->swbuf
&& !sbuf
->user
)
354 align_free(sbuf
->swbuf
);
356 ss
->hud
.total_resource_bytes
-= sbuf
->size
;
357 assert(ss
->hud
.num_resources
> 0);
358 if (ss
->hud
.num_resources
> 0)
359 ss
->hud
.num_resources
--;
365 struct u_resource_vtbl svga_buffer_vtbl
=
367 u_default_resource_get_handle
, /* get_handle */
368 svga_buffer_destroy
, /* resource_destroy */
369 svga_buffer_transfer_map
, /* transfer_map */
370 svga_buffer_transfer_flush_region
, /* transfer_flush_region */
371 svga_buffer_transfer_unmap
, /* transfer_unmap */
372 u_default_transfer_inline_write
/* transfer_inline_write */
377 struct pipe_resource
*
378 svga_buffer_create(struct pipe_screen
*screen
,
379 const struct pipe_resource
*template)
381 struct svga_screen
*ss
= svga_screen(screen
);
382 struct svga_buffer
*sbuf
;
384 sbuf
= CALLOC_STRUCT(svga_buffer
);
388 sbuf
->b
.b
= *template;
389 sbuf
->b
.vtbl
= &svga_buffer_vtbl
;
390 pipe_reference_init(&sbuf
->b
.b
.reference
, 1);
391 sbuf
->b
.b
.screen
= screen
;
392 sbuf
->bind_flags
= template->bind
;
394 if (template->bind
& PIPE_BIND_CONSTANT_BUFFER
) {
395 /* Constant buffers can only have the PIPE_BIND_CONSTANT_BUFFER
398 if (ss
->sws
->have_vgpu10
) {
399 sbuf
->bind_flags
= PIPE_BIND_CONSTANT_BUFFER
;
401 /* Constant buffer size needs to be in multiples of 16. */
402 sbuf
->b
.b
.width0
= align(sbuf
->b
.b
.width0
, 16);
406 if (svga_buffer_needs_hw_storage(template->bind
)) {
408 /* If the buffer will be used for vertex/index/stream data, set all
409 * the flags so that the buffer will be accepted for all those uses.
410 * Note that the PIPE_BIND_ flags we get from the state tracker are
411 * just a hint about how the buffer may be used. And OpenGL buffer
412 * object may be used for many different things.
414 if (!(template->bind
& PIPE_BIND_CONSTANT_BUFFER
)) {
415 /* Not a constant buffer. The buffer may be used for vertex data,
416 * indexes or stream-out.
418 sbuf
->bind_flags
|= (PIPE_BIND_VERTEX_BUFFER
|
419 PIPE_BIND_INDEX_BUFFER
);
420 if (ss
->sws
->have_vgpu10
)
421 sbuf
->bind_flags
|= PIPE_BIND_STREAM_OUTPUT
;
424 if (svga_buffer_create_host_surface(ss
, sbuf
) != PIPE_OK
)
428 sbuf
->swbuf
= align_malloc(sbuf
->b
.b
.width0
, 64);
433 debug_reference(&sbuf
->b
.b
.reference
,
434 (debug_reference_descriptor
)debug_describe_resource
, 0);
436 sbuf
->size
= util_resource_size(&sbuf
->b
.b
);
437 ss
->hud
.total_resource_bytes
+= sbuf
->size
;
439 ss
->hud
.num_resources
++;
450 struct pipe_resource
*
451 svga_user_buffer_create(struct pipe_screen
*screen
,
456 struct svga_buffer
*sbuf
;
457 struct svga_screen
*ss
= svga_screen(screen
);
459 sbuf
= CALLOC_STRUCT(svga_buffer
);
463 pipe_reference_init(&sbuf
->b
.b
.reference
, 1);
464 sbuf
->b
.vtbl
= &svga_buffer_vtbl
;
465 sbuf
->b
.b
.screen
= screen
;
466 sbuf
->b
.b
.format
= PIPE_FORMAT_R8_UNORM
; /* ?? */
467 sbuf
->b
.b
.usage
= PIPE_USAGE_IMMUTABLE
;
468 sbuf
->b
.b
.bind
= bind
;
469 sbuf
->b
.b
.width0
= bytes
;
470 sbuf
->b
.b
.height0
= 1;
471 sbuf
->b
.b
.depth0
= 1;
472 sbuf
->b
.b
.array_size
= 1;
474 sbuf
->bind_flags
= bind
;
478 debug_reference(&sbuf
->b
.b
.reference
,
479 (debug_reference_descriptor
)debug_describe_resource
, 0);
481 ss
->hud
.num_resources
++;