1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
24 **********************************************************/
27 #include "os/os_thread.h"
28 #include "pipe/p_state.h"
29 #include "pipe/p_defines.h"
30 #include "util/u_inlines.h"
31 #include "util/u_math.h"
32 #include "util/u_memory.h"
35 #include "svga_context.h"
36 #include "svga_debug.h"
37 #include "svga_resource_buffer.h"
38 #include "svga_resource_buffer_upload.h"
39 #include "svga_screen.h"
40 #include "svga_winsys.h"
43 * Describes a complete SVGA_3D_CMD_UPDATE_GB_IMAGE command
46 struct svga_3d_update_gb_image
{
47 SVGA3dCmdHeader header
;
48 SVGA3dCmdUpdateGBImage body
;
51 struct svga_3d_invalidate_gb_image
{
52 SVGA3dCmdHeader header
;
53 SVGA3dCmdInvalidateGBImage body
;
58 * Allocate a winsys_buffer (ie. DMA, aka GMR memory).
60 * It will flush and retry in case the first attempt to create a DMA buffer
61 * fails, so it should not be called from any function involved in flushing
64 struct svga_winsys_buffer
*
65 svga_winsys_buffer_create( struct svga_context
*svga
,
70 struct svga_screen
*svgascreen
= svga_screen(svga
->pipe
.screen
);
71 struct svga_winsys_screen
*sws
= svgascreen
->sws
;
72 struct svga_winsys_buffer
*buf
;
75 buf
= sws
->buffer_create(sws
, alignment
, usage
, size
);
77 SVGA_DBG(DEBUG_DMA
|DEBUG_PERF
, "flushing context to find %d bytes GMR\n",
80 /* Try flushing all pending DMAs */
81 svga_context_flush(svga
, NULL
);
82 buf
= sws
->buffer_create(sws
, alignment
, usage
, size
);
90 * Destroy HW storage if separate from the host surface.
91 * In the GB case, the HW storage is associated with the host surface
92 * and is therefore a No-op.
95 svga_buffer_destroy_hw_storage(struct svga_screen
*ss
, struct svga_buffer
*sbuf
)
97 struct svga_winsys_screen
*sws
= ss
->sws
;
99 assert(sbuf
->map
.count
== 0);
102 sws
->buffer_destroy(sws
, sbuf
->hwbuf
);
110 * Allocate DMA'ble or Updatable storage for the buffer.
112 * Called before mapping a buffer.
115 svga_buffer_create_hw_storage(struct svga_screen
*ss
,
116 struct svga_buffer
*sbuf
,
121 if (ss
->sws
->have_gb_objects
) {
122 assert(sbuf
->handle
|| !sbuf
->dma
.pending
);
123 return svga_buffer_create_host_surface(ss
, sbuf
, bind_flags
);
126 struct svga_winsys_screen
*sws
= ss
->sws
;
127 unsigned alignment
= 16;
129 unsigned size
= sbuf
->b
.b
.width0
;
131 sbuf
->hwbuf
= sws
->buffer_create(sws
, alignment
, usage
, size
);
133 return PIPE_ERROR_OUT_OF_MEMORY
;
135 assert(!sbuf
->dma
.pending
);
143 * Allocate graphics memory for vertex/index/constant/etc buffer (not
147 svga_buffer_create_host_surface(struct svga_screen
*ss
,
148 struct svga_buffer
*sbuf
,
151 enum pipe_error ret
= PIPE_OK
;
160 sbuf
->key
.format
= SVGA3D_BUFFER
;
161 if (bind_flags
& PIPE_BIND_VERTEX_BUFFER
) {
162 sbuf
->key
.flags
|= SVGA3D_SURFACE_HINT_VERTEXBUFFER
;
163 sbuf
->key
.flags
|= SVGA3D_SURFACE_BIND_VERTEX_BUFFER
;
165 if (bind_flags
& PIPE_BIND_INDEX_BUFFER
) {
166 sbuf
->key
.flags
|= SVGA3D_SURFACE_HINT_INDEXBUFFER
;
167 sbuf
->key
.flags
|= SVGA3D_SURFACE_BIND_INDEX_BUFFER
;
169 if (bind_flags
& PIPE_BIND_CONSTANT_BUFFER
)
170 sbuf
->key
.flags
|= SVGA3D_SURFACE_BIND_CONSTANT_BUFFER
;
172 if (bind_flags
& PIPE_BIND_STREAM_OUTPUT
)
173 sbuf
->key
.flags
|= SVGA3D_SURFACE_BIND_STREAM_OUTPUT
;
175 if (bind_flags
& PIPE_BIND_SAMPLER_VIEW
)
176 sbuf
->key
.flags
|= SVGA3D_SURFACE_BIND_SHADER_RESOURCE
;
178 if (!bind_flags
&& sbuf
->b
.b
.usage
== PIPE_USAGE_STAGING
) {
179 /* This surface is to be used with the
180 * SVGA3D_CMD_DX_TRANSFER_FROM_BUFFER command, and no other
181 * bind flags are allowed to be set for this surface.
183 sbuf
->key
.flags
= SVGA3D_SURFACE_TRANSFER_FROM_BUFFER
;
186 sbuf
->key
.size
.width
= sbuf
->b
.b
.width0
;
187 sbuf
->key
.size
.height
= 1;
188 sbuf
->key
.size
.depth
= 1;
190 sbuf
->key
.numFaces
= 1;
191 sbuf
->key
.numMipLevels
= 1;
192 sbuf
->key
.cachable
= 1;
193 sbuf
->key
.arraySize
= 1;
194 sbuf
->key
.sampleCount
= 0;
196 SVGA_DBG(DEBUG_DMA
, "surface_create for buffer sz %d\n",
199 sbuf
->handle
= svga_screen_surface_create(ss
, bind_flags
,
201 &validated
, &sbuf
->key
);
203 return PIPE_ERROR_OUT_OF_MEMORY
;
205 /* Always set the discard flag on the first time the buffer is written
206 * as svga_screen_surface_create might have passed a recycled host
209 sbuf
->dma
.flags
.discard
= TRUE
;
211 SVGA_DBG(DEBUG_DMA
, " --> got sid %p sz %d (buffer)\n",
212 sbuf
->handle
, sbuf
->b
.b
.width0
);
214 /* Add the new surface to the buffer surface list */
215 ret
= svga_buffer_add_host_surface(sbuf
, sbuf
->handle
, &sbuf
->key
,
224 * Recreates a host surface with the new bind flags.
227 svga_buffer_recreate_host_surface(struct svga_context
*svga
,
228 struct svga_buffer
*sbuf
,
231 enum pipe_error ret
= PIPE_OK
;
232 struct svga_winsys_surface
*old_handle
= sbuf
->handle
;
234 assert(sbuf
->bind_flags
!= bind_flags
);
239 /* Create a new resource with the requested bind_flags */
240 ret
= svga_buffer_create_host_surface(svga_screen(svga
->pipe
.screen
),
242 if (ret
== PIPE_OK
) {
243 /* Copy the surface data */
244 assert(sbuf
->handle
);
245 ret
= SVGA3D_vgpu10_BufferCopy(svga
->swc
, old_handle
, sbuf
->handle
,
246 0, 0, sbuf
->b
.b
.width0
);
247 if (ret
!= PIPE_OK
) {
248 svga_context_flush(svga
, NULL
);
249 ret
= SVGA3D_vgpu10_BufferCopy(svga
->swc
, old_handle
, sbuf
->handle
,
250 0, 0, sbuf
->b
.b
.width0
);
251 assert(ret
== PIPE_OK
);
255 /* Set the new bind flags for this buffer resource */
256 sbuf
->bind_flags
= bind_flags
;
263 * Returns TRUE if the surface bind flags is compatible with the new bind flags.
266 compatible_bind_flags(unsigned bind_flags
,
267 unsigned tobind_flags
)
269 if ((bind_flags
& tobind_flags
) == tobind_flags
)
271 else if ((bind_flags
|tobind_flags
) & PIPE_BIND_CONSTANT_BUFFER
)
279 * Returns a buffer surface from the surface list
280 * that has the requested bind flags or its existing bind flags
281 * can be promoted to include the new bind flags.
283 static struct svga_buffer_surface
*
284 svga_buffer_get_host_surface(struct svga_buffer
*sbuf
,
287 struct svga_buffer_surface
*bufsurf
;
289 LIST_FOR_EACH_ENTRY(bufsurf
, &sbuf
->surfaces
, list
) {
290 if (compatible_bind_flags(bufsurf
->bind_flags
, bind_flags
))
298 * Adds the host surface to the buffer surface list.
301 svga_buffer_add_host_surface(struct svga_buffer
*sbuf
,
302 struct svga_winsys_surface
*handle
,
303 struct svga_host_surface_cache_key
*key
,
306 struct svga_buffer_surface
*bufsurf
;
308 bufsurf
= CALLOC_STRUCT(svga_buffer_surface
);
310 return PIPE_ERROR_OUT_OF_MEMORY
;
312 bufsurf
->bind_flags
= bind_flags
;
313 bufsurf
->handle
= handle
;
316 /* add the surface to the surface list */
317 LIST_ADD(&bufsurf
->list
, &sbuf
->surfaces
);
319 /* Set the new bind flags for this buffer resource */
320 sbuf
->bind_flags
= bind_flags
;
327 * Start using the specified surface for this buffer resource.
330 svga_buffer_bind_host_surface(struct svga_context
*svga
,
331 struct svga_buffer
*sbuf
,
332 struct svga_buffer_surface
*bufsurf
)
336 /* Update the to-bind surface */
337 assert(bufsurf
->handle
);
338 assert(sbuf
->handle
);
340 /* If we are switching from stream output to other buffer,
341 * make sure to copy the buffer content.
343 if (sbuf
->bind_flags
& PIPE_BIND_STREAM_OUTPUT
) {
344 ret
= SVGA3D_vgpu10_BufferCopy(svga
->swc
, sbuf
->handle
, bufsurf
->handle
,
345 0, 0, sbuf
->b
.b
.width0
);
346 if (ret
!= PIPE_OK
) {
347 svga_context_flush(svga
, NULL
);
348 ret
= SVGA3D_vgpu10_BufferCopy(svga
->swc
, sbuf
->handle
, bufsurf
->handle
,
349 0, 0, sbuf
->b
.b
.width0
);
350 assert(ret
== PIPE_OK
);
354 /* Set this surface as the current one */
355 sbuf
->handle
= bufsurf
->handle
;
356 sbuf
->key
= bufsurf
->key
;
357 sbuf
->bind_flags
= bufsurf
->bind_flags
;
362 * Prepare a host surface that can be used as indicated in the
363 * tobind_flags. If the existing host surface is not created
364 * with the necessary binding flags and if the new bind flags can be
365 * combined with the existing bind flags, then we will recreate a
366 * new surface with the combined bind flags. Otherwise, we will create
367 * a surface for that incompatible bind flags.
368 * For example, if a stream output buffer is reused as a constant buffer,
369 * since constant buffer surface cannot be bound as a stream output surface,
370 * two surfaces will be created, one for stream output,
371 * and another one for constant buffer.
374 svga_buffer_validate_host_surface(struct svga_context
*svga
,
375 struct svga_buffer
*sbuf
,
376 unsigned tobind_flags
)
378 struct svga_buffer_surface
*bufsurf
;
379 enum pipe_error ret
= PIPE_OK
;
381 /* Flush any pending upload first */
382 svga_buffer_upload_flush(svga
, sbuf
);
384 /* First check from the cached buffer surface list to see if there is
385 * already a buffer surface that has the requested bind flags, or
386 * surface with compatible bind flags that can be promoted.
388 bufsurf
= svga_buffer_get_host_surface(sbuf
, tobind_flags
);
391 if ((bufsurf
->bind_flags
& tobind_flags
) == tobind_flags
) {
392 /* there is a surface with the requested bind flags */
393 svga_buffer_bind_host_surface(svga
, sbuf
, bufsurf
);
396 /* Recreate a host surface with the combined bind flags */
397 ret
= svga_buffer_recreate_host_surface(svga
, sbuf
,
398 bufsurf
->bind_flags
|
401 /* Destroy the old surface */
402 svga_screen_surface_destroy(svga_screen(sbuf
->b
.b
.screen
),
403 &bufsurf
->key
, &bufsurf
->handle
);
405 LIST_DEL(&bufsurf
->list
);
409 /* Need to create a new surface if the bind flags are incompatible,
410 * such as constant buffer surface & stream output surface.
412 ret
= svga_buffer_recreate_host_surface(svga
, sbuf
,
420 svga_buffer_destroy_host_surface(struct svga_screen
*ss
,
421 struct svga_buffer
*sbuf
)
423 struct svga_buffer_surface
*bufsurf
, *next
;
425 LIST_FOR_EACH_ENTRY_SAFE(bufsurf
, next
, &sbuf
->surfaces
, list
) {
426 SVGA_DBG(DEBUG_DMA
, " ungrab sid %p sz %d\n",
427 bufsurf
->handle
, sbuf
->b
.b
.width0
);
428 svga_screen_surface_destroy(ss
, &bufsurf
->key
, &bufsurf
->handle
);
435 * Insert a number of preliminary UPDATE_GB_IMAGE commands in the
436 * command buffer, equal to the current number of mapped ranges.
437 * The UPDATE_GB_IMAGE commands will be patched with the
438 * actual ranges just before flush.
440 static enum pipe_error
441 svga_buffer_upload_gb_command(struct svga_context
*svga
,
442 struct svga_buffer
*sbuf
)
444 struct svga_winsys_context
*swc
= svga
->swc
;
445 SVGA3dCmdUpdateGBImage
*update_cmd
;
446 struct svga_3d_update_gb_image
*whole_update_cmd
= NULL
;
447 const uint32 numBoxes
= sbuf
->map
.num_ranges
;
448 struct pipe_resource
*dummy
;
451 assert(svga_have_gb_objects(svga
));
453 assert(sbuf
->dma
.updates
== NULL
);
455 if (sbuf
->dma
.flags
.discard
) {
456 struct svga_3d_invalidate_gb_image
*cicmd
= NULL
;
457 SVGA3dCmdInvalidateGBImage
*invalidate_cmd
;
458 const unsigned total_commands_size
=
459 sizeof(*invalidate_cmd
) + numBoxes
* sizeof(*whole_update_cmd
);
461 /* Allocate FIFO space for one INVALIDATE_GB_IMAGE command followed by
462 * 'numBoxes' UPDATE_GB_IMAGE commands. Allocate all at once rather
463 * than with separate commands because we need to properly deal with
464 * filling the command buffer.
466 invalidate_cmd
= SVGA3D_FIFOReserve(swc
,
467 SVGA_3D_CMD_INVALIDATE_GB_IMAGE
,
468 total_commands_size
, 1 + numBoxes
);
470 return PIPE_ERROR_OUT_OF_MEMORY
;
472 cicmd
= container_of(invalidate_cmd
, cicmd
, body
);
473 cicmd
->header
.size
= sizeof(*invalidate_cmd
);
474 swc
->surface_relocation(swc
, &invalidate_cmd
->image
.sid
, NULL
,
477 SVGA_RELOC_INTERNAL
|
479 invalidate_cmd
->image
.face
= 0;
480 invalidate_cmd
->image
.mipmap
= 0;
482 /* The whole_update_command is a SVGA3dCmdHeader plus the
483 * SVGA3dCmdUpdateGBImage command.
485 whole_update_cmd
= (struct svga_3d_update_gb_image
*) &invalidate_cmd
[1];
486 /* initialize the first UPDATE_GB_IMAGE command */
487 whole_update_cmd
->header
.id
= SVGA_3D_CMD_UPDATE_GB_IMAGE
;
488 update_cmd
= &whole_update_cmd
->body
;
491 /* Allocate FIFO space for 'numBoxes' UPDATE_GB_IMAGE commands */
492 const unsigned total_commands_size
=
493 sizeof(*update_cmd
) + (numBoxes
- 1) * sizeof(*whole_update_cmd
);
495 update_cmd
= SVGA3D_FIFOReserve(swc
,
496 SVGA_3D_CMD_UPDATE_GB_IMAGE
,
497 total_commands_size
, numBoxes
);
499 return PIPE_ERROR_OUT_OF_MEMORY
;
501 /* The whole_update_command is a SVGA3dCmdHeader plus the
502 * SVGA3dCmdUpdateGBImage command.
504 whole_update_cmd
= container_of(update_cmd
, whole_update_cmd
, body
);
507 /* Init the first UPDATE_GB_IMAGE command */
508 whole_update_cmd
->header
.size
= sizeof(*update_cmd
);
509 swc
->surface_relocation(swc
, &update_cmd
->image
.sid
, NULL
, sbuf
->handle
,
510 SVGA_RELOC_WRITE
| SVGA_RELOC_INTERNAL
);
511 update_cmd
->image
.face
= 0;
512 update_cmd
->image
.mipmap
= 0;
514 /* Save pointer to the first UPDATE_GB_IMAGE command so that we can
515 * fill in the box info below.
517 sbuf
->dma
.updates
= whole_update_cmd
;
520 * Copy the face, mipmap, etc. info to all subsequent commands.
521 * Also do the surface relocation for each subsequent command.
523 for (i
= 1; i
< numBoxes
; ++i
) {
525 memcpy(whole_update_cmd
, sbuf
->dma
.updates
, sizeof(*whole_update_cmd
));
527 swc
->surface_relocation(swc
, &whole_update_cmd
->body
.image
.sid
, NULL
,
529 SVGA_RELOC_WRITE
| SVGA_RELOC_INTERNAL
);
532 /* Increment reference count */
533 sbuf
->dma
.svga
= svga
;
535 pipe_resource_reference(&dummy
, &sbuf
->b
.b
);
536 SVGA_FIFOCommitAll(swc
);
538 swc
->hints
|= SVGA_HINT_FLAG_CAN_PRE_FLUSH
;
539 sbuf
->dma
.flags
.discard
= FALSE
;
541 svga
->hud
.num_resource_updates
++;
548 * Issue DMA commands to transfer guest memory to the host.
549 * Note that the memory segments (offset, size) will be patched in
550 * later in the svga_buffer_upload_flush() function.
552 static enum pipe_error
553 svga_buffer_upload_hb_command(struct svga_context
*svga
,
554 struct svga_buffer
*sbuf
)
556 struct svga_winsys_context
*swc
= svga
->swc
;
557 struct svga_winsys_buffer
*guest
= sbuf
->hwbuf
;
558 struct svga_winsys_surface
*host
= sbuf
->handle
;
559 const SVGA3dTransferType transfer
= SVGA3D_WRITE_HOST_VRAM
;
560 SVGA3dCmdSurfaceDMA
*cmd
;
561 const uint32 numBoxes
= sbuf
->map
.num_ranges
;
562 SVGA3dCopyBox
*boxes
;
563 SVGA3dCmdSurfaceDMASuffix
*pSuffix
;
564 unsigned region_flags
;
565 unsigned surface_flags
;
566 struct pipe_resource
*dummy
;
568 assert(!svga_have_gb_objects(svga
));
570 if (transfer
== SVGA3D_WRITE_HOST_VRAM
) {
571 region_flags
= SVGA_RELOC_READ
;
572 surface_flags
= SVGA_RELOC_WRITE
;
574 else if (transfer
== SVGA3D_READ_HOST_VRAM
) {
575 region_flags
= SVGA_RELOC_WRITE
;
576 surface_flags
= SVGA_RELOC_READ
;
580 return PIPE_ERROR_BAD_INPUT
;
585 cmd
= SVGA3D_FIFOReserve(swc
,
586 SVGA_3D_CMD_SURFACE_DMA
,
587 sizeof *cmd
+ numBoxes
* sizeof *boxes
+ sizeof *pSuffix
,
590 return PIPE_ERROR_OUT_OF_MEMORY
;
592 swc
->region_relocation(swc
, &cmd
->guest
.ptr
, guest
, 0, region_flags
);
593 cmd
->guest
.pitch
= 0;
595 swc
->surface_relocation(swc
, &cmd
->host
.sid
, NULL
, host
, surface_flags
);
597 cmd
->host
.mipmap
= 0;
599 cmd
->transfer
= transfer
;
601 sbuf
->dma
.boxes
= (SVGA3dCopyBox
*)&cmd
[1];
602 sbuf
->dma
.svga
= svga
;
604 /* Increment reference count */
606 pipe_resource_reference(&dummy
, &sbuf
->b
.b
);
608 pSuffix
= (SVGA3dCmdSurfaceDMASuffix
*)((uint8_t*)cmd
+ sizeof *cmd
+ numBoxes
* sizeof *boxes
);
609 pSuffix
->suffixSize
= sizeof *pSuffix
;
610 pSuffix
->maximumOffset
= sbuf
->b
.b
.width0
;
611 pSuffix
->flags
= sbuf
->dma
.flags
;
613 SVGA_FIFOCommitAll(swc
);
615 swc
->hints
|= SVGA_HINT_FLAG_CAN_PRE_FLUSH
;
616 sbuf
->dma
.flags
.discard
= FALSE
;
618 svga
->hud
.num_buffer_uploads
++;
625 * Issue commands to transfer guest memory to the host.
627 static enum pipe_error
628 svga_buffer_upload_command(struct svga_context
*svga
, struct svga_buffer
*sbuf
)
630 if (svga_have_gb_objects(svga
)) {
631 return svga_buffer_upload_gb_command(svga
, sbuf
);
633 return svga_buffer_upload_hb_command(svga
, sbuf
);
639 * Patch up the upload DMA command reserved by svga_buffer_upload_command
640 * with the final ranges.
643 svga_buffer_upload_flush(struct svga_context
*svga
, struct svga_buffer
*sbuf
)
646 struct pipe_resource
*dummy
;
648 if (!sbuf
->dma
.pending
) {
649 //debug_printf("no dma pending on buffer\n");
653 assert(sbuf
->handle
);
654 assert(sbuf
->map
.num_ranges
);
655 assert(sbuf
->dma
.svga
== svga
);
658 * Patch the DMA/update command with the final copy box.
660 if (svga_have_gb_objects(svga
)) {
661 struct svga_3d_update_gb_image
*update
= sbuf
->dma
.updates
;
664 for (i
= 0; i
< sbuf
->map
.num_ranges
; ++i
, ++update
) {
665 SVGA3dBox
*box
= &update
->body
.box
;
667 SVGA_DBG(DEBUG_DMA
, " bytes %u - %u\n",
668 sbuf
->map
.ranges
[i
].start
, sbuf
->map
.ranges
[i
].end
);
670 box
->x
= sbuf
->map
.ranges
[i
].start
;
673 box
->w
= sbuf
->map
.ranges
[i
].end
- sbuf
->map
.ranges
[i
].start
;
677 assert(box
->x
<= sbuf
->b
.b
.width0
);
678 assert(box
->x
+ box
->w
<= sbuf
->b
.b
.width0
);
680 svga
->hud
.num_bytes_uploaded
+= box
->w
;
681 svga
->hud
.num_buffer_uploads
++;
686 assert(sbuf
->dma
.boxes
);
687 SVGA_DBG(DEBUG_DMA
, "dma to sid %p\n", sbuf
->handle
);
689 for (i
= 0; i
< sbuf
->map
.num_ranges
; ++i
) {
690 SVGA3dCopyBox
*box
= sbuf
->dma
.boxes
+ i
;
692 SVGA_DBG(DEBUG_DMA
, " bytes %u - %u\n",
693 sbuf
->map
.ranges
[i
].start
, sbuf
->map
.ranges
[i
].end
);
695 box
->x
= sbuf
->map
.ranges
[i
].start
;
698 box
->w
= sbuf
->map
.ranges
[i
].end
- sbuf
->map
.ranges
[i
].start
;
701 box
->srcx
= sbuf
->map
.ranges
[i
].start
;
705 assert(box
->x
<= sbuf
->b
.b
.width0
);
706 assert(box
->x
+ box
->w
<= sbuf
->b
.b
.width0
);
708 svga
->hud
.num_bytes_uploaded
+= box
->w
;
709 svga
->hud
.num_buffer_uploads
++;
713 /* Reset sbuf for next use/upload */
715 sbuf
->map
.num_ranges
= 0;
717 assert(sbuf
->head
.prev
&& sbuf
->head
.next
);
718 LIST_DEL(&sbuf
->head
); /* remove from svga->dirty_buffers list */
720 sbuf
->head
.next
= sbuf
->head
.prev
= NULL
;
722 sbuf
->dma
.pending
= FALSE
;
723 sbuf
->dma
.flags
.discard
= FALSE
;
724 sbuf
->dma
.flags
.unsynchronized
= FALSE
;
726 sbuf
->dma
.svga
= NULL
;
727 sbuf
->dma
.boxes
= NULL
;
728 sbuf
->dma
.updates
= NULL
;
730 /* Decrement reference count (and potentially destroy) */
732 pipe_resource_reference(&dummy
, NULL
);
737 * Note a dirty range.
739 * This function only notes the range down. It doesn't actually emit a DMA
740 * upload command. That only happens when a context tries to refer to this
741 * buffer, and the DMA upload command is added to that context's command
744 * We try to lump as many contiguous DMA transfers together as possible.
747 svga_buffer_add_range(struct svga_buffer
*sbuf
, unsigned start
, unsigned end
)
750 unsigned nearest_range
;
751 unsigned nearest_dist
;
755 if (sbuf
->map
.num_ranges
< SVGA_BUFFER_MAX_RANGES
) {
756 nearest_range
= sbuf
->map
.num_ranges
;
759 nearest_range
= SVGA_BUFFER_MAX_RANGES
- 1;
764 * Try to grow one of the ranges.
766 for (i
= 0; i
< sbuf
->map
.num_ranges
; ++i
) {
767 const int left_dist
= start
- sbuf
->map
.ranges
[i
].end
;
768 const int right_dist
= sbuf
->map
.ranges
[i
].start
- end
;
769 const int dist
= MAX2(left_dist
, right_dist
);
773 * Ranges are contiguous or overlapping -- extend this one and return.
775 * Note that it is not this function's task to prevent overlapping
776 * ranges, as the GMR was already given so it is too late to do
777 * anything. If the ranges overlap here it must surely be because
778 * PIPE_TRANSFER_UNSYNCHRONIZED was set.
780 sbuf
->map
.ranges
[i
].start
= MIN2(sbuf
->map
.ranges
[i
].start
, start
);
781 sbuf
->map
.ranges
[i
].end
= MAX2(sbuf
->map
.ranges
[i
].end
, end
);
786 * Discontiguous ranges -- keep track of the nearest range.
788 if (dist
< nearest_dist
) {
796 * We cannot add a new range to an existing DMA command, so patch-up the
797 * pending DMA upload and start clean.
800 svga_buffer_upload_flush(sbuf
->dma
.svga
, sbuf
);
802 assert(!sbuf
->dma
.pending
);
803 assert(!sbuf
->dma
.svga
);
804 assert(!sbuf
->dma
.boxes
);
806 if (sbuf
->map
.num_ranges
< SVGA_BUFFER_MAX_RANGES
) {
811 sbuf
->map
.ranges
[sbuf
->map
.num_ranges
].start
= start
;
812 sbuf
->map
.ranges
[sbuf
->map
.num_ranges
].end
= end
;
813 ++sbuf
->map
.num_ranges
;
816 * Everything else failed, so just extend the nearest range.
818 * It is OK to do this because we always keep a local copy of the
819 * host buffer data, for SW TNL, and the host never modifies the buffer.
822 assert(nearest_range
< SVGA_BUFFER_MAX_RANGES
);
823 assert(nearest_range
< sbuf
->map
.num_ranges
);
824 sbuf
->map
.ranges
[nearest_range
].start
=
825 MIN2(sbuf
->map
.ranges
[nearest_range
].start
, start
);
826 sbuf
->map
.ranges
[nearest_range
].end
=
827 MAX2(sbuf
->map
.ranges
[nearest_range
].end
, end
);
834 * Copy the contents of the malloc buffer to a hardware buffer.
836 static enum pipe_error
837 svga_buffer_update_hw(struct svga_context
*svga
, struct svga_buffer
*sbuf
,
841 if (!svga_buffer_has_hw_storage(sbuf
)) {
842 struct svga_screen
*ss
= svga_screen(sbuf
->b
.b
.screen
);
852 ret
= svga_buffer_create_hw_storage(svga_screen(sbuf
->b
.b
.screen
), sbuf
,
857 mtx_lock(&ss
->swc_mutex
);
858 map
= svga_buffer_hw_storage_map(svga
, sbuf
, PIPE_TRANSFER_WRITE
, &retry
);
862 mtx_unlock(&ss
->swc_mutex
);
863 svga_buffer_destroy_hw_storage(ss
, sbuf
);
867 /* Copy data from malloc'd swbuf to the new hardware buffer */
868 for (i
= 0; i
< sbuf
->map
.num_ranges
; i
++) {
869 unsigned start
= sbuf
->map
.ranges
[i
].start
;
870 unsigned len
= sbuf
->map
.ranges
[i
].end
- start
;
871 memcpy((uint8_t *) map
+ start
, (uint8_t *) sbuf
->swbuf
+ start
, len
);
874 svga_buffer_hw_storage_unmap(svga
, sbuf
);
876 /* This user/malloc buffer is now indistinguishable from a gpu buffer */
877 assert(sbuf
->map
.count
== 0);
878 if (sbuf
->map
.count
== 0) {
882 align_free(sbuf
->swbuf
);
886 mtx_unlock(&ss
->swc_mutex
);
894 * Upload the buffer to the host in a piecewise fashion.
896 * Used when the buffer is too big to fit in the GMR aperture.
897 * This function should never get called in the guest-backed case
898 * since we always have a full-sized hardware storage backing the
901 static enum pipe_error
902 svga_buffer_upload_piecewise(struct svga_screen
*ss
,
903 struct svga_context
*svga
,
904 struct svga_buffer
*sbuf
)
906 struct svga_winsys_screen
*sws
= ss
->sws
;
907 const unsigned alignment
= sizeof(void *);
908 const unsigned usage
= 0;
911 assert(sbuf
->map
.num_ranges
);
912 assert(!sbuf
->dma
.pending
);
913 assert(!svga_have_gb_objects(svga
));
915 SVGA_DBG(DEBUG_DMA
, "dma to sid %p\n", sbuf
->handle
);
917 for (i
= 0; i
< sbuf
->map
.num_ranges
; ++i
) {
918 const struct svga_buffer_range
*range
= &sbuf
->map
.ranges
[i
];
919 unsigned offset
= range
->start
;
920 unsigned size
= range
->end
- range
->start
;
922 while (offset
< range
->end
) {
923 struct svga_winsys_buffer
*hwbuf
;
927 if (offset
+ size
> range
->end
)
928 size
= range
->end
- offset
;
930 hwbuf
= sws
->buffer_create(sws
, alignment
, usage
, size
);
934 return PIPE_ERROR_OUT_OF_MEMORY
;
935 hwbuf
= sws
->buffer_create(sws
, alignment
, usage
, size
);
938 SVGA_DBG(DEBUG_DMA
, " bytes %u - %u\n",
939 offset
, offset
+ size
);
941 map
= sws
->buffer_map(sws
, hwbuf
,
942 PIPE_TRANSFER_WRITE
|
943 PIPE_TRANSFER_DISCARD_RANGE
);
946 memcpy(map
, (const char *) sbuf
->swbuf
+ offset
, size
);
947 sws
->buffer_unmap(sws
, hwbuf
);
950 ret
= SVGA3D_BufferDMA(svga
->swc
,
952 SVGA3D_WRITE_HOST_VRAM
,
953 size
, 0, offset
, sbuf
->dma
.flags
);
954 if (ret
!= PIPE_OK
) {
955 svga_context_flush(svga
, NULL
);
956 ret
= SVGA3D_BufferDMA(svga
->swc
,
958 SVGA3D_WRITE_HOST_VRAM
,
959 size
, 0, offset
, sbuf
->dma
.flags
);
960 assert(ret
== PIPE_OK
);
963 sbuf
->dma
.flags
.discard
= FALSE
;
965 sws
->buffer_destroy(sws
, hwbuf
);
971 sbuf
->map
.num_ranges
= 0;
978 * Get (or create/upload) the winsys surface handle so that we can
979 * refer to this buffer in fifo commands.
980 * This function will create the host surface, and in the GB case also the
981 * hardware storage. In the non-GB case, the hardware storage will be created
982 * if there are mapped ranges and the data is currently in a malloc'ed buffer.
984 struct svga_winsys_surface
*
985 svga_buffer_handle(struct svga_context
*svga
, struct pipe_resource
*buf
,
986 unsigned tobind_flags
)
988 struct pipe_screen
*screen
= svga
->pipe
.screen
;
989 struct svga_screen
*ss
= svga_screen(screen
);
990 struct svga_buffer
*sbuf
;
996 sbuf
= svga_buffer(buf
);
1001 if ((sbuf
->bind_flags
& tobind_flags
) != tobind_flags
) {
1002 /* If the allocated resource's bind flags do not include the
1003 * requested bind flags, validate the host surface.
1005 ret
= svga_buffer_validate_host_surface(svga
, sbuf
, tobind_flags
);
1010 /* If there is no resource handle yet, then combine the buffer bind
1011 * flags and the tobind_flags if they are compatible.
1012 * If not, just use the tobind_flags for creating the resource handle.
1014 if (compatible_bind_flags(sbuf
->bind_flags
, tobind_flags
))
1015 sbuf
->bind_flags
= sbuf
->bind_flags
| tobind_flags
;
1017 sbuf
->bind_flags
= tobind_flags
;
1019 assert((sbuf
->bind_flags
& tobind_flags
) == tobind_flags
);
1021 /* This call will set sbuf->handle */
1022 if (svga_have_gb_objects(svga
)) {
1023 ret
= svga_buffer_update_hw(svga
, sbuf
, sbuf
->bind_flags
);
1025 ret
= svga_buffer_create_host_surface(ss
, sbuf
, sbuf
->bind_flags
);
1031 assert(sbuf
->handle
);
1033 if (sbuf
->map
.num_ranges
) {
1034 if (!sbuf
->dma
.pending
) {
1035 /* No pending DMA/update commands yet. */
1037 /* Migrate the data from swbuf -> hwbuf if necessary */
1038 ret
= svga_buffer_update_hw(svga
, sbuf
, sbuf
->bind_flags
);
1039 if (ret
== PIPE_OK
) {
1040 /* Emit DMA or UpdateGBImage commands */
1041 ret
= svga_buffer_upload_command(svga
, sbuf
);
1042 if (ret
== PIPE_ERROR_OUT_OF_MEMORY
) {
1043 svga_context_flush(svga
, NULL
);
1044 ret
= svga_buffer_upload_command(svga
, sbuf
);
1045 assert(ret
== PIPE_OK
);
1047 if (ret
== PIPE_OK
) {
1048 sbuf
->dma
.pending
= TRUE
;
1049 assert(!sbuf
->head
.prev
&& !sbuf
->head
.next
);
1050 LIST_ADDTAIL(&sbuf
->head
, &svga
->dirty_buffers
);
1053 else if (ret
== PIPE_ERROR_OUT_OF_MEMORY
) {
1055 * The buffer is too big to fit in the GMR aperture, so break it in
1058 ret
= svga_buffer_upload_piecewise(ss
, svga
, sbuf
);
1061 if (ret
!= PIPE_OK
) {
1063 * Something unexpected happened above. There is very little that
1064 * we can do other than proceeding while ignoring the dirty ranges.
1067 sbuf
->map
.num_ranges
= 0;
1072 * There a pending dma already. Make sure it is from this context.
1074 assert(sbuf
->dma
.svga
== svga
);
1078 assert(sbuf
->map
.num_ranges
== 0 || sbuf
->dma
.pending
);
1080 return sbuf
->handle
;
1085 svga_context_flush_buffers(struct svga_context
*svga
)
1087 struct list_head
*curr
, *next
;
1089 SVGA_STATS_TIME_PUSH(svga_sws(svga
), SVGA_STATS_TIME_BUFFERSFLUSH
);
1091 curr
= svga
->dirty_buffers
.next
;
1093 while (curr
!= &svga
->dirty_buffers
) {
1094 struct svga_buffer
*sbuf
= LIST_ENTRY(struct svga_buffer
, curr
, head
);
1096 assert(p_atomic_read(&sbuf
->b
.b
.reference
.count
) != 0);
1097 assert(sbuf
->dma
.pending
);
1099 svga_buffer_upload_flush(svga
, sbuf
);
1105 SVGA_STATS_TIME_POP(svga_sws(svga
));