1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
24 **********************************************************/
27 #include "os/os_thread.h"
28 #include "pipe/p_state.h"
29 #include "pipe/p_defines.h"
30 #include "util/u_inlines.h"
31 #include "util/u_math.h"
32 #include "util/u_memory.h"
35 #include "svga_context.h"
36 #include "svga_debug.h"
37 #include "svga_resource_buffer.h"
38 #include "svga_resource_buffer_upload.h"
39 #include "svga_screen.h"
40 #include "svga_winsys.h"
43 * Describes a complete SVGA_3D_CMD_UPDATE_GB_IMAGE command
46 struct svga_3d_update_gb_image
{
47 SVGA3dCmdHeader header
;
48 SVGA3dCmdUpdateGBImage body
;
51 struct svga_3d_invalidate_gb_image
{
52 SVGA3dCmdHeader header
;
53 SVGA3dCmdInvalidateGBImage body
;
58 * Allocate a winsys_buffer (ie. DMA, aka GMR memory).
60 * It will flush and retry in case the first attempt to create a DMA buffer
61 * fails, so it should not be called from any function involved in flushing
64 struct svga_winsys_buffer
*
65 svga_winsys_buffer_create( struct svga_context
*svga
,
70 struct svga_screen
*svgascreen
= svga_screen(svga
->pipe
.screen
);
71 struct svga_winsys_screen
*sws
= svgascreen
->sws
;
72 struct svga_winsys_buffer
*buf
;
75 buf
= SVGA_TRY_PTR(sws
->buffer_create(sws
, alignment
, usage
, size
));
77 SVGA_DBG(DEBUG_DMA
|DEBUG_PERF
, "flushing context to find %d bytes GMR\n",
80 /* Try flushing all pending DMAs */
81 svga_retry_enter(svga
);
82 svga_context_flush(svga
, NULL
);
83 buf
= sws
->buffer_create(sws
, alignment
, usage
, size
);
84 svga_retry_exit(svga
);
92 * Destroy HW storage if separate from the host surface.
93 * In the GB case, the HW storage is associated with the host surface
94 * and is therefore a No-op.
97 svga_buffer_destroy_hw_storage(struct svga_screen
*ss
, struct svga_buffer
*sbuf
)
99 struct svga_winsys_screen
*sws
= ss
->sws
;
101 assert(sbuf
->map
.count
== 0);
104 sws
->buffer_destroy(sws
, sbuf
->hwbuf
);
112 * Allocate DMA'ble or Updatable storage for the buffer.
114 * Called before mapping a buffer.
117 svga_buffer_create_hw_storage(struct svga_screen
*ss
,
118 struct svga_buffer
*sbuf
,
123 if (ss
->sws
->have_gb_objects
) {
124 assert(sbuf
->handle
|| !sbuf
->dma
.pending
);
125 return svga_buffer_create_host_surface(ss
, sbuf
, bind_flags
);
128 struct svga_winsys_screen
*sws
= ss
->sws
;
129 unsigned alignment
= 16;
131 unsigned size
= sbuf
->b
.b
.width0
;
133 sbuf
->hwbuf
= sws
->buffer_create(sws
, alignment
, usage
, size
);
135 return PIPE_ERROR_OUT_OF_MEMORY
;
137 assert(!sbuf
->dma
.pending
);
145 * Allocate graphics memory for vertex/index/constant/etc buffer (not
149 svga_buffer_create_host_surface(struct svga_screen
*ss
,
150 struct svga_buffer
*sbuf
,
153 enum pipe_error ret
= PIPE_OK
;
162 sbuf
->key
.format
= SVGA3D_BUFFER
;
163 if (bind_flags
& PIPE_BIND_VERTEX_BUFFER
) {
164 sbuf
->key
.flags
|= SVGA3D_SURFACE_HINT_VERTEXBUFFER
;
165 sbuf
->key
.flags
|= SVGA3D_SURFACE_BIND_VERTEX_BUFFER
;
167 if (bind_flags
& PIPE_BIND_INDEX_BUFFER
) {
168 sbuf
->key
.flags
|= SVGA3D_SURFACE_HINT_INDEXBUFFER
;
169 sbuf
->key
.flags
|= SVGA3D_SURFACE_BIND_INDEX_BUFFER
;
171 if (bind_flags
& PIPE_BIND_CONSTANT_BUFFER
)
172 sbuf
->key
.flags
|= SVGA3D_SURFACE_BIND_CONSTANT_BUFFER
;
174 if (bind_flags
& PIPE_BIND_STREAM_OUTPUT
)
175 sbuf
->key
.flags
|= SVGA3D_SURFACE_BIND_STREAM_OUTPUT
;
177 if (bind_flags
& PIPE_BIND_SAMPLER_VIEW
)
178 sbuf
->key
.flags
|= SVGA3D_SURFACE_BIND_SHADER_RESOURCE
;
180 if (bind_flags
& PIPE_BIND_COMMAND_ARGS_BUFFER
) {
181 assert(ss
->sws
->have_sm5
);
182 sbuf
->key
.flags
|= SVGA3D_SURFACE_DRAWINDIRECT_ARGS
;
185 if (!bind_flags
&& sbuf
->b
.b
.usage
== PIPE_USAGE_STAGING
) {
186 /* This surface is to be used with the
187 * SVGA3D_CMD_DX_TRANSFER_FROM_BUFFER command, and no other
188 * bind flags are allowed to be set for this surface.
190 sbuf
->key
.flags
= SVGA3D_SURFACE_TRANSFER_FROM_BUFFER
;
193 if (sbuf
->b
.b
.flags
& PIPE_RESOURCE_FLAG_MAP_PERSISTENT
) {
194 /* This surface can be mapped persistently. We use
195 * coherent memory to avoid implementing memory barriers for
196 * persistent non-coherent memory for now.
198 sbuf
->key
.coherent
= 1;
201 sbuf
->key
.size
.width
= sbuf
->b
.b
.width0
;
202 sbuf
->key
.size
.height
= 1;
203 sbuf
->key
.size
.depth
= 1;
205 sbuf
->key
.numFaces
= 1;
206 sbuf
->key
.numMipLevels
= 1;
207 sbuf
->key
.cachable
= 1;
208 sbuf
->key
.arraySize
= 1;
209 sbuf
->key
.sampleCount
= 0;
211 SVGA_DBG(DEBUG_DMA
, "surface_create for buffer sz %d\n",
214 sbuf
->handle
= svga_screen_surface_create(ss
, bind_flags
,
216 &validated
, &sbuf
->key
);
218 return PIPE_ERROR_OUT_OF_MEMORY
;
220 /* Always set the discard flag on the first time the buffer is written
221 * as svga_screen_surface_create might have passed a recycled host
224 sbuf
->dma
.flags
.discard
= TRUE
;
226 SVGA_DBG(DEBUG_DMA
, " --> got sid %p sz %d (buffer)\n",
227 sbuf
->handle
, sbuf
->b
.b
.width0
);
229 /* Add the new surface to the buffer surface list */
230 ret
= svga_buffer_add_host_surface(sbuf
, sbuf
->handle
, &sbuf
->key
,
234 if (ss
->sws
->have_gb_objects
) {
235 /* Initialize the surface with zero */
236 ss
->sws
->surface_init(ss
->sws
, sbuf
->handle
, svga_surface_size(&sbuf
->key
),
245 * Recreates a host surface with the new bind flags.
248 svga_buffer_recreate_host_surface(struct svga_context
*svga
,
249 struct svga_buffer
*sbuf
,
252 enum pipe_error ret
= PIPE_OK
;
253 struct svga_winsys_surface
*old_handle
= sbuf
->handle
;
255 assert(sbuf
->bind_flags
!= bind_flags
);
260 /* Create a new resource with the requested bind_flags */
261 ret
= svga_buffer_create_host_surface(svga_screen(svga
->pipe
.screen
),
263 if (ret
== PIPE_OK
) {
264 /* Copy the surface data */
265 assert(sbuf
->handle
);
266 SVGA_RETRY(svga
, SVGA3D_vgpu10_BufferCopy(svga
->swc
, old_handle
,
268 0, 0, sbuf
->b
.b
.width0
));
271 /* Set the new bind flags for this buffer resource */
272 sbuf
->bind_flags
= bind_flags
;
279 * Returns TRUE if the surface bind flags is compatible with the new bind flags.
282 compatible_bind_flags(unsigned bind_flags
,
283 unsigned tobind_flags
)
285 if ((bind_flags
& tobind_flags
) == tobind_flags
)
287 else if ((bind_flags
|tobind_flags
) & PIPE_BIND_CONSTANT_BUFFER
)
295 * Returns a buffer surface from the surface list
296 * that has the requested bind flags or its existing bind flags
297 * can be promoted to include the new bind flags.
299 static struct svga_buffer_surface
*
300 svga_buffer_get_host_surface(struct svga_buffer
*sbuf
,
303 struct svga_buffer_surface
*bufsurf
;
305 LIST_FOR_EACH_ENTRY(bufsurf
, &sbuf
->surfaces
, list
) {
306 if (compatible_bind_flags(bufsurf
->bind_flags
, bind_flags
))
314 * Adds the host surface to the buffer surface list.
317 svga_buffer_add_host_surface(struct svga_buffer
*sbuf
,
318 struct svga_winsys_surface
*handle
,
319 struct svga_host_surface_cache_key
*key
,
322 struct svga_buffer_surface
*bufsurf
;
324 bufsurf
= CALLOC_STRUCT(svga_buffer_surface
);
326 return PIPE_ERROR_OUT_OF_MEMORY
;
328 bufsurf
->bind_flags
= bind_flags
;
329 bufsurf
->handle
= handle
;
332 /* add the surface to the surface list */
333 list_add(&bufsurf
->list
, &sbuf
->surfaces
);
335 /* Set the new bind flags for this buffer resource */
336 sbuf
->bind_flags
= bind_flags
;
343 * Start using the specified surface for this buffer resource.
346 svga_buffer_bind_host_surface(struct svga_context
*svga
,
347 struct svga_buffer
*sbuf
,
348 struct svga_buffer_surface
*bufsurf
)
350 /* Update the to-bind surface */
351 assert(bufsurf
->handle
);
352 assert(sbuf
->handle
);
354 /* If we are switching from stream output to other buffer,
355 * make sure to copy the buffer content.
357 if (sbuf
->bind_flags
& PIPE_BIND_STREAM_OUTPUT
) {
358 SVGA_RETRY(svga
, SVGA3D_vgpu10_BufferCopy(svga
->swc
, sbuf
->handle
,
360 0, 0, sbuf
->b
.b
.width0
));
363 /* Set this surface as the current one */
364 sbuf
->handle
= bufsurf
->handle
;
365 sbuf
->key
= bufsurf
->key
;
366 sbuf
->bind_flags
= bufsurf
->bind_flags
;
371 * Prepare a host surface that can be used as indicated in the
372 * tobind_flags. If the existing host surface is not created
373 * with the necessary binding flags and if the new bind flags can be
374 * combined with the existing bind flags, then we will recreate a
375 * new surface with the combined bind flags. Otherwise, we will create
376 * a surface for that incompatible bind flags.
377 * For example, if a stream output buffer is reused as a constant buffer,
378 * since constant buffer surface cannot be bound as a stream output surface,
379 * two surfaces will be created, one for stream output,
380 * and another one for constant buffer.
383 svga_buffer_validate_host_surface(struct svga_context
*svga
,
384 struct svga_buffer
*sbuf
,
385 unsigned tobind_flags
)
387 struct svga_buffer_surface
*bufsurf
;
388 enum pipe_error ret
= PIPE_OK
;
390 /* Flush any pending upload first */
391 svga_buffer_upload_flush(svga
, sbuf
);
393 /* First check from the cached buffer surface list to see if there is
394 * already a buffer surface that has the requested bind flags, or
395 * surface with compatible bind flags that can be promoted.
397 bufsurf
= svga_buffer_get_host_surface(sbuf
, tobind_flags
);
400 if ((bufsurf
->bind_flags
& tobind_flags
) == tobind_flags
) {
401 /* there is a surface with the requested bind flags */
402 svga_buffer_bind_host_surface(svga
, sbuf
, bufsurf
);
405 /* Recreate a host surface with the combined bind flags */
406 ret
= svga_buffer_recreate_host_surface(svga
, sbuf
,
407 bufsurf
->bind_flags
|
410 /* Destroy the old surface */
411 svga_screen_surface_destroy(svga_screen(sbuf
->b
.b
.screen
),
412 &bufsurf
->key
, &bufsurf
->handle
);
414 list_del(&bufsurf
->list
);
418 /* Need to create a new surface if the bind flags are incompatible,
419 * such as constant buffer surface & stream output surface.
421 ret
= svga_buffer_recreate_host_surface(svga
, sbuf
,
429 svga_buffer_destroy_host_surface(struct svga_screen
*ss
,
430 struct svga_buffer
*sbuf
)
432 struct svga_buffer_surface
*bufsurf
, *next
;
434 LIST_FOR_EACH_ENTRY_SAFE(bufsurf
, next
, &sbuf
->surfaces
, list
) {
435 SVGA_DBG(DEBUG_DMA
, " ungrab sid %p sz %d\n",
436 bufsurf
->handle
, sbuf
->b
.b
.width0
);
437 svga_screen_surface_destroy(ss
, &bufsurf
->key
, &bufsurf
->handle
);
444 * Insert a number of preliminary UPDATE_GB_IMAGE commands in the
445 * command buffer, equal to the current number of mapped ranges.
446 * The UPDATE_GB_IMAGE commands will be patched with the
447 * actual ranges just before flush.
449 static enum pipe_error
450 svga_buffer_upload_gb_command(struct svga_context
*svga
,
451 struct svga_buffer
*sbuf
)
453 struct svga_winsys_context
*swc
= svga
->swc
;
454 SVGA3dCmdUpdateGBImage
*update_cmd
;
455 struct svga_3d_update_gb_image
*whole_update_cmd
= NULL
;
456 const uint32 numBoxes
= sbuf
->map
.num_ranges
;
457 struct pipe_resource
*dummy
;
460 if (swc
->force_coherent
|| sbuf
->key
.coherent
)
463 assert(svga_have_gb_objects(svga
));
465 assert(sbuf
->dma
.updates
== NULL
);
467 if (sbuf
->dma
.flags
.discard
) {
468 struct svga_3d_invalidate_gb_image
*cicmd
= NULL
;
469 SVGA3dCmdInvalidateGBImage
*invalidate_cmd
;
470 const unsigned total_commands_size
=
471 sizeof(*invalidate_cmd
) + numBoxes
* sizeof(*whole_update_cmd
);
473 /* Allocate FIFO space for one INVALIDATE_GB_IMAGE command followed by
474 * 'numBoxes' UPDATE_GB_IMAGE commands. Allocate all at once rather
475 * than with separate commands because we need to properly deal with
476 * filling the command buffer.
478 invalidate_cmd
= SVGA3D_FIFOReserve(swc
,
479 SVGA_3D_CMD_INVALIDATE_GB_IMAGE
,
480 total_commands_size
, 1 + numBoxes
);
482 return PIPE_ERROR_OUT_OF_MEMORY
;
484 cicmd
= container_of(invalidate_cmd
, cicmd
, body
);
485 cicmd
->header
.size
= sizeof(*invalidate_cmd
);
486 swc
->surface_relocation(swc
, &invalidate_cmd
->image
.sid
, NULL
,
489 SVGA_RELOC_INTERNAL
|
491 invalidate_cmd
->image
.face
= 0;
492 invalidate_cmd
->image
.mipmap
= 0;
494 /* The whole_update_command is a SVGA3dCmdHeader plus the
495 * SVGA3dCmdUpdateGBImage command.
497 whole_update_cmd
= (struct svga_3d_update_gb_image
*) &invalidate_cmd
[1];
498 /* initialize the first UPDATE_GB_IMAGE command */
499 whole_update_cmd
->header
.id
= SVGA_3D_CMD_UPDATE_GB_IMAGE
;
500 update_cmd
= &whole_update_cmd
->body
;
503 /* Allocate FIFO space for 'numBoxes' UPDATE_GB_IMAGE commands */
504 const unsigned total_commands_size
=
505 sizeof(*update_cmd
) + (numBoxes
- 1) * sizeof(*whole_update_cmd
);
507 update_cmd
= SVGA3D_FIFOReserve(swc
,
508 SVGA_3D_CMD_UPDATE_GB_IMAGE
,
509 total_commands_size
, numBoxes
);
511 return PIPE_ERROR_OUT_OF_MEMORY
;
513 /* The whole_update_command is a SVGA3dCmdHeader plus the
514 * SVGA3dCmdUpdateGBImage command.
516 whole_update_cmd
= container_of(update_cmd
, whole_update_cmd
, body
);
519 /* Init the first UPDATE_GB_IMAGE command */
520 whole_update_cmd
->header
.size
= sizeof(*update_cmd
);
521 swc
->surface_relocation(swc
, &update_cmd
->image
.sid
, NULL
, sbuf
->handle
,
522 SVGA_RELOC_WRITE
| SVGA_RELOC_INTERNAL
);
523 update_cmd
->image
.face
= 0;
524 update_cmd
->image
.mipmap
= 0;
526 /* Save pointer to the first UPDATE_GB_IMAGE command so that we can
527 * fill in the box info below.
529 sbuf
->dma
.updates
= whole_update_cmd
;
532 * Copy the face, mipmap, etc. info to all subsequent commands.
533 * Also do the surface relocation for each subsequent command.
535 for (i
= 1; i
< numBoxes
; ++i
) {
537 memcpy(whole_update_cmd
, sbuf
->dma
.updates
, sizeof(*whole_update_cmd
));
539 swc
->surface_relocation(swc
, &whole_update_cmd
->body
.image
.sid
, NULL
,
541 SVGA_RELOC_WRITE
| SVGA_RELOC_INTERNAL
);
544 /* Increment reference count */
545 sbuf
->dma
.svga
= svga
;
547 pipe_resource_reference(&dummy
, &sbuf
->b
.b
);
548 SVGA_FIFOCommitAll(swc
);
550 swc
->hints
|= SVGA_HINT_FLAG_CAN_PRE_FLUSH
;
551 sbuf
->dma
.flags
.discard
= FALSE
;
553 svga
->hud
.num_resource_updates
++;
560 * Issue DMA commands to transfer guest memory to the host.
561 * Note that the memory segments (offset, size) will be patched in
562 * later in the svga_buffer_upload_flush() function.
564 static enum pipe_error
565 svga_buffer_upload_hb_command(struct svga_context
*svga
,
566 struct svga_buffer
*sbuf
)
568 struct svga_winsys_context
*swc
= svga
->swc
;
569 struct svga_winsys_buffer
*guest
= sbuf
->hwbuf
;
570 struct svga_winsys_surface
*host
= sbuf
->handle
;
571 const SVGA3dTransferType transfer
= SVGA3D_WRITE_HOST_VRAM
;
572 SVGA3dCmdSurfaceDMA
*cmd
;
573 const uint32 numBoxes
= sbuf
->map
.num_ranges
;
574 SVGA3dCopyBox
*boxes
;
575 SVGA3dCmdSurfaceDMASuffix
*pSuffix
;
576 unsigned region_flags
;
577 unsigned surface_flags
;
578 struct pipe_resource
*dummy
;
580 assert(!svga_have_gb_objects(svga
));
582 if (transfer
== SVGA3D_WRITE_HOST_VRAM
) {
583 region_flags
= SVGA_RELOC_READ
;
584 surface_flags
= SVGA_RELOC_WRITE
;
586 else if (transfer
== SVGA3D_READ_HOST_VRAM
) {
587 region_flags
= SVGA_RELOC_WRITE
;
588 surface_flags
= SVGA_RELOC_READ
;
592 return PIPE_ERROR_BAD_INPUT
;
597 cmd
= SVGA3D_FIFOReserve(swc
,
598 SVGA_3D_CMD_SURFACE_DMA
,
599 sizeof *cmd
+ numBoxes
* sizeof *boxes
+ sizeof *pSuffix
,
602 return PIPE_ERROR_OUT_OF_MEMORY
;
604 swc
->region_relocation(swc
, &cmd
->guest
.ptr
, guest
, 0, region_flags
);
605 cmd
->guest
.pitch
= 0;
607 swc
->surface_relocation(swc
, &cmd
->host
.sid
, NULL
, host
, surface_flags
);
609 cmd
->host
.mipmap
= 0;
611 cmd
->transfer
= transfer
;
613 sbuf
->dma
.boxes
= (SVGA3dCopyBox
*)&cmd
[1];
614 sbuf
->dma
.svga
= svga
;
616 /* Increment reference count */
618 pipe_resource_reference(&dummy
, &sbuf
->b
.b
);
620 pSuffix
= (SVGA3dCmdSurfaceDMASuffix
*)((uint8_t*)cmd
+ sizeof *cmd
+ numBoxes
* sizeof *boxes
);
621 pSuffix
->suffixSize
= sizeof *pSuffix
;
622 pSuffix
->maximumOffset
= sbuf
->b
.b
.width0
;
623 pSuffix
->flags
= sbuf
->dma
.flags
;
625 SVGA_FIFOCommitAll(swc
);
627 swc
->hints
|= SVGA_HINT_FLAG_CAN_PRE_FLUSH
;
628 sbuf
->dma
.flags
.discard
= FALSE
;
630 svga
->hud
.num_buffer_uploads
++;
637 * Issue commands to transfer guest memory to the host.
639 static enum pipe_error
640 svga_buffer_upload_command(struct svga_context
*svga
, struct svga_buffer
*sbuf
)
642 if (svga_have_gb_objects(svga
)) {
643 return svga_buffer_upload_gb_command(svga
, sbuf
);
645 return svga_buffer_upload_hb_command(svga
, sbuf
);
651 * Patch up the upload DMA command reserved by svga_buffer_upload_command
652 * with the final ranges.
655 svga_buffer_upload_flush(struct svga_context
*svga
, struct svga_buffer
*sbuf
)
658 struct pipe_resource
*dummy
;
660 if (!sbuf
->dma
.pending
|| svga
->swc
->force_coherent
||
661 sbuf
->key
.coherent
) {
662 //debug_printf("no dma pending on buffer\n");
666 assert(sbuf
->handle
);
667 assert(sbuf
->map
.num_ranges
);
668 assert(sbuf
->dma
.svga
== svga
);
671 * Patch the DMA/update command with the final copy box.
673 if (svga_have_gb_objects(svga
)) {
674 struct svga_3d_update_gb_image
*update
= sbuf
->dma
.updates
;
678 for (i
= 0; i
< sbuf
->map
.num_ranges
; ++i
, ++update
) {
679 SVGA3dBox
*box
= &update
->body
.box
;
681 SVGA_DBG(DEBUG_DMA
, " bytes %u - %u\n",
682 sbuf
->map
.ranges
[i
].start
, sbuf
->map
.ranges
[i
].end
);
684 box
->x
= sbuf
->map
.ranges
[i
].start
;
687 box
->w
= sbuf
->map
.ranges
[i
].end
- sbuf
->map
.ranges
[i
].start
;
691 assert(box
->x
<= sbuf
->b
.b
.width0
);
692 assert(box
->x
+ box
->w
<= sbuf
->b
.b
.width0
);
694 svga
->hud
.num_bytes_uploaded
+= box
->w
;
695 svga
->hud
.num_buffer_uploads
++;
700 assert(sbuf
->dma
.boxes
);
701 SVGA_DBG(DEBUG_DMA
, "dma to sid %p\n", sbuf
->handle
);
703 for (i
= 0; i
< sbuf
->map
.num_ranges
; ++i
) {
704 SVGA3dCopyBox
*box
= sbuf
->dma
.boxes
+ i
;
706 SVGA_DBG(DEBUG_DMA
, " bytes %u - %u\n",
707 sbuf
->map
.ranges
[i
].start
, sbuf
->map
.ranges
[i
].end
);
709 box
->x
= sbuf
->map
.ranges
[i
].start
;
712 box
->w
= sbuf
->map
.ranges
[i
].end
- sbuf
->map
.ranges
[i
].start
;
715 box
->srcx
= sbuf
->map
.ranges
[i
].start
;
719 assert(box
->x
<= sbuf
->b
.b
.width0
);
720 assert(box
->x
+ box
->w
<= sbuf
->b
.b
.width0
);
722 svga
->hud
.num_bytes_uploaded
+= box
->w
;
723 svga
->hud
.num_buffer_uploads
++;
727 /* Reset sbuf for next use/upload */
729 sbuf
->map
.num_ranges
= 0;
731 assert(sbuf
->head
.prev
&& sbuf
->head
.next
);
732 list_del(&sbuf
->head
); /* remove from svga->dirty_buffers list */
734 sbuf
->head
.next
= sbuf
->head
.prev
= NULL
;
736 sbuf
->dma
.pending
= FALSE
;
737 sbuf
->dma
.flags
.discard
= FALSE
;
738 sbuf
->dma
.flags
.unsynchronized
= FALSE
;
740 sbuf
->dma
.svga
= NULL
;
741 sbuf
->dma
.boxes
= NULL
;
742 sbuf
->dma
.updates
= NULL
;
744 /* Decrement reference count (and potentially destroy) */
746 pipe_resource_reference(&dummy
, NULL
);
751 * Note a dirty range.
753 * This function only notes the range down. It doesn't actually emit a DMA
754 * upload command. That only happens when a context tries to refer to this
755 * buffer, and the DMA upload command is added to that context's command
758 * We try to lump as many contiguous DMA transfers together as possible.
761 svga_buffer_add_range(struct svga_buffer
*sbuf
, unsigned start
, unsigned end
)
764 unsigned nearest_range
;
765 unsigned nearest_dist
;
769 if (sbuf
->map
.num_ranges
< SVGA_BUFFER_MAX_RANGES
) {
770 nearest_range
= sbuf
->map
.num_ranges
;
773 nearest_range
= SVGA_BUFFER_MAX_RANGES
- 1;
778 * Try to grow one of the ranges.
780 for (i
= 0; i
< sbuf
->map
.num_ranges
; ++i
) {
781 const int left_dist
= start
- sbuf
->map
.ranges
[i
].end
;
782 const int right_dist
= sbuf
->map
.ranges
[i
].start
- end
;
783 const int dist
= MAX2(left_dist
, right_dist
);
787 * Ranges are contiguous or overlapping -- extend this one and return.
789 * Note that it is not this function's task to prevent overlapping
790 * ranges, as the GMR was already given so it is too late to do
791 * anything. If the ranges overlap here it must surely be because
792 * PIPE_TRANSFER_UNSYNCHRONIZED was set.
794 sbuf
->map
.ranges
[i
].start
= MIN2(sbuf
->map
.ranges
[i
].start
, start
);
795 sbuf
->map
.ranges
[i
].end
= MAX2(sbuf
->map
.ranges
[i
].end
, end
);
800 * Discontiguous ranges -- keep track of the nearest range.
802 if (dist
< nearest_dist
) {
810 * We cannot add a new range to an existing DMA command, so patch-up the
811 * pending DMA upload and start clean.
814 svga_buffer_upload_flush(sbuf
->dma
.svga
, sbuf
);
816 assert(!sbuf
->dma
.pending
);
817 assert(!sbuf
->dma
.svga
);
818 assert(!sbuf
->dma
.boxes
);
820 if (sbuf
->map
.num_ranges
< SVGA_BUFFER_MAX_RANGES
) {
825 sbuf
->map
.ranges
[sbuf
->map
.num_ranges
].start
= start
;
826 sbuf
->map
.ranges
[sbuf
->map
.num_ranges
].end
= end
;
827 ++sbuf
->map
.num_ranges
;
830 * Everything else failed, so just extend the nearest range.
832 * It is OK to do this because we always keep a local copy of the
833 * host buffer data, for SW TNL, and the host never modifies the buffer.
836 assert(nearest_range
< SVGA_BUFFER_MAX_RANGES
);
837 assert(nearest_range
< sbuf
->map
.num_ranges
);
838 sbuf
->map
.ranges
[nearest_range
].start
=
839 MIN2(sbuf
->map
.ranges
[nearest_range
].start
, start
);
840 sbuf
->map
.ranges
[nearest_range
].end
=
841 MAX2(sbuf
->map
.ranges
[nearest_range
].end
, end
);
848 * Copy the contents of the malloc buffer to a hardware buffer.
850 static enum pipe_error
851 svga_buffer_update_hw(struct svga_context
*svga
, struct svga_buffer
*sbuf
,
855 if (!svga_buffer_has_hw_storage(sbuf
)) {
856 struct svga_screen
*ss
= svga_screen(sbuf
->b
.b
.screen
);
866 ret
= svga_buffer_create_hw_storage(svga_screen(sbuf
->b
.b
.screen
), sbuf
,
871 mtx_lock(&ss
->swc_mutex
);
872 map
= svga_buffer_hw_storage_map(svga
, sbuf
, PIPE_TRANSFER_WRITE
, &retry
);
876 mtx_unlock(&ss
->swc_mutex
);
877 svga_buffer_destroy_hw_storage(ss
, sbuf
);
881 /* Copy data from malloc'd swbuf to the new hardware buffer */
882 for (i
= 0; i
< sbuf
->map
.num_ranges
; i
++) {
883 unsigned start
= sbuf
->map
.ranges
[i
].start
;
884 unsigned len
= sbuf
->map
.ranges
[i
].end
- start
;
885 memcpy((uint8_t *) map
+ start
, (uint8_t *) sbuf
->swbuf
+ start
, len
);
888 if (svga
->swc
->force_coherent
|| sbuf
->key
.coherent
)
889 sbuf
->map
.num_ranges
= 0;
891 svga_buffer_hw_storage_unmap(svga
, sbuf
);
893 /* This user/malloc buffer is now indistinguishable from a gpu buffer */
894 assert(sbuf
->map
.count
== 0);
895 if (sbuf
->map
.count
== 0) {
899 align_free(sbuf
->swbuf
);
903 mtx_unlock(&ss
->swc_mutex
);
911 * Upload the buffer to the host in a piecewise fashion.
913 * Used when the buffer is too big to fit in the GMR aperture.
914 * This function should never get called in the guest-backed case
915 * since we always have a full-sized hardware storage backing the
918 static enum pipe_error
919 svga_buffer_upload_piecewise(struct svga_screen
*ss
,
920 struct svga_context
*svga
,
921 struct svga_buffer
*sbuf
)
923 struct svga_winsys_screen
*sws
= ss
->sws
;
924 const unsigned alignment
= sizeof(void *);
925 const unsigned usage
= 0;
928 assert(sbuf
->map
.num_ranges
);
929 assert(!sbuf
->dma
.pending
);
930 assert(!svga_have_gb_objects(svga
));
932 SVGA_DBG(DEBUG_DMA
, "dma to sid %p\n", sbuf
->handle
);
934 for (i
= 0; i
< sbuf
->map
.num_ranges
; ++i
) {
935 const struct svga_buffer_range
*range
= &sbuf
->map
.ranges
[i
];
936 unsigned offset
= range
->start
;
937 unsigned size
= range
->end
- range
->start
;
939 while (offset
< range
->end
) {
940 struct svga_winsys_buffer
*hwbuf
;
943 if (offset
+ size
> range
->end
)
944 size
= range
->end
- offset
;
946 hwbuf
= sws
->buffer_create(sws
, alignment
, usage
, size
);
950 return PIPE_ERROR_OUT_OF_MEMORY
;
951 hwbuf
= sws
->buffer_create(sws
, alignment
, usage
, size
);
954 SVGA_DBG(DEBUG_DMA
, " bytes %u - %u\n",
955 offset
, offset
+ size
);
957 map
= sws
->buffer_map(sws
, hwbuf
,
958 PIPE_TRANSFER_WRITE
|
959 PIPE_TRANSFER_DISCARD_RANGE
);
962 memcpy(map
, (const char *) sbuf
->swbuf
+ offset
, size
);
963 sws
->buffer_unmap(sws
, hwbuf
);
966 SVGA_RETRY(svga
, SVGA3D_BufferDMA(svga
->swc
,
968 SVGA3D_WRITE_HOST_VRAM
,
969 size
, 0, offset
, sbuf
->dma
.flags
));
970 sbuf
->dma
.flags
.discard
= FALSE
;
972 sws
->buffer_destroy(sws
, hwbuf
);
978 sbuf
->map
.num_ranges
= 0;
985 * Get (or create/upload) the winsys surface handle so that we can
986 * refer to this buffer in fifo commands.
987 * This function will create the host surface, and in the GB case also the
988 * hardware storage. In the non-GB case, the hardware storage will be created
989 * if there are mapped ranges and the data is currently in a malloc'ed buffer.
991 struct svga_winsys_surface
*
992 svga_buffer_handle(struct svga_context
*svga
, struct pipe_resource
*buf
,
993 unsigned tobind_flags
)
995 struct pipe_screen
*screen
= svga
->pipe
.screen
;
996 struct svga_screen
*ss
= svga_screen(screen
);
997 struct svga_buffer
*sbuf
;
1003 sbuf
= svga_buffer(buf
);
1005 assert(!sbuf
->user
);
1008 if ((sbuf
->bind_flags
& tobind_flags
) != tobind_flags
) {
1009 /* If the allocated resource's bind flags do not include the
1010 * requested bind flags, validate the host surface.
1012 ret
= svga_buffer_validate_host_surface(svga
, sbuf
, tobind_flags
);
1017 /* If there is no resource handle yet, then combine the buffer bind
1018 * flags and the tobind_flags if they are compatible.
1019 * If not, just use the tobind_flags for creating the resource handle.
1021 if (compatible_bind_flags(sbuf
->bind_flags
, tobind_flags
))
1022 sbuf
->bind_flags
= sbuf
->bind_flags
| tobind_flags
;
1024 sbuf
->bind_flags
= tobind_flags
;
1026 assert((sbuf
->bind_flags
& tobind_flags
) == tobind_flags
);
1028 /* This call will set sbuf->handle */
1029 if (svga_have_gb_objects(svga
)) {
1030 ret
= svga_buffer_update_hw(svga
, sbuf
, sbuf
->bind_flags
);
1032 ret
= svga_buffer_create_host_surface(ss
, sbuf
, sbuf
->bind_flags
);
1038 assert(sbuf
->handle
);
1039 if (svga
->swc
->force_coherent
|| sbuf
->key
.coherent
)
1040 return sbuf
->handle
;
1042 if (sbuf
->map
.num_ranges
) {
1043 if (!sbuf
->dma
.pending
) {
1044 /* No pending DMA/update commands yet. */
1046 /* Migrate the data from swbuf -> hwbuf if necessary */
1047 ret
= svga_buffer_update_hw(svga
, sbuf
, sbuf
->bind_flags
);
1048 if (ret
== PIPE_OK
) {
1049 /* Emit DMA or UpdateGBImage commands */
1050 SVGA_RETRY_OOM(svga
, ret
, svga_buffer_upload_command(svga
, sbuf
));
1051 if (ret
== PIPE_OK
) {
1052 sbuf
->dma
.pending
= TRUE
;
1053 assert(!sbuf
->head
.prev
&& !sbuf
->head
.next
);
1054 list_addtail(&sbuf
->head
, &svga
->dirty_buffers
);
1057 else if (ret
== PIPE_ERROR_OUT_OF_MEMORY
) {
1059 * The buffer is too big to fit in the GMR aperture, so break it in
1062 ret
= svga_buffer_upload_piecewise(ss
, svga
, sbuf
);
1065 if (ret
!= PIPE_OK
) {
1067 * Something unexpected happened above. There is very little that
1068 * we can do other than proceeding while ignoring the dirty ranges.
1071 sbuf
->map
.num_ranges
= 0;
1076 * There a pending dma already. Make sure it is from this context.
1078 assert(sbuf
->dma
.svga
== svga
);
1082 assert(sbuf
->map
.num_ranges
== 0 || sbuf
->dma
.pending
);
1084 return sbuf
->handle
;
1089 svga_context_flush_buffers(struct svga_context
*svga
)
1091 struct list_head
*curr
, *next
;
1093 SVGA_STATS_TIME_PUSH(svga_sws(svga
), SVGA_STATS_TIME_BUFFERSFLUSH
);
1095 curr
= svga
->dirty_buffers
.next
;
1097 while (curr
!= &svga
->dirty_buffers
) {
1098 struct svga_buffer
*sbuf
= LIST_ENTRY(struct svga_buffer
, curr
, head
);
1100 assert(p_atomic_read(&sbuf
->b
.b
.reference
.count
) != 0);
1101 assert(sbuf
->dma
.pending
);
1103 svga_buffer_upload_flush(svga
, sbuf
);
1109 SVGA_STATS_TIME_POP(svga_sws(svga
));