1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
24 **********************************************************/
27 #include "os/os_thread.h"
28 #include "pipe/p_state.h"
29 #include "pipe/p_defines.h"
30 #include "util/u_inlines.h"
31 #include "util/u_math.h"
32 #include "util/u_memory.h"
35 #include "svga_context.h"
36 #include "svga_debug.h"
37 #include "svga_resource_buffer.h"
38 #include "svga_resource_buffer_upload.h"
39 #include "svga_screen.h"
40 #include "svga_winsys.h"
43 * Describes a complete SVGA_3D_CMD_UPDATE_GB_IMAGE command
46 struct svga_3d_update_gb_image
{
47 SVGA3dCmdHeader header
;
48 SVGA3dCmdUpdateGBImage body
;
51 struct svga_3d_invalidate_gb_image
{
52 SVGA3dCmdHeader header
;
53 SVGA3dCmdInvalidateGBImage body
;
58 * Allocate a winsys_buffer (ie. DMA, aka GMR memory).
60 * It will flush and retry in case the first attempt to create a DMA buffer
61 * fails, so it should not be called from any function involved in flushing
64 struct svga_winsys_buffer
*
65 svga_winsys_buffer_create( struct svga_context
*svga
,
70 struct svga_screen
*svgascreen
= svga_screen(svga
->pipe
.screen
);
71 struct svga_winsys_screen
*sws
= svgascreen
->sws
;
72 struct svga_winsys_buffer
*buf
;
75 buf
= sws
->buffer_create(sws
, alignment
, usage
, size
);
77 SVGA_DBG(DEBUG_DMA
|DEBUG_PERF
, "flushing context to find %d bytes GMR\n",
80 /* Try flushing all pending DMAs */
81 svga_context_flush(svga
, NULL
);
82 buf
= sws
->buffer_create(sws
, alignment
, usage
, size
);
90 * Destroy HW storage if separate from the host surface.
91 * In the GB case, the HW storage is associated with the host surface
92 * and is therefore a No-op.
95 svga_buffer_destroy_hw_storage(struct svga_screen
*ss
, struct svga_buffer
*sbuf
)
97 struct svga_winsys_screen
*sws
= ss
->sws
;
99 assert(sbuf
->map
.count
== 0);
102 sws
->buffer_destroy(sws
, sbuf
->hwbuf
);
110 * Allocate DMA'ble or Updatable storage for the buffer.
112 * Called before mapping a buffer.
115 svga_buffer_create_hw_storage(struct svga_screen
*ss
,
116 struct svga_buffer
*sbuf
)
120 if (ss
->sws
->have_gb_objects
) {
121 assert(sbuf
->handle
|| !sbuf
->dma
.pending
);
122 return svga_buffer_create_host_surface(ss
, sbuf
);
125 struct svga_winsys_screen
*sws
= ss
->sws
;
126 unsigned alignment
= 16;
128 unsigned size
= sbuf
->b
.b
.width0
;
130 sbuf
->hwbuf
= sws
->buffer_create(sws
, alignment
, usage
, size
);
132 return PIPE_ERROR_OUT_OF_MEMORY
;
134 assert(!sbuf
->dma
.pending
);
143 svga_buffer_create_host_surface(struct svga_screen
*ss
,
144 struct svga_buffer
*sbuf
)
153 sbuf
->key
.format
= SVGA3D_BUFFER
;
154 if (sbuf
->bind_flags
& PIPE_BIND_VERTEX_BUFFER
) {
155 sbuf
->key
.flags
|= SVGA3D_SURFACE_HINT_VERTEXBUFFER
;
156 sbuf
->key
.flags
|= SVGA3D_SURFACE_BIND_VERTEX_BUFFER
;
158 if (sbuf
->bind_flags
& PIPE_BIND_INDEX_BUFFER
) {
159 sbuf
->key
.flags
|= SVGA3D_SURFACE_HINT_INDEXBUFFER
;
160 sbuf
->key
.flags
|= SVGA3D_SURFACE_BIND_INDEX_BUFFER
;
162 if (sbuf
->bind_flags
& PIPE_BIND_CONSTANT_BUFFER
)
163 sbuf
->key
.flags
|= SVGA3D_SURFACE_BIND_CONSTANT_BUFFER
;
165 if (sbuf
->bind_flags
& PIPE_BIND_STREAM_OUTPUT
)
166 sbuf
->key
.flags
|= SVGA3D_SURFACE_BIND_STREAM_OUTPUT
;
168 if (sbuf
->bind_flags
& PIPE_BIND_SAMPLER_VIEW
)
169 sbuf
->key
.flags
|= SVGA3D_SURFACE_BIND_SHADER_RESOURCE
;
171 if (!sbuf
->bind_flags
&& sbuf
->b
.b
.usage
== PIPE_USAGE_STAGING
) {
172 /* This surface is to be used with the
173 * SVGA3D_CMD_DX_TRANSFER_FROM_BUFFER command, and no other
174 * bind flags are allowed to be set for this surface.
176 sbuf
->key
.flags
= SVGA3D_SURFACE_TRANSFER_FROM_BUFFER
;
179 sbuf
->key
.size
.width
= sbuf
->b
.b
.width0
;
180 sbuf
->key
.size
.height
= 1;
181 sbuf
->key
.size
.depth
= 1;
183 sbuf
->key
.numFaces
= 1;
184 sbuf
->key
.numMipLevels
= 1;
185 sbuf
->key
.cachable
= 1;
186 sbuf
->key
.arraySize
= 1;
188 SVGA_DBG(DEBUG_DMA
, "surface_create for buffer sz %d\n",
191 sbuf
->handle
= svga_screen_surface_create(ss
, sbuf
->b
.b
.bind
,
193 &validated
, &sbuf
->key
);
195 return PIPE_ERROR_OUT_OF_MEMORY
;
197 /* Always set the discard flag on the first time the buffer is written
198 * as svga_screen_surface_create might have passed a recycled host
201 sbuf
->dma
.flags
.discard
= TRUE
;
203 SVGA_DBG(DEBUG_DMA
, " --> got sid %p sz %d (buffer)\n",
204 sbuf
->handle
, sbuf
->b
.b
.width0
);
212 svga_buffer_destroy_host_surface(struct svga_screen
*ss
,
213 struct svga_buffer
*sbuf
)
216 SVGA_DBG(DEBUG_DMA
, " ungrab sid %p sz %d\n",
217 sbuf
->handle
, sbuf
->b
.b
.width0
);
218 svga_screen_surface_destroy(ss
, &sbuf
->key
, &sbuf
->handle
);
224 * Insert a number of preliminary UPDATE_GB_IMAGE commands in the
225 * command buffer, equal to the current number of mapped ranges.
226 * The UPDATE_GB_IMAGE commands will be patched with the
227 * actual ranges just before flush.
229 static enum pipe_error
230 svga_buffer_upload_gb_command(struct svga_context
*svga
,
231 struct svga_buffer
*sbuf
)
233 struct svga_winsys_context
*swc
= svga
->swc
;
234 SVGA3dCmdUpdateGBImage
*update_cmd
;
235 struct svga_3d_update_gb_image
*whole_update_cmd
= NULL
;
236 const uint32 numBoxes
= sbuf
->map
.num_ranges
;
237 struct pipe_resource
*dummy
;
240 assert(svga_have_gb_objects(svga
));
242 assert(sbuf
->dma
.updates
== NULL
);
244 if (sbuf
->dma
.flags
.discard
) {
245 struct svga_3d_invalidate_gb_image
*cicmd
= NULL
;
246 SVGA3dCmdInvalidateGBImage
*invalidate_cmd
;
247 const unsigned total_commands_size
=
248 sizeof(*invalidate_cmd
) + numBoxes
* sizeof(*whole_update_cmd
);
250 /* Allocate FIFO space for one INVALIDATE_GB_IMAGE command followed by
251 * 'numBoxes' UPDATE_GB_IMAGE commands. Allocate all at once rather
252 * than with separate commands because we need to properly deal with
253 * filling the command buffer.
255 invalidate_cmd
= SVGA3D_FIFOReserve(swc
,
256 SVGA_3D_CMD_INVALIDATE_GB_IMAGE
,
257 total_commands_size
, 1 + numBoxes
);
259 return PIPE_ERROR_OUT_OF_MEMORY
;
261 cicmd
= container_of(invalidate_cmd
, cicmd
, body
);
262 cicmd
->header
.size
= sizeof(*invalidate_cmd
);
263 swc
->surface_relocation(swc
, &invalidate_cmd
->image
.sid
, NULL
, sbuf
->handle
,
265 SVGA_RELOC_INTERNAL
|
267 invalidate_cmd
->image
.face
= 0;
268 invalidate_cmd
->image
.mipmap
= 0;
270 /* The whole_update_command is a SVGA3dCmdHeader plus the
271 * SVGA3dCmdUpdateGBImage command.
273 whole_update_cmd
= (struct svga_3d_update_gb_image
*) &invalidate_cmd
[1];
274 /* initialize the first UPDATE_GB_IMAGE command */
275 whole_update_cmd
->header
.id
= SVGA_3D_CMD_UPDATE_GB_IMAGE
;
276 update_cmd
= &whole_update_cmd
->body
;
279 /* Allocate FIFO space for 'numBoxes' UPDATE_GB_IMAGE commands */
280 const unsigned total_commands_size
=
281 sizeof(*update_cmd
) + (numBoxes
- 1) * sizeof(*whole_update_cmd
);
283 update_cmd
= SVGA3D_FIFOReserve(swc
,
284 SVGA_3D_CMD_UPDATE_GB_IMAGE
,
285 total_commands_size
, numBoxes
);
287 return PIPE_ERROR_OUT_OF_MEMORY
;
289 /* The whole_update_command is a SVGA3dCmdHeader plus the
290 * SVGA3dCmdUpdateGBImage command.
292 whole_update_cmd
= container_of(update_cmd
, whole_update_cmd
, body
);
295 /* Init the first UPDATE_GB_IMAGE command */
296 whole_update_cmd
->header
.size
= sizeof(*update_cmd
);
297 swc
->surface_relocation(swc
, &update_cmd
->image
.sid
, NULL
, sbuf
->handle
,
298 SVGA_RELOC_WRITE
| SVGA_RELOC_INTERNAL
);
299 update_cmd
->image
.face
= 0;
300 update_cmd
->image
.mipmap
= 0;
302 /* Save pointer to the first UPDATE_GB_IMAGE command so that we can
303 * fill in the box info below.
305 sbuf
->dma
.updates
= whole_update_cmd
;
308 * Copy the face, mipmap, etc. info to all subsequent commands.
309 * Also do the surface relocation for each subsequent command.
311 for (i
= 1; i
< numBoxes
; ++i
) {
313 memcpy(whole_update_cmd
, sbuf
->dma
.updates
, sizeof(*whole_update_cmd
));
315 swc
->surface_relocation(swc
, &whole_update_cmd
->body
.image
.sid
, NULL
,
317 SVGA_RELOC_WRITE
| SVGA_RELOC_INTERNAL
);
320 /* Increment reference count */
321 sbuf
->dma
.svga
= svga
;
323 pipe_resource_reference(&dummy
, &sbuf
->b
.b
);
324 SVGA_FIFOCommitAll(swc
);
326 swc
->hints
|= SVGA_HINT_FLAG_CAN_PRE_FLUSH
;
327 sbuf
->dma
.flags
.discard
= FALSE
;
329 svga
->hud
.num_resource_updates
++;
336 * Issue DMA commands to transfer guest memory to the host.
337 * Note that the memory segments (offset, size) will be patched in
338 * later in the svga_buffer_upload_flush() function.
340 static enum pipe_error
341 svga_buffer_upload_hb_command(struct svga_context
*svga
,
342 struct svga_buffer
*sbuf
)
344 struct svga_winsys_context
*swc
= svga
->swc
;
345 struct svga_winsys_buffer
*guest
= sbuf
->hwbuf
;
346 struct svga_winsys_surface
*host
= sbuf
->handle
;
347 const SVGA3dTransferType transfer
= SVGA3D_WRITE_HOST_VRAM
;
348 SVGA3dCmdSurfaceDMA
*cmd
;
349 const uint32 numBoxes
= sbuf
->map
.num_ranges
;
350 SVGA3dCopyBox
*boxes
;
351 SVGA3dCmdSurfaceDMASuffix
*pSuffix
;
352 unsigned region_flags
;
353 unsigned surface_flags
;
354 struct pipe_resource
*dummy
;
356 assert(!svga_have_gb_objects(svga
));
358 if (transfer
== SVGA3D_WRITE_HOST_VRAM
) {
359 region_flags
= SVGA_RELOC_READ
;
360 surface_flags
= SVGA_RELOC_WRITE
;
362 else if (transfer
== SVGA3D_READ_HOST_VRAM
) {
363 region_flags
= SVGA_RELOC_WRITE
;
364 surface_flags
= SVGA_RELOC_READ
;
368 return PIPE_ERROR_BAD_INPUT
;
373 cmd
= SVGA3D_FIFOReserve(swc
,
374 SVGA_3D_CMD_SURFACE_DMA
,
375 sizeof *cmd
+ numBoxes
* sizeof *boxes
+ sizeof *pSuffix
,
378 return PIPE_ERROR_OUT_OF_MEMORY
;
380 swc
->region_relocation(swc
, &cmd
->guest
.ptr
, guest
, 0, region_flags
);
381 cmd
->guest
.pitch
= 0;
383 swc
->surface_relocation(swc
, &cmd
->host
.sid
, NULL
, host
, surface_flags
);
385 cmd
->host
.mipmap
= 0;
387 cmd
->transfer
= transfer
;
389 sbuf
->dma
.boxes
= (SVGA3dCopyBox
*)&cmd
[1];
390 sbuf
->dma
.svga
= svga
;
392 /* Increment reference count */
394 pipe_resource_reference(&dummy
, &sbuf
->b
.b
);
396 pSuffix
= (SVGA3dCmdSurfaceDMASuffix
*)((uint8_t*)cmd
+ sizeof *cmd
+ numBoxes
* sizeof *boxes
);
397 pSuffix
->suffixSize
= sizeof *pSuffix
;
398 pSuffix
->maximumOffset
= sbuf
->b
.b
.width0
;
399 pSuffix
->flags
= sbuf
->dma
.flags
;
401 SVGA_FIFOCommitAll(swc
);
403 swc
->hints
|= SVGA_HINT_FLAG_CAN_PRE_FLUSH
;
404 sbuf
->dma
.flags
.discard
= FALSE
;
406 svga
->hud
.num_buffer_uploads
++;
413 * Issue commands to transfer guest memory to the host.
415 static enum pipe_error
416 svga_buffer_upload_command(struct svga_context
*svga
, struct svga_buffer
*sbuf
)
418 if (svga_have_gb_objects(svga
)) {
419 return svga_buffer_upload_gb_command(svga
, sbuf
);
421 return svga_buffer_upload_hb_command(svga
, sbuf
);
427 * Patch up the upload DMA command reserved by svga_buffer_upload_command
428 * with the final ranges.
431 svga_buffer_upload_flush(struct svga_context
*svga
,
432 struct svga_buffer
*sbuf
)
435 struct pipe_resource
*dummy
;
437 if (!sbuf
->dma
.pending
) {
438 //debug_printf("no dma pending on buffer\n");
442 assert(sbuf
->handle
);
443 assert(sbuf
->map
.num_ranges
);
444 assert(sbuf
->dma
.svga
== svga
);
447 * Patch the DMA/update command with the final copy box.
449 if (svga_have_gb_objects(svga
)) {
450 struct svga_3d_update_gb_image
*update
= sbuf
->dma
.updates
;
453 for (i
= 0; i
< sbuf
->map
.num_ranges
; ++i
, ++update
) {
454 SVGA3dBox
*box
= &update
->body
.box
;
456 SVGA_DBG(DEBUG_DMA
, " bytes %u - %u\n",
457 sbuf
->map
.ranges
[i
].start
, sbuf
->map
.ranges
[i
].end
);
459 box
->x
= sbuf
->map
.ranges
[i
].start
;
462 box
->w
= sbuf
->map
.ranges
[i
].end
- sbuf
->map
.ranges
[i
].start
;
466 assert(box
->x
<= sbuf
->b
.b
.width0
);
467 assert(box
->x
+ box
->w
<= sbuf
->b
.b
.width0
);
469 svga
->hud
.num_bytes_uploaded
+= box
->w
;
470 svga
->hud
.num_buffer_uploads
++;
475 assert(sbuf
->dma
.boxes
);
476 SVGA_DBG(DEBUG_DMA
, "dma to sid %p\n", sbuf
->handle
);
478 for (i
= 0; i
< sbuf
->map
.num_ranges
; ++i
) {
479 SVGA3dCopyBox
*box
= sbuf
->dma
.boxes
+ i
;
481 SVGA_DBG(DEBUG_DMA
, " bytes %u - %u\n",
482 sbuf
->map
.ranges
[i
].start
, sbuf
->map
.ranges
[i
].end
);
484 box
->x
= sbuf
->map
.ranges
[i
].start
;
487 box
->w
= sbuf
->map
.ranges
[i
].end
- sbuf
->map
.ranges
[i
].start
;
490 box
->srcx
= sbuf
->map
.ranges
[i
].start
;
494 assert(box
->x
<= sbuf
->b
.b
.width0
);
495 assert(box
->x
+ box
->w
<= sbuf
->b
.b
.width0
);
497 svga
->hud
.num_bytes_uploaded
+= box
->w
;
498 svga
->hud
.num_buffer_uploads
++;
502 /* Reset sbuf for next use/upload */
504 sbuf
->map
.num_ranges
= 0;
506 assert(sbuf
->head
.prev
&& sbuf
->head
.next
);
507 LIST_DEL(&sbuf
->head
); /* remove from svga->dirty_buffers list */
509 sbuf
->head
.next
= sbuf
->head
.prev
= NULL
;
511 sbuf
->dma
.pending
= FALSE
;
512 sbuf
->dma
.flags
.discard
= FALSE
;
513 sbuf
->dma
.flags
.unsynchronized
= FALSE
;
515 sbuf
->dma
.svga
= NULL
;
516 sbuf
->dma
.boxes
= NULL
;
517 sbuf
->dma
.updates
= NULL
;
519 /* Decrement reference count (and potentially destroy) */
521 pipe_resource_reference(&dummy
, NULL
);
526 * Note a dirty range.
528 * This function only notes the range down. It doesn't actually emit a DMA
529 * upload command. That only happens when a context tries to refer to this
530 * buffer, and the DMA upload command is added to that context's command
533 * We try to lump as many contiguous DMA transfers together as possible.
536 svga_buffer_add_range(struct svga_buffer
*sbuf
, unsigned start
, unsigned end
)
539 unsigned nearest_range
;
540 unsigned nearest_dist
;
544 if (sbuf
->map
.num_ranges
< SVGA_BUFFER_MAX_RANGES
) {
545 nearest_range
= sbuf
->map
.num_ranges
;
548 nearest_range
= SVGA_BUFFER_MAX_RANGES
- 1;
553 * Try to grow one of the ranges.
555 for (i
= 0; i
< sbuf
->map
.num_ranges
; ++i
) {
556 const int left_dist
= start
- sbuf
->map
.ranges
[i
].end
;
557 const int right_dist
= sbuf
->map
.ranges
[i
].start
- end
;
558 const int dist
= MAX2(left_dist
, right_dist
);
562 * Ranges are contiguous or overlapping -- extend this one and return.
564 * Note that it is not this function's task to prevent overlapping
565 * ranges, as the GMR was already given so it is too late to do
566 * anything. If the ranges overlap here it must surely be because
567 * PIPE_TRANSFER_UNSYNCHRONIZED was set.
569 sbuf
->map
.ranges
[i
].start
= MIN2(sbuf
->map
.ranges
[i
].start
, start
);
570 sbuf
->map
.ranges
[i
].end
= MAX2(sbuf
->map
.ranges
[i
].end
, end
);
575 * Discontiguous ranges -- keep track of the nearest range.
577 if (dist
< nearest_dist
) {
585 * We cannot add a new range to an existing DMA command, so patch-up the
586 * pending DMA upload and start clean.
589 svga_buffer_upload_flush(sbuf
->dma
.svga
, sbuf
);
591 assert(!sbuf
->dma
.pending
);
592 assert(!sbuf
->dma
.svga
);
593 assert(!sbuf
->dma
.boxes
);
595 if (sbuf
->map
.num_ranges
< SVGA_BUFFER_MAX_RANGES
) {
600 sbuf
->map
.ranges
[sbuf
->map
.num_ranges
].start
= start
;
601 sbuf
->map
.ranges
[sbuf
->map
.num_ranges
].end
= end
;
602 ++sbuf
->map
.num_ranges
;
605 * Everything else failed, so just extend the nearest range.
607 * It is OK to do this because we always keep a local copy of the
608 * host buffer data, for SW TNL, and the host never modifies the buffer.
611 assert(nearest_range
< SVGA_BUFFER_MAX_RANGES
);
612 assert(nearest_range
< sbuf
->map
.num_ranges
);
613 sbuf
->map
.ranges
[nearest_range
].start
=
614 MIN2(sbuf
->map
.ranges
[nearest_range
].start
, start
);
615 sbuf
->map
.ranges
[nearest_range
].end
=
616 MAX2(sbuf
->map
.ranges
[nearest_range
].end
, end
);
623 * Copy the contents of the malloc buffer to a hardware buffer.
625 static enum pipe_error
626 svga_buffer_update_hw(struct svga_context
*svga
, struct svga_buffer
*sbuf
)
629 if (!svga_buffer_has_hw_storage(sbuf
)) {
630 struct svga_screen
*ss
= svga_screen(sbuf
->b
.b
.screen
);
640 ret
= svga_buffer_create_hw_storage(svga_screen(sbuf
->b
.b
.screen
), sbuf
);
644 pipe_mutex_lock(ss
->swc_mutex
);
645 map
= svga_buffer_hw_storage_map(svga
, sbuf
, PIPE_TRANSFER_WRITE
, &retry
);
649 pipe_mutex_unlock(ss
->swc_mutex
);
650 svga_buffer_destroy_hw_storage(ss
, sbuf
);
654 /* Copy data from malloc'd swbuf to the new hardware buffer */
655 for (i
= 0; i
< sbuf
->map
.num_ranges
; i
++) {
656 unsigned start
= sbuf
->map
.ranges
[i
].start
;
657 unsigned len
= sbuf
->map
.ranges
[i
].end
- start
;
658 memcpy((uint8_t *) map
+ start
, (uint8_t *) sbuf
->swbuf
+ start
, len
);
661 svga_buffer_hw_storage_unmap(svga
, sbuf
);
663 /* This user/malloc buffer is now indistinguishable from a gpu buffer */
664 assert(sbuf
->map
.count
== 0);
665 if (sbuf
->map
.count
== 0) {
669 align_free(sbuf
->swbuf
);
673 pipe_mutex_unlock(ss
->swc_mutex
);
681 * Upload the buffer to the host in a piecewise fashion.
683 * Used when the buffer is too big to fit in the GMR aperture.
684 * This function should never get called in the guest-backed case
685 * since we always have a full-sized hardware storage backing the
688 static enum pipe_error
689 svga_buffer_upload_piecewise(struct svga_screen
*ss
,
690 struct svga_context
*svga
,
691 struct svga_buffer
*sbuf
)
693 struct svga_winsys_screen
*sws
= ss
->sws
;
694 const unsigned alignment
= sizeof(void *);
695 const unsigned usage
= 0;
698 assert(sbuf
->map
.num_ranges
);
699 assert(!sbuf
->dma
.pending
);
700 assert(!svga_have_gb_objects(svga
));
702 SVGA_DBG(DEBUG_DMA
, "dma to sid %p\n", sbuf
->handle
);
704 for (i
= 0; i
< sbuf
->map
.num_ranges
; ++i
) {
705 const struct svga_buffer_range
*range
= &sbuf
->map
.ranges
[i
];
706 unsigned offset
= range
->start
;
707 unsigned size
= range
->end
- range
->start
;
709 while (offset
< range
->end
) {
710 struct svga_winsys_buffer
*hwbuf
;
714 if (offset
+ size
> range
->end
)
715 size
= range
->end
- offset
;
717 hwbuf
= sws
->buffer_create(sws
, alignment
, usage
, size
);
721 return PIPE_ERROR_OUT_OF_MEMORY
;
722 hwbuf
= sws
->buffer_create(sws
, alignment
, usage
, size
);
725 SVGA_DBG(DEBUG_DMA
, " bytes %u - %u\n",
726 offset
, offset
+ size
);
728 map
= sws
->buffer_map(sws
, hwbuf
,
729 PIPE_TRANSFER_WRITE
|
730 PIPE_TRANSFER_DISCARD_RANGE
);
733 memcpy(map
, (const char *) sbuf
->swbuf
+ offset
, size
);
734 sws
->buffer_unmap(sws
, hwbuf
);
737 ret
= SVGA3D_BufferDMA(svga
->swc
,
739 SVGA3D_WRITE_HOST_VRAM
,
740 size
, 0, offset
, sbuf
->dma
.flags
);
741 if (ret
!= PIPE_OK
) {
742 svga_context_flush(svga
, NULL
);
743 ret
= SVGA3D_BufferDMA(svga
->swc
,
745 SVGA3D_WRITE_HOST_VRAM
,
746 size
, 0, offset
, sbuf
->dma
.flags
);
747 assert(ret
== PIPE_OK
);
750 sbuf
->dma
.flags
.discard
= FALSE
;
752 sws
->buffer_destroy(sws
, hwbuf
);
758 sbuf
->map
.num_ranges
= 0;
765 * Get (or create/upload) the winsys surface handle so that we can
766 * refer to this buffer in fifo commands.
767 * This function will create the host surface, and in the GB case also the
768 * hardware storage. In the non-GB case, the hardware storage will be created
769 * if there are mapped ranges and the data is currently in a malloc'ed buffer.
771 struct svga_winsys_surface
*
772 svga_buffer_handle(struct svga_context
*svga
, struct pipe_resource
*buf
)
774 struct pipe_screen
*screen
= svga
->pipe
.screen
;
775 struct svga_screen
*ss
= svga_screen(screen
);
776 struct svga_buffer
*sbuf
;
782 sbuf
= svga_buffer(buf
);
787 /* This call will set sbuf->handle */
788 if (svga_have_gb_objects(svga
)) {
789 ret
= svga_buffer_update_hw(svga
, sbuf
);
791 ret
= svga_buffer_create_host_surface(ss
, sbuf
);
797 assert(sbuf
->handle
);
799 if (sbuf
->map
.num_ranges
) {
800 if (!sbuf
->dma
.pending
) {
801 /* No pending DMA/update commands yet. */
803 /* Migrate the data from swbuf -> hwbuf if necessary */
804 ret
= svga_buffer_update_hw(svga
, sbuf
);
805 if (ret
== PIPE_OK
) {
806 /* Emit DMA or UpdateGBImage commands */
807 ret
= svga_buffer_upload_command(svga
, sbuf
);
808 if (ret
== PIPE_ERROR_OUT_OF_MEMORY
) {
809 svga_context_flush(svga
, NULL
);
810 ret
= svga_buffer_upload_command(svga
, sbuf
);
811 assert(ret
== PIPE_OK
);
813 if (ret
== PIPE_OK
) {
814 sbuf
->dma
.pending
= TRUE
;
815 assert(!sbuf
->head
.prev
&& !sbuf
->head
.next
);
816 LIST_ADDTAIL(&sbuf
->head
, &svga
->dirty_buffers
);
819 else if (ret
== PIPE_ERROR_OUT_OF_MEMORY
) {
821 * The buffer is too big to fit in the GMR aperture, so break it in
824 ret
= svga_buffer_upload_piecewise(ss
, svga
, sbuf
);
827 if (ret
!= PIPE_OK
) {
829 * Something unexpected happened above. There is very little that
830 * we can do other than proceeding while ignoring the dirty ranges.
833 sbuf
->map
.num_ranges
= 0;
838 * There a pending dma already. Make sure it is from this context.
840 assert(sbuf
->dma
.svga
== svga
);
844 assert(sbuf
->map
.num_ranges
== 0 || sbuf
->dma
.pending
);
852 svga_context_flush_buffers(struct svga_context
*svga
)
854 struct list_head
*curr
, *next
;
856 SVGA_STATS_TIME_PUSH(svga_sws(svga
), SVGA_STATS_TIME_BUFFERSFLUSH
);
858 curr
= svga
->dirty_buffers
.next
;
860 while (curr
!= &svga
->dirty_buffers
) {
861 struct svga_buffer
*sbuf
= LIST_ENTRY(struct svga_buffer
, curr
, head
);
863 assert(p_atomic_read(&sbuf
->b
.b
.reference
.count
) != 0);
864 assert(sbuf
->dma
.pending
);
866 svga_buffer_upload_flush(svga
, sbuf
);
872 SVGA_STATS_TIME_POP(svga_sws(svga
));