2aa4e52faa75ae3f4a6b7d74379b3fa21bc3ff4e
[mesa.git] / src / gallium / drivers / svga / svga_resource_texture.c
1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 **********************************************************/
25
26 #include "svga3d_reg.h"
27 #include "svga3d_surfacedefs.h"
28
29 #include "pipe/p_state.h"
30 #include "pipe/p_defines.h"
31 #include "os/os_thread.h"
32 #include "util/format/u_format.h"
33 #include "util/u_inlines.h"
34 #include "util/u_math.h"
35 #include "util/u_memory.h"
36 #include "util/u_resource.h"
37 #include "util/u_upload_mgr.h"
38
39 #include "svga_cmd.h"
40 #include "svga_format.h"
41 #include "svga_screen.h"
42 #include "svga_context.h"
43 #include "svga_resource_texture.h"
44 #include "svga_resource_buffer.h"
45 #include "svga_sampler_view.h"
46 #include "svga_winsys.h"
47 #include "svga_debug.h"
48
49
50 static void
51 svga_transfer_dma_band(struct svga_context *svga,
52 struct svga_transfer *st,
53 SVGA3dTransferType transfer,
54 unsigned x, unsigned y, unsigned z,
55 unsigned w, unsigned h, unsigned d,
56 unsigned srcx, unsigned srcy, unsigned srcz,
57 SVGA3dSurfaceDMAFlags flags)
58 {
59 struct svga_texture *texture = svga_texture(st->base.resource);
60 SVGA3dCopyBox box;
61 enum pipe_error ret;
62
63 assert(!st->use_direct_map);
64
65 box.x = x;
66 box.y = y;
67 box.z = z;
68 box.w = w;
69 box.h = h;
70 box.d = d;
71 box.srcx = srcx;
72 box.srcy = srcy;
73 box.srcz = srcz;
74
75 SVGA_DBG(DEBUG_DMA, "dma %s sid %p, face %u, (%u, %u, %u) - "
76 "(%u, %u, %u), %ubpp\n",
77 transfer == SVGA3D_WRITE_HOST_VRAM ? "to" : "from",
78 texture->handle,
79 st->slice,
80 x,
81 y,
82 z,
83 x + w,
84 y + h,
85 z + 1,
86 util_format_get_blocksize(texture->b.b.format) * 8 /
87 (util_format_get_blockwidth(texture->b.b.format)
88 * util_format_get_blockheight(texture->b.b.format)));
89
90 ret = SVGA3D_SurfaceDMA(svga->swc, st, transfer, &box, 1, flags);
91 if (ret != PIPE_OK) {
92 svga_context_flush(svga, NULL);
93 ret = SVGA3D_SurfaceDMA(svga->swc, st, transfer, &box, 1, flags);
94 assert(ret == PIPE_OK);
95 }
96 }
97
98
99 static void
100 svga_transfer_dma(struct svga_context *svga,
101 struct svga_transfer *st,
102 SVGA3dTransferType transfer,
103 SVGA3dSurfaceDMAFlags flags)
104 {
105 struct svga_texture *texture = svga_texture(st->base.resource);
106 struct svga_screen *screen = svga_screen(texture->b.b.screen);
107 struct svga_winsys_screen *sws = screen->sws;
108 struct pipe_fence_handle *fence = NULL;
109
110 assert(!st->use_direct_map);
111
112 if (transfer == SVGA3D_READ_HOST_VRAM) {
113 SVGA_DBG(DEBUG_PERF, "%s: readback transfer\n", __FUNCTION__);
114 }
115
116 /* Ensure any pending operations on host surfaces are queued on the command
117 * buffer first.
118 */
119 svga_surfaces_flush(svga);
120
121 if (!st->swbuf) {
122 /* Do the DMA transfer in a single go */
123 svga_transfer_dma_band(svga, st, transfer,
124 st->box.x, st->box.y, st->box.z,
125 st->box.w, st->box.h, st->box.d,
126 0, 0, 0,
127 flags);
128
129 if (transfer == SVGA3D_READ_HOST_VRAM) {
130 svga_context_flush(svga, &fence);
131 sws->fence_finish(sws, fence, PIPE_TIMEOUT_INFINITE, 0);
132 sws->fence_reference(sws, &fence, NULL);
133 }
134 }
135 else {
136 int y, h, y_max;
137 unsigned blockheight =
138 util_format_get_blockheight(st->base.resource->format);
139
140 h = st->hw_nblocksy * blockheight;
141 y_max = st->box.y + st->box.h;
142
143 for (y = st->box.y; y < y_max; y += h) {
144 unsigned offset, length;
145 void *hw, *sw;
146
147 if (y + h > y_max)
148 h = y_max - y;
149
150 /* Transfer band must be aligned to pixel block boundaries */
151 assert(y % blockheight == 0);
152 assert(h % blockheight == 0);
153
154 /* First band starts at the top of the SW buffer. */
155 offset = (y - st->box.y) * st->base.stride / blockheight;
156 length = h * st->base.stride / blockheight;
157
158 sw = (uint8_t *) st->swbuf + offset;
159
160 if (transfer == SVGA3D_WRITE_HOST_VRAM) {
161 unsigned usage = PIPE_TRANSFER_WRITE;
162
163 /* Don't write to an in-flight DMA buffer. Synchronize or
164 * discard in-flight storage. */
165 if (y != st->box.y) {
166 svga_context_flush(svga, NULL);
167 usage |= PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE;
168 }
169
170 hw = sws->buffer_map(sws, st->hwbuf, usage);
171 assert(hw);
172 if (hw) {
173 memcpy(hw, sw, length);
174 sws->buffer_unmap(sws, st->hwbuf);
175 }
176 }
177
178 svga_transfer_dma_band(svga, st, transfer,
179 st->box.x, y, st->box.z,
180 st->box.w, h, st->box.d,
181 0, 0, 0, flags);
182
183 /*
184 * Prevent the texture contents to be discarded on the next band
185 * upload.
186 */
187 flags.discard = FALSE;
188
189 if (transfer == SVGA3D_READ_HOST_VRAM) {
190 svga_context_flush(svga, &fence);
191 sws->fence_finish(sws, fence, PIPE_TIMEOUT_INFINITE, 0);
192
193 hw = sws->buffer_map(sws, st->hwbuf, PIPE_TRANSFER_READ);
194 assert(hw);
195 if (hw) {
196 memcpy(sw, hw, length);
197 sws->buffer_unmap(sws, st->hwbuf);
198 }
199 }
200 }
201 }
202 }
203
204
205
206 static bool
207 svga_texture_get_handle(struct pipe_screen *screen,
208 struct pipe_resource *texture,
209 struct winsys_handle *whandle)
210 {
211 struct svga_winsys_screen *sws = svga_winsys_screen(texture->screen);
212 unsigned stride;
213
214 assert(svga_texture(texture)->key.cachable == 0);
215 svga_texture(texture)->key.cachable = 0;
216
217 stride = util_format_get_nblocksx(texture->format, texture->width0) *
218 util_format_get_blocksize(texture->format);
219
220 return sws->surface_get_handle(sws, svga_texture(texture)->handle,
221 stride, whandle);
222 }
223
224
225 static void
226 svga_texture_destroy(struct pipe_screen *screen,
227 struct pipe_resource *pt)
228 {
229 struct svga_screen *ss = svga_screen(screen);
230 struct svga_texture *tex = svga_texture(pt);
231
232 ss->texture_timestamp++;
233
234 svga_sampler_view_reference(&tex->cached_view, NULL);
235
236 /*
237 DBG("%s deleting %p\n", __FUNCTION__, (void *) tex);
238 */
239 SVGA_DBG(DEBUG_DMA, "unref sid %p (texture)\n", tex->handle);
240 svga_screen_surface_destroy(ss, &tex->key, &tex->handle);
241
242 /* Destroy the backed surface handle if exists */
243 if (tex->backed_handle)
244 svga_screen_surface_destroy(ss, &tex->backed_key, &tex->backed_handle);
245
246 ss->hud.total_resource_bytes -= tex->size;
247
248 FREE(tex->defined);
249 FREE(tex->rendered_to);
250 FREE(tex->dirty);
251 FREE(tex);
252
253 assert(ss->hud.num_resources > 0);
254 if (ss->hud.num_resources > 0)
255 ss->hud.num_resources--;
256 }
257
258
259 /**
260 * Determine if we need to read back a texture image before mapping it.
261 */
262 static inline boolean
263 need_tex_readback(struct svga_transfer *st)
264 {
265 if (st->base.usage & PIPE_TRANSFER_READ)
266 return TRUE;
267
268 if ((st->base.usage & PIPE_TRANSFER_WRITE) &&
269 ((st->base.usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) == 0)) {
270 return svga_was_texture_rendered_to(svga_texture(st->base.resource),
271 st->slice, st->base.level);
272 }
273
274 return FALSE;
275 }
276
277
278 static enum pipe_error
279 readback_image_vgpu9(struct svga_context *svga,
280 struct svga_winsys_surface *surf,
281 unsigned slice,
282 unsigned level)
283 {
284 enum pipe_error ret;
285
286 ret = SVGA3D_ReadbackGBImage(svga->swc, surf, slice, level);
287 if (ret != PIPE_OK) {
288 svga_context_flush(svga, NULL);
289 ret = SVGA3D_ReadbackGBImage(svga->swc, surf, slice, level);
290 }
291 return ret;
292 }
293
294
295 static enum pipe_error
296 readback_image_vgpu10(struct svga_context *svga,
297 struct svga_winsys_surface *surf,
298 unsigned slice,
299 unsigned level,
300 unsigned numMipLevels)
301 {
302 enum pipe_error ret;
303 unsigned subResource;
304
305 subResource = slice * numMipLevels + level;
306 ret = SVGA3D_vgpu10_ReadbackSubResource(svga->swc, surf, subResource);
307 if (ret != PIPE_OK) {
308 svga_context_flush(svga, NULL);
309 ret = SVGA3D_vgpu10_ReadbackSubResource(svga->swc, surf, subResource);
310 }
311 return ret;
312 }
313
314
315 /**
316 * Use DMA for the transfer request
317 */
318 static void *
319 svga_texture_transfer_map_dma(struct svga_context *svga,
320 struct svga_transfer *st)
321 {
322 struct svga_winsys_screen *sws = svga_screen(svga->pipe.screen)->sws;
323 struct pipe_resource *texture = st->base.resource;
324 unsigned nblocksx, nblocksy;
325 unsigned d;
326 unsigned usage = st->base.usage;
327
328 /* we'll put the data into a tightly packed buffer */
329 nblocksx = util_format_get_nblocksx(texture->format, st->box.w);
330 nblocksy = util_format_get_nblocksy(texture->format, st->box.h);
331 d = st->box.d;
332
333 st->base.stride = nblocksx*util_format_get_blocksize(texture->format);
334 st->base.layer_stride = st->base.stride * nblocksy;
335 st->hw_nblocksy = nblocksy;
336
337 st->hwbuf = svga_winsys_buffer_create(svga, 1, 0,
338 st->hw_nblocksy * st->base.stride * d);
339
340 while (!st->hwbuf && (st->hw_nblocksy /= 2)) {
341 st->hwbuf =
342 svga_winsys_buffer_create(svga, 1, 0,
343 st->hw_nblocksy * st->base.stride * d);
344 }
345
346 if (!st->hwbuf)
347 return NULL;
348
349 if (st->hw_nblocksy < nblocksy) {
350 /* We couldn't allocate a hardware buffer big enough for the transfer,
351 * so allocate regular malloc memory instead
352 */
353 if (0) {
354 debug_printf("%s: failed to allocate %u KB of DMA, "
355 "splitting into %u x %u KB DMA transfers\n",
356 __FUNCTION__,
357 (nblocksy * st->base.stride + 1023) / 1024,
358 (nblocksy + st->hw_nblocksy - 1) / st->hw_nblocksy,
359 (st->hw_nblocksy * st->base.stride + 1023) / 1024);
360 }
361
362 st->swbuf = MALLOC(nblocksy * st->base.stride * d);
363 if (!st->swbuf) {
364 sws->buffer_destroy(sws, st->hwbuf);
365 return NULL;
366 }
367 }
368
369 if (usage & PIPE_TRANSFER_READ) {
370 SVGA3dSurfaceDMAFlags flags;
371 memset(&flags, 0, sizeof flags);
372 svga_transfer_dma(svga, st, SVGA3D_READ_HOST_VRAM, flags);
373 }
374
375 if (st->swbuf) {
376 return st->swbuf;
377 }
378 else {
379 return sws->buffer_map(sws, st->hwbuf, usage);
380 }
381 }
382
383
384 /**
385 * Use direct map for the transfer request
386 */
387 static void *
388 svga_texture_transfer_map_direct(struct svga_context *svga,
389 struct svga_transfer *st)
390 {
391 struct svga_winsys_screen *sws = svga_screen(svga->pipe.screen)->sws;
392 struct pipe_transfer *transfer = &st->base;
393 struct pipe_resource *texture = transfer->resource;
394 struct svga_texture *tex = svga_texture(texture);
395 struct svga_winsys_surface *surf = tex->handle;
396 unsigned level = st->base.level;
397 unsigned w, h, nblocksx, nblocksy, i;
398 unsigned usage = st->base.usage;
399
400 if (need_tex_readback(st)) {
401 enum pipe_error ret;
402
403 svga_surfaces_flush(svga);
404
405 if (!svga->swc->force_coherent || tex->imported) {
406 for (i = 0; i < st->box.d; i++) {
407 if (svga_have_vgpu10(svga)) {
408 ret = readback_image_vgpu10(svga, surf, st->slice + i, level,
409 tex->b.b.last_level + 1);
410 } else {
411 ret = readback_image_vgpu9(svga, surf, st->slice + i, level);
412 }
413 }
414 svga->hud.num_readbacks++;
415 SVGA_STATS_COUNT_INC(sws, SVGA_STATS_COUNT_TEXREADBACK);
416
417 assert(ret == PIPE_OK);
418 (void) ret;
419
420 svga_context_flush(svga, NULL);
421 }
422 /*
423 * Note: if PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE were specified
424 * we could potentially clear the flag for all faces/layers/mips.
425 */
426 svga_clear_texture_rendered_to(tex, st->slice, level);
427 }
428 else {
429 assert(usage & PIPE_TRANSFER_WRITE);
430 if ((usage & PIPE_TRANSFER_UNSYNCHRONIZED) == 0) {
431 if (svga_is_texture_dirty(tex, st->slice, level)) {
432 /*
433 * do a surface flush if the subresource has been modified
434 * in this command buffer.
435 */
436 svga_surfaces_flush(svga);
437 if (!sws->surface_is_flushed(sws, surf)) {
438 svga->hud.surface_write_flushes++;
439 SVGA_STATS_COUNT_INC(sws, SVGA_STATS_COUNT_SURFACEWRITEFLUSH);
440 svga_context_flush(svga, NULL);
441 }
442 }
443 }
444 }
445
446 /* we'll directly access the guest-backed surface */
447 w = u_minify(texture->width0, level);
448 h = u_minify(texture->height0, level);
449 nblocksx = util_format_get_nblocksx(texture->format, w);
450 nblocksy = util_format_get_nblocksy(texture->format, h);
451 st->hw_nblocksy = nblocksy;
452 st->base.stride = nblocksx*util_format_get_blocksize(texture->format);
453 st->base.layer_stride = st->base.stride * nblocksy;
454
455 /*
456 * Begin mapping code
457 */
458 {
459 SVGA3dSize baseLevelSize;
460 uint8_t *map;
461 boolean retry, rebind;
462 unsigned offset, mip_width, mip_height;
463 struct svga_winsys_context *swc = svga->swc;
464
465 if (swc->force_coherent) {
466 usage |= PIPE_TRANSFER_PERSISTENT | PIPE_TRANSFER_COHERENT;
467 }
468
469 map = swc->surface_map(swc, surf, usage, &retry, &rebind);
470 if (map == NULL && retry) {
471 /*
472 * At this point, the svga_surfaces_flush() should already have
473 * called in svga_texture_get_transfer().
474 */
475 svga->hud.surface_write_flushes++;
476 svga_context_flush(svga, NULL);
477 map = swc->surface_map(swc, surf, usage, &retry, &rebind);
478 }
479 if (map && rebind) {
480 enum pipe_error ret;
481
482 ret = SVGA3D_BindGBSurface(swc, surf);
483 if (ret != PIPE_OK) {
484 svga_context_flush(svga, NULL);
485 ret = SVGA3D_BindGBSurface(swc, surf);
486 assert(ret == PIPE_OK);
487 }
488 svga_context_flush(svga, NULL);
489 }
490
491 /*
492 * Make sure we return NULL if the map fails
493 */
494 if (!map) {
495 return NULL;
496 }
497
498 /**
499 * Compute the offset to the specific texture slice in the buffer.
500 */
501 baseLevelSize.width = tex->b.b.width0;
502 baseLevelSize.height = tex->b.b.height0;
503 baseLevelSize.depth = tex->b.b.depth0;
504
505 if ((tex->b.b.target == PIPE_TEXTURE_1D_ARRAY) ||
506 (tex->b.b.target == PIPE_TEXTURE_2D_ARRAY) ||
507 (tex->b.b.target == PIPE_TEXTURE_CUBE_ARRAY)) {
508 st->base.layer_stride =
509 svga3dsurface_get_image_offset(tex->key.format, baseLevelSize,
510 tex->b.b.last_level + 1, 1, 0);
511 }
512
513 offset = svga3dsurface_get_image_offset(tex->key.format, baseLevelSize,
514 tex->b.b.last_level + 1, /* numMips */
515 st->slice, level);
516 if (level > 0) {
517 assert(offset > 0);
518 }
519
520 mip_width = u_minify(tex->b.b.width0, level);
521 mip_height = u_minify(tex->b.b.height0, level);
522
523 offset += svga3dsurface_get_pixel_offset(tex->key.format,
524 mip_width, mip_height,
525 st->box.x,
526 st->box.y,
527 st->box.z);
528
529 return (void *) (map + offset);
530 }
531 }
532
533
534 /**
535 * Request a transfer map to the texture resource
536 */
537 static void *
538 svga_texture_transfer_map(struct pipe_context *pipe,
539 struct pipe_resource *texture,
540 unsigned level,
541 unsigned usage,
542 const struct pipe_box *box,
543 struct pipe_transfer **ptransfer)
544 {
545 struct svga_context *svga = svga_context(pipe);
546 struct svga_winsys_screen *sws = svga_screen(pipe->screen)->sws;
547 struct svga_texture *tex = svga_texture(texture);
548 struct svga_transfer *st;
549 struct svga_winsys_surface *surf = tex->handle;
550 boolean use_direct_map = svga_have_gb_objects(svga) &&
551 (!svga_have_gb_dma(svga) || (usage & PIPE_TRANSFER_WRITE));
552 void *map = NULL;
553 int64_t begin = svga_get_time(svga);
554
555 SVGA_STATS_TIME_PUSH(sws, SVGA_STATS_TIME_TEXTRANSFERMAP);
556
557 if (!surf)
558 goto done;
559
560 /* We can't map texture storage directly unless we have GB objects */
561 if (usage & PIPE_TRANSFER_MAP_DIRECTLY) {
562 if (svga_have_gb_objects(svga))
563 use_direct_map = TRUE;
564 else
565 goto done;
566 }
567
568 st = CALLOC_STRUCT(svga_transfer);
569 if (!st)
570 goto done;
571
572 st->base.level = level;
573 st->base.usage = usage;
574 st->base.box = *box;
575
576 /* The modified transfer map box with the array index removed from z.
577 * The array index is specified in slice.
578 */
579 st->box.x = box->x;
580 st->box.y = box->y;
581 st->box.z = box->z;
582 st->box.w = box->width;
583 st->box.h = box->height;
584 st->box.d = box->depth;
585
586 switch (tex->b.b.target) {
587 case PIPE_TEXTURE_CUBE:
588 st->slice = st->base.box.z;
589 st->box.z = 0; /* so we don't apply double offsets below */
590 break;
591 case PIPE_TEXTURE_1D_ARRAY:
592 case PIPE_TEXTURE_2D_ARRAY:
593 case PIPE_TEXTURE_CUBE_ARRAY:
594 st->slice = st->base.box.z;
595 st->box.z = 0; /* so we don't apply double offsets below */
596
597 /* Force direct map for transfering multiple slices */
598 if (st->base.box.depth > 1)
599 use_direct_map = svga_have_gb_objects(svga);
600
601 break;
602 default:
603 st->slice = 0;
604 break;
605 }
606
607 /* Force direct map for multisample surface */
608 if (texture->nr_samples > 1) {
609 assert(svga_have_gb_objects(svga));
610 assert(sws->have_sm4_1);
611 use_direct_map = TRUE;
612 }
613
614 st->use_direct_map = use_direct_map;
615 pipe_resource_reference(&st->base.resource, texture);
616
617 /* If this is the first time mapping to the surface in this
618 * command buffer, clear the dirty masks of this surface.
619 */
620 if (sws->surface_is_flushed(sws, surf)) {
621 svga_clear_texture_dirty(tex);
622 }
623
624 if (!use_direct_map) {
625 /* upload to the DMA buffer */
626 map = svga_texture_transfer_map_dma(svga, st);
627 }
628 else {
629 boolean can_use_upload = tex->can_use_upload &&
630 !(st->base.usage & PIPE_TRANSFER_READ);
631 boolean was_rendered_to =
632 svga_was_texture_rendered_to(svga_texture(texture),
633 st->slice, st->base.level);
634
635 /* If the texture was already rendered to and upload buffer
636 * is supported, then we will use upload buffer to
637 * avoid the need to read back the texture content; otherwise,
638 * we'll first try to map directly to the GB surface, if it is blocked,
639 * then we'll try the upload buffer.
640 */
641 if (was_rendered_to && can_use_upload) {
642 map = svga_texture_transfer_map_upload(svga, st);
643 }
644 else {
645 unsigned orig_usage = st->base.usage;
646
647 /* First try directly map to the GB surface */
648 if (can_use_upload)
649 st->base.usage |= PIPE_TRANSFER_DONTBLOCK;
650 map = svga_texture_transfer_map_direct(svga, st);
651 st->base.usage = orig_usage;
652
653 if (!map && can_use_upload) {
654 /* if direct map with DONTBLOCK fails, then try upload to the
655 * texture upload buffer.
656 */
657 map = svga_texture_transfer_map_upload(svga, st);
658 }
659 }
660
661 /* If upload fails, then try direct map again without forcing it
662 * to DONTBLOCK.
663 */
664 if (!map) {
665 map = svga_texture_transfer_map_direct(svga, st);
666 }
667 }
668
669 if (!map) {
670 FREE(st);
671 }
672 else {
673 *ptransfer = &st->base;
674 svga->hud.num_textures_mapped++;
675 if (usage & PIPE_TRANSFER_WRITE) {
676 /* record texture upload for HUD */
677 svga->hud.num_bytes_uploaded +=
678 st->base.layer_stride * st->box.d;
679
680 /* mark this texture level as dirty */
681 svga_set_texture_dirty(tex, st->slice, level);
682 }
683 }
684
685 done:
686 svga->hud.map_buffer_time += (svga_get_time(svga) - begin);
687 SVGA_STATS_TIME_POP(sws);
688 (void) sws;
689
690 return map;
691 }
692
693 /**
694 * Unmap a GB texture surface.
695 */
696 static void
697 svga_texture_surface_unmap(struct svga_context *svga,
698 struct pipe_transfer *transfer)
699 {
700 struct svga_winsys_surface *surf = svga_texture(transfer->resource)->handle;
701 struct svga_winsys_context *swc = svga->swc;
702 boolean rebind;
703
704 assert(surf);
705
706 swc->surface_unmap(swc, surf, &rebind);
707 if (rebind) {
708 enum pipe_error ret;
709 ret = SVGA3D_BindGBSurface(swc, surf);
710 if (ret != PIPE_OK) {
711 /* flush and retry */
712 svga_context_flush(svga, NULL);
713 ret = SVGA3D_BindGBSurface(swc, surf);
714 assert(ret == PIPE_OK);
715 }
716 }
717 }
718
719
720 static enum pipe_error
721 update_image_vgpu9(struct svga_context *svga,
722 struct svga_winsys_surface *surf,
723 const SVGA3dBox *box,
724 unsigned slice,
725 unsigned level)
726 {
727 enum pipe_error ret;
728
729 ret = SVGA3D_UpdateGBImage(svga->swc, surf, box, slice, level);
730 if (ret != PIPE_OK) {
731 svga_context_flush(svga, NULL);
732 ret = SVGA3D_UpdateGBImage(svga->swc, surf, box, slice, level);
733 }
734 return ret;
735 }
736
737
738 static enum pipe_error
739 update_image_vgpu10(struct svga_context *svga,
740 struct svga_winsys_surface *surf,
741 const SVGA3dBox *box,
742 unsigned slice,
743 unsigned level,
744 unsigned numMipLevels)
745 {
746 enum pipe_error ret;
747 unsigned subResource;
748
749 subResource = slice * numMipLevels + level;
750
751 ret = SVGA3D_vgpu10_UpdateSubResource(svga->swc, surf, box, subResource);
752 if (ret != PIPE_OK) {
753 svga_context_flush(svga, NULL);
754 ret = SVGA3D_vgpu10_UpdateSubResource(svga->swc, surf, box, subResource);
755 }
756 return ret;
757 }
758
759
760 /**
761 * unmap DMA transfer request
762 */
763 static void
764 svga_texture_transfer_unmap_dma(struct svga_context *svga,
765 struct svga_transfer *st)
766 {
767 struct svga_winsys_screen *sws = svga_screen(svga->pipe.screen)->sws;
768
769 if (!st->swbuf)
770 sws->buffer_unmap(sws, st->hwbuf);
771
772 if (st->base.usage & PIPE_TRANSFER_WRITE) {
773 /* Use DMA to transfer texture data */
774 SVGA3dSurfaceDMAFlags flags;
775 struct pipe_resource *texture = st->base.resource;
776 struct svga_texture *tex = svga_texture(texture);
777
778
779 memset(&flags, 0, sizeof flags);
780 if (st->base.usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) {
781 flags.discard = TRUE;
782 }
783 if (st->base.usage & PIPE_TRANSFER_UNSYNCHRONIZED) {
784 flags.unsynchronized = TRUE;
785 }
786
787 svga_transfer_dma(svga, st, SVGA3D_WRITE_HOST_VRAM, flags);
788 svga_set_texture_rendered_to(tex, st->slice, st->base.level);
789 }
790
791 FREE(st->swbuf);
792 sws->buffer_destroy(sws, st->hwbuf);
793 }
794
795
796 /**
797 * unmap direct map transfer request
798 */
799 static void
800 svga_texture_transfer_unmap_direct(struct svga_context *svga,
801 struct svga_transfer *st)
802 {
803 struct pipe_transfer *transfer = &st->base;
804 struct svga_texture *tex = svga_texture(transfer->resource);
805
806 svga_texture_surface_unmap(svga, transfer);
807
808 /* Now send an update command to update the content in the backend. */
809 if (st->base.usage & PIPE_TRANSFER_WRITE) {
810 struct svga_winsys_surface *surf = tex->handle;
811 enum pipe_error ret;
812
813 assert(svga_have_gb_objects(svga));
814
815 /* update the effected region */
816 SVGA3dBox box = st->box;
817 unsigned nlayers;
818
819 switch (tex->b.b.target) {
820 case PIPE_TEXTURE_2D_ARRAY:
821 case PIPE_TEXTURE_CUBE_ARRAY:
822 case PIPE_TEXTURE_1D_ARRAY:
823 nlayers = box.d;
824 box.d = 1;
825 break;
826 default:
827 nlayers = 1;
828 break;
829 }
830
831
832 if (0)
833 debug_printf("%s %d, %d, %d %d x %d x %d\n",
834 __FUNCTION__,
835 box.x, box.y, box.z,
836 box.w, box.h, box.d);
837
838 if (!svga->swc->force_coherent || tex->imported) {
839 if (svga_have_vgpu10(svga)) {
840 unsigned i;
841
842 for (i = 0; i < nlayers; i++) {
843 ret = update_image_vgpu10(svga, surf, &box,
844 st->slice + i, transfer->level,
845 tex->b.b.last_level + 1);
846 assert(ret == PIPE_OK);
847 }
848 } else {
849 assert(nlayers == 1);
850 ret = update_image_vgpu9(svga, surf, &box, st->slice,
851 transfer->level);
852 assert(ret == PIPE_OK);
853 }
854 }
855 (void) ret;
856 }
857 }
858
859
860 static void
861 svga_texture_transfer_unmap(struct pipe_context *pipe,
862 struct pipe_transfer *transfer)
863 {
864 struct svga_context *svga = svga_context(pipe);
865 struct svga_screen *ss = svga_screen(pipe->screen);
866 struct svga_winsys_screen *sws = ss->sws;
867 struct svga_transfer *st = svga_transfer(transfer);
868 struct svga_texture *tex = svga_texture(transfer->resource);
869
870 SVGA_STATS_TIME_PUSH(sws, SVGA_STATS_TIME_TEXTRANSFERUNMAP);
871
872 if (!st->use_direct_map) {
873 svga_texture_transfer_unmap_dma(svga, st);
874 }
875 else if (st->upload.buf) {
876 svga_texture_transfer_unmap_upload(svga, st);
877 }
878 else {
879 svga_texture_transfer_unmap_direct(svga, st);
880 }
881
882 if (st->base.usage & PIPE_TRANSFER_WRITE) {
883 svga->hud.num_resource_updates++;
884
885 /* Mark the texture level as dirty */
886 ss->texture_timestamp++;
887 svga_age_texture_view(tex, transfer->level);
888 if (transfer->resource->target == PIPE_TEXTURE_CUBE)
889 svga_define_texture_level(tex, st->slice, transfer->level);
890 else
891 svga_define_texture_level(tex, 0, transfer->level);
892 }
893
894 pipe_resource_reference(&st->base.resource, NULL);
895 FREE(st);
896 SVGA_STATS_TIME_POP(sws);
897 (void) sws;
898 }
899
900
901 /**
902 * Does format store depth values?
903 */
904 static inline boolean
905 format_has_depth(enum pipe_format format)
906 {
907 const struct util_format_description *desc = util_format_description(format);
908 return util_format_has_depth(desc);
909 }
910
911
912 struct u_resource_vtbl svga_texture_vtbl =
913 {
914 svga_texture_get_handle, /* get_handle */
915 svga_texture_destroy, /* resource_destroy */
916 svga_texture_transfer_map, /* transfer_map */
917 u_default_transfer_flush_region, /* transfer_flush_region */
918 svga_texture_transfer_unmap, /* transfer_unmap */
919 };
920
921
922 struct pipe_resource *
923 svga_texture_create(struct pipe_screen *screen,
924 const struct pipe_resource *template)
925 {
926 struct svga_screen *svgascreen = svga_screen(screen);
927 struct svga_texture *tex;
928 unsigned bindings = template->bind;
929
930 SVGA_STATS_TIME_PUSH(svgascreen->sws,
931 SVGA_STATS_TIME_CREATETEXTURE);
932
933 assert(template->last_level < SVGA_MAX_TEXTURE_LEVELS);
934 if (template->last_level >= SVGA_MAX_TEXTURE_LEVELS) {
935 goto fail_notex;
936 }
937
938 /* Verify the number of mipmap levels isn't impossibly large. For example,
939 * if the base 2D image is 16x16, we can't have 8 mipmap levels.
940 * the gallium frontend should never ask us to create a resource with invalid
941 * parameters.
942 */
943 {
944 unsigned max_dim = template->width0;
945
946 switch (template->target) {
947 case PIPE_TEXTURE_1D:
948 case PIPE_TEXTURE_1D_ARRAY:
949 // nothing
950 break;
951 case PIPE_TEXTURE_2D:
952 case PIPE_TEXTURE_CUBE:
953 case PIPE_TEXTURE_CUBE_ARRAY:
954 case PIPE_TEXTURE_2D_ARRAY:
955 max_dim = MAX2(max_dim, template->height0);
956 break;
957 case PIPE_TEXTURE_3D:
958 max_dim = MAX3(max_dim, template->height0, template->depth0);
959 break;
960 case PIPE_TEXTURE_RECT:
961 case PIPE_BUFFER:
962 assert(template->last_level == 0);
963 /* the assertion below should always pass */
964 break;
965 default:
966 debug_printf("Unexpected texture target type\n");
967 }
968 assert(1 << template->last_level <= max_dim);
969 }
970
971 tex = CALLOC_STRUCT(svga_texture);
972 if (!tex) {
973 goto fail_notex;
974 }
975
976 tex->defined = CALLOC(template->depth0 * template->array_size,
977 sizeof(tex->defined[0]));
978 if (!tex->defined) {
979 FREE(tex);
980 goto fail_notex;
981 }
982
983 tex->rendered_to = CALLOC(template->depth0 * template->array_size,
984 sizeof(tex->rendered_to[0]));
985 if (!tex->rendered_to) {
986 goto fail;
987 }
988
989 tex->dirty = CALLOC(template->depth0 * template->array_size,
990 sizeof(tex->dirty[0]));
991 if (!tex->dirty) {
992 goto fail;
993 }
994
995 tex->b.b = *template;
996 tex->b.vtbl = &svga_texture_vtbl;
997 pipe_reference_init(&tex->b.b.reference, 1);
998 tex->b.b.screen = screen;
999
1000 tex->key.flags = 0;
1001 tex->key.size.width = template->width0;
1002 tex->key.size.height = template->height0;
1003 tex->key.size.depth = template->depth0;
1004 tex->key.arraySize = 1;
1005 tex->key.numFaces = 1;
1006
1007 /* nr_samples=1 must be treated as a non-multisample texture */
1008 if (tex->b.b.nr_samples == 1) {
1009 tex->b.b.nr_samples = 0;
1010 }
1011 else if (tex->b.b.nr_samples > 1) {
1012 assert(svgascreen->sws->have_sm4_1);
1013 tex->key.flags |= SVGA3D_SURFACE_MULTISAMPLE;
1014 }
1015
1016 tex->key.sampleCount = tex->b.b.nr_samples;
1017
1018 if (svgascreen->sws->have_vgpu10) {
1019 switch (template->target) {
1020 case PIPE_TEXTURE_1D:
1021 tex->key.flags |= SVGA3D_SURFACE_1D;
1022 break;
1023 case PIPE_TEXTURE_1D_ARRAY:
1024 tex->key.flags |= SVGA3D_SURFACE_1D;
1025 /* fall-through */
1026 case PIPE_TEXTURE_2D_ARRAY:
1027 tex->key.flags |= SVGA3D_SURFACE_ARRAY;
1028 tex->key.arraySize = template->array_size;
1029 break;
1030 case PIPE_TEXTURE_3D:
1031 tex->key.flags |= SVGA3D_SURFACE_VOLUME;
1032 break;
1033 case PIPE_TEXTURE_CUBE:
1034 tex->key.flags |= (SVGA3D_SURFACE_CUBEMAP | SVGA3D_SURFACE_ARRAY);
1035 tex->key.numFaces = 6;
1036 break;
1037 case PIPE_TEXTURE_CUBE_ARRAY:
1038 assert(svgascreen->sws->have_sm4_1);
1039 tex->key.flags |= (SVGA3D_SURFACE_CUBEMAP | SVGA3D_SURFACE_ARRAY);
1040 tex->key.numFaces = 1; // arraySize already includes the 6 faces
1041 tex->key.arraySize = template->array_size;
1042 break;
1043 default:
1044 break;
1045 }
1046 }
1047 else {
1048 switch (template->target) {
1049 case PIPE_TEXTURE_3D:
1050 tex->key.flags |= SVGA3D_SURFACE_VOLUME;
1051 break;
1052 case PIPE_TEXTURE_CUBE:
1053 tex->key.flags |= SVGA3D_SURFACE_CUBEMAP;
1054 tex->key.numFaces = 6;
1055 break;
1056 default:
1057 break;
1058 }
1059 }
1060
1061 tex->key.cachable = 1;
1062
1063 if ((bindings & (PIPE_BIND_RENDER_TARGET | PIPE_BIND_DEPTH_STENCIL)) &&
1064 !(bindings & PIPE_BIND_SAMPLER_VIEW)) {
1065 /* Also check if the format can be sampled from */
1066 if (screen->is_format_supported(screen, template->format,
1067 template->target,
1068 template->nr_samples,
1069 template->nr_storage_samples,
1070 PIPE_BIND_SAMPLER_VIEW)) {
1071 bindings |= PIPE_BIND_SAMPLER_VIEW;
1072 }
1073 }
1074
1075 if (bindings & PIPE_BIND_SAMPLER_VIEW) {
1076 tex->key.flags |= SVGA3D_SURFACE_HINT_TEXTURE;
1077 tex->key.flags |= SVGA3D_SURFACE_BIND_SHADER_RESOURCE;
1078
1079 if (!(bindings & PIPE_BIND_RENDER_TARGET)) {
1080 /* Also check if the format is color renderable */
1081 if (screen->is_format_supported(screen, template->format,
1082 template->target,
1083 template->nr_samples,
1084 template->nr_storage_samples,
1085 PIPE_BIND_RENDER_TARGET)) {
1086 bindings |= PIPE_BIND_RENDER_TARGET;
1087 }
1088 }
1089
1090 if (!(bindings & PIPE_BIND_DEPTH_STENCIL)) {
1091 /* Also check if the format is depth/stencil renderable */
1092 if (screen->is_format_supported(screen, template->format,
1093 template->target,
1094 template->nr_samples,
1095 template->nr_storage_samples,
1096 PIPE_BIND_DEPTH_STENCIL)) {
1097 bindings |= PIPE_BIND_DEPTH_STENCIL;
1098 }
1099 }
1100 }
1101
1102 if (bindings & PIPE_BIND_DISPLAY_TARGET) {
1103 tex->key.cachable = 0;
1104 }
1105
1106 if (bindings & PIPE_BIND_SHARED) {
1107 tex->key.cachable = 0;
1108 }
1109
1110 if (bindings & (PIPE_BIND_SCANOUT | PIPE_BIND_CURSOR)) {
1111 tex->key.scanout = 1;
1112 tex->key.cachable = 0;
1113 }
1114
1115 /*
1116 * Note: Previously we never passed the
1117 * SVGA3D_SURFACE_HINT_RENDERTARGET hint. Mesa cannot
1118 * know beforehand whether a texture will be used as a rendertarget or not
1119 * and it always requests PIPE_BIND_RENDER_TARGET, therefore
1120 * passing the SVGA3D_SURFACE_HINT_RENDERTARGET here defeats its purpose.
1121 *
1122 * However, this was changed since other gallium frontends
1123 * (XA for example) uses it accurately and certain device versions
1124 * relies on it in certain situations to render correctly.
1125 */
1126 if ((bindings & PIPE_BIND_RENDER_TARGET) &&
1127 !util_format_is_s3tc(template->format)) {
1128 tex->key.flags |= SVGA3D_SURFACE_HINT_RENDERTARGET;
1129 tex->key.flags |= SVGA3D_SURFACE_BIND_RENDER_TARGET;
1130 }
1131
1132 if (bindings & PIPE_BIND_DEPTH_STENCIL) {
1133 tex->key.flags |= SVGA3D_SURFACE_HINT_DEPTHSTENCIL;
1134 tex->key.flags |= SVGA3D_SURFACE_BIND_DEPTH_STENCIL;
1135 }
1136
1137 tex->key.numMipLevels = template->last_level + 1;
1138
1139 tex->key.format = svga_translate_format(svgascreen, template->format,
1140 bindings);
1141 if (tex->key.format == SVGA3D_FORMAT_INVALID) {
1142 goto fail;
1143 }
1144
1145 /* Use typeless formats for sRGB and depth resources. Typeless
1146 * formats can be reinterpreted as other formats. For example,
1147 * SVGA3D_R8G8B8A8_UNORM_TYPELESS can be interpreted as
1148 * SVGA3D_R8G8B8A8_UNORM_SRGB or SVGA3D_R8G8B8A8_UNORM.
1149 */
1150 if (svgascreen->sws->have_vgpu10 &&
1151 (util_format_is_srgb(template->format) ||
1152 format_has_depth(template->format))) {
1153 SVGA3dSurfaceFormat typeless = svga_typeless_format(tex->key.format);
1154 if (0) {
1155 debug_printf("Convert resource type %s -> %s (bind 0x%x)\n",
1156 svga_format_name(tex->key.format),
1157 svga_format_name(typeless),
1158 bindings);
1159 }
1160
1161 if (svga_format_is_uncompressed_snorm(tex->key.format)) {
1162 /* We can't normally render to snorm surfaces, but once we
1163 * substitute a typeless format, we can if the rendertarget view
1164 * is unorm. This can happen with GL_ARB_copy_image.
1165 */
1166 tex->key.flags |= SVGA3D_SURFACE_HINT_RENDERTARGET;
1167 tex->key.flags |= SVGA3D_SURFACE_BIND_RENDER_TARGET;
1168 }
1169
1170 tex->key.format = typeless;
1171 }
1172
1173 SVGA_DBG(DEBUG_DMA, "surface_create for texture\n", tex->handle);
1174 tex->handle = svga_screen_surface_create(svgascreen, bindings,
1175 tex->b.b.usage,
1176 &tex->validated, &tex->key);
1177 if (!tex->handle) {
1178 goto fail;
1179 }
1180
1181 SVGA_DBG(DEBUG_DMA, " --> got sid %p (texture)\n", tex->handle);
1182
1183 debug_reference(&tex->b.b.reference,
1184 (debug_reference_descriptor)debug_describe_resource, 0);
1185
1186 tex->size = util_resource_size(template);
1187
1188 /* Determine if texture upload buffer can be used to upload this texture */
1189 tex->can_use_upload = svga_texture_transfer_map_can_upload(svgascreen,
1190 &tex->b.b);
1191
1192 /* Initialize the backing resource cache */
1193 tex->backed_handle = NULL;
1194
1195 svgascreen->hud.total_resource_bytes += tex->size;
1196 svgascreen->hud.num_resources++;
1197
1198 SVGA_STATS_TIME_POP(svgascreen->sws);
1199
1200 return &tex->b.b;
1201
1202 fail:
1203 if (tex->dirty)
1204 FREE(tex->dirty);
1205 if (tex->rendered_to)
1206 FREE(tex->rendered_to);
1207 if (tex->defined)
1208 FREE(tex->defined);
1209 FREE(tex);
1210 fail_notex:
1211 SVGA_STATS_TIME_POP(svgascreen->sws);
1212 return NULL;
1213 }
1214
1215
1216 struct pipe_resource *
1217 svga_texture_from_handle(struct pipe_screen *screen,
1218 const struct pipe_resource *template,
1219 struct winsys_handle *whandle)
1220 {
1221 struct svga_winsys_screen *sws = svga_winsys_screen(screen);
1222 struct svga_screen *ss = svga_screen(screen);
1223 struct svga_winsys_surface *srf;
1224 struct svga_texture *tex;
1225 enum SVGA3dSurfaceFormat format = 0;
1226 assert(screen);
1227
1228 /* Only supports one type */
1229 if ((template->target != PIPE_TEXTURE_2D &&
1230 template->target != PIPE_TEXTURE_RECT) ||
1231 template->last_level != 0 ||
1232 template->depth0 != 1) {
1233 return NULL;
1234 }
1235
1236 srf = sws->surface_from_handle(sws, whandle, &format);
1237
1238 if (!srf)
1239 return NULL;
1240
1241 if (!svga_format_is_shareable(ss, template->format, format,
1242 template->bind, true))
1243 goto out_unref;
1244
1245 tex = CALLOC_STRUCT(svga_texture);
1246 if (!tex)
1247 goto out_unref;
1248
1249 tex->defined = CALLOC(template->depth0 * template->array_size,
1250 sizeof(tex->defined[0]));
1251 if (!tex->defined)
1252 goto out_no_defined;
1253
1254 tex->b.b = *template;
1255 tex->b.vtbl = &svga_texture_vtbl;
1256 pipe_reference_init(&tex->b.b.reference, 1);
1257 tex->b.b.screen = screen;
1258
1259 SVGA_DBG(DEBUG_DMA, "wrap surface sid %p\n", srf);
1260
1261 tex->key.cachable = 0;
1262 tex->key.format = format;
1263 tex->handle = srf;
1264
1265 tex->rendered_to = CALLOC(1, sizeof(tex->rendered_to[0]));
1266 if (!tex->rendered_to)
1267 goto out_no_rendered_to;
1268
1269 tex->dirty = CALLOC(1, sizeof(tex->dirty[0]));
1270 if (!tex->dirty)
1271 goto out_no_dirty;
1272
1273 tex->imported = TRUE;
1274
1275 ss->hud.num_resources++;
1276
1277 return &tex->b.b;
1278
1279 out_no_dirty:
1280 FREE(tex->rendered_to);
1281 out_no_rendered_to:
1282 FREE(tex->defined);
1283 out_no_defined:
1284 FREE(tex);
1285 out_unref:
1286 sws->surface_reference(sws, &srf, NULL);
1287 return NULL;
1288 }
1289
1290 bool
1291 svga_texture_generate_mipmap(struct pipe_context *pipe,
1292 struct pipe_resource *pt,
1293 enum pipe_format format,
1294 unsigned base_level,
1295 unsigned last_level,
1296 unsigned first_layer,
1297 unsigned last_layer)
1298 {
1299 struct pipe_sampler_view templ, *psv;
1300 struct svga_pipe_sampler_view *sv;
1301 struct svga_context *svga = svga_context(pipe);
1302 struct svga_texture *tex = svga_texture(pt);
1303 enum pipe_error ret;
1304
1305 assert(svga_have_vgpu10(svga));
1306
1307 /* Only support 2D texture for now */
1308 if (pt->target != PIPE_TEXTURE_2D)
1309 return false;
1310
1311 /* Fallback to the mipmap generation utility for those formats that
1312 * do not support hw generate mipmap
1313 */
1314 if (!svga_format_support_gen_mips(format))
1315 return false;
1316
1317 /* Make sure the texture surface was created with
1318 * SVGA3D_SURFACE_BIND_RENDER_TARGET
1319 */
1320 if (!tex->handle || !(tex->key.flags & SVGA3D_SURFACE_BIND_RENDER_TARGET))
1321 return false;
1322
1323 templ.format = format;
1324 templ.u.tex.first_layer = first_layer;
1325 templ.u.tex.last_layer = last_layer;
1326 templ.u.tex.first_level = base_level;
1327 templ.u.tex.last_level = last_level;
1328
1329 psv = pipe->create_sampler_view(pipe, pt, &templ);
1330 if (psv == NULL)
1331 return false;
1332
1333 sv = svga_pipe_sampler_view(psv);
1334 ret = svga_validate_pipe_sampler_view(svga, sv);
1335 if (ret != PIPE_OK) {
1336 svga_context_flush(svga, NULL);
1337 ret = svga_validate_pipe_sampler_view(svga, sv);
1338 assert(ret == PIPE_OK);
1339 }
1340
1341 ret = SVGA3D_vgpu10_GenMips(svga->swc, sv->id, tex->handle);
1342 if (ret != PIPE_OK) {
1343 svga_context_flush(svga, NULL);
1344 ret = SVGA3D_vgpu10_GenMips(svga->swc, sv->id, tex->handle);
1345 }
1346 pipe_sampler_view_reference(&psv, NULL);
1347
1348 svga->hud.num_generate_mipmap++;
1349
1350 return true;
1351 }
1352
1353
1354 /* texture upload buffer default size in bytes */
1355 #define TEX_UPLOAD_DEFAULT_SIZE (1024 * 1024)
1356
1357 /**
1358 * Create a texture upload buffer
1359 */
1360 boolean
1361 svga_texture_transfer_map_upload_create(struct svga_context *svga)
1362 {
1363 svga->tex_upload = u_upload_create(&svga->pipe, TEX_UPLOAD_DEFAULT_SIZE,
1364 PIPE_BIND_CUSTOM, PIPE_USAGE_STAGING, 0);
1365 if (svga->tex_upload)
1366 u_upload_disable_persistent(svga->tex_upload);
1367
1368 return svga->tex_upload != NULL;
1369 }
1370
1371
1372 /**
1373 * Destroy the texture upload buffer
1374 */
1375 void
1376 svga_texture_transfer_map_upload_destroy(struct svga_context *svga)
1377 {
1378 u_upload_destroy(svga->tex_upload);
1379 }
1380
1381
1382 /**
1383 * Returns true if this transfer map request can use the upload buffer.
1384 */
1385 boolean
1386 svga_texture_transfer_map_can_upload(const struct svga_screen *svgascreen,
1387 const struct pipe_resource *texture)
1388 {
1389 if (svgascreen->sws->have_transfer_from_buffer_cmd == FALSE)
1390 return FALSE;
1391
1392 /* TransferFromBuffer command is not well supported with multi-samples surface */
1393 if (texture->nr_samples > 1)
1394 return FALSE;
1395
1396 if (util_format_is_compressed(texture->format)) {
1397 /* XXX Need to take a closer look to see why texture upload
1398 * with 3D texture with compressed format fails
1399 */
1400 if (texture->target == PIPE_TEXTURE_3D)
1401 return FALSE;
1402 }
1403 else if (texture->format == PIPE_FORMAT_R9G9B9E5_FLOAT) {
1404 return FALSE;
1405 }
1406
1407 return TRUE;
1408 }
1409
1410
1411 /**
1412 * Use upload buffer for the transfer map request.
1413 */
1414 void *
1415 svga_texture_transfer_map_upload(struct svga_context *svga,
1416 struct svga_transfer *st)
1417 {
1418 struct pipe_resource *texture = st->base.resource;
1419 struct pipe_resource *tex_buffer = NULL;
1420 void *tex_map;
1421 unsigned nblocksx, nblocksy;
1422 unsigned offset;
1423 unsigned upload_size;
1424
1425 assert(svga->tex_upload);
1426
1427 st->upload.box.x = st->base.box.x;
1428 st->upload.box.y = st->base.box.y;
1429 st->upload.box.z = st->base.box.z;
1430 st->upload.box.w = st->base.box.width;
1431 st->upload.box.h = st->base.box.height;
1432 st->upload.box.d = st->base.box.depth;
1433 st->upload.nlayers = 1;
1434
1435 switch (texture->target) {
1436 case PIPE_TEXTURE_CUBE:
1437 st->upload.box.z = 0;
1438 break;
1439 case PIPE_TEXTURE_2D_ARRAY:
1440 case PIPE_TEXTURE_CUBE_ARRAY:
1441 st->upload.nlayers = st->base.box.depth;
1442 st->upload.box.z = 0;
1443 st->upload.box.d = 1;
1444 break;
1445 case PIPE_TEXTURE_1D_ARRAY:
1446 st->upload.nlayers = st->base.box.depth;
1447 st->upload.box.y = st->upload.box.z = 0;
1448 st->upload.box.d = 1;
1449 break;
1450 default:
1451 break;
1452 }
1453
1454 nblocksx = util_format_get_nblocksx(texture->format, st->base.box.width);
1455 nblocksy = util_format_get_nblocksy(texture->format, st->base.box.height);
1456
1457 st->base.stride = nblocksx * util_format_get_blocksize(texture->format);
1458 st->base.layer_stride = st->base.stride * nblocksy;
1459
1460 /* In order to use the TransferFromBuffer command to update the
1461 * texture content from the buffer, the layer stride for a multi-layers
1462 * surface needs to be in multiples of 16 bytes.
1463 */
1464 if (st->upload.nlayers > 1 && st->base.layer_stride & 15)
1465 return NULL;
1466
1467 upload_size = st->base.layer_stride * st->base.box.depth;
1468 upload_size = align(upload_size, 16);
1469
1470 #ifdef DEBUG
1471 if (util_format_is_compressed(texture->format)) {
1472 struct svga_texture *tex = svga_texture(texture);
1473 unsigned blockw, blockh, bytesPerBlock;
1474
1475 svga_format_size(tex->key.format, &blockw, &blockh, &bytesPerBlock);
1476
1477 /* dest box must start on block boundary */
1478 assert((st->base.box.x % blockw) == 0);
1479 assert((st->base.box.y % blockh) == 0);
1480 }
1481 #endif
1482
1483 /* If the upload size exceeds the default buffer size, the
1484 * upload buffer manager code will try to allocate a new buffer
1485 * with the new buffer size.
1486 */
1487 u_upload_alloc(svga->tex_upload, 0, upload_size, 16,
1488 &offset, &tex_buffer, &tex_map);
1489
1490 if (!tex_map) {
1491 return NULL;
1492 }
1493
1494 st->upload.buf = tex_buffer;
1495 st->upload.map = tex_map;
1496 st->upload.offset = offset;
1497
1498 return tex_map;
1499 }
1500
1501
1502 /**
1503 * Unmap upload map transfer request
1504 */
1505 void
1506 svga_texture_transfer_unmap_upload(struct svga_context *svga,
1507 struct svga_transfer *st)
1508 {
1509 struct svga_winsys_surface *srcsurf;
1510 struct svga_winsys_surface *dstsurf;
1511 struct pipe_resource *texture = st->base.resource;
1512 struct svga_texture *tex = svga_texture(texture);
1513 enum pipe_error ret;
1514 unsigned subResource;
1515 unsigned numMipLevels;
1516 unsigned i, layer;
1517 unsigned offset = st->upload.offset;
1518
1519 assert(svga->tex_upload);
1520 assert(st->upload.buf);
1521
1522 /* unmap the texture upload buffer */
1523 u_upload_unmap(svga->tex_upload);
1524
1525 srcsurf = svga_buffer_handle(svga, st->upload.buf, 0);
1526 dstsurf = svga_texture(texture)->handle;
1527 assert(dstsurf);
1528
1529 numMipLevels = texture->last_level + 1;
1530
1531 for (i = 0, layer = st->slice; i < st->upload.nlayers; i++, layer++) {
1532 subResource = layer * numMipLevels + st->base.level;
1533
1534 /* send a transferFromBuffer command to update the host texture surface */
1535 assert((offset & 15) == 0);
1536
1537 ret = SVGA3D_vgpu10_TransferFromBuffer(svga->swc, srcsurf,
1538 offset,
1539 st->base.stride,
1540 st->base.layer_stride,
1541 dstsurf, subResource,
1542 &st->upload.box);
1543 if (ret != PIPE_OK) {
1544 svga_context_flush(svga, NULL);
1545 ret = SVGA3D_vgpu10_TransferFromBuffer(svga->swc, srcsurf,
1546 offset,
1547 st->base.stride,
1548 st->base.layer_stride,
1549 dstsurf, subResource,
1550 &st->upload.box);
1551 assert(ret == PIPE_OK);
1552 }
1553 offset += st->base.layer_stride;
1554
1555 /* Set rendered-to flag */
1556 svga_set_texture_rendered_to(tex, layer, st->base.level);
1557 }
1558
1559 pipe_resource_reference(&st->upload.buf, NULL);
1560 }
1561
1562 /**
1563 * Does the device format backing this surface have an
1564 * alpha channel?
1565 *
1566 * \param texture[in] The texture whose format we're querying
1567 * \return TRUE if the format has an alpha channel, FALSE otherwise
1568 *
1569 * For locally created textures, the device (svga) format is typically
1570 * identical to svga_format(texture->format), and we can use the gallium
1571 * format tests to determine whether the device format has an alpha channel
1572 * or not. However, for textures backed by imported svga surfaces that is
1573 * not always true, and we have to look at the SVGA3D utilities.
1574 */
1575 boolean
1576 svga_texture_device_format_has_alpha(struct pipe_resource *texture)
1577 {
1578 /* the svga_texture() call below is invalid for PIPE_BUFFER resources */
1579 assert(texture->target != PIPE_BUFFER);
1580
1581 enum svga3d_block_desc block_desc =
1582 svga3dsurface_get_desc(svga_texture(texture)->key.format)->block_desc;
1583
1584 return !!(block_desc & SVGA3DBLOCKDESC_ALPHA);
1585 }