4cc58e001c0a0eab6b73f85f76ecb442dbc75219
[mesa.git] / src / gallium / drivers / svga / svga_resource_texture.c
1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 **********************************************************/
25
26 #include "svga3d_reg.h"
27 #include "svga3d_surfacedefs.h"
28
29 #include "pipe/p_state.h"
30 #include "pipe/p_defines.h"
31 #include "os/os_thread.h"
32 #include "util/format/u_format.h"
33 #include "util/u_inlines.h"
34 #include "util/u_math.h"
35 #include "util/u_memory.h"
36 #include "util/u_resource.h"
37 #include "util/u_upload_mgr.h"
38
39 #include "svga_cmd.h"
40 #include "svga_format.h"
41 #include "svga_screen.h"
42 #include "svga_context.h"
43 #include "svga_resource_texture.h"
44 #include "svga_resource_buffer.h"
45 #include "svga_sampler_view.h"
46 #include "svga_winsys.h"
47 #include "svga_debug.h"
48
49
50 static void
51 svga_transfer_dma_band(struct svga_context *svga,
52 struct svga_transfer *st,
53 SVGA3dTransferType transfer,
54 unsigned x, unsigned y, unsigned z,
55 unsigned w, unsigned h, unsigned d,
56 unsigned srcx, unsigned srcy, unsigned srcz,
57 SVGA3dSurfaceDMAFlags flags)
58 {
59 struct svga_texture *texture = svga_texture(st->base.resource);
60 SVGA3dCopyBox box;
61 enum pipe_error ret;
62
63 assert(!st->use_direct_map);
64
65 box.x = x;
66 box.y = y;
67 box.z = z;
68 box.w = w;
69 box.h = h;
70 box.d = d;
71 box.srcx = srcx;
72 box.srcy = srcy;
73 box.srcz = srcz;
74
75 SVGA_DBG(DEBUG_DMA, "dma %s sid %p, face %u, (%u, %u, %u) - "
76 "(%u, %u, %u), %ubpp\n",
77 transfer == SVGA3D_WRITE_HOST_VRAM ? "to" : "from",
78 texture->handle,
79 st->slice,
80 x,
81 y,
82 z,
83 x + w,
84 y + h,
85 z + 1,
86 util_format_get_blocksize(texture->b.b.format) * 8 /
87 (util_format_get_blockwidth(texture->b.b.format)
88 * util_format_get_blockheight(texture->b.b.format)));
89
90 ret = SVGA3D_SurfaceDMA(svga->swc, st, transfer, &box, 1, flags);
91 if (ret != PIPE_OK) {
92 svga_context_flush(svga, NULL);
93 ret = SVGA3D_SurfaceDMA(svga->swc, st, transfer, &box, 1, flags);
94 assert(ret == PIPE_OK);
95 }
96 }
97
98
99 static void
100 svga_transfer_dma(struct svga_context *svga,
101 struct svga_transfer *st,
102 SVGA3dTransferType transfer,
103 SVGA3dSurfaceDMAFlags flags)
104 {
105 struct svga_texture *texture = svga_texture(st->base.resource);
106 struct svga_screen *screen = svga_screen(texture->b.b.screen);
107 struct svga_winsys_screen *sws = screen->sws;
108 struct pipe_fence_handle *fence = NULL;
109
110 assert(!st->use_direct_map);
111
112 if (transfer == SVGA3D_READ_HOST_VRAM) {
113 SVGA_DBG(DEBUG_PERF, "%s: readback transfer\n", __FUNCTION__);
114 }
115
116 /* Ensure any pending operations on host surfaces are queued on the command
117 * buffer first.
118 */
119 svga_surfaces_flush(svga);
120
121 if (!st->swbuf) {
122 /* Do the DMA transfer in a single go */
123 svga_transfer_dma_band(svga, st, transfer,
124 st->box.x, st->box.y, st->box.z,
125 st->box.w, st->box.h, st->box.d,
126 0, 0, 0,
127 flags);
128
129 if (transfer == SVGA3D_READ_HOST_VRAM) {
130 svga_context_flush(svga, &fence);
131 sws->fence_finish(sws, fence, PIPE_TIMEOUT_INFINITE, 0);
132 sws->fence_reference(sws, &fence, NULL);
133 }
134 }
135 else {
136 int y, h, y_max;
137 unsigned blockheight =
138 util_format_get_blockheight(st->base.resource->format);
139
140 h = st->hw_nblocksy * blockheight;
141 y_max = st->box.y + st->box.h;
142
143 for (y = st->box.y; y < y_max; y += h) {
144 unsigned offset, length;
145 void *hw, *sw;
146
147 if (y + h > y_max)
148 h = y_max - y;
149
150 /* Transfer band must be aligned to pixel block boundaries */
151 assert(y % blockheight == 0);
152 assert(h % blockheight == 0);
153
154 /* First band starts at the top of the SW buffer. */
155 offset = (y - st->box.y) * st->base.stride / blockheight;
156 length = h * st->base.stride / blockheight;
157
158 sw = (uint8_t *) st->swbuf + offset;
159
160 if (transfer == SVGA3D_WRITE_HOST_VRAM) {
161 unsigned usage = PIPE_TRANSFER_WRITE;
162
163 /* Don't write to an in-flight DMA buffer. Synchronize or
164 * discard in-flight storage. */
165 if (y != st->box.y) {
166 svga_context_flush(svga, NULL);
167 usage |= PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE;
168 }
169
170 hw = sws->buffer_map(sws, st->hwbuf, usage);
171 assert(hw);
172 if (hw) {
173 memcpy(hw, sw, length);
174 sws->buffer_unmap(sws, st->hwbuf);
175 }
176 }
177
178 svga_transfer_dma_band(svga, st, transfer,
179 st->box.x, y, st->box.z,
180 st->box.w, h, st->box.d,
181 0, 0, 0, flags);
182
183 /*
184 * Prevent the texture contents to be discarded on the next band
185 * upload.
186 */
187 flags.discard = FALSE;
188
189 if (transfer == SVGA3D_READ_HOST_VRAM) {
190 svga_context_flush(svga, &fence);
191 sws->fence_finish(sws, fence, PIPE_TIMEOUT_INFINITE, 0);
192
193 hw = sws->buffer_map(sws, st->hwbuf, PIPE_TRANSFER_READ);
194 assert(hw);
195 if (hw) {
196 memcpy(sw, hw, length);
197 sws->buffer_unmap(sws, st->hwbuf);
198 }
199 }
200 }
201 }
202 }
203
204
205
206 static bool
207 svga_texture_get_handle(struct pipe_screen *screen,
208 struct pipe_resource *texture,
209 struct winsys_handle *whandle)
210 {
211 struct svga_winsys_screen *sws = svga_winsys_screen(texture->screen);
212 unsigned stride;
213
214 assert(svga_texture(texture)->key.cachable == 0);
215 svga_texture(texture)->key.cachable = 0;
216
217 stride = util_format_get_nblocksx(texture->format, texture->width0) *
218 util_format_get_blocksize(texture->format);
219
220 return sws->surface_get_handle(sws, svga_texture(texture)->handle,
221 stride, whandle);
222 }
223
224
225 static void
226 svga_texture_destroy(struct pipe_screen *screen,
227 struct pipe_resource *pt)
228 {
229 struct svga_screen *ss = svga_screen(screen);
230 struct svga_texture *tex = svga_texture(pt);
231
232 ss->texture_timestamp++;
233
234 svga_sampler_view_reference(&tex->cached_view, NULL);
235
236 /*
237 DBG("%s deleting %p\n", __FUNCTION__, (void *) tex);
238 */
239 SVGA_DBG(DEBUG_DMA, "unref sid %p (texture)\n", tex->handle);
240 svga_screen_surface_destroy(ss, &tex->key, &tex->handle);
241
242 /* Destroy the backed surface handle if exists */
243 if (tex->backed_handle)
244 svga_screen_surface_destroy(ss, &tex->backed_key, &tex->backed_handle);
245
246 ss->hud.total_resource_bytes -= tex->size;
247
248 FREE(tex->defined);
249 FREE(tex->rendered_to);
250 FREE(tex->dirty);
251 FREE(tex);
252
253 assert(ss->hud.num_resources > 0);
254 if (ss->hud.num_resources > 0)
255 ss->hud.num_resources--;
256 }
257
258
259 /**
260 * Determine if we need to read back a texture image before mapping it.
261 */
262 static inline boolean
263 need_tex_readback(struct svga_transfer *st)
264 {
265 if (st->base.usage & PIPE_TRANSFER_READ)
266 return TRUE;
267
268 if ((st->base.usage & PIPE_TRANSFER_WRITE) &&
269 ((st->base.usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) == 0)) {
270 return svga_was_texture_rendered_to(svga_texture(st->base.resource),
271 st->slice, st->base.level);
272 }
273
274 return FALSE;
275 }
276
277
278 static enum pipe_error
279 readback_image_vgpu9(struct svga_context *svga,
280 struct svga_winsys_surface *surf,
281 unsigned slice,
282 unsigned level)
283 {
284 enum pipe_error ret;
285
286 ret = SVGA3D_ReadbackGBImage(svga->swc, surf, slice, level);
287 if (ret != PIPE_OK) {
288 svga_context_flush(svga, NULL);
289 ret = SVGA3D_ReadbackGBImage(svga->swc, surf, slice, level);
290 }
291 return ret;
292 }
293
294
295 static enum pipe_error
296 readback_image_vgpu10(struct svga_context *svga,
297 struct svga_winsys_surface *surf,
298 unsigned slice,
299 unsigned level,
300 unsigned numMipLevels)
301 {
302 enum pipe_error ret;
303 unsigned subResource;
304
305 subResource = slice * numMipLevels + level;
306 ret = SVGA3D_vgpu10_ReadbackSubResource(svga->swc, surf, subResource);
307 if (ret != PIPE_OK) {
308 svga_context_flush(svga, NULL);
309 ret = SVGA3D_vgpu10_ReadbackSubResource(svga->swc, surf, subResource);
310 }
311 return ret;
312 }
313
314
315 /**
316 * Use DMA for the transfer request
317 */
318 static void *
319 svga_texture_transfer_map_dma(struct svga_context *svga,
320 struct svga_transfer *st)
321 {
322 struct svga_winsys_screen *sws = svga_screen(svga->pipe.screen)->sws;
323 struct pipe_resource *texture = st->base.resource;
324 unsigned nblocksx, nblocksy;
325 unsigned d;
326 unsigned usage = st->base.usage;
327
328 /* we'll put the data into a tightly packed buffer */
329 nblocksx = util_format_get_nblocksx(texture->format, st->box.w);
330 nblocksy = util_format_get_nblocksy(texture->format, st->box.h);
331 d = st->box.d;
332
333 st->base.stride = nblocksx*util_format_get_blocksize(texture->format);
334 st->base.layer_stride = st->base.stride * nblocksy;
335 st->hw_nblocksy = nblocksy;
336
337 st->hwbuf = svga_winsys_buffer_create(svga, 1, 0,
338 st->hw_nblocksy * st->base.stride * d);
339
340 while (!st->hwbuf && (st->hw_nblocksy /= 2)) {
341 st->hwbuf =
342 svga_winsys_buffer_create(svga, 1, 0,
343 st->hw_nblocksy * st->base.stride * d);
344 }
345
346 if (!st->hwbuf)
347 return NULL;
348
349 if (st->hw_nblocksy < nblocksy) {
350 /* We couldn't allocate a hardware buffer big enough for the transfer,
351 * so allocate regular malloc memory instead
352 */
353 if (0) {
354 debug_printf("%s: failed to allocate %u KB of DMA, "
355 "splitting into %u x %u KB DMA transfers\n",
356 __FUNCTION__,
357 (nblocksy * st->base.stride + 1023) / 1024,
358 (nblocksy + st->hw_nblocksy - 1) / st->hw_nblocksy,
359 (st->hw_nblocksy * st->base.stride + 1023) / 1024);
360 }
361
362 st->swbuf = MALLOC(nblocksy * st->base.stride * d);
363 if (!st->swbuf) {
364 sws->buffer_destroy(sws, st->hwbuf);
365 return NULL;
366 }
367 }
368
369 if (usage & PIPE_TRANSFER_READ) {
370 SVGA3dSurfaceDMAFlags flags;
371 memset(&flags, 0, sizeof flags);
372 svga_transfer_dma(svga, st, SVGA3D_READ_HOST_VRAM, flags);
373 }
374
375 if (st->swbuf) {
376 return st->swbuf;
377 }
378 else {
379 return sws->buffer_map(sws, st->hwbuf, usage);
380 }
381 }
382
383
384 /**
385 * Use direct map for the transfer request
386 */
387 static void *
388 svga_texture_transfer_map_direct(struct svga_context *svga,
389 struct svga_transfer *st)
390 {
391 struct svga_winsys_screen *sws = svga_screen(svga->pipe.screen)->sws;
392 struct pipe_transfer *transfer = &st->base;
393 struct pipe_resource *texture = transfer->resource;
394 struct svga_texture *tex = svga_texture(texture);
395 struct svga_winsys_surface *surf = tex->handle;
396 unsigned level = st->base.level;
397 unsigned w, h, nblocksx, nblocksy, i;
398 unsigned usage = st->base.usage;
399
400 if (need_tex_readback(st)) {
401 enum pipe_error ret;
402
403 svga_surfaces_flush(svga);
404
405 if (!svga->swc->force_coherent || tex->imported) {
406 for (i = 0; i < st->box.d; i++) {
407 if (svga_have_vgpu10(svga)) {
408 ret = readback_image_vgpu10(svga, surf, st->slice + i, level,
409 tex->b.b.last_level + 1);
410 } else {
411 ret = readback_image_vgpu9(svga, surf, st->slice + i, level);
412 }
413 }
414 svga->hud.num_readbacks++;
415 SVGA_STATS_COUNT_INC(sws, SVGA_STATS_COUNT_TEXREADBACK);
416
417 assert(ret == PIPE_OK);
418 (void) ret;
419
420 svga_context_flush(svga, NULL);
421 }
422 /*
423 * Note: if PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE were specified
424 * we could potentially clear the flag for all faces/layers/mips.
425 */
426 svga_clear_texture_rendered_to(tex, st->slice, level);
427 }
428 else {
429 assert(usage & PIPE_TRANSFER_WRITE);
430 if ((usage & PIPE_TRANSFER_UNSYNCHRONIZED) == 0) {
431 if (svga_is_texture_dirty(tex, st->slice, level)) {
432 /*
433 * do a surface flush if the subresource has been modified
434 * in this command buffer.
435 */
436 svga_surfaces_flush(svga);
437 if (!sws->surface_is_flushed(sws, surf)) {
438 svga->hud.surface_write_flushes++;
439 SVGA_STATS_COUNT_INC(sws, SVGA_STATS_COUNT_SURFACEWRITEFLUSH);
440 svga_context_flush(svga, NULL);
441 }
442 }
443 }
444 }
445
446 /* we'll directly access the guest-backed surface */
447 w = u_minify(texture->width0, level);
448 h = u_minify(texture->height0, level);
449 nblocksx = util_format_get_nblocksx(texture->format, w);
450 nblocksy = util_format_get_nblocksy(texture->format, h);
451 st->hw_nblocksy = nblocksy;
452 st->base.stride = nblocksx*util_format_get_blocksize(texture->format);
453 st->base.layer_stride = st->base.stride * nblocksy;
454
455 /*
456 * Begin mapping code
457 */
458 {
459 SVGA3dSize baseLevelSize;
460 uint8_t *map;
461 boolean retry;
462 unsigned offset, mip_width, mip_height;
463
464 map = svga->swc->surface_map(svga->swc, surf, usage, &retry);
465 if (map == NULL && retry) {
466 /*
467 * At this point, the svga_surfaces_flush() should already have
468 * called in svga_texture_get_transfer().
469 */
470 svga->hud.surface_write_flushes++;
471 svga_context_flush(svga, NULL);
472 map = svga->swc->surface_map(svga->swc, surf, usage, &retry);
473 }
474
475 /*
476 * Make sure we return NULL if the map fails
477 */
478 if (!map) {
479 return NULL;
480 }
481
482 /**
483 * Compute the offset to the specific texture slice in the buffer.
484 */
485 baseLevelSize.width = tex->b.b.width0;
486 baseLevelSize.height = tex->b.b.height0;
487 baseLevelSize.depth = tex->b.b.depth0;
488
489 if ((tex->b.b.target == PIPE_TEXTURE_1D_ARRAY) ||
490 (tex->b.b.target == PIPE_TEXTURE_2D_ARRAY) ||
491 (tex->b.b.target == PIPE_TEXTURE_CUBE_ARRAY)) {
492 st->base.layer_stride =
493 svga3dsurface_get_image_offset(tex->key.format, baseLevelSize,
494 tex->b.b.last_level + 1, 1, 0);
495 }
496
497 offset = svga3dsurface_get_image_offset(tex->key.format, baseLevelSize,
498 tex->b.b.last_level + 1, /* numMips */
499 st->slice, level);
500 if (level > 0) {
501 assert(offset > 0);
502 }
503
504 mip_width = u_minify(tex->b.b.width0, level);
505 mip_height = u_minify(tex->b.b.height0, level);
506
507 offset += svga3dsurface_get_pixel_offset(tex->key.format,
508 mip_width, mip_height,
509 st->box.x,
510 st->box.y,
511 st->box.z);
512
513 return (void *) (map + offset);
514 }
515 }
516
517
518 /**
519 * Request a transfer map to the texture resource
520 */
521 static void *
522 svga_texture_transfer_map(struct pipe_context *pipe,
523 struct pipe_resource *texture,
524 unsigned level,
525 unsigned usage,
526 const struct pipe_box *box,
527 struct pipe_transfer **ptransfer)
528 {
529 struct svga_context *svga = svga_context(pipe);
530 struct svga_winsys_screen *sws = svga_screen(pipe->screen)->sws;
531 struct svga_texture *tex = svga_texture(texture);
532 struct svga_transfer *st;
533 struct svga_winsys_surface *surf = tex->handle;
534 boolean use_direct_map = svga_have_gb_objects(svga) &&
535 (!svga_have_gb_dma(svga) || (usage & PIPE_TRANSFER_WRITE));
536 void *map = NULL;
537 int64_t begin = svga_get_time(svga);
538
539 SVGA_STATS_TIME_PUSH(sws, SVGA_STATS_TIME_TEXTRANSFERMAP);
540
541 if (!surf)
542 goto done;
543
544 /* We can't map texture storage directly unless we have GB objects */
545 if (usage & PIPE_TRANSFER_MAP_DIRECTLY) {
546 if (svga_have_gb_objects(svga))
547 use_direct_map = TRUE;
548 else
549 goto done;
550 }
551
552 st = CALLOC_STRUCT(svga_transfer);
553 if (!st)
554 goto done;
555
556 st->base.level = level;
557 st->base.usage = usage;
558 st->base.box = *box;
559
560 /* The modified transfer map box with the array index removed from z.
561 * The array index is specified in slice.
562 */
563 st->box.x = box->x;
564 st->box.y = box->y;
565 st->box.z = box->z;
566 st->box.w = box->width;
567 st->box.h = box->height;
568 st->box.d = box->depth;
569
570 switch (tex->b.b.target) {
571 case PIPE_TEXTURE_CUBE:
572 st->slice = st->base.box.z;
573 st->box.z = 0; /* so we don't apply double offsets below */
574 break;
575 case PIPE_TEXTURE_1D_ARRAY:
576 case PIPE_TEXTURE_2D_ARRAY:
577 case PIPE_TEXTURE_CUBE_ARRAY:
578 st->slice = st->base.box.z;
579 st->box.z = 0; /* so we don't apply double offsets below */
580
581 /* Force direct map for transfering multiple slices */
582 if (st->base.box.depth > 1)
583 use_direct_map = svga_have_gb_objects(svga);
584
585 break;
586 default:
587 st->slice = 0;
588 break;
589 }
590
591 /* Force direct map for multisample surface */
592 if (texture->nr_samples > 1) {
593 assert(svga_have_gb_objects(svga));
594 assert(sws->have_sm4_1);
595 use_direct_map = TRUE;
596 }
597
598 st->use_direct_map = use_direct_map;
599 pipe_resource_reference(&st->base.resource, texture);
600
601 /* If this is the first time mapping to the surface in this
602 * command buffer, clear the dirty masks of this surface.
603 */
604 if (sws->surface_is_flushed(sws, surf)) {
605 svga_clear_texture_dirty(tex);
606 }
607
608 if (!use_direct_map) {
609 /* upload to the DMA buffer */
610 map = svga_texture_transfer_map_dma(svga, st);
611 }
612 else {
613 boolean can_use_upload = tex->can_use_upload &&
614 !(st->base.usage & PIPE_TRANSFER_READ);
615 boolean was_rendered_to =
616 svga_was_texture_rendered_to(svga_texture(texture),
617 st->slice, st->base.level);
618
619 /* If the texture was already rendered to and upload buffer
620 * is supported, then we will use upload buffer to
621 * avoid the need to read back the texture content; otherwise,
622 * we'll first try to map directly to the GB surface, if it is blocked,
623 * then we'll try the upload buffer.
624 */
625 if (was_rendered_to && can_use_upload) {
626 map = svga_texture_transfer_map_upload(svga, st);
627 }
628 else {
629 unsigned orig_usage = st->base.usage;
630
631 /* First try directly map to the GB surface */
632 if (can_use_upload)
633 st->base.usage |= PIPE_TRANSFER_DONTBLOCK;
634 map = svga_texture_transfer_map_direct(svga, st);
635 st->base.usage = orig_usage;
636
637 if (!map && can_use_upload) {
638 /* if direct map with DONTBLOCK fails, then try upload to the
639 * texture upload buffer.
640 */
641 map = svga_texture_transfer_map_upload(svga, st);
642 }
643 }
644
645 /* If upload fails, then try direct map again without forcing it
646 * to DONTBLOCK.
647 */
648 if (!map) {
649 map = svga_texture_transfer_map_direct(svga, st);
650 }
651 }
652
653 if (!map) {
654 FREE(st);
655 }
656 else {
657 *ptransfer = &st->base;
658 svga->hud.num_textures_mapped++;
659 if (usage & PIPE_TRANSFER_WRITE) {
660 /* record texture upload for HUD */
661 svga->hud.num_bytes_uploaded +=
662 st->base.layer_stride * st->box.d;
663
664 /* mark this texture level as dirty */
665 svga_set_texture_dirty(tex, st->slice, level);
666 }
667 }
668
669 done:
670 svga->hud.map_buffer_time += (svga_get_time(svga) - begin);
671 SVGA_STATS_TIME_POP(sws);
672 (void) sws;
673
674 return map;
675 }
676
677 /**
678 * Unmap a GB texture surface.
679 */
680 static void
681 svga_texture_surface_unmap(struct svga_context *svga,
682 struct pipe_transfer *transfer)
683 {
684 struct svga_winsys_surface *surf = svga_texture(transfer->resource)->handle;
685 struct svga_winsys_context *swc = svga->swc;
686 boolean rebind;
687
688 assert(surf);
689
690 swc->surface_unmap(swc, surf, &rebind);
691 if (rebind) {
692 enum pipe_error ret;
693 ret = SVGA3D_BindGBSurface(swc, surf);
694 if (ret != PIPE_OK) {
695 /* flush and retry */
696 svga_context_flush(svga, NULL);
697 ret = SVGA3D_BindGBSurface(swc, surf);
698 assert(ret == PIPE_OK);
699 }
700 if (swc->force_coherent) {
701 ret = SVGA3D_UpdateGBSurface(swc, surf);
702 if (ret != PIPE_OK) {
703 /* flush and retry */
704 svga_context_flush(svga, NULL);
705 ret = SVGA3D_UpdateGBSurface(swc, surf);
706 assert(ret == PIPE_OK);
707 }
708 }
709 }
710 }
711
712
713 static enum pipe_error
714 update_image_vgpu9(struct svga_context *svga,
715 struct svga_winsys_surface *surf,
716 const SVGA3dBox *box,
717 unsigned slice,
718 unsigned level)
719 {
720 enum pipe_error ret;
721
722 ret = SVGA3D_UpdateGBImage(svga->swc, surf, box, slice, level);
723 if (ret != PIPE_OK) {
724 svga_context_flush(svga, NULL);
725 ret = SVGA3D_UpdateGBImage(svga->swc, surf, box, slice, level);
726 }
727 return ret;
728 }
729
730
731 static enum pipe_error
732 update_image_vgpu10(struct svga_context *svga,
733 struct svga_winsys_surface *surf,
734 const SVGA3dBox *box,
735 unsigned slice,
736 unsigned level,
737 unsigned numMipLevels)
738 {
739 enum pipe_error ret;
740 unsigned subResource;
741
742 subResource = slice * numMipLevels + level;
743
744 ret = SVGA3D_vgpu10_UpdateSubResource(svga->swc, surf, box, subResource);
745 if (ret != PIPE_OK) {
746 svga_context_flush(svga, NULL);
747 ret = SVGA3D_vgpu10_UpdateSubResource(svga->swc, surf, box, subResource);
748 }
749 return ret;
750 }
751
752
753 /**
754 * unmap DMA transfer request
755 */
756 static void
757 svga_texture_transfer_unmap_dma(struct svga_context *svga,
758 struct svga_transfer *st)
759 {
760 struct svga_winsys_screen *sws = svga_screen(svga->pipe.screen)->sws;
761
762 if (!st->swbuf)
763 sws->buffer_unmap(sws, st->hwbuf);
764
765 if (st->base.usage & PIPE_TRANSFER_WRITE) {
766 /* Use DMA to transfer texture data */
767 SVGA3dSurfaceDMAFlags flags;
768 struct pipe_resource *texture = st->base.resource;
769 struct svga_texture *tex = svga_texture(texture);
770
771
772 memset(&flags, 0, sizeof flags);
773 if (st->base.usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) {
774 flags.discard = TRUE;
775 }
776 if (st->base.usage & PIPE_TRANSFER_UNSYNCHRONIZED) {
777 flags.unsynchronized = TRUE;
778 }
779
780 svga_transfer_dma(svga, st, SVGA3D_WRITE_HOST_VRAM, flags);
781 svga_set_texture_rendered_to(tex, st->slice, st->base.level);
782 }
783
784 FREE(st->swbuf);
785 sws->buffer_destroy(sws, st->hwbuf);
786 }
787
788
789 /**
790 * unmap direct map transfer request
791 */
792 static void
793 svga_texture_transfer_unmap_direct(struct svga_context *svga,
794 struct svga_transfer *st)
795 {
796 struct pipe_transfer *transfer = &st->base;
797 struct svga_texture *tex = svga_texture(transfer->resource);
798
799 svga_texture_surface_unmap(svga, transfer);
800
801 /* Now send an update command to update the content in the backend. */
802 if (st->base.usage & PIPE_TRANSFER_WRITE) {
803 struct svga_winsys_surface *surf = tex->handle;
804 enum pipe_error ret;
805
806 assert(svga_have_gb_objects(svga));
807
808 /* update the effected region */
809 SVGA3dBox box = st->box;
810 unsigned nlayers;
811
812 switch (tex->b.b.target) {
813 case PIPE_TEXTURE_2D_ARRAY:
814 case PIPE_TEXTURE_CUBE_ARRAY:
815 case PIPE_TEXTURE_1D_ARRAY:
816 nlayers = box.d;
817 box.d = 1;
818 break;
819 default:
820 nlayers = 1;
821 break;
822 }
823
824
825 if (0)
826 debug_printf("%s %d, %d, %d %d x %d x %d\n",
827 __FUNCTION__,
828 box.x, box.y, box.z,
829 box.w, box.h, box.d);
830
831 if (!svga->swc->force_coherent || tex->imported) {
832 if (svga_have_vgpu10(svga)) {
833 unsigned i;
834
835 for (i = 0; i < nlayers; i++) {
836 ret = update_image_vgpu10(svga, surf, &box,
837 st->slice + i, transfer->level,
838 tex->b.b.last_level + 1);
839 assert(ret == PIPE_OK);
840 }
841 } else {
842 assert(nlayers == 1);
843 ret = update_image_vgpu9(svga, surf, &box, st->slice,
844 transfer->level);
845 assert(ret == PIPE_OK);
846 }
847 }
848 (void) ret;
849 }
850 }
851
852
853 static void
854 svga_texture_transfer_unmap(struct pipe_context *pipe,
855 struct pipe_transfer *transfer)
856 {
857 struct svga_context *svga = svga_context(pipe);
858 struct svga_screen *ss = svga_screen(pipe->screen);
859 struct svga_winsys_screen *sws = ss->sws;
860 struct svga_transfer *st = svga_transfer(transfer);
861 struct svga_texture *tex = svga_texture(transfer->resource);
862
863 SVGA_STATS_TIME_PUSH(sws, SVGA_STATS_TIME_TEXTRANSFERUNMAP);
864
865 if (!st->use_direct_map) {
866 svga_texture_transfer_unmap_dma(svga, st);
867 }
868 else if (st->upload.buf) {
869 svga_texture_transfer_unmap_upload(svga, st);
870 }
871 else {
872 svga_texture_transfer_unmap_direct(svga, st);
873 }
874
875 if (st->base.usage & PIPE_TRANSFER_WRITE) {
876 svga->hud.num_resource_updates++;
877
878 /* Mark the texture level as dirty */
879 ss->texture_timestamp++;
880 svga_age_texture_view(tex, transfer->level);
881 if (transfer->resource->target == PIPE_TEXTURE_CUBE)
882 svga_define_texture_level(tex, st->slice, transfer->level);
883 else
884 svga_define_texture_level(tex, 0, transfer->level);
885 }
886
887 pipe_resource_reference(&st->base.resource, NULL);
888 FREE(st);
889 SVGA_STATS_TIME_POP(sws);
890 (void) sws;
891 }
892
893
894 /**
895 * Does format store depth values?
896 */
897 static inline boolean
898 format_has_depth(enum pipe_format format)
899 {
900 const struct util_format_description *desc = util_format_description(format);
901 return util_format_has_depth(desc);
902 }
903
904
905 struct u_resource_vtbl svga_texture_vtbl =
906 {
907 svga_texture_get_handle, /* get_handle */
908 svga_texture_destroy, /* resource_destroy */
909 svga_texture_transfer_map, /* transfer_map */
910 u_default_transfer_flush_region, /* transfer_flush_region */
911 svga_texture_transfer_unmap, /* transfer_unmap */
912 };
913
914
915 struct pipe_resource *
916 svga_texture_create(struct pipe_screen *screen,
917 const struct pipe_resource *template)
918 {
919 struct svga_screen *svgascreen = svga_screen(screen);
920 struct svga_texture *tex;
921 unsigned bindings = template->bind;
922
923 SVGA_STATS_TIME_PUSH(svgascreen->sws,
924 SVGA_STATS_TIME_CREATETEXTURE);
925
926 assert(template->last_level < SVGA_MAX_TEXTURE_LEVELS);
927 if (template->last_level >= SVGA_MAX_TEXTURE_LEVELS) {
928 goto fail_notex;
929 }
930
931 /* Verify the number of mipmap levels isn't impossibly large. For example,
932 * if the base 2D image is 16x16, we can't have 8 mipmap levels.
933 * The state tracker should never ask us to create a resource with invalid
934 * parameters.
935 */
936 {
937 unsigned max_dim = template->width0;
938
939 switch (template->target) {
940 case PIPE_TEXTURE_1D:
941 case PIPE_TEXTURE_1D_ARRAY:
942 // nothing
943 break;
944 case PIPE_TEXTURE_2D:
945 case PIPE_TEXTURE_CUBE:
946 case PIPE_TEXTURE_CUBE_ARRAY:
947 case PIPE_TEXTURE_2D_ARRAY:
948 max_dim = MAX2(max_dim, template->height0);
949 break;
950 case PIPE_TEXTURE_3D:
951 max_dim = MAX3(max_dim, template->height0, template->depth0);
952 break;
953 case PIPE_TEXTURE_RECT:
954 case PIPE_BUFFER:
955 assert(template->last_level == 0);
956 /* the assertion below should always pass */
957 break;
958 default:
959 debug_printf("Unexpected texture target type\n");
960 }
961 assert(1 << template->last_level <= max_dim);
962 }
963
964 tex = CALLOC_STRUCT(svga_texture);
965 if (!tex) {
966 goto fail_notex;
967 }
968
969 tex->defined = CALLOC(template->depth0 * template->array_size,
970 sizeof(tex->defined[0]));
971 if (!tex->defined) {
972 FREE(tex);
973 goto fail_notex;
974 }
975
976 tex->rendered_to = CALLOC(template->depth0 * template->array_size,
977 sizeof(tex->rendered_to[0]));
978 if (!tex->rendered_to) {
979 goto fail;
980 }
981
982 tex->dirty = CALLOC(template->depth0 * template->array_size,
983 sizeof(tex->dirty[0]));
984 if (!tex->dirty) {
985 goto fail;
986 }
987
988 tex->b.b = *template;
989 tex->b.vtbl = &svga_texture_vtbl;
990 pipe_reference_init(&tex->b.b.reference, 1);
991 tex->b.b.screen = screen;
992
993 tex->key.flags = 0;
994 tex->key.size.width = template->width0;
995 tex->key.size.height = template->height0;
996 tex->key.size.depth = template->depth0;
997 tex->key.arraySize = 1;
998 tex->key.numFaces = 1;
999
1000 /* nr_samples=1 must be treated as a non-multisample texture */
1001 if (tex->b.b.nr_samples == 1) {
1002 tex->b.b.nr_samples = 0;
1003 }
1004 else if (tex->b.b.nr_samples > 1) {
1005 assert(svgascreen->sws->have_sm4_1);
1006 tex->key.flags |= SVGA3D_SURFACE_MULTISAMPLE;
1007 }
1008
1009 tex->key.sampleCount = tex->b.b.nr_samples;
1010
1011 if (svgascreen->sws->have_vgpu10) {
1012 switch (template->target) {
1013 case PIPE_TEXTURE_1D:
1014 tex->key.flags |= SVGA3D_SURFACE_1D;
1015 break;
1016 case PIPE_TEXTURE_1D_ARRAY:
1017 tex->key.flags |= SVGA3D_SURFACE_1D;
1018 /* fall-through */
1019 case PIPE_TEXTURE_2D_ARRAY:
1020 tex->key.flags |= SVGA3D_SURFACE_ARRAY;
1021 tex->key.arraySize = template->array_size;
1022 break;
1023 case PIPE_TEXTURE_3D:
1024 tex->key.flags |= SVGA3D_SURFACE_VOLUME;
1025 break;
1026 case PIPE_TEXTURE_CUBE:
1027 tex->key.flags |= (SVGA3D_SURFACE_CUBEMAP | SVGA3D_SURFACE_ARRAY);
1028 tex->key.numFaces = 6;
1029 break;
1030 case PIPE_TEXTURE_CUBE_ARRAY:
1031 assert(svgascreen->sws->have_sm4_1);
1032 tex->key.flags |= (SVGA3D_SURFACE_CUBEMAP | SVGA3D_SURFACE_ARRAY);
1033 tex->key.numFaces = 1; // arraySize already includes the 6 faces
1034 tex->key.arraySize = template->array_size;
1035 break;
1036 default:
1037 break;
1038 }
1039 }
1040 else {
1041 switch (template->target) {
1042 case PIPE_TEXTURE_3D:
1043 tex->key.flags |= SVGA3D_SURFACE_VOLUME;
1044 break;
1045 case PIPE_TEXTURE_CUBE:
1046 tex->key.flags |= SVGA3D_SURFACE_CUBEMAP;
1047 tex->key.numFaces = 6;
1048 break;
1049 default:
1050 break;
1051 }
1052 }
1053
1054 tex->key.cachable = 1;
1055
1056 if ((bindings & (PIPE_BIND_RENDER_TARGET | PIPE_BIND_DEPTH_STENCIL)) &&
1057 !(bindings & PIPE_BIND_SAMPLER_VIEW)) {
1058 /* Also check if the format can be sampled from */
1059 if (screen->is_format_supported(screen, template->format,
1060 template->target,
1061 template->nr_samples,
1062 template->nr_storage_samples,
1063 PIPE_BIND_SAMPLER_VIEW)) {
1064 bindings |= PIPE_BIND_SAMPLER_VIEW;
1065 }
1066 }
1067
1068 if (bindings & PIPE_BIND_SAMPLER_VIEW) {
1069 tex->key.flags |= SVGA3D_SURFACE_HINT_TEXTURE;
1070 tex->key.flags |= SVGA3D_SURFACE_BIND_SHADER_RESOURCE;
1071
1072 if (!(bindings & PIPE_BIND_RENDER_TARGET)) {
1073 /* Also check if the format is color renderable */
1074 if (screen->is_format_supported(screen, template->format,
1075 template->target,
1076 template->nr_samples,
1077 template->nr_storage_samples,
1078 PIPE_BIND_RENDER_TARGET)) {
1079 bindings |= PIPE_BIND_RENDER_TARGET;
1080 }
1081 }
1082
1083 if (!(bindings & PIPE_BIND_DEPTH_STENCIL)) {
1084 /* Also check if the format is depth/stencil renderable */
1085 if (screen->is_format_supported(screen, template->format,
1086 template->target,
1087 template->nr_samples,
1088 template->nr_storage_samples,
1089 PIPE_BIND_DEPTH_STENCIL)) {
1090 bindings |= PIPE_BIND_DEPTH_STENCIL;
1091 }
1092 }
1093 }
1094
1095 if (bindings & PIPE_BIND_DISPLAY_TARGET) {
1096 tex->key.cachable = 0;
1097 }
1098
1099 if (bindings & PIPE_BIND_SHARED) {
1100 tex->key.cachable = 0;
1101 }
1102
1103 if (bindings & (PIPE_BIND_SCANOUT | PIPE_BIND_CURSOR)) {
1104 tex->key.scanout = 1;
1105 tex->key.cachable = 0;
1106 }
1107
1108 /*
1109 * Note: Previously we never passed the
1110 * SVGA3D_SURFACE_HINT_RENDERTARGET hint. Mesa cannot
1111 * know beforehand whether a texture will be used as a rendertarget or not
1112 * and it always requests PIPE_BIND_RENDER_TARGET, therefore
1113 * passing the SVGA3D_SURFACE_HINT_RENDERTARGET here defeats its purpose.
1114 *
1115 * However, this was changed since other state trackers
1116 * (XA for example) uses it accurately and certain device versions
1117 * relies on it in certain situations to render correctly.
1118 */
1119 if ((bindings & PIPE_BIND_RENDER_TARGET) &&
1120 !util_format_is_s3tc(template->format)) {
1121 tex->key.flags |= SVGA3D_SURFACE_HINT_RENDERTARGET;
1122 tex->key.flags |= SVGA3D_SURFACE_BIND_RENDER_TARGET;
1123 }
1124
1125 if (bindings & PIPE_BIND_DEPTH_STENCIL) {
1126 tex->key.flags |= SVGA3D_SURFACE_HINT_DEPTHSTENCIL;
1127 tex->key.flags |= SVGA3D_SURFACE_BIND_DEPTH_STENCIL;
1128 }
1129
1130 tex->key.numMipLevels = template->last_level + 1;
1131
1132 tex->key.format = svga_translate_format(svgascreen, template->format,
1133 bindings);
1134 if (tex->key.format == SVGA3D_FORMAT_INVALID) {
1135 goto fail;
1136 }
1137
1138 /* Use typeless formats for sRGB and depth resources. Typeless
1139 * formats can be reinterpreted as other formats. For example,
1140 * SVGA3D_R8G8B8A8_UNORM_TYPELESS can be interpreted as
1141 * SVGA3D_R8G8B8A8_UNORM_SRGB or SVGA3D_R8G8B8A8_UNORM.
1142 */
1143 if (svgascreen->sws->have_vgpu10 &&
1144 (util_format_is_srgb(template->format) ||
1145 format_has_depth(template->format))) {
1146 SVGA3dSurfaceFormat typeless = svga_typeless_format(tex->key.format);
1147 if (0) {
1148 debug_printf("Convert resource type %s -> %s (bind 0x%x)\n",
1149 svga_format_name(tex->key.format),
1150 svga_format_name(typeless),
1151 bindings);
1152 }
1153
1154 if (svga_format_is_uncompressed_snorm(tex->key.format)) {
1155 /* We can't normally render to snorm surfaces, but once we
1156 * substitute a typeless format, we can if the rendertarget view
1157 * is unorm. This can happen with GL_ARB_copy_image.
1158 */
1159 tex->key.flags |= SVGA3D_SURFACE_HINT_RENDERTARGET;
1160 tex->key.flags |= SVGA3D_SURFACE_BIND_RENDER_TARGET;
1161 }
1162
1163 tex->key.format = typeless;
1164 }
1165
1166 SVGA_DBG(DEBUG_DMA, "surface_create for texture\n", tex->handle);
1167 tex->handle = svga_screen_surface_create(svgascreen, bindings,
1168 tex->b.b.usage,
1169 &tex->validated, &tex->key);
1170 if (!tex->handle) {
1171 goto fail;
1172 }
1173
1174 SVGA_DBG(DEBUG_DMA, " --> got sid %p (texture)\n", tex->handle);
1175
1176 debug_reference(&tex->b.b.reference,
1177 (debug_reference_descriptor)debug_describe_resource, 0);
1178
1179 tex->size = util_resource_size(template);
1180
1181 /* Determine if texture upload buffer can be used to upload this texture */
1182 tex->can_use_upload = svga_texture_transfer_map_can_upload(svgascreen,
1183 &tex->b.b);
1184
1185 /* Initialize the backing resource cache */
1186 tex->backed_handle = NULL;
1187
1188 svgascreen->hud.total_resource_bytes += tex->size;
1189 svgascreen->hud.num_resources++;
1190
1191 SVGA_STATS_TIME_POP(svgascreen->sws);
1192
1193 return &tex->b.b;
1194
1195 fail:
1196 if (tex->dirty)
1197 FREE(tex->dirty);
1198 if (tex->rendered_to)
1199 FREE(tex->rendered_to);
1200 if (tex->defined)
1201 FREE(tex->defined);
1202 FREE(tex);
1203 fail_notex:
1204 SVGA_STATS_TIME_POP(svgascreen->sws);
1205 return NULL;
1206 }
1207
1208
1209 struct pipe_resource *
1210 svga_texture_from_handle(struct pipe_screen *screen,
1211 const struct pipe_resource *template,
1212 struct winsys_handle *whandle)
1213 {
1214 struct svga_winsys_screen *sws = svga_winsys_screen(screen);
1215 struct svga_screen *ss = svga_screen(screen);
1216 struct svga_winsys_surface *srf;
1217 struct svga_texture *tex;
1218 enum SVGA3dSurfaceFormat format = 0;
1219 assert(screen);
1220
1221 /* Only supports one type */
1222 if ((template->target != PIPE_TEXTURE_2D &&
1223 template->target != PIPE_TEXTURE_RECT) ||
1224 template->last_level != 0 ||
1225 template->depth0 != 1) {
1226 return NULL;
1227 }
1228
1229 srf = sws->surface_from_handle(sws, whandle, &format);
1230
1231 if (!srf)
1232 return NULL;
1233
1234 if (!svga_format_is_shareable(ss, template->format, format,
1235 template->bind, true))
1236 goto out_unref;
1237
1238 tex = CALLOC_STRUCT(svga_texture);
1239 if (!tex)
1240 goto out_unref;
1241
1242 tex->defined = CALLOC(template->depth0 * template->array_size,
1243 sizeof(tex->defined[0]));
1244 if (!tex->defined)
1245 goto out_no_defined;
1246
1247 tex->b.b = *template;
1248 tex->b.vtbl = &svga_texture_vtbl;
1249 pipe_reference_init(&tex->b.b.reference, 1);
1250 tex->b.b.screen = screen;
1251
1252 SVGA_DBG(DEBUG_DMA, "wrap surface sid %p\n", srf);
1253
1254 tex->key.cachable = 0;
1255 tex->key.format = format;
1256 tex->handle = srf;
1257
1258 tex->rendered_to = CALLOC(1, sizeof(tex->rendered_to[0]));
1259 if (!tex->rendered_to)
1260 goto out_no_rendered_to;
1261
1262 tex->dirty = CALLOC(1, sizeof(tex->dirty[0]));
1263 if (!tex->dirty)
1264 goto out_no_dirty;
1265
1266 tex->imported = TRUE;
1267
1268 ss->hud.num_resources++;
1269
1270 return &tex->b.b;
1271
1272 out_no_dirty:
1273 FREE(tex->rendered_to);
1274 out_no_rendered_to:
1275 FREE(tex->defined);
1276 out_no_defined:
1277 FREE(tex);
1278 out_unref:
1279 sws->surface_reference(sws, &srf, NULL);
1280 return NULL;
1281 }
1282
1283 bool
1284 svga_texture_generate_mipmap(struct pipe_context *pipe,
1285 struct pipe_resource *pt,
1286 enum pipe_format format,
1287 unsigned base_level,
1288 unsigned last_level,
1289 unsigned first_layer,
1290 unsigned last_layer)
1291 {
1292 struct pipe_sampler_view templ, *psv;
1293 struct svga_pipe_sampler_view *sv;
1294 struct svga_context *svga = svga_context(pipe);
1295 struct svga_texture *tex = svga_texture(pt);
1296 enum pipe_error ret;
1297
1298 assert(svga_have_vgpu10(svga));
1299
1300 /* Only support 2D texture for now */
1301 if (pt->target != PIPE_TEXTURE_2D)
1302 return false;
1303
1304 /* Fallback to the mipmap generation utility for those formats that
1305 * do not support hw generate mipmap
1306 */
1307 if (!svga_format_support_gen_mips(format))
1308 return false;
1309
1310 /* Make sure the texture surface was created with
1311 * SVGA3D_SURFACE_BIND_RENDER_TARGET
1312 */
1313 if (!tex->handle || !(tex->key.flags & SVGA3D_SURFACE_BIND_RENDER_TARGET))
1314 return false;
1315
1316 templ.format = format;
1317 templ.u.tex.first_layer = first_layer;
1318 templ.u.tex.last_layer = last_layer;
1319 templ.u.tex.first_level = base_level;
1320 templ.u.tex.last_level = last_level;
1321
1322 psv = pipe->create_sampler_view(pipe, pt, &templ);
1323 if (psv == NULL)
1324 return false;
1325
1326 sv = svga_pipe_sampler_view(psv);
1327 ret = svga_validate_pipe_sampler_view(svga, sv);
1328 if (ret != PIPE_OK) {
1329 svga_context_flush(svga, NULL);
1330 ret = svga_validate_pipe_sampler_view(svga, sv);
1331 assert(ret == PIPE_OK);
1332 }
1333
1334 ret = SVGA3D_vgpu10_GenMips(svga->swc, sv->id, tex->handle);
1335 if (ret != PIPE_OK) {
1336 svga_context_flush(svga, NULL);
1337 ret = SVGA3D_vgpu10_GenMips(svga->swc, sv->id, tex->handle);
1338 }
1339 pipe_sampler_view_reference(&psv, NULL);
1340
1341 svga->hud.num_generate_mipmap++;
1342
1343 return true;
1344 }
1345
1346
1347 /* texture upload buffer default size in bytes */
1348 #define TEX_UPLOAD_DEFAULT_SIZE (1024 * 1024)
1349
1350 /**
1351 * Create a texture upload buffer
1352 */
1353 boolean
1354 svga_texture_transfer_map_upload_create(struct svga_context *svga)
1355 {
1356 svga->tex_upload = u_upload_create(&svga->pipe, TEX_UPLOAD_DEFAULT_SIZE,
1357 PIPE_BIND_CUSTOM, PIPE_USAGE_STAGING, 0);
1358 if (svga->tex_upload)
1359 u_upload_disable_persistent(svga->tex_upload);
1360
1361 return svga->tex_upload != NULL;
1362 }
1363
1364
1365 /**
1366 * Destroy the texture upload buffer
1367 */
1368 void
1369 svga_texture_transfer_map_upload_destroy(struct svga_context *svga)
1370 {
1371 u_upload_destroy(svga->tex_upload);
1372 }
1373
1374
1375 /**
1376 * Returns true if this transfer map request can use the upload buffer.
1377 */
1378 boolean
1379 svga_texture_transfer_map_can_upload(const struct svga_screen *svgascreen,
1380 const struct pipe_resource *texture)
1381 {
1382 if (svgascreen->sws->have_transfer_from_buffer_cmd == FALSE)
1383 return FALSE;
1384
1385 /* TransferFromBuffer command is not well supported with multi-samples surface */
1386 if (texture->nr_samples > 1)
1387 return FALSE;
1388
1389 if (util_format_is_compressed(texture->format)) {
1390 /* XXX Need to take a closer look to see why texture upload
1391 * with 3D texture with compressed format fails
1392 */
1393 if (texture->target == PIPE_TEXTURE_3D)
1394 return FALSE;
1395 }
1396 else if (texture->format == PIPE_FORMAT_R9G9B9E5_FLOAT) {
1397 return FALSE;
1398 }
1399
1400 return TRUE;
1401 }
1402
1403
1404 /**
1405 * Use upload buffer for the transfer map request.
1406 */
1407 void *
1408 svga_texture_transfer_map_upload(struct svga_context *svga,
1409 struct svga_transfer *st)
1410 {
1411 struct pipe_resource *texture = st->base.resource;
1412 struct pipe_resource *tex_buffer = NULL;
1413 void *tex_map;
1414 unsigned nblocksx, nblocksy;
1415 unsigned offset;
1416 unsigned upload_size;
1417
1418 assert(svga->tex_upload);
1419
1420 st->upload.box.x = st->base.box.x;
1421 st->upload.box.y = st->base.box.y;
1422 st->upload.box.z = st->base.box.z;
1423 st->upload.box.w = st->base.box.width;
1424 st->upload.box.h = st->base.box.height;
1425 st->upload.box.d = st->base.box.depth;
1426 st->upload.nlayers = 1;
1427
1428 switch (texture->target) {
1429 case PIPE_TEXTURE_CUBE:
1430 st->upload.box.z = 0;
1431 break;
1432 case PIPE_TEXTURE_2D_ARRAY:
1433 case PIPE_TEXTURE_CUBE_ARRAY:
1434 st->upload.nlayers = st->base.box.depth;
1435 st->upload.box.z = 0;
1436 st->upload.box.d = 1;
1437 break;
1438 case PIPE_TEXTURE_1D_ARRAY:
1439 st->upload.nlayers = st->base.box.depth;
1440 st->upload.box.y = st->upload.box.z = 0;
1441 st->upload.box.d = 1;
1442 break;
1443 default:
1444 break;
1445 }
1446
1447 nblocksx = util_format_get_nblocksx(texture->format, st->base.box.width);
1448 nblocksy = util_format_get_nblocksy(texture->format, st->base.box.height);
1449
1450 st->base.stride = nblocksx * util_format_get_blocksize(texture->format);
1451 st->base.layer_stride = st->base.stride * nblocksy;
1452
1453 /* In order to use the TransferFromBuffer command to update the
1454 * texture content from the buffer, the layer stride for a multi-layers
1455 * surface needs to be in multiples of 16 bytes.
1456 */
1457 if (st->upload.nlayers > 1 && st->base.layer_stride & 15)
1458 return NULL;
1459
1460 upload_size = st->base.layer_stride * st->base.box.depth;
1461 upload_size = align(upload_size, 16);
1462
1463 #ifdef DEBUG
1464 if (util_format_is_compressed(texture->format)) {
1465 struct svga_texture *tex = svga_texture(texture);
1466 unsigned blockw, blockh, bytesPerBlock;
1467
1468 svga_format_size(tex->key.format, &blockw, &blockh, &bytesPerBlock);
1469
1470 /* dest box must start on block boundary */
1471 assert((st->base.box.x % blockw) == 0);
1472 assert((st->base.box.y % blockh) == 0);
1473 }
1474 #endif
1475
1476 /* If the upload size exceeds the default buffer size, the
1477 * upload buffer manager code will try to allocate a new buffer
1478 * with the new buffer size.
1479 */
1480 u_upload_alloc(svga->tex_upload, 0, upload_size, 16,
1481 &offset, &tex_buffer, &tex_map);
1482
1483 if (!tex_map) {
1484 return NULL;
1485 }
1486
1487 st->upload.buf = tex_buffer;
1488 st->upload.map = tex_map;
1489 st->upload.offset = offset;
1490
1491 return tex_map;
1492 }
1493
1494
1495 /**
1496 * Unmap upload map transfer request
1497 */
1498 void
1499 svga_texture_transfer_unmap_upload(struct svga_context *svga,
1500 struct svga_transfer *st)
1501 {
1502 struct svga_winsys_surface *srcsurf;
1503 struct svga_winsys_surface *dstsurf;
1504 struct pipe_resource *texture = st->base.resource;
1505 struct svga_texture *tex = svga_texture(texture);
1506 enum pipe_error ret;
1507 unsigned subResource;
1508 unsigned numMipLevels;
1509 unsigned i, layer;
1510 unsigned offset = st->upload.offset;
1511
1512 assert(svga->tex_upload);
1513 assert(st->upload.buf);
1514
1515 /* unmap the texture upload buffer */
1516 u_upload_unmap(svga->tex_upload);
1517
1518 srcsurf = svga_buffer_handle(svga, st->upload.buf, 0);
1519 dstsurf = svga_texture(texture)->handle;
1520 assert(dstsurf);
1521
1522 numMipLevels = texture->last_level + 1;
1523
1524 for (i = 0, layer = st->slice; i < st->upload.nlayers; i++, layer++) {
1525 subResource = layer * numMipLevels + st->base.level;
1526
1527 /* send a transferFromBuffer command to update the host texture surface */
1528 assert((offset & 15) == 0);
1529
1530 ret = SVGA3D_vgpu10_TransferFromBuffer(svga->swc, srcsurf,
1531 offset,
1532 st->base.stride,
1533 st->base.layer_stride,
1534 dstsurf, subResource,
1535 &st->upload.box);
1536 if (ret != PIPE_OK) {
1537 svga_context_flush(svga, NULL);
1538 ret = SVGA3D_vgpu10_TransferFromBuffer(svga->swc, srcsurf,
1539 offset,
1540 st->base.stride,
1541 st->base.layer_stride,
1542 dstsurf, subResource,
1543 &st->upload.box);
1544 assert(ret == PIPE_OK);
1545 }
1546 offset += st->base.layer_stride;
1547
1548 /* Set rendered-to flag */
1549 svga_set_texture_rendered_to(tex, layer, st->base.level);
1550 }
1551
1552 pipe_resource_reference(&st->upload.buf, NULL);
1553 }
1554
1555 /**
1556 * Does the device format backing this surface have an
1557 * alpha channel?
1558 *
1559 * \param texture[in] The texture whose format we're querying
1560 * \return TRUE if the format has an alpha channel, FALSE otherwise
1561 *
1562 * For locally created textures, the device (svga) format is typically
1563 * identical to svga_format(texture->format), and we can use the gallium
1564 * format tests to determine whether the device format has an alpha channel
1565 * or not. However, for textures backed by imported svga surfaces that is
1566 * not always true, and we have to look at the SVGA3D utilities.
1567 */
1568 boolean
1569 svga_texture_device_format_has_alpha(struct pipe_resource *texture)
1570 {
1571 /* the svga_texture() call below is invalid for PIPE_BUFFER resources */
1572 assert(texture->target != PIPE_BUFFER);
1573
1574 enum svga3d_block_desc block_desc =
1575 svga3dsurface_get_desc(svga_texture(texture)->key.format)->block_desc;
1576
1577 return !!(block_desc & SVGA3DBLOCKDESC_ALPHA);
1578 }