1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
24 **********************************************************/
26 #include "svga3d_reg.h"
27 #include "svga3d_surfacedefs.h"
29 #include "pipe/p_state.h"
30 #include "pipe/p_defines.h"
31 #include "os/os_thread.h"
32 #include "util/u_format.h"
33 #include "util/u_inlines.h"
34 #include "util/u_math.h"
35 #include "util/u_memory.h"
36 #include "util/u_resource.h"
37 #include "util/u_upload_mgr.h"
40 #include "svga_format.h"
41 #include "svga_screen.h"
42 #include "svga_context.h"
43 #include "svga_resource_texture.h"
44 #include "svga_resource_buffer.h"
45 #include "svga_sampler_view.h"
46 #include "svga_winsys.h"
47 #include "svga_debug.h"
51 svga_transfer_dma_band(struct svga_context
*svga
,
52 struct svga_transfer
*st
,
53 SVGA3dTransferType transfer
,
54 unsigned x
, unsigned y
, unsigned z
,
55 unsigned w
, unsigned h
, unsigned d
,
56 unsigned srcx
, unsigned srcy
, unsigned srcz
,
57 SVGA3dSurfaceDMAFlags flags
)
59 struct svga_texture
*texture
= svga_texture(st
->base
.resource
);
63 assert(!st
->use_direct_map
);
75 SVGA_DBG(DEBUG_DMA
, "dma %s sid %p, face %u, (%u, %u, %u) - "
76 "(%u, %u, %u), %ubpp\n",
77 transfer
== SVGA3D_WRITE_HOST_VRAM
? "to" : "from",
86 util_format_get_blocksize(texture
->b
.b
.format
) * 8 /
87 (util_format_get_blockwidth(texture
->b
.b
.format
)
88 * util_format_get_blockheight(texture
->b
.b
.format
)));
90 ret
= SVGA3D_SurfaceDMA(svga
->swc
, st
, transfer
, &box
, 1, flags
);
92 svga_context_flush(svga
, NULL
);
93 ret
= SVGA3D_SurfaceDMA(svga
->swc
, st
, transfer
, &box
, 1, flags
);
94 assert(ret
== PIPE_OK
);
100 svga_transfer_dma(struct svga_context
*svga
,
101 struct svga_transfer
*st
,
102 SVGA3dTransferType transfer
,
103 SVGA3dSurfaceDMAFlags flags
)
105 struct svga_texture
*texture
= svga_texture(st
->base
.resource
);
106 struct svga_screen
*screen
= svga_screen(texture
->b
.b
.screen
);
107 struct svga_winsys_screen
*sws
= screen
->sws
;
108 struct pipe_fence_handle
*fence
= NULL
;
110 assert(!st
->use_direct_map
);
112 if (transfer
== SVGA3D_READ_HOST_VRAM
) {
113 SVGA_DBG(DEBUG_PERF
, "%s: readback transfer\n", __FUNCTION__
);
116 /* Ensure any pending operations on host surfaces are queued on the command
119 svga_surfaces_flush( svga
);
122 /* Do the DMA transfer in a single go */
123 svga_transfer_dma_band(svga
, st
, transfer
,
124 st
->base
.box
.x
, st
->base
.box
.y
, st
->base
.box
.z
,
125 st
->base
.box
.width
, st
->base
.box
.height
, st
->base
.box
.depth
,
129 if (transfer
== SVGA3D_READ_HOST_VRAM
) {
130 svga_context_flush(svga
, &fence
);
131 sws
->fence_finish(sws
, fence
, PIPE_TIMEOUT_INFINITE
, 0);
132 sws
->fence_reference(sws
, &fence
, NULL
);
137 unsigned blockheight
=
138 util_format_get_blockheight(st
->base
.resource
->format
);
140 h
= st
->hw_nblocksy
* blockheight
;
143 for (y
= 0; y
< st
->base
.box
.height
; y
+= h
) {
144 unsigned offset
, length
;
147 if (y
+ h
> st
->base
.box
.height
)
148 h
= st
->base
.box
.height
- y
;
150 /* Transfer band must be aligned to pixel block boundaries */
151 assert(y
% blockheight
== 0);
152 assert(h
% blockheight
== 0);
154 offset
= y
* st
->base
.stride
/ blockheight
;
155 length
= h
* st
->base
.stride
/ blockheight
;
157 sw
= (uint8_t *) st
->swbuf
+ offset
;
159 if (transfer
== SVGA3D_WRITE_HOST_VRAM
) {
160 unsigned usage
= PIPE_TRANSFER_WRITE
;
162 /* Wait for the previous DMAs to complete */
163 /* TODO: keep one DMA (at half the size) in the background */
165 svga_context_flush(svga
, NULL
);
166 usage
|= PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE
;
169 hw
= sws
->buffer_map(sws
, st
->hwbuf
, usage
);
172 memcpy(hw
, sw
, length
);
173 sws
->buffer_unmap(sws
, st
->hwbuf
);
177 svga_transfer_dma_band(svga
, st
, transfer
,
178 st
->base
.box
.x
, y
, st
->base
.box
.z
,
179 st
->base
.box
.width
, h
, st
->base
.box
.depth
,
183 * Prevent the texture contents to be discarded on the next band
186 flags
.discard
= FALSE
;
188 if (transfer
== SVGA3D_READ_HOST_VRAM
) {
189 svga_context_flush(svga
, &fence
);
190 sws
->fence_finish(sws
, fence
, PIPE_TIMEOUT_INFINITE
, 0);
192 hw
= sws
->buffer_map(sws
, st
->hwbuf
, PIPE_TRANSFER_READ
);
195 memcpy(sw
, hw
, length
);
196 sws
->buffer_unmap(sws
, st
->hwbuf
);
206 svga_texture_get_handle(struct pipe_screen
*screen
,
207 struct pipe_resource
*texture
,
208 struct winsys_handle
*whandle
)
210 struct svga_winsys_screen
*sws
= svga_winsys_screen(texture
->screen
);
213 assert(svga_texture(texture
)->key
.cachable
== 0);
214 svga_texture(texture
)->key
.cachable
= 0;
216 stride
= util_format_get_nblocksx(texture
->format
, texture
->width0
) *
217 util_format_get_blocksize(texture
->format
);
219 return sws
->surface_get_handle(sws
, svga_texture(texture
)->handle
,
225 svga_texture_destroy(struct pipe_screen
*screen
,
226 struct pipe_resource
*pt
)
228 struct svga_screen
*ss
= svga_screen(screen
);
229 struct svga_texture
*tex
= svga_texture(pt
);
231 ss
->texture_timestamp
++;
233 svga_sampler_view_reference(&tex
->cached_view
, NULL
);
236 DBG("%s deleting %p\n", __FUNCTION__, (void *) tex);
238 SVGA_DBG(DEBUG_DMA
, "unref sid %p (texture)\n", tex
->handle
);
239 svga_screen_surface_destroy(ss
, &tex
->key
, &tex
->handle
);
241 /* Destroy the backed surface handle if exists */
242 if (tex
->backed_handle
)
243 svga_screen_surface_destroy(ss
, &tex
->backed_key
, &tex
->backed_handle
);
245 ss
->hud
.total_resource_bytes
-= tex
->size
;
248 FREE(tex
->rendered_to
);
252 assert(ss
->hud
.num_resources
> 0);
253 if (ss
->hud
.num_resources
> 0)
254 ss
->hud
.num_resources
--;
259 * Determine if the resource was rendered to
261 static inline boolean
262 was_tex_rendered_to(struct pipe_resource
*resource
,
263 const struct pipe_transfer
*transfer
)
267 switch (resource
->target
) {
268 case PIPE_TEXTURE_CUBE
:
269 assert(transfer
->box
.depth
== 1);
270 case PIPE_TEXTURE_1D_ARRAY
:
271 case PIPE_TEXTURE_2D_ARRAY
:
272 case PIPE_TEXTURE_CUBE_ARRAY
:
273 layer_face
= transfer
->box
.z
;
279 return svga_was_texture_rendered_to(svga_texture(resource
),
280 layer_face
, transfer
->level
);
285 * Determine if we need to read back a texture image before mapping it.
287 static inline boolean
288 need_tex_readback(struct pipe_transfer
*transfer
)
290 if (transfer
->usage
& PIPE_TRANSFER_READ
)
293 if ((transfer
->usage
& PIPE_TRANSFER_WRITE
) &&
294 ((transfer
->usage
& PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE
) == 0)) {
295 return was_tex_rendered_to(transfer
->resource
, transfer
);
302 static enum pipe_error
303 readback_image_vgpu9(struct svga_context
*svga
,
304 struct svga_winsys_surface
*surf
,
310 ret
= SVGA3D_ReadbackGBImage(svga
->swc
, surf
, slice
, level
);
311 if (ret
!= PIPE_OK
) {
312 svga_context_flush(svga
, NULL
);
313 ret
= SVGA3D_ReadbackGBImage(svga
->swc
, surf
, slice
, level
);
319 static enum pipe_error
320 readback_image_vgpu10(struct svga_context
*svga
,
321 struct svga_winsys_surface
*surf
,
324 unsigned numMipLevels
)
327 unsigned subResource
;
329 subResource
= slice
* numMipLevels
+ level
;
330 ret
= SVGA3D_vgpu10_ReadbackSubResource(svga
->swc
, surf
, subResource
);
331 if (ret
!= PIPE_OK
) {
332 svga_context_flush(svga
, NULL
);
333 ret
= SVGA3D_vgpu10_ReadbackSubResource(svga
->swc
, surf
, subResource
);
340 * Use DMA for the transfer request
343 svga_texture_transfer_map_dma(struct svga_context
*svga
,
344 struct svga_transfer
*st
)
346 struct svga_winsys_screen
*sws
= svga_screen(svga
->pipe
.screen
)->sws
;
347 struct pipe_resource
*texture
= st
->base
.resource
;
348 unsigned nblocksx
, nblocksy
;
350 unsigned usage
= st
->base
.usage
;
352 /* we'll put the data into a tightly packed buffer */
353 nblocksx
= util_format_get_nblocksx(texture
->format
, st
->base
.box
.width
);
354 nblocksy
= util_format_get_nblocksy(texture
->format
, st
->base
.box
.height
);
355 d
= st
->base
.box
.depth
;
357 st
->base
.stride
= nblocksx
*util_format_get_blocksize(texture
->format
);
358 st
->base
.layer_stride
= st
->base
.stride
* nblocksy
;
359 st
->hw_nblocksy
= nblocksy
;
361 st
->hwbuf
= svga_winsys_buffer_create(svga
, 1, 0,
362 st
->hw_nblocksy
* st
->base
.stride
* d
);
364 while (!st
->hwbuf
&& (st
->hw_nblocksy
/= 2)) {
366 svga_winsys_buffer_create(svga
, 1, 0,
367 st
->hw_nblocksy
* st
->base
.stride
* d
);
373 if (st
->hw_nblocksy
< nblocksy
) {
374 /* We couldn't allocate a hardware buffer big enough for the transfer,
375 * so allocate regular malloc memory instead
378 debug_printf("%s: failed to allocate %u KB of DMA, "
379 "splitting into %u x %u KB DMA transfers\n",
381 (nblocksy
* st
->base
.stride
+ 1023) / 1024,
382 (nblocksy
+ st
->hw_nblocksy
- 1) / st
->hw_nblocksy
,
383 (st
->hw_nblocksy
* st
->base
.stride
+ 1023) / 1024);
386 st
->swbuf
= MALLOC(nblocksy
* st
->base
.stride
* d
);
388 sws
->buffer_destroy(sws
, st
->hwbuf
);
393 if (usage
& PIPE_TRANSFER_READ
) {
394 SVGA3dSurfaceDMAFlags flags
;
395 memset(&flags
, 0, sizeof flags
);
396 svga_transfer_dma(svga
, st
, SVGA3D_READ_HOST_VRAM
, flags
);
403 return sws
->buffer_map(sws
, st
->hwbuf
, usage
);
409 * Use direct map for the transfer request
412 svga_texture_transfer_map_direct(struct svga_context
*svga
,
413 struct svga_transfer
*st
)
415 struct svga_winsys_screen
*sws
= svga_screen(svga
->pipe
.screen
)->sws
;
416 struct pipe_transfer
*transfer
= &st
->base
;
417 struct pipe_resource
*texture
= transfer
->resource
;
418 struct svga_texture
*tex
= svga_texture(texture
);
419 struct svga_winsys_surface
*surf
= tex
->handle
;
420 unsigned level
= st
->base
.level
;
421 unsigned w
, h
, nblocksx
, nblocksy
, i
;
422 unsigned usage
= st
->base
.usage
;
424 if (need_tex_readback(transfer
)) {
427 svga_surfaces_flush(svga
);
429 for (i
= 0; i
< st
->base
.box
.depth
; i
++) {
430 if (svga_have_vgpu10(svga
)) {
431 ret
= readback_image_vgpu10(svga
, surf
, st
->slice
+ i
, level
,
432 tex
->b
.b
.last_level
+ 1);
434 ret
= readback_image_vgpu9(svga
, surf
, st
->slice
+ i
, level
);
437 svga
->hud
.num_readbacks
++;
438 SVGA_STATS_COUNT_INC(sws
, SVGA_STATS_COUNT_TEXREADBACK
);
440 assert(ret
== PIPE_OK
);
443 svga_context_flush(svga
, NULL
);
445 * Note: if PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE were specified
446 * we could potentially clear the flag for all faces/layers/mips.
448 svga_clear_texture_rendered_to(tex
, st
->slice
, level
);
451 assert(usage
& PIPE_TRANSFER_WRITE
);
452 if ((usage
& PIPE_TRANSFER_UNSYNCHRONIZED
) == 0) {
453 if (svga_is_texture_dirty(tex
, st
->slice
, level
)) {
455 * do a surface flush if the subresource has been modified
456 * in this command buffer.
458 svga_surfaces_flush(svga
);
459 if (!sws
->surface_is_flushed(sws
, surf
)) {
460 svga
->hud
.surface_write_flushes
++;
461 SVGA_STATS_COUNT_INC(sws
, SVGA_STATS_COUNT_SURFACEWRITEFLUSH
);
462 svga_context_flush(svga
, NULL
);
468 /* we'll directly access the guest-backed surface */
469 w
= u_minify(texture
->width0
, level
);
470 h
= u_minify(texture
->height0
, level
);
471 nblocksx
= util_format_get_nblocksx(texture
->format
, w
);
472 nblocksy
= util_format_get_nblocksy(texture
->format
, h
);
473 st
->hw_nblocksy
= nblocksy
;
474 st
->base
.stride
= nblocksx
*util_format_get_blocksize(texture
->format
);
475 st
->base
.layer_stride
= st
->base
.stride
* nblocksy
;
481 SVGA3dSize baseLevelSize
;
484 unsigned offset
, mip_width
, mip_height
;
486 map
= svga
->swc
->surface_map(svga
->swc
, surf
, usage
, &retry
);
487 if (map
== NULL
&& retry
) {
489 * At this point, the svga_surfaces_flush() should already have
490 * called in svga_texture_get_transfer().
492 svga
->hud
.surface_write_flushes
++;
493 svga_context_flush(svga
, NULL
);
494 map
= svga
->swc
->surface_map(svga
->swc
, surf
, usage
, &retry
);
498 * Make sure we return NULL if the map fails
505 * Compute the offset to the specific texture slice in the buffer.
507 baseLevelSize
.width
= tex
->b
.b
.width0
;
508 baseLevelSize
.height
= tex
->b
.b
.height0
;
509 baseLevelSize
.depth
= tex
->b
.b
.depth0
;
511 if ((tex
->b
.b
.target
== PIPE_TEXTURE_1D_ARRAY
) ||
512 (tex
->b
.b
.target
== PIPE_TEXTURE_2D_ARRAY
) ||
513 (tex
->b
.b
.target
== PIPE_TEXTURE_CUBE_ARRAY
)) {
514 st
->base
.layer_stride
=
515 svga3dsurface_get_image_offset(tex
->key
.format
, baseLevelSize
,
516 tex
->b
.b
.last_level
+ 1, 1, 0);
519 offset
= svga3dsurface_get_image_offset(tex
->key
.format
, baseLevelSize
,
520 tex
->b
.b
.last_level
+ 1, /* numMips */
526 mip_width
= u_minify(tex
->b
.b
.width0
, level
);
527 mip_height
= u_minify(tex
->b
.b
.height0
, level
);
529 offset
+= svga3dsurface_get_pixel_offset(tex
->key
.format
,
530 mip_width
, mip_height
,
535 return (void *) (map
+ offset
);
541 * Request a transfer map to the texture resource
544 svga_texture_transfer_map(struct pipe_context
*pipe
,
545 struct pipe_resource
*texture
,
548 const struct pipe_box
*box
,
549 struct pipe_transfer
**ptransfer
)
551 struct svga_context
*svga
= svga_context(pipe
);
552 struct svga_winsys_screen
*sws
= svga_screen(pipe
->screen
)->sws
;
553 struct svga_texture
*tex
= svga_texture(texture
);
554 struct svga_transfer
*st
;
555 struct svga_winsys_surface
*surf
= tex
->handle
;
556 boolean use_direct_map
= svga_have_gb_objects(svga
) &&
557 !svga_have_gb_dma(svga
);
559 int64_t begin
= svga_get_time(svga
);
561 SVGA_STATS_TIME_PUSH(sws
, SVGA_STATS_TIME_TEXTRANSFERMAP
);
566 /* We can't map texture storage directly unless we have GB objects */
567 if (usage
& PIPE_TRANSFER_MAP_DIRECTLY
) {
568 if (svga_have_gb_objects(svga
))
569 use_direct_map
= TRUE
;
574 st
= CALLOC_STRUCT(svga_transfer
);
578 st
->base
.level
= level
;
579 st
->base
.usage
= usage
;
582 switch (tex
->b
.b
.target
) {
583 case PIPE_TEXTURE_CUBE
:
584 st
->slice
= st
->base
.box
.z
;
585 st
->base
.box
.z
= 0; /* so we don't apply double offsets below */
587 case PIPE_TEXTURE_1D_ARRAY
:
588 case PIPE_TEXTURE_2D_ARRAY
:
589 case PIPE_TEXTURE_CUBE_ARRAY
:
590 st
->slice
= st
->base
.box
.z
;
591 st
->base
.box
.z
= 0; /* so we don't apply double offsets below */
593 /* Force direct map for transfering multiple slices */
594 if (st
->base
.box
.depth
> 1)
595 use_direct_map
= svga_have_gb_objects(svga
);
603 /* Force direct map for multisample surface */
604 if (texture
->nr_samples
> 1) {
605 assert(svga_have_gb_objects(svga
));
606 assert(sws
->have_sm4_1
);
607 use_direct_map
= TRUE
;
610 st
->use_direct_map
= use_direct_map
;
611 pipe_resource_reference(&st
->base
.resource
, texture
);
613 /* If this is the first time mapping to the surface in this
614 * command buffer, clear the dirty masks of this surface.
616 if (sws
->surface_is_flushed(sws
, surf
)) {
617 svga_clear_texture_dirty(tex
);
620 if (!use_direct_map
) {
621 /* upload to the DMA buffer */
622 map
= svga_texture_transfer_map_dma(svga
, st
);
625 boolean can_use_upload
= tex
->can_use_upload
&&
626 !(st
->base
.usage
& PIPE_TRANSFER_READ
);
627 boolean was_rendered_to
= was_tex_rendered_to(texture
, &st
->base
);
629 /* If the texture was already rendered to and upload buffer
630 * is supported, then we will use upload buffer to
631 * avoid the need to read back the texture content; otherwise,
632 * we'll first try to map directly to the GB surface, if it is blocked,
633 * then we'll try the upload buffer.
635 if (was_rendered_to
&& can_use_upload
) {
636 map
= svga_texture_transfer_map_upload(svga
, st
);
639 unsigned orig_usage
= st
->base
.usage
;
641 /* First try directly map to the GB surface */
643 st
->base
.usage
|= PIPE_TRANSFER_DONTBLOCK
;
644 map
= svga_texture_transfer_map_direct(svga
, st
);
645 st
->base
.usage
= orig_usage
;
647 if (!map
&& can_use_upload
) {
648 /* if direct map with DONTBLOCK fails, then try upload to the
649 * texture upload buffer.
651 map
= svga_texture_transfer_map_upload(svga
, st
);
655 /* If upload fails, then try direct map again without forcing it
659 map
= svga_texture_transfer_map_direct(svga
, st
);
667 *ptransfer
= &st
->base
;
668 svga
->hud
.num_textures_mapped
++;
669 if (usage
& PIPE_TRANSFER_WRITE
) {
670 /* record texture upload for HUD */
671 svga
->hud
.num_bytes_uploaded
+=
672 st
->base
.layer_stride
* st
->base
.box
.depth
;
674 /* mark this texture level as dirty */
675 svga_set_texture_dirty(tex
, st
->slice
, level
);
680 svga
->hud
.map_buffer_time
+= (svga_get_time(svga
) - begin
);
681 SVGA_STATS_TIME_POP(sws
);
688 * Unmap a GB texture surface.
691 svga_texture_surface_unmap(struct svga_context
*svga
,
692 struct pipe_transfer
*transfer
)
694 struct svga_winsys_surface
*surf
= svga_texture(transfer
->resource
)->handle
;
695 struct svga_winsys_context
*swc
= svga
->swc
;
700 swc
->surface_unmap(swc
, surf
, &rebind
);
703 ret
= SVGA3D_BindGBSurface(swc
, surf
);
704 if (ret
!= PIPE_OK
) {
705 /* flush and retry */
706 svga_context_flush(svga
, NULL
);
707 ret
= SVGA3D_BindGBSurface(swc
, surf
);
708 assert(ret
== PIPE_OK
);
714 static enum pipe_error
715 update_image_vgpu9(struct svga_context
*svga
,
716 struct svga_winsys_surface
*surf
,
717 const SVGA3dBox
*box
,
723 ret
= SVGA3D_UpdateGBImage(svga
->swc
, surf
, box
, slice
, level
);
724 if (ret
!= PIPE_OK
) {
725 svga_context_flush(svga
, NULL
);
726 ret
= SVGA3D_UpdateGBImage(svga
->swc
, surf
, box
, slice
, level
);
732 static enum pipe_error
733 update_image_vgpu10(struct svga_context
*svga
,
734 struct svga_winsys_surface
*surf
,
735 const SVGA3dBox
*box
,
738 unsigned numMipLevels
)
741 unsigned subResource
;
743 subResource
= slice
* numMipLevels
+ level
;
745 ret
= SVGA3D_vgpu10_UpdateSubResource(svga
->swc
, surf
, box
, subResource
);
746 if (ret
!= PIPE_OK
) {
747 svga_context_flush(svga
, NULL
);
748 ret
= SVGA3D_vgpu10_UpdateSubResource(svga
->swc
, surf
, box
, subResource
);
755 * unmap DMA transfer request
758 svga_texture_transfer_unmap_dma(struct svga_context
*svga
,
759 struct svga_transfer
*st
)
761 struct svga_winsys_screen
*sws
= svga_screen(svga
->pipe
.screen
)->sws
;
764 sws
->buffer_unmap(sws
, st
->hwbuf
);
766 if (st
->base
.usage
& PIPE_TRANSFER_WRITE
) {
767 /* Use DMA to transfer texture data */
768 SVGA3dSurfaceDMAFlags flags
;
770 memset(&flags
, 0, sizeof flags
);
771 if (st
->base
.usage
& PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE
) {
772 flags
.discard
= TRUE
;
774 if (st
->base
.usage
& PIPE_TRANSFER_UNSYNCHRONIZED
) {
775 flags
.unsynchronized
= TRUE
;
778 svga_transfer_dma(svga
, st
, SVGA3D_WRITE_HOST_VRAM
, flags
);
782 sws
->buffer_destroy(sws
, st
->hwbuf
);
787 * unmap direct map transfer request
790 svga_texture_transfer_unmap_direct(struct svga_context
*svga
,
791 struct svga_transfer
*st
)
793 struct pipe_transfer
*transfer
= &st
->base
;
794 struct svga_texture
*tex
= svga_texture(transfer
->resource
);
796 svga_texture_surface_unmap(svga
, transfer
);
798 /* Now send an update command to update the content in the backend. */
799 if (st
->base
.usage
& PIPE_TRANSFER_WRITE
) {
800 struct svga_winsys_surface
*surf
= tex
->handle
;
803 unsigned nlayers
= 1;
805 assert(svga_have_gb_objects(svga
));
807 /* update the effected region */
808 box
.x
= transfer
->box
.x
;
809 box
.y
= transfer
->box
.y
;
810 box
.w
= transfer
->box
.width
;
811 box
.h
= transfer
->box
.height
;
812 box
.d
= transfer
->box
.depth
;
814 switch (tex
->b
.b
.target
) {
815 case PIPE_TEXTURE_CUBE
:
818 case PIPE_TEXTURE_2D_ARRAY
:
819 case PIPE_TEXTURE_CUBE_ARRAY
:
824 case PIPE_TEXTURE_1D_ARRAY
:
830 box
.z
= transfer
->box
.z
;
835 debug_printf("%s %d, %d, %d %d x %d x %d\n",
838 box
.w
, box
.h
, box
.d
);
840 if (svga_have_vgpu10(svga
)) {
843 for (i
= 0; i
< nlayers
; i
++) {
844 ret
= update_image_vgpu10(svga
, surf
, &box
,
845 st
->slice
+ i
, transfer
->level
,
846 tex
->b
.b
.last_level
+ 1);
847 assert(ret
== PIPE_OK
);
850 assert(nlayers
== 1);
851 ret
= update_image_vgpu9(svga
, surf
, &box
, st
->slice
, transfer
->level
);
852 assert(ret
== PIPE_OK
);
859 svga_texture_transfer_unmap(struct pipe_context
*pipe
,
860 struct pipe_transfer
*transfer
)
862 struct svga_context
*svga
= svga_context(pipe
);
863 struct svga_screen
*ss
= svga_screen(pipe
->screen
);
864 struct svga_winsys_screen
*sws
= ss
->sws
;
865 struct svga_transfer
*st
= svga_transfer(transfer
);
866 struct svga_texture
*tex
= svga_texture(transfer
->resource
);
868 SVGA_STATS_TIME_PUSH(sws
, SVGA_STATS_TIME_TEXTRANSFERUNMAP
);
870 if (!st
->use_direct_map
) {
871 svga_texture_transfer_unmap_dma(svga
, st
);
873 else if (st
->upload
.buf
) {
874 svga_texture_transfer_unmap_upload(svga
, st
);
877 svga_texture_transfer_unmap_direct(svga
, st
);
880 if (st
->base
.usage
& PIPE_TRANSFER_WRITE
) {
881 svga
->hud
.num_resource_updates
++;
883 /* Mark the texture level as dirty */
884 ss
->texture_timestamp
++;
885 svga_age_texture_view(tex
, transfer
->level
);
886 if (transfer
->resource
->target
== PIPE_TEXTURE_CUBE
)
887 svga_define_texture_level(tex
, st
->slice
, transfer
->level
);
889 svga_define_texture_level(tex
, 0, transfer
->level
);
892 pipe_resource_reference(&st
->base
.resource
, NULL
);
894 SVGA_STATS_TIME_POP(sws
);
900 * Does format store depth values?
902 static inline boolean
903 format_has_depth(enum pipe_format format
)
905 const struct util_format_description
*desc
= util_format_description(format
);
906 return util_format_has_depth(desc
);
910 struct u_resource_vtbl svga_texture_vtbl
=
912 svga_texture_get_handle
, /* get_handle */
913 svga_texture_destroy
, /* resource_destroy */
914 svga_texture_transfer_map
, /* transfer_map */
915 u_default_transfer_flush_region
, /* transfer_flush_region */
916 svga_texture_transfer_unmap
, /* transfer_unmap */
920 struct pipe_resource
*
921 svga_texture_create(struct pipe_screen
*screen
,
922 const struct pipe_resource
*template)
924 struct svga_screen
*svgascreen
= svga_screen(screen
);
925 struct svga_texture
*tex
;
926 unsigned bindings
= template->bind
;
928 SVGA_STATS_TIME_PUSH(svgascreen
->sws
,
929 SVGA_STATS_TIME_CREATETEXTURE
);
931 assert(template->last_level
< SVGA_MAX_TEXTURE_LEVELS
);
932 if (template->last_level
>= SVGA_MAX_TEXTURE_LEVELS
) {
936 /* Verify the number of mipmap levels isn't impossibly large. For example,
937 * if the base 2D image is 16x16, we can't have 8 mipmap levels.
938 * The state tracker should never ask us to create a resource with invalid
942 unsigned max_dim
= template->width0
;
944 switch (template->target
) {
945 case PIPE_TEXTURE_1D
:
946 case PIPE_TEXTURE_1D_ARRAY
:
949 case PIPE_TEXTURE_2D
:
950 case PIPE_TEXTURE_CUBE
:
951 case PIPE_TEXTURE_CUBE_ARRAY
:
952 case PIPE_TEXTURE_2D_ARRAY
:
953 max_dim
= MAX2(max_dim
, template->height0
);
955 case PIPE_TEXTURE_3D
:
956 max_dim
= MAX3(max_dim
, template->height0
, template->depth0
);
958 case PIPE_TEXTURE_RECT
:
960 assert(template->last_level
== 0);
961 /* the assertion below should always pass */
964 debug_printf("Unexpected texture target type\n");
966 assert(1 << template->last_level
<= max_dim
);
969 tex
= CALLOC_STRUCT(svga_texture
);
974 tex
->defined
= CALLOC(template->depth0
* template->array_size
,
975 sizeof(tex
->defined
[0]));
981 tex
->rendered_to
= CALLOC(template->depth0
* template->array_size
,
982 sizeof(tex
->rendered_to
[0]));
983 if (!tex
->rendered_to
) {
987 tex
->dirty
= CALLOC(template->depth0
* template->array_size
,
988 sizeof(tex
->dirty
[0]));
993 tex
->b
.b
= *template;
994 tex
->b
.vtbl
= &svga_texture_vtbl
;
995 pipe_reference_init(&tex
->b
.b
.reference
, 1);
996 tex
->b
.b
.screen
= screen
;
999 tex
->key
.size
.width
= template->width0
;
1000 tex
->key
.size
.height
= template->height0
;
1001 tex
->key
.size
.depth
= template->depth0
;
1002 tex
->key
.arraySize
= 1;
1003 tex
->key
.numFaces
= 1;
1005 /* nr_samples=1 must be treated as a non-multisample texture */
1006 if (tex
->b
.b
.nr_samples
== 1) {
1007 tex
->b
.b
.nr_samples
= 0;
1009 else if (tex
->b
.b
.nr_samples
> 1) {
1010 assert(svgascreen
->sws
->have_sm4_1
);
1011 tex
->key
.flags
|= SVGA3D_SURFACE_MULTISAMPLE
;
1014 tex
->key
.sampleCount
= tex
->b
.b
.nr_samples
;
1016 if (svgascreen
->sws
->have_vgpu10
) {
1017 switch (template->target
) {
1018 case PIPE_TEXTURE_1D
:
1019 tex
->key
.flags
|= SVGA3D_SURFACE_1D
;
1021 case PIPE_TEXTURE_1D_ARRAY
:
1022 tex
->key
.flags
|= SVGA3D_SURFACE_1D
;
1024 case PIPE_TEXTURE_2D_ARRAY
:
1025 tex
->key
.flags
|= SVGA3D_SURFACE_ARRAY
;
1026 tex
->key
.arraySize
= template->array_size
;
1028 case PIPE_TEXTURE_3D
:
1029 tex
->key
.flags
|= SVGA3D_SURFACE_VOLUME
;
1031 case PIPE_TEXTURE_CUBE
:
1032 tex
->key
.flags
|= (SVGA3D_SURFACE_CUBEMAP
| SVGA3D_SURFACE_ARRAY
);
1033 tex
->key
.numFaces
= 6;
1035 case PIPE_TEXTURE_CUBE_ARRAY
:
1036 assert(svgascreen
->sws
->have_sm4_1
);
1037 tex
->key
.flags
|= (SVGA3D_SURFACE_CUBEMAP
| SVGA3D_SURFACE_ARRAY
);
1038 tex
->key
.numFaces
= 1; // arraySize already includes the 6 faces
1039 tex
->key
.arraySize
= template->array_size
;
1046 switch (template->target
) {
1047 case PIPE_TEXTURE_3D
:
1048 tex
->key
.flags
|= SVGA3D_SURFACE_VOLUME
;
1050 case PIPE_TEXTURE_CUBE
:
1051 tex
->key
.flags
|= SVGA3D_SURFACE_CUBEMAP
;
1052 tex
->key
.numFaces
= 6;
1059 tex
->key
.cachable
= 1;
1061 if ((bindings
& (PIPE_BIND_RENDER_TARGET
| PIPE_BIND_DEPTH_STENCIL
)) &&
1062 !(bindings
& PIPE_BIND_SAMPLER_VIEW
)) {
1063 /* Also check if the format can be sampled from */
1064 if (screen
->is_format_supported(screen
, template->format
,
1066 template->nr_samples
,
1067 template->nr_storage_samples
,
1068 PIPE_BIND_SAMPLER_VIEW
)) {
1069 bindings
|= PIPE_BIND_SAMPLER_VIEW
;
1073 if (bindings
& PIPE_BIND_SAMPLER_VIEW
) {
1074 tex
->key
.flags
|= SVGA3D_SURFACE_HINT_TEXTURE
;
1075 tex
->key
.flags
|= SVGA3D_SURFACE_BIND_SHADER_RESOURCE
;
1077 if (!(bindings
& PIPE_BIND_RENDER_TARGET
)) {
1078 /* Also check if the format is color renderable */
1079 if (screen
->is_format_supported(screen
, template->format
,
1081 template->nr_samples
,
1082 template->nr_storage_samples
,
1083 PIPE_BIND_RENDER_TARGET
)) {
1084 bindings
|= PIPE_BIND_RENDER_TARGET
;
1088 if (!(bindings
& PIPE_BIND_DEPTH_STENCIL
)) {
1089 /* Also check if the format is depth/stencil renderable */
1090 if (screen
->is_format_supported(screen
, template->format
,
1092 template->nr_samples
,
1093 template->nr_storage_samples
,
1094 PIPE_BIND_DEPTH_STENCIL
)) {
1095 bindings
|= PIPE_BIND_DEPTH_STENCIL
;
1100 if (bindings
& PIPE_BIND_DISPLAY_TARGET
) {
1101 tex
->key
.cachable
= 0;
1104 if (bindings
& PIPE_BIND_SHARED
) {
1105 tex
->key
.cachable
= 0;
1108 if (bindings
& (PIPE_BIND_SCANOUT
| PIPE_BIND_CURSOR
)) {
1109 tex
->key
.scanout
= 1;
1110 tex
->key
.cachable
= 0;
1114 * Note: Previously we never passed the
1115 * SVGA3D_SURFACE_HINT_RENDERTARGET hint. Mesa cannot
1116 * know beforehand whether a texture will be used as a rendertarget or not
1117 * and it always requests PIPE_BIND_RENDER_TARGET, therefore
1118 * passing the SVGA3D_SURFACE_HINT_RENDERTARGET here defeats its purpose.
1120 * However, this was changed since other state trackers
1121 * (XA for example) uses it accurately and certain device versions
1122 * relies on it in certain situations to render correctly.
1124 if ((bindings
& PIPE_BIND_RENDER_TARGET
) &&
1125 !util_format_is_s3tc(template->format
)) {
1126 tex
->key
.flags
|= SVGA3D_SURFACE_HINT_RENDERTARGET
;
1127 tex
->key
.flags
|= SVGA3D_SURFACE_BIND_RENDER_TARGET
;
1130 if (bindings
& PIPE_BIND_DEPTH_STENCIL
) {
1131 tex
->key
.flags
|= SVGA3D_SURFACE_HINT_DEPTHSTENCIL
;
1132 tex
->key
.flags
|= SVGA3D_SURFACE_BIND_DEPTH_STENCIL
;
1135 tex
->key
.numMipLevels
= template->last_level
+ 1;
1137 tex
->key
.format
= svga_translate_format(svgascreen
, template->format
,
1139 if (tex
->key
.format
== SVGA3D_FORMAT_INVALID
) {
1143 /* Use typeless formats for sRGB and depth resources. Typeless
1144 * formats can be reinterpreted as other formats. For example,
1145 * SVGA3D_R8G8B8A8_UNORM_TYPELESS can be interpreted as
1146 * SVGA3D_R8G8B8A8_UNORM_SRGB or SVGA3D_R8G8B8A8_UNORM.
1148 if (svgascreen
->sws
->have_vgpu10
&&
1149 (util_format_is_srgb(template->format
) ||
1150 format_has_depth(template->format
))) {
1151 SVGA3dSurfaceFormat typeless
= svga_typeless_format(tex
->key
.format
);
1153 debug_printf("Convert resource type %s -> %s (bind 0x%x)\n",
1154 svga_format_name(tex
->key
.format
),
1155 svga_format_name(typeless
),
1159 if (svga_format_is_uncompressed_snorm(tex
->key
.format
)) {
1160 /* We can't normally render to snorm surfaces, but once we
1161 * substitute a typeless format, we can if the rendertarget view
1162 * is unorm. This can happen with GL_ARB_copy_image.
1164 tex
->key
.flags
|= SVGA3D_SURFACE_HINT_RENDERTARGET
;
1165 tex
->key
.flags
|= SVGA3D_SURFACE_BIND_RENDER_TARGET
;
1168 tex
->key
.format
= typeless
;
1171 SVGA_DBG(DEBUG_DMA
, "surface_create for texture\n", tex
->handle
);
1172 tex
->handle
= svga_screen_surface_create(svgascreen
, bindings
,
1174 &tex
->validated
, &tex
->key
);
1179 SVGA_DBG(DEBUG_DMA
, " --> got sid %p (texture)\n", tex
->handle
);
1181 debug_reference(&tex
->b
.b
.reference
,
1182 (debug_reference_descriptor
)debug_describe_resource
, 0);
1184 tex
->size
= util_resource_size(template);
1186 /* Determine if texture upload buffer can be used to upload this texture */
1187 tex
->can_use_upload
= svga_texture_transfer_map_can_upload(svgascreen
,
1190 /* Initialize the backing resource cache */
1191 tex
->backed_handle
= NULL
;
1193 svgascreen
->hud
.total_resource_bytes
+= tex
->size
;
1194 svgascreen
->hud
.num_resources
++;
1196 SVGA_STATS_TIME_POP(svgascreen
->sws
);
1203 if (tex
->rendered_to
)
1204 FREE(tex
->rendered_to
);
1209 SVGA_STATS_TIME_POP(svgascreen
->sws
);
1214 struct pipe_resource
*
1215 svga_texture_from_handle(struct pipe_screen
*screen
,
1216 const struct pipe_resource
*template,
1217 struct winsys_handle
*whandle
)
1219 struct svga_winsys_screen
*sws
= svga_winsys_screen(screen
);
1220 struct svga_screen
*ss
= svga_screen(screen
);
1221 struct svga_winsys_surface
*srf
;
1222 struct svga_texture
*tex
;
1223 enum SVGA3dSurfaceFormat format
= 0;
1226 /* Only supports one type */
1227 if ((template->target
!= PIPE_TEXTURE_2D
&&
1228 template->target
!= PIPE_TEXTURE_RECT
) ||
1229 template->last_level
!= 0 ||
1230 template->depth0
!= 1) {
1234 srf
= sws
->surface_from_handle(sws
, whandle
, &format
);
1239 if (!svga_format_is_shareable(ss
, template->format
, format
,
1240 template->bind
, true))
1243 tex
= CALLOC_STRUCT(svga_texture
);
1247 tex
->defined
= CALLOC(template->depth0
* template->array_size
,
1248 sizeof(tex
->defined
[0]));
1250 goto out_no_defined
;
1252 tex
->b
.b
= *template;
1253 tex
->b
.vtbl
= &svga_texture_vtbl
;
1254 pipe_reference_init(&tex
->b
.b
.reference
, 1);
1255 tex
->b
.b
.screen
= screen
;
1257 SVGA_DBG(DEBUG_DMA
, "wrap surface sid %p\n", srf
);
1259 tex
->key
.cachable
= 0;
1260 tex
->key
.format
= format
;
1263 tex
->rendered_to
= CALLOC(1, sizeof(tex
->rendered_to
[0]));
1264 if (!tex
->rendered_to
)
1265 goto out_no_rendered_to
;
1267 tex
->dirty
= CALLOC(1, sizeof(tex
->dirty
[0]));
1271 tex
->imported
= TRUE
;
1273 ss
->hud
.num_resources
++;
1278 FREE(tex
->rendered_to
);
1284 sws
->surface_reference(sws
, &srf
, NULL
);
1289 svga_texture_generate_mipmap(struct pipe_context
*pipe
,
1290 struct pipe_resource
*pt
,
1291 enum pipe_format format
,
1292 unsigned base_level
,
1293 unsigned last_level
,
1294 unsigned first_layer
,
1295 unsigned last_layer
)
1297 struct pipe_sampler_view templ
, *psv
;
1298 struct svga_pipe_sampler_view
*sv
;
1299 struct svga_context
*svga
= svga_context(pipe
);
1300 struct svga_texture
*tex
= svga_texture(pt
);
1301 enum pipe_error ret
;
1303 assert(svga_have_vgpu10(svga
));
1305 /* Only support 2D texture for now */
1306 if (pt
->target
!= PIPE_TEXTURE_2D
)
1309 /* Fallback to the mipmap generation utility for those formats that
1310 * do not support hw generate mipmap
1312 if (!svga_format_support_gen_mips(format
))
1315 /* Make sure the texture surface was created with
1316 * SVGA3D_SURFACE_BIND_RENDER_TARGET
1318 if (!tex
->handle
|| !(tex
->key
.flags
& SVGA3D_SURFACE_BIND_RENDER_TARGET
))
1321 templ
.format
= format
;
1322 templ
.u
.tex
.first_layer
= first_layer
;
1323 templ
.u
.tex
.last_layer
= last_layer
;
1324 templ
.u
.tex
.first_level
= base_level
;
1325 templ
.u
.tex
.last_level
= last_level
;
1327 psv
= pipe
->create_sampler_view(pipe
, pt
, &templ
);
1331 sv
= svga_pipe_sampler_view(psv
);
1332 ret
= svga_validate_pipe_sampler_view(svga
, sv
);
1333 if (ret
!= PIPE_OK
) {
1334 svga_context_flush(svga
, NULL
);
1335 ret
= svga_validate_pipe_sampler_view(svga
, sv
);
1336 assert(ret
== PIPE_OK
);
1339 ret
= SVGA3D_vgpu10_GenMips(svga
->swc
, sv
->id
, tex
->handle
);
1340 if (ret
!= PIPE_OK
) {
1341 svga_context_flush(svga
, NULL
);
1342 ret
= SVGA3D_vgpu10_GenMips(svga
->swc
, sv
->id
, tex
->handle
);
1344 pipe_sampler_view_reference(&psv
, NULL
);
1346 svga
->hud
.num_generate_mipmap
++;
1352 /* texture upload buffer default size in bytes */
1353 #define TEX_UPLOAD_DEFAULT_SIZE (1024 * 1024)
1356 * Create a texture upload buffer
1359 svga_texture_transfer_map_upload_create(struct svga_context
*svga
)
1361 svga
->tex_upload
= u_upload_create(&svga
->pipe
, TEX_UPLOAD_DEFAULT_SIZE
,
1362 0, PIPE_USAGE_STAGING
, 0);
1363 return svga
->tex_upload
!= NULL
;
1368 * Destroy the texture upload buffer
1371 svga_texture_transfer_map_upload_destroy(struct svga_context
*svga
)
1373 u_upload_destroy(svga
->tex_upload
);
1378 * Returns true if this transfer map request can use the upload buffer.
1381 svga_texture_transfer_map_can_upload(const struct svga_screen
*svgascreen
,
1382 const struct pipe_resource
*texture
)
1384 if (svgascreen
->sws
->have_transfer_from_buffer_cmd
== FALSE
)
1387 /* TransferFromBuffer command is not well supported with multi-samples surface */
1388 if (texture
->nr_samples
> 1)
1391 if (util_format_is_compressed(texture
->format
)) {
1392 /* XXX Need to take a closer look to see why texture upload
1393 * with 3D texture with compressed format fails
1395 if (texture
->target
== PIPE_TEXTURE_3D
)
1398 else if (texture
->format
== PIPE_FORMAT_R9G9B9E5_FLOAT
) {
1407 * Use upload buffer for the transfer map request.
1410 svga_texture_transfer_map_upload(struct svga_context
*svga
,
1411 struct svga_transfer
*st
)
1413 struct pipe_resource
*texture
= st
->base
.resource
;
1414 struct pipe_resource
*tex_buffer
= NULL
;
1416 unsigned nblocksx
, nblocksy
;
1418 unsigned upload_size
;
1420 assert(svga
->tex_upload
);
1422 st
->upload
.box
.x
= st
->base
.box
.x
;
1423 st
->upload
.box
.y
= st
->base
.box
.y
;
1424 st
->upload
.box
.z
= st
->base
.box
.z
;
1425 st
->upload
.box
.w
= st
->base
.box
.width
;
1426 st
->upload
.box
.h
= st
->base
.box
.height
;
1427 st
->upload
.box
.d
= st
->base
.box
.depth
;
1428 st
->upload
.nlayers
= 1;
1430 switch (texture
->target
) {
1431 case PIPE_TEXTURE_CUBE
:
1432 st
->upload
.box
.z
= 0;
1434 case PIPE_TEXTURE_2D_ARRAY
:
1435 case PIPE_TEXTURE_CUBE_ARRAY
:
1436 st
->upload
.nlayers
= st
->base
.box
.depth
;
1437 st
->upload
.box
.z
= 0;
1438 st
->upload
.box
.d
= 1;
1440 case PIPE_TEXTURE_1D_ARRAY
:
1441 st
->upload
.nlayers
= st
->base
.box
.depth
;
1442 st
->upload
.box
.y
= st
->upload
.box
.z
= 0;
1443 st
->upload
.box
.d
= 1;
1449 nblocksx
= util_format_get_nblocksx(texture
->format
, st
->base
.box
.width
);
1450 nblocksy
= util_format_get_nblocksy(texture
->format
, st
->base
.box
.height
);
1452 st
->base
.stride
= nblocksx
* util_format_get_blocksize(texture
->format
);
1453 st
->base
.layer_stride
= st
->base
.stride
* nblocksy
;
1455 /* In order to use the TransferFromBuffer command to update the
1456 * texture content from the buffer, the layer stride for a multi-layers
1457 * surface needs to be in multiples of 16 bytes.
1459 if (st
->upload
.nlayers
> 1 && st
->base
.layer_stride
& 15)
1462 upload_size
= st
->base
.layer_stride
* st
->base
.box
.depth
;
1463 upload_size
= align(upload_size
, 16);
1466 if (util_format_is_compressed(texture
->format
)) {
1467 struct svga_texture
*tex
= svga_texture(texture
);
1468 unsigned blockw
, blockh
, bytesPerBlock
;
1470 svga_format_size(tex
->key
.format
, &blockw
, &blockh
, &bytesPerBlock
);
1472 /* dest box must start on block boundary */
1473 assert((st
->base
.box
.x
% blockw
) == 0);
1474 assert((st
->base
.box
.y
% blockh
) == 0);
1478 /* If the upload size exceeds the default buffer size, the
1479 * upload buffer manager code will try to allocate a new buffer
1480 * with the new buffer size.
1482 u_upload_alloc(svga
->tex_upload
, 0, upload_size
, 16,
1483 &offset
, &tex_buffer
, &tex_map
);
1489 st
->upload
.buf
= tex_buffer
;
1490 st
->upload
.map
= tex_map
;
1491 st
->upload
.offset
= offset
;
1498 * Unmap upload map transfer request
1501 svga_texture_transfer_unmap_upload(struct svga_context
*svga
,
1502 struct svga_transfer
*st
)
1504 struct svga_winsys_surface
*srcsurf
;
1505 struct svga_winsys_surface
*dstsurf
;
1506 struct pipe_resource
*texture
= st
->base
.resource
;
1507 struct svga_texture
*tex
= svga_texture(texture
);
1508 enum pipe_error ret
;
1509 unsigned subResource
;
1510 unsigned numMipLevels
;
1512 unsigned offset
= st
->upload
.offset
;
1514 assert(svga
->tex_upload
);
1515 assert(st
->upload
.buf
);
1517 /* unmap the texture upload buffer */
1518 u_upload_unmap(svga
->tex_upload
);
1520 srcsurf
= svga_buffer_handle(svga
, st
->upload
.buf
, 0);
1521 dstsurf
= svga_texture(texture
)->handle
;
1524 numMipLevels
= texture
->last_level
+ 1;
1526 for (i
= 0, layer
= st
->slice
; i
< st
->upload
.nlayers
; i
++, layer
++) {
1527 subResource
= layer
* numMipLevels
+ st
->base
.level
;
1529 /* send a transferFromBuffer command to update the host texture surface */
1530 assert((offset
& 15) == 0);
1532 ret
= SVGA3D_vgpu10_TransferFromBuffer(svga
->swc
, srcsurf
,
1535 st
->base
.layer_stride
,
1536 dstsurf
, subResource
,
1538 if (ret
!= PIPE_OK
) {
1539 svga_context_flush(svga
, NULL
);
1540 ret
= SVGA3D_vgpu10_TransferFromBuffer(svga
->swc
, srcsurf
,
1543 st
->base
.layer_stride
,
1544 dstsurf
, subResource
,
1546 assert(ret
== PIPE_OK
);
1548 offset
+= st
->base
.layer_stride
;
1550 /* Set rendered-to flag */
1551 svga_set_texture_rendered_to(tex
, layer
, st
->base
.level
);
1554 pipe_resource_reference(&st
->upload
.buf
, NULL
);
1558 * Does the device format backing this surface have an
1561 * \param texture[in] The texture whose format we're querying
1562 * \return TRUE if the format has an alpha channel, FALSE otherwise
1564 * For locally created textures, the device (svga) format is typically
1565 * identical to svga_format(texture->format), and we can use the gallium
1566 * format tests to determine whether the device format has an alpha channel
1567 * or not. However, for textures backed by imported svga surfaces that is
1568 * not always true, and we have to look at the SVGA3D utilities.
1571 svga_texture_device_format_has_alpha(struct pipe_resource
*texture
)
1573 /* the svga_texture() call below is invalid for PIPE_BUFFER resources */
1574 assert(texture
->target
!= PIPE_BUFFER
);
1576 enum svga3d_block_desc block_desc
=
1577 svga3dsurface_get_desc(svga_texture(texture
)->key
.format
)->block_desc
;
1579 return !!(block_desc
& SVGA3DBLOCKDESC_ALPHA
);