svga, winsys/svga: Fix persistent memory discard maps
[mesa.git] / src / gallium / drivers / svga / svga_resource_texture.c
1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
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9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 **********************************************************/
25
26 #include "svga3d_reg.h"
27 #include "svga3d_surfacedefs.h"
28
29 #include "pipe/p_state.h"
30 #include "pipe/p_defines.h"
31 #include "os/os_thread.h"
32 #include "util/format/u_format.h"
33 #include "util/u_inlines.h"
34 #include "util/u_math.h"
35 #include "util/u_memory.h"
36 #include "util/u_resource.h"
37 #include "util/u_upload_mgr.h"
38
39 #include "svga_cmd.h"
40 #include "svga_format.h"
41 #include "svga_screen.h"
42 #include "svga_context.h"
43 #include "svga_resource_texture.h"
44 #include "svga_resource_buffer.h"
45 #include "svga_sampler_view.h"
46 #include "svga_winsys.h"
47 #include "svga_debug.h"
48
49
50 static void
51 svga_transfer_dma_band(struct svga_context *svga,
52 struct svga_transfer *st,
53 SVGA3dTransferType transfer,
54 unsigned x, unsigned y, unsigned z,
55 unsigned w, unsigned h, unsigned d,
56 unsigned srcx, unsigned srcy, unsigned srcz,
57 SVGA3dSurfaceDMAFlags flags)
58 {
59 struct svga_texture *texture = svga_texture(st->base.resource);
60 SVGA3dCopyBox box;
61 enum pipe_error ret;
62
63 assert(!st->use_direct_map);
64
65 box.x = x;
66 box.y = y;
67 box.z = z;
68 box.w = w;
69 box.h = h;
70 box.d = d;
71 box.srcx = srcx;
72 box.srcy = srcy;
73 box.srcz = srcz;
74
75 SVGA_DBG(DEBUG_DMA, "dma %s sid %p, face %u, (%u, %u, %u) - "
76 "(%u, %u, %u), %ubpp\n",
77 transfer == SVGA3D_WRITE_HOST_VRAM ? "to" : "from",
78 texture->handle,
79 st->slice,
80 x,
81 y,
82 z,
83 x + w,
84 y + h,
85 z + 1,
86 util_format_get_blocksize(texture->b.b.format) * 8 /
87 (util_format_get_blockwidth(texture->b.b.format)
88 * util_format_get_blockheight(texture->b.b.format)));
89
90 ret = SVGA3D_SurfaceDMA(svga->swc, st, transfer, &box, 1, flags);
91 if (ret != PIPE_OK) {
92 svga_context_flush(svga, NULL);
93 ret = SVGA3D_SurfaceDMA(svga->swc, st, transfer, &box, 1, flags);
94 assert(ret == PIPE_OK);
95 }
96 }
97
98
99 static void
100 svga_transfer_dma(struct svga_context *svga,
101 struct svga_transfer *st,
102 SVGA3dTransferType transfer,
103 SVGA3dSurfaceDMAFlags flags)
104 {
105 struct svga_texture *texture = svga_texture(st->base.resource);
106 struct svga_screen *screen = svga_screen(texture->b.b.screen);
107 struct svga_winsys_screen *sws = screen->sws;
108 struct pipe_fence_handle *fence = NULL;
109
110 assert(!st->use_direct_map);
111
112 if (transfer == SVGA3D_READ_HOST_VRAM) {
113 SVGA_DBG(DEBUG_PERF, "%s: readback transfer\n", __FUNCTION__);
114 }
115
116 /* Ensure any pending operations on host surfaces are queued on the command
117 * buffer first.
118 */
119 svga_surfaces_flush(svga);
120
121 if (!st->swbuf) {
122 /* Do the DMA transfer in a single go */
123 svga_transfer_dma_band(svga, st, transfer,
124 st->box.x, st->box.y, st->box.z,
125 st->box.w, st->box.h, st->box.d,
126 0, 0, 0,
127 flags);
128
129 if (transfer == SVGA3D_READ_HOST_VRAM) {
130 svga_context_flush(svga, &fence);
131 sws->fence_finish(sws, fence, PIPE_TIMEOUT_INFINITE, 0);
132 sws->fence_reference(sws, &fence, NULL);
133 }
134 }
135 else {
136 int y, h, y_max;
137 unsigned blockheight =
138 util_format_get_blockheight(st->base.resource->format);
139
140 h = st->hw_nblocksy * blockheight;
141 y_max = st->box.y + st->box.h;
142
143 for (y = st->box.y; y < y_max; y += h) {
144 unsigned offset, length;
145 void *hw, *sw;
146
147 if (y + h > y_max)
148 h = y_max - y;
149
150 /* Transfer band must be aligned to pixel block boundaries */
151 assert(y % blockheight == 0);
152 assert(h % blockheight == 0);
153
154 /* First band starts at the top of the SW buffer. */
155 offset = (y - st->box.y) * st->base.stride / blockheight;
156 length = h * st->base.stride / blockheight;
157
158 sw = (uint8_t *) st->swbuf + offset;
159
160 if (transfer == SVGA3D_WRITE_HOST_VRAM) {
161 unsigned usage = PIPE_TRANSFER_WRITE;
162
163 /* Don't write to an in-flight DMA buffer. Synchronize or
164 * discard in-flight storage. */
165 if (y != st->box.y) {
166 svga_context_flush(svga, NULL);
167 usage |= PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE;
168 }
169
170 hw = sws->buffer_map(sws, st->hwbuf, usage);
171 assert(hw);
172 if (hw) {
173 memcpy(hw, sw, length);
174 sws->buffer_unmap(sws, st->hwbuf);
175 }
176 }
177
178 svga_transfer_dma_band(svga, st, transfer,
179 st->box.x, y, st->box.z,
180 st->box.w, h, st->box.d,
181 0, 0, 0, flags);
182
183 /*
184 * Prevent the texture contents to be discarded on the next band
185 * upload.
186 */
187 flags.discard = FALSE;
188
189 if (transfer == SVGA3D_READ_HOST_VRAM) {
190 svga_context_flush(svga, &fence);
191 sws->fence_finish(sws, fence, PIPE_TIMEOUT_INFINITE, 0);
192
193 hw = sws->buffer_map(sws, st->hwbuf, PIPE_TRANSFER_READ);
194 assert(hw);
195 if (hw) {
196 memcpy(sw, hw, length);
197 sws->buffer_unmap(sws, st->hwbuf);
198 }
199 }
200 }
201 }
202 }
203
204
205
206 static bool
207 svga_texture_get_handle(struct pipe_screen *screen,
208 struct pipe_resource *texture,
209 struct winsys_handle *whandle)
210 {
211 struct svga_winsys_screen *sws = svga_winsys_screen(texture->screen);
212 unsigned stride;
213
214 assert(svga_texture(texture)->key.cachable == 0);
215 svga_texture(texture)->key.cachable = 0;
216
217 stride = util_format_get_nblocksx(texture->format, texture->width0) *
218 util_format_get_blocksize(texture->format);
219
220 return sws->surface_get_handle(sws, svga_texture(texture)->handle,
221 stride, whandle);
222 }
223
224
225 static void
226 svga_texture_destroy(struct pipe_screen *screen,
227 struct pipe_resource *pt)
228 {
229 struct svga_screen *ss = svga_screen(screen);
230 struct svga_texture *tex = svga_texture(pt);
231
232 ss->texture_timestamp++;
233
234 svga_sampler_view_reference(&tex->cached_view, NULL);
235
236 /*
237 DBG("%s deleting %p\n", __FUNCTION__, (void *) tex);
238 */
239 SVGA_DBG(DEBUG_DMA, "unref sid %p (texture)\n", tex->handle);
240 svga_screen_surface_destroy(ss, &tex->key, &tex->handle);
241
242 /* Destroy the backed surface handle if exists */
243 if (tex->backed_handle)
244 svga_screen_surface_destroy(ss, &tex->backed_key, &tex->backed_handle);
245
246 ss->hud.total_resource_bytes -= tex->size;
247
248 FREE(tex->defined);
249 FREE(tex->rendered_to);
250 FREE(tex->dirty);
251 FREE(tex);
252
253 assert(ss->hud.num_resources > 0);
254 if (ss->hud.num_resources > 0)
255 ss->hud.num_resources--;
256 }
257
258
259 /**
260 * Determine if we need to read back a texture image before mapping it.
261 */
262 static inline boolean
263 need_tex_readback(struct svga_transfer *st)
264 {
265 if (st->base.usage & PIPE_TRANSFER_READ)
266 return TRUE;
267
268 if ((st->base.usage & PIPE_TRANSFER_WRITE) &&
269 ((st->base.usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) == 0)) {
270 return svga_was_texture_rendered_to(svga_texture(st->base.resource),
271 st->slice, st->base.level);
272 }
273
274 return FALSE;
275 }
276
277
278 static enum pipe_error
279 readback_image_vgpu9(struct svga_context *svga,
280 struct svga_winsys_surface *surf,
281 unsigned slice,
282 unsigned level)
283 {
284 enum pipe_error ret;
285
286 ret = SVGA3D_ReadbackGBImage(svga->swc, surf, slice, level);
287 if (ret != PIPE_OK) {
288 svga_context_flush(svga, NULL);
289 ret = SVGA3D_ReadbackGBImage(svga->swc, surf, slice, level);
290 }
291 return ret;
292 }
293
294
295 static enum pipe_error
296 readback_image_vgpu10(struct svga_context *svga,
297 struct svga_winsys_surface *surf,
298 unsigned slice,
299 unsigned level,
300 unsigned numMipLevels)
301 {
302 enum pipe_error ret;
303 unsigned subResource;
304
305 subResource = slice * numMipLevels + level;
306 ret = SVGA3D_vgpu10_ReadbackSubResource(svga->swc, surf, subResource);
307 if (ret != PIPE_OK) {
308 svga_context_flush(svga, NULL);
309 ret = SVGA3D_vgpu10_ReadbackSubResource(svga->swc, surf, subResource);
310 }
311 return ret;
312 }
313
314
315 /**
316 * Use DMA for the transfer request
317 */
318 static void *
319 svga_texture_transfer_map_dma(struct svga_context *svga,
320 struct svga_transfer *st)
321 {
322 struct svga_winsys_screen *sws = svga_screen(svga->pipe.screen)->sws;
323 struct pipe_resource *texture = st->base.resource;
324 unsigned nblocksx, nblocksy;
325 unsigned d;
326 unsigned usage = st->base.usage;
327
328 /* we'll put the data into a tightly packed buffer */
329 nblocksx = util_format_get_nblocksx(texture->format, st->box.w);
330 nblocksy = util_format_get_nblocksy(texture->format, st->box.h);
331 d = st->box.d;
332
333 st->base.stride = nblocksx*util_format_get_blocksize(texture->format);
334 st->base.layer_stride = st->base.stride * nblocksy;
335 st->hw_nblocksy = nblocksy;
336
337 st->hwbuf = svga_winsys_buffer_create(svga, 1, 0,
338 st->hw_nblocksy * st->base.stride * d);
339
340 while (!st->hwbuf && (st->hw_nblocksy /= 2)) {
341 st->hwbuf =
342 svga_winsys_buffer_create(svga, 1, 0,
343 st->hw_nblocksy * st->base.stride * d);
344 }
345
346 if (!st->hwbuf)
347 return NULL;
348
349 if (st->hw_nblocksy < nblocksy) {
350 /* We couldn't allocate a hardware buffer big enough for the transfer,
351 * so allocate regular malloc memory instead
352 */
353 if (0) {
354 debug_printf("%s: failed to allocate %u KB of DMA, "
355 "splitting into %u x %u KB DMA transfers\n",
356 __FUNCTION__,
357 (nblocksy * st->base.stride + 1023) / 1024,
358 (nblocksy + st->hw_nblocksy - 1) / st->hw_nblocksy,
359 (st->hw_nblocksy * st->base.stride + 1023) / 1024);
360 }
361
362 st->swbuf = MALLOC(nblocksy * st->base.stride * d);
363 if (!st->swbuf) {
364 sws->buffer_destroy(sws, st->hwbuf);
365 return NULL;
366 }
367 }
368
369 if (usage & PIPE_TRANSFER_READ) {
370 SVGA3dSurfaceDMAFlags flags;
371 memset(&flags, 0, sizeof flags);
372 svga_transfer_dma(svga, st, SVGA3D_READ_HOST_VRAM, flags);
373 }
374
375 if (st->swbuf) {
376 return st->swbuf;
377 }
378 else {
379 return sws->buffer_map(sws, st->hwbuf, usage);
380 }
381 }
382
383
384 /**
385 * Use direct map for the transfer request
386 */
387 static void *
388 svga_texture_transfer_map_direct(struct svga_context *svga,
389 struct svga_transfer *st)
390 {
391 struct svga_winsys_screen *sws = svga_screen(svga->pipe.screen)->sws;
392 struct pipe_transfer *transfer = &st->base;
393 struct pipe_resource *texture = transfer->resource;
394 struct svga_texture *tex = svga_texture(texture);
395 struct svga_winsys_surface *surf = tex->handle;
396 unsigned level = st->base.level;
397 unsigned w, h, nblocksx, nblocksy, i;
398 unsigned usage = st->base.usage;
399
400 if (need_tex_readback(st)) {
401 enum pipe_error ret;
402
403 svga_surfaces_flush(svga);
404
405 if (!svga->swc->force_coherent || tex->imported) {
406 for (i = 0; i < st->box.d; i++) {
407 if (svga_have_vgpu10(svga)) {
408 ret = readback_image_vgpu10(svga, surf, st->slice + i, level,
409 tex->b.b.last_level + 1);
410 } else {
411 ret = readback_image_vgpu9(svga, surf, st->slice + i, level);
412 }
413 }
414 svga->hud.num_readbacks++;
415 SVGA_STATS_COUNT_INC(sws, SVGA_STATS_COUNT_TEXREADBACK);
416
417 assert(ret == PIPE_OK);
418 (void) ret;
419
420 svga_context_flush(svga, NULL);
421 }
422 /*
423 * Note: if PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE were specified
424 * we could potentially clear the flag for all faces/layers/mips.
425 */
426 svga_clear_texture_rendered_to(tex, st->slice, level);
427 }
428 else {
429 assert(usage & PIPE_TRANSFER_WRITE);
430 if ((usage & PIPE_TRANSFER_UNSYNCHRONIZED) == 0) {
431 if (svga_is_texture_dirty(tex, st->slice, level)) {
432 /*
433 * do a surface flush if the subresource has been modified
434 * in this command buffer.
435 */
436 svga_surfaces_flush(svga);
437 if (!sws->surface_is_flushed(sws, surf)) {
438 svga->hud.surface_write_flushes++;
439 SVGA_STATS_COUNT_INC(sws, SVGA_STATS_COUNT_SURFACEWRITEFLUSH);
440 svga_context_flush(svga, NULL);
441 }
442 }
443 }
444 }
445
446 /* we'll directly access the guest-backed surface */
447 w = u_minify(texture->width0, level);
448 h = u_minify(texture->height0, level);
449 nblocksx = util_format_get_nblocksx(texture->format, w);
450 nblocksy = util_format_get_nblocksy(texture->format, h);
451 st->hw_nblocksy = nblocksy;
452 st->base.stride = nblocksx*util_format_get_blocksize(texture->format);
453 st->base.layer_stride = st->base.stride * nblocksy;
454
455 /*
456 * Begin mapping code
457 */
458 {
459 SVGA3dSize baseLevelSize;
460 uint8_t *map;
461 boolean retry, rebind;
462 unsigned offset, mip_width, mip_height;
463 struct svga_winsys_context *swc = svga->swc;
464
465 map = swc->surface_map(swc, surf, usage, &retry, &rebind);
466 if (map == NULL && retry) {
467 /*
468 * At this point, the svga_surfaces_flush() should already have
469 * called in svga_texture_get_transfer().
470 */
471 svga->hud.surface_write_flushes++;
472 svga_context_flush(svga, NULL);
473 map = swc->surface_map(swc, surf, usage, &retry, &rebind);
474 }
475 if (map && rebind) {
476 enum pipe_error ret;
477
478 ret = SVGA3D_BindGBSurface(swc, surf);
479 if (ret != PIPE_OK) {
480 svga_context_flush(svga, NULL);
481 ret = SVGA3D_BindGBSurface(swc, surf);
482 assert(ret == PIPE_OK);
483 }
484 svga_context_flush(svga, NULL);
485 }
486
487 /*
488 * Make sure we return NULL if the map fails
489 */
490 if (!map) {
491 return NULL;
492 }
493
494 /**
495 * Compute the offset to the specific texture slice in the buffer.
496 */
497 baseLevelSize.width = tex->b.b.width0;
498 baseLevelSize.height = tex->b.b.height0;
499 baseLevelSize.depth = tex->b.b.depth0;
500
501 if ((tex->b.b.target == PIPE_TEXTURE_1D_ARRAY) ||
502 (tex->b.b.target == PIPE_TEXTURE_2D_ARRAY) ||
503 (tex->b.b.target == PIPE_TEXTURE_CUBE_ARRAY)) {
504 st->base.layer_stride =
505 svga3dsurface_get_image_offset(tex->key.format, baseLevelSize,
506 tex->b.b.last_level + 1, 1, 0);
507 }
508
509 offset = svga3dsurface_get_image_offset(tex->key.format, baseLevelSize,
510 tex->b.b.last_level + 1, /* numMips */
511 st->slice, level);
512 if (level > 0) {
513 assert(offset > 0);
514 }
515
516 mip_width = u_minify(tex->b.b.width0, level);
517 mip_height = u_minify(tex->b.b.height0, level);
518
519 offset += svga3dsurface_get_pixel_offset(tex->key.format,
520 mip_width, mip_height,
521 st->box.x,
522 st->box.y,
523 st->box.z);
524
525 return (void *) (map + offset);
526 }
527 }
528
529
530 /**
531 * Request a transfer map to the texture resource
532 */
533 static void *
534 svga_texture_transfer_map(struct pipe_context *pipe,
535 struct pipe_resource *texture,
536 unsigned level,
537 unsigned usage,
538 const struct pipe_box *box,
539 struct pipe_transfer **ptransfer)
540 {
541 struct svga_context *svga = svga_context(pipe);
542 struct svga_winsys_screen *sws = svga_screen(pipe->screen)->sws;
543 struct svga_texture *tex = svga_texture(texture);
544 struct svga_transfer *st;
545 struct svga_winsys_surface *surf = tex->handle;
546 boolean use_direct_map = svga_have_gb_objects(svga) &&
547 (!svga_have_gb_dma(svga) || (usage & PIPE_TRANSFER_WRITE));
548 void *map = NULL;
549 int64_t begin = svga_get_time(svga);
550
551 SVGA_STATS_TIME_PUSH(sws, SVGA_STATS_TIME_TEXTRANSFERMAP);
552
553 if (!surf)
554 goto done;
555
556 /* We can't map texture storage directly unless we have GB objects */
557 if (usage & PIPE_TRANSFER_MAP_DIRECTLY) {
558 if (svga_have_gb_objects(svga))
559 use_direct_map = TRUE;
560 else
561 goto done;
562 }
563
564 st = CALLOC_STRUCT(svga_transfer);
565 if (!st)
566 goto done;
567
568 st->base.level = level;
569 st->base.usage = usage;
570 st->base.box = *box;
571
572 /* The modified transfer map box with the array index removed from z.
573 * The array index is specified in slice.
574 */
575 st->box.x = box->x;
576 st->box.y = box->y;
577 st->box.z = box->z;
578 st->box.w = box->width;
579 st->box.h = box->height;
580 st->box.d = box->depth;
581
582 switch (tex->b.b.target) {
583 case PIPE_TEXTURE_CUBE:
584 st->slice = st->base.box.z;
585 st->box.z = 0; /* so we don't apply double offsets below */
586 break;
587 case PIPE_TEXTURE_1D_ARRAY:
588 case PIPE_TEXTURE_2D_ARRAY:
589 case PIPE_TEXTURE_CUBE_ARRAY:
590 st->slice = st->base.box.z;
591 st->box.z = 0; /* so we don't apply double offsets below */
592
593 /* Force direct map for transfering multiple slices */
594 if (st->base.box.depth > 1)
595 use_direct_map = svga_have_gb_objects(svga);
596
597 break;
598 default:
599 st->slice = 0;
600 break;
601 }
602
603 /* Force direct map for multisample surface */
604 if (texture->nr_samples > 1) {
605 assert(svga_have_gb_objects(svga));
606 assert(sws->have_sm4_1);
607 use_direct_map = TRUE;
608 }
609
610 st->use_direct_map = use_direct_map;
611 pipe_resource_reference(&st->base.resource, texture);
612
613 /* If this is the first time mapping to the surface in this
614 * command buffer, clear the dirty masks of this surface.
615 */
616 if (sws->surface_is_flushed(sws, surf)) {
617 svga_clear_texture_dirty(tex);
618 }
619
620 if (!use_direct_map) {
621 /* upload to the DMA buffer */
622 map = svga_texture_transfer_map_dma(svga, st);
623 }
624 else {
625 boolean can_use_upload = tex->can_use_upload &&
626 !(st->base.usage & PIPE_TRANSFER_READ);
627 boolean was_rendered_to =
628 svga_was_texture_rendered_to(svga_texture(texture),
629 st->slice, st->base.level);
630
631 /* If the texture was already rendered to and upload buffer
632 * is supported, then we will use upload buffer to
633 * avoid the need to read back the texture content; otherwise,
634 * we'll first try to map directly to the GB surface, if it is blocked,
635 * then we'll try the upload buffer.
636 */
637 if (was_rendered_to && can_use_upload) {
638 map = svga_texture_transfer_map_upload(svga, st);
639 }
640 else {
641 unsigned orig_usage = st->base.usage;
642
643 /* First try directly map to the GB surface */
644 if (can_use_upload)
645 st->base.usage |= PIPE_TRANSFER_DONTBLOCK;
646 map = svga_texture_transfer_map_direct(svga, st);
647 st->base.usage = orig_usage;
648
649 if (!map && can_use_upload) {
650 /* if direct map with DONTBLOCK fails, then try upload to the
651 * texture upload buffer.
652 */
653 map = svga_texture_transfer_map_upload(svga, st);
654 }
655 }
656
657 /* If upload fails, then try direct map again without forcing it
658 * to DONTBLOCK.
659 */
660 if (!map) {
661 map = svga_texture_transfer_map_direct(svga, st);
662 }
663 }
664
665 if (!map) {
666 FREE(st);
667 }
668 else {
669 *ptransfer = &st->base;
670 svga->hud.num_textures_mapped++;
671 if (usage & PIPE_TRANSFER_WRITE) {
672 /* record texture upload for HUD */
673 svga->hud.num_bytes_uploaded +=
674 st->base.layer_stride * st->box.d;
675
676 /* mark this texture level as dirty */
677 svga_set_texture_dirty(tex, st->slice, level);
678 }
679 }
680
681 done:
682 svga->hud.map_buffer_time += (svga_get_time(svga) - begin);
683 SVGA_STATS_TIME_POP(sws);
684 (void) sws;
685
686 return map;
687 }
688
689 /**
690 * Unmap a GB texture surface.
691 */
692 static void
693 svga_texture_surface_unmap(struct svga_context *svga,
694 struct pipe_transfer *transfer)
695 {
696 struct svga_winsys_surface *surf = svga_texture(transfer->resource)->handle;
697 struct svga_winsys_context *swc = svga->swc;
698 boolean rebind;
699
700 assert(surf);
701
702 swc->surface_unmap(swc, surf, &rebind);
703 if (rebind) {
704 enum pipe_error ret;
705 ret = SVGA3D_BindGBSurface(swc, surf);
706 if (ret != PIPE_OK) {
707 /* flush and retry */
708 svga_context_flush(svga, NULL);
709 ret = SVGA3D_BindGBSurface(swc, surf);
710 assert(ret == PIPE_OK);
711 }
712 if (swc->force_coherent) {
713 ret = SVGA3D_UpdateGBSurface(swc, surf);
714 if (ret != PIPE_OK) {
715 /* flush and retry */
716 svga_context_flush(svga, NULL);
717 ret = SVGA3D_UpdateGBSurface(swc, surf);
718 assert(ret == PIPE_OK);
719 }
720 }
721 }
722 }
723
724
725 static enum pipe_error
726 update_image_vgpu9(struct svga_context *svga,
727 struct svga_winsys_surface *surf,
728 const SVGA3dBox *box,
729 unsigned slice,
730 unsigned level)
731 {
732 enum pipe_error ret;
733
734 ret = SVGA3D_UpdateGBImage(svga->swc, surf, box, slice, level);
735 if (ret != PIPE_OK) {
736 svga_context_flush(svga, NULL);
737 ret = SVGA3D_UpdateGBImage(svga->swc, surf, box, slice, level);
738 }
739 return ret;
740 }
741
742
743 static enum pipe_error
744 update_image_vgpu10(struct svga_context *svga,
745 struct svga_winsys_surface *surf,
746 const SVGA3dBox *box,
747 unsigned slice,
748 unsigned level,
749 unsigned numMipLevels)
750 {
751 enum pipe_error ret;
752 unsigned subResource;
753
754 subResource = slice * numMipLevels + level;
755
756 ret = SVGA3D_vgpu10_UpdateSubResource(svga->swc, surf, box, subResource);
757 if (ret != PIPE_OK) {
758 svga_context_flush(svga, NULL);
759 ret = SVGA3D_vgpu10_UpdateSubResource(svga->swc, surf, box, subResource);
760 }
761 return ret;
762 }
763
764
765 /**
766 * unmap DMA transfer request
767 */
768 static void
769 svga_texture_transfer_unmap_dma(struct svga_context *svga,
770 struct svga_transfer *st)
771 {
772 struct svga_winsys_screen *sws = svga_screen(svga->pipe.screen)->sws;
773
774 if (!st->swbuf)
775 sws->buffer_unmap(sws, st->hwbuf);
776
777 if (st->base.usage & PIPE_TRANSFER_WRITE) {
778 /* Use DMA to transfer texture data */
779 SVGA3dSurfaceDMAFlags flags;
780 struct pipe_resource *texture = st->base.resource;
781 struct svga_texture *tex = svga_texture(texture);
782
783
784 memset(&flags, 0, sizeof flags);
785 if (st->base.usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) {
786 flags.discard = TRUE;
787 }
788 if (st->base.usage & PIPE_TRANSFER_UNSYNCHRONIZED) {
789 flags.unsynchronized = TRUE;
790 }
791
792 svga_transfer_dma(svga, st, SVGA3D_WRITE_HOST_VRAM, flags);
793 svga_set_texture_rendered_to(tex, st->slice, st->base.level);
794 }
795
796 FREE(st->swbuf);
797 sws->buffer_destroy(sws, st->hwbuf);
798 }
799
800
801 /**
802 * unmap direct map transfer request
803 */
804 static void
805 svga_texture_transfer_unmap_direct(struct svga_context *svga,
806 struct svga_transfer *st)
807 {
808 struct pipe_transfer *transfer = &st->base;
809 struct svga_texture *tex = svga_texture(transfer->resource);
810
811 svga_texture_surface_unmap(svga, transfer);
812
813 /* Now send an update command to update the content in the backend. */
814 if (st->base.usage & PIPE_TRANSFER_WRITE) {
815 struct svga_winsys_surface *surf = tex->handle;
816 enum pipe_error ret;
817
818 assert(svga_have_gb_objects(svga));
819
820 /* update the effected region */
821 SVGA3dBox box = st->box;
822 unsigned nlayers;
823
824 switch (tex->b.b.target) {
825 case PIPE_TEXTURE_2D_ARRAY:
826 case PIPE_TEXTURE_CUBE_ARRAY:
827 case PIPE_TEXTURE_1D_ARRAY:
828 nlayers = box.d;
829 box.d = 1;
830 break;
831 default:
832 nlayers = 1;
833 break;
834 }
835
836
837 if (0)
838 debug_printf("%s %d, %d, %d %d x %d x %d\n",
839 __FUNCTION__,
840 box.x, box.y, box.z,
841 box.w, box.h, box.d);
842
843 if (!svga->swc->force_coherent || tex->imported) {
844 if (svga_have_vgpu10(svga)) {
845 unsigned i;
846
847 for (i = 0; i < nlayers; i++) {
848 ret = update_image_vgpu10(svga, surf, &box,
849 st->slice + i, transfer->level,
850 tex->b.b.last_level + 1);
851 assert(ret == PIPE_OK);
852 }
853 } else {
854 assert(nlayers == 1);
855 ret = update_image_vgpu9(svga, surf, &box, st->slice,
856 transfer->level);
857 assert(ret == PIPE_OK);
858 }
859 }
860 (void) ret;
861 }
862 }
863
864
865 static void
866 svga_texture_transfer_unmap(struct pipe_context *pipe,
867 struct pipe_transfer *transfer)
868 {
869 struct svga_context *svga = svga_context(pipe);
870 struct svga_screen *ss = svga_screen(pipe->screen);
871 struct svga_winsys_screen *sws = ss->sws;
872 struct svga_transfer *st = svga_transfer(transfer);
873 struct svga_texture *tex = svga_texture(transfer->resource);
874
875 SVGA_STATS_TIME_PUSH(sws, SVGA_STATS_TIME_TEXTRANSFERUNMAP);
876
877 if (!st->use_direct_map) {
878 svga_texture_transfer_unmap_dma(svga, st);
879 }
880 else if (st->upload.buf) {
881 svga_texture_transfer_unmap_upload(svga, st);
882 }
883 else {
884 svga_texture_transfer_unmap_direct(svga, st);
885 }
886
887 if (st->base.usage & PIPE_TRANSFER_WRITE) {
888 svga->hud.num_resource_updates++;
889
890 /* Mark the texture level as dirty */
891 ss->texture_timestamp++;
892 svga_age_texture_view(tex, transfer->level);
893 if (transfer->resource->target == PIPE_TEXTURE_CUBE)
894 svga_define_texture_level(tex, st->slice, transfer->level);
895 else
896 svga_define_texture_level(tex, 0, transfer->level);
897 }
898
899 pipe_resource_reference(&st->base.resource, NULL);
900 FREE(st);
901 SVGA_STATS_TIME_POP(sws);
902 (void) sws;
903 }
904
905
906 /**
907 * Does format store depth values?
908 */
909 static inline boolean
910 format_has_depth(enum pipe_format format)
911 {
912 const struct util_format_description *desc = util_format_description(format);
913 return util_format_has_depth(desc);
914 }
915
916
917 struct u_resource_vtbl svga_texture_vtbl =
918 {
919 svga_texture_get_handle, /* get_handle */
920 svga_texture_destroy, /* resource_destroy */
921 svga_texture_transfer_map, /* transfer_map */
922 u_default_transfer_flush_region, /* transfer_flush_region */
923 svga_texture_transfer_unmap, /* transfer_unmap */
924 };
925
926
927 struct pipe_resource *
928 svga_texture_create(struct pipe_screen *screen,
929 const struct pipe_resource *template)
930 {
931 struct svga_screen *svgascreen = svga_screen(screen);
932 struct svga_texture *tex;
933 unsigned bindings = template->bind;
934
935 SVGA_STATS_TIME_PUSH(svgascreen->sws,
936 SVGA_STATS_TIME_CREATETEXTURE);
937
938 assert(template->last_level < SVGA_MAX_TEXTURE_LEVELS);
939 if (template->last_level >= SVGA_MAX_TEXTURE_LEVELS) {
940 goto fail_notex;
941 }
942
943 /* Verify the number of mipmap levels isn't impossibly large. For example,
944 * if the base 2D image is 16x16, we can't have 8 mipmap levels.
945 * The state tracker should never ask us to create a resource with invalid
946 * parameters.
947 */
948 {
949 unsigned max_dim = template->width0;
950
951 switch (template->target) {
952 case PIPE_TEXTURE_1D:
953 case PIPE_TEXTURE_1D_ARRAY:
954 // nothing
955 break;
956 case PIPE_TEXTURE_2D:
957 case PIPE_TEXTURE_CUBE:
958 case PIPE_TEXTURE_CUBE_ARRAY:
959 case PIPE_TEXTURE_2D_ARRAY:
960 max_dim = MAX2(max_dim, template->height0);
961 break;
962 case PIPE_TEXTURE_3D:
963 max_dim = MAX3(max_dim, template->height0, template->depth0);
964 break;
965 case PIPE_TEXTURE_RECT:
966 case PIPE_BUFFER:
967 assert(template->last_level == 0);
968 /* the assertion below should always pass */
969 break;
970 default:
971 debug_printf("Unexpected texture target type\n");
972 }
973 assert(1 << template->last_level <= max_dim);
974 }
975
976 tex = CALLOC_STRUCT(svga_texture);
977 if (!tex) {
978 goto fail_notex;
979 }
980
981 tex->defined = CALLOC(template->depth0 * template->array_size,
982 sizeof(tex->defined[0]));
983 if (!tex->defined) {
984 FREE(tex);
985 goto fail_notex;
986 }
987
988 tex->rendered_to = CALLOC(template->depth0 * template->array_size,
989 sizeof(tex->rendered_to[0]));
990 if (!tex->rendered_to) {
991 goto fail;
992 }
993
994 tex->dirty = CALLOC(template->depth0 * template->array_size,
995 sizeof(tex->dirty[0]));
996 if (!tex->dirty) {
997 goto fail;
998 }
999
1000 tex->b.b = *template;
1001 tex->b.vtbl = &svga_texture_vtbl;
1002 pipe_reference_init(&tex->b.b.reference, 1);
1003 tex->b.b.screen = screen;
1004
1005 tex->key.flags = 0;
1006 tex->key.size.width = template->width0;
1007 tex->key.size.height = template->height0;
1008 tex->key.size.depth = template->depth0;
1009 tex->key.arraySize = 1;
1010 tex->key.numFaces = 1;
1011
1012 /* nr_samples=1 must be treated as a non-multisample texture */
1013 if (tex->b.b.nr_samples == 1) {
1014 tex->b.b.nr_samples = 0;
1015 }
1016 else if (tex->b.b.nr_samples > 1) {
1017 assert(svgascreen->sws->have_sm4_1);
1018 tex->key.flags |= SVGA3D_SURFACE_MULTISAMPLE;
1019 }
1020
1021 tex->key.sampleCount = tex->b.b.nr_samples;
1022
1023 if (svgascreen->sws->have_vgpu10) {
1024 switch (template->target) {
1025 case PIPE_TEXTURE_1D:
1026 tex->key.flags |= SVGA3D_SURFACE_1D;
1027 break;
1028 case PIPE_TEXTURE_1D_ARRAY:
1029 tex->key.flags |= SVGA3D_SURFACE_1D;
1030 /* fall-through */
1031 case PIPE_TEXTURE_2D_ARRAY:
1032 tex->key.flags |= SVGA3D_SURFACE_ARRAY;
1033 tex->key.arraySize = template->array_size;
1034 break;
1035 case PIPE_TEXTURE_3D:
1036 tex->key.flags |= SVGA3D_SURFACE_VOLUME;
1037 break;
1038 case PIPE_TEXTURE_CUBE:
1039 tex->key.flags |= (SVGA3D_SURFACE_CUBEMAP | SVGA3D_SURFACE_ARRAY);
1040 tex->key.numFaces = 6;
1041 break;
1042 case PIPE_TEXTURE_CUBE_ARRAY:
1043 assert(svgascreen->sws->have_sm4_1);
1044 tex->key.flags |= (SVGA3D_SURFACE_CUBEMAP | SVGA3D_SURFACE_ARRAY);
1045 tex->key.numFaces = 1; // arraySize already includes the 6 faces
1046 tex->key.arraySize = template->array_size;
1047 break;
1048 default:
1049 break;
1050 }
1051 }
1052 else {
1053 switch (template->target) {
1054 case PIPE_TEXTURE_3D:
1055 tex->key.flags |= SVGA3D_SURFACE_VOLUME;
1056 break;
1057 case PIPE_TEXTURE_CUBE:
1058 tex->key.flags |= SVGA3D_SURFACE_CUBEMAP;
1059 tex->key.numFaces = 6;
1060 break;
1061 default:
1062 break;
1063 }
1064 }
1065
1066 tex->key.cachable = 1;
1067
1068 if ((bindings & (PIPE_BIND_RENDER_TARGET | PIPE_BIND_DEPTH_STENCIL)) &&
1069 !(bindings & PIPE_BIND_SAMPLER_VIEW)) {
1070 /* Also check if the format can be sampled from */
1071 if (screen->is_format_supported(screen, template->format,
1072 template->target,
1073 template->nr_samples,
1074 template->nr_storage_samples,
1075 PIPE_BIND_SAMPLER_VIEW)) {
1076 bindings |= PIPE_BIND_SAMPLER_VIEW;
1077 }
1078 }
1079
1080 if (bindings & PIPE_BIND_SAMPLER_VIEW) {
1081 tex->key.flags |= SVGA3D_SURFACE_HINT_TEXTURE;
1082 tex->key.flags |= SVGA3D_SURFACE_BIND_SHADER_RESOURCE;
1083
1084 if (!(bindings & PIPE_BIND_RENDER_TARGET)) {
1085 /* Also check if the format is color renderable */
1086 if (screen->is_format_supported(screen, template->format,
1087 template->target,
1088 template->nr_samples,
1089 template->nr_storage_samples,
1090 PIPE_BIND_RENDER_TARGET)) {
1091 bindings |= PIPE_BIND_RENDER_TARGET;
1092 }
1093 }
1094
1095 if (!(bindings & PIPE_BIND_DEPTH_STENCIL)) {
1096 /* Also check if the format is depth/stencil renderable */
1097 if (screen->is_format_supported(screen, template->format,
1098 template->target,
1099 template->nr_samples,
1100 template->nr_storage_samples,
1101 PIPE_BIND_DEPTH_STENCIL)) {
1102 bindings |= PIPE_BIND_DEPTH_STENCIL;
1103 }
1104 }
1105 }
1106
1107 if (bindings & PIPE_BIND_DISPLAY_TARGET) {
1108 tex->key.cachable = 0;
1109 }
1110
1111 if (bindings & PIPE_BIND_SHARED) {
1112 tex->key.cachable = 0;
1113 }
1114
1115 if (bindings & (PIPE_BIND_SCANOUT | PIPE_BIND_CURSOR)) {
1116 tex->key.scanout = 1;
1117 tex->key.cachable = 0;
1118 }
1119
1120 /*
1121 * Note: Previously we never passed the
1122 * SVGA3D_SURFACE_HINT_RENDERTARGET hint. Mesa cannot
1123 * know beforehand whether a texture will be used as a rendertarget or not
1124 * and it always requests PIPE_BIND_RENDER_TARGET, therefore
1125 * passing the SVGA3D_SURFACE_HINT_RENDERTARGET here defeats its purpose.
1126 *
1127 * However, this was changed since other state trackers
1128 * (XA for example) uses it accurately and certain device versions
1129 * relies on it in certain situations to render correctly.
1130 */
1131 if ((bindings & PIPE_BIND_RENDER_TARGET) &&
1132 !util_format_is_s3tc(template->format)) {
1133 tex->key.flags |= SVGA3D_SURFACE_HINT_RENDERTARGET;
1134 tex->key.flags |= SVGA3D_SURFACE_BIND_RENDER_TARGET;
1135 }
1136
1137 if (bindings & PIPE_BIND_DEPTH_STENCIL) {
1138 tex->key.flags |= SVGA3D_SURFACE_HINT_DEPTHSTENCIL;
1139 tex->key.flags |= SVGA3D_SURFACE_BIND_DEPTH_STENCIL;
1140 }
1141
1142 tex->key.numMipLevels = template->last_level + 1;
1143
1144 tex->key.format = svga_translate_format(svgascreen, template->format,
1145 bindings);
1146 if (tex->key.format == SVGA3D_FORMAT_INVALID) {
1147 goto fail;
1148 }
1149
1150 /* Use typeless formats for sRGB and depth resources. Typeless
1151 * formats can be reinterpreted as other formats. For example,
1152 * SVGA3D_R8G8B8A8_UNORM_TYPELESS can be interpreted as
1153 * SVGA3D_R8G8B8A8_UNORM_SRGB or SVGA3D_R8G8B8A8_UNORM.
1154 */
1155 if (svgascreen->sws->have_vgpu10 &&
1156 (util_format_is_srgb(template->format) ||
1157 format_has_depth(template->format))) {
1158 SVGA3dSurfaceFormat typeless = svga_typeless_format(tex->key.format);
1159 if (0) {
1160 debug_printf("Convert resource type %s -> %s (bind 0x%x)\n",
1161 svga_format_name(tex->key.format),
1162 svga_format_name(typeless),
1163 bindings);
1164 }
1165
1166 if (svga_format_is_uncompressed_snorm(tex->key.format)) {
1167 /* We can't normally render to snorm surfaces, but once we
1168 * substitute a typeless format, we can if the rendertarget view
1169 * is unorm. This can happen with GL_ARB_copy_image.
1170 */
1171 tex->key.flags |= SVGA3D_SURFACE_HINT_RENDERTARGET;
1172 tex->key.flags |= SVGA3D_SURFACE_BIND_RENDER_TARGET;
1173 }
1174
1175 tex->key.format = typeless;
1176 }
1177
1178 SVGA_DBG(DEBUG_DMA, "surface_create for texture\n", tex->handle);
1179 tex->handle = svga_screen_surface_create(svgascreen, bindings,
1180 tex->b.b.usage,
1181 &tex->validated, &tex->key);
1182 if (!tex->handle) {
1183 goto fail;
1184 }
1185
1186 SVGA_DBG(DEBUG_DMA, " --> got sid %p (texture)\n", tex->handle);
1187
1188 debug_reference(&tex->b.b.reference,
1189 (debug_reference_descriptor)debug_describe_resource, 0);
1190
1191 tex->size = util_resource_size(template);
1192
1193 /* Determine if texture upload buffer can be used to upload this texture */
1194 tex->can_use_upload = svga_texture_transfer_map_can_upload(svgascreen,
1195 &tex->b.b);
1196
1197 /* Initialize the backing resource cache */
1198 tex->backed_handle = NULL;
1199
1200 svgascreen->hud.total_resource_bytes += tex->size;
1201 svgascreen->hud.num_resources++;
1202
1203 SVGA_STATS_TIME_POP(svgascreen->sws);
1204
1205 return &tex->b.b;
1206
1207 fail:
1208 if (tex->dirty)
1209 FREE(tex->dirty);
1210 if (tex->rendered_to)
1211 FREE(tex->rendered_to);
1212 if (tex->defined)
1213 FREE(tex->defined);
1214 FREE(tex);
1215 fail_notex:
1216 SVGA_STATS_TIME_POP(svgascreen->sws);
1217 return NULL;
1218 }
1219
1220
1221 struct pipe_resource *
1222 svga_texture_from_handle(struct pipe_screen *screen,
1223 const struct pipe_resource *template,
1224 struct winsys_handle *whandle)
1225 {
1226 struct svga_winsys_screen *sws = svga_winsys_screen(screen);
1227 struct svga_screen *ss = svga_screen(screen);
1228 struct svga_winsys_surface *srf;
1229 struct svga_texture *tex;
1230 enum SVGA3dSurfaceFormat format = 0;
1231 assert(screen);
1232
1233 /* Only supports one type */
1234 if ((template->target != PIPE_TEXTURE_2D &&
1235 template->target != PIPE_TEXTURE_RECT) ||
1236 template->last_level != 0 ||
1237 template->depth0 != 1) {
1238 return NULL;
1239 }
1240
1241 srf = sws->surface_from_handle(sws, whandle, &format);
1242
1243 if (!srf)
1244 return NULL;
1245
1246 if (!svga_format_is_shareable(ss, template->format, format,
1247 template->bind, true))
1248 goto out_unref;
1249
1250 tex = CALLOC_STRUCT(svga_texture);
1251 if (!tex)
1252 goto out_unref;
1253
1254 tex->defined = CALLOC(template->depth0 * template->array_size,
1255 sizeof(tex->defined[0]));
1256 if (!tex->defined)
1257 goto out_no_defined;
1258
1259 tex->b.b = *template;
1260 tex->b.vtbl = &svga_texture_vtbl;
1261 pipe_reference_init(&tex->b.b.reference, 1);
1262 tex->b.b.screen = screen;
1263
1264 SVGA_DBG(DEBUG_DMA, "wrap surface sid %p\n", srf);
1265
1266 tex->key.cachable = 0;
1267 tex->key.format = format;
1268 tex->handle = srf;
1269
1270 tex->rendered_to = CALLOC(1, sizeof(tex->rendered_to[0]));
1271 if (!tex->rendered_to)
1272 goto out_no_rendered_to;
1273
1274 tex->dirty = CALLOC(1, sizeof(tex->dirty[0]));
1275 if (!tex->dirty)
1276 goto out_no_dirty;
1277
1278 tex->imported = TRUE;
1279
1280 ss->hud.num_resources++;
1281
1282 return &tex->b.b;
1283
1284 out_no_dirty:
1285 FREE(tex->rendered_to);
1286 out_no_rendered_to:
1287 FREE(tex->defined);
1288 out_no_defined:
1289 FREE(tex);
1290 out_unref:
1291 sws->surface_reference(sws, &srf, NULL);
1292 return NULL;
1293 }
1294
1295 bool
1296 svga_texture_generate_mipmap(struct pipe_context *pipe,
1297 struct pipe_resource *pt,
1298 enum pipe_format format,
1299 unsigned base_level,
1300 unsigned last_level,
1301 unsigned first_layer,
1302 unsigned last_layer)
1303 {
1304 struct pipe_sampler_view templ, *psv;
1305 struct svga_pipe_sampler_view *sv;
1306 struct svga_context *svga = svga_context(pipe);
1307 struct svga_texture *tex = svga_texture(pt);
1308 enum pipe_error ret;
1309
1310 assert(svga_have_vgpu10(svga));
1311
1312 /* Only support 2D texture for now */
1313 if (pt->target != PIPE_TEXTURE_2D)
1314 return false;
1315
1316 /* Fallback to the mipmap generation utility for those formats that
1317 * do not support hw generate mipmap
1318 */
1319 if (!svga_format_support_gen_mips(format))
1320 return false;
1321
1322 /* Make sure the texture surface was created with
1323 * SVGA3D_SURFACE_BIND_RENDER_TARGET
1324 */
1325 if (!tex->handle || !(tex->key.flags & SVGA3D_SURFACE_BIND_RENDER_TARGET))
1326 return false;
1327
1328 templ.format = format;
1329 templ.u.tex.first_layer = first_layer;
1330 templ.u.tex.last_layer = last_layer;
1331 templ.u.tex.first_level = base_level;
1332 templ.u.tex.last_level = last_level;
1333
1334 psv = pipe->create_sampler_view(pipe, pt, &templ);
1335 if (psv == NULL)
1336 return false;
1337
1338 sv = svga_pipe_sampler_view(psv);
1339 ret = svga_validate_pipe_sampler_view(svga, sv);
1340 if (ret != PIPE_OK) {
1341 svga_context_flush(svga, NULL);
1342 ret = svga_validate_pipe_sampler_view(svga, sv);
1343 assert(ret == PIPE_OK);
1344 }
1345
1346 ret = SVGA3D_vgpu10_GenMips(svga->swc, sv->id, tex->handle);
1347 if (ret != PIPE_OK) {
1348 svga_context_flush(svga, NULL);
1349 ret = SVGA3D_vgpu10_GenMips(svga->swc, sv->id, tex->handle);
1350 }
1351 pipe_sampler_view_reference(&psv, NULL);
1352
1353 svga->hud.num_generate_mipmap++;
1354
1355 return true;
1356 }
1357
1358
1359 /* texture upload buffer default size in bytes */
1360 #define TEX_UPLOAD_DEFAULT_SIZE (1024 * 1024)
1361
1362 /**
1363 * Create a texture upload buffer
1364 */
1365 boolean
1366 svga_texture_transfer_map_upload_create(struct svga_context *svga)
1367 {
1368 svga->tex_upload = u_upload_create(&svga->pipe, TEX_UPLOAD_DEFAULT_SIZE,
1369 PIPE_BIND_CUSTOM, PIPE_USAGE_STAGING, 0);
1370 if (svga->tex_upload)
1371 u_upload_disable_persistent(svga->tex_upload);
1372
1373 return svga->tex_upload != NULL;
1374 }
1375
1376
1377 /**
1378 * Destroy the texture upload buffer
1379 */
1380 void
1381 svga_texture_transfer_map_upload_destroy(struct svga_context *svga)
1382 {
1383 u_upload_destroy(svga->tex_upload);
1384 }
1385
1386
1387 /**
1388 * Returns true if this transfer map request can use the upload buffer.
1389 */
1390 boolean
1391 svga_texture_transfer_map_can_upload(const struct svga_screen *svgascreen,
1392 const struct pipe_resource *texture)
1393 {
1394 if (svgascreen->sws->have_transfer_from_buffer_cmd == FALSE)
1395 return FALSE;
1396
1397 /* TransferFromBuffer command is not well supported with multi-samples surface */
1398 if (texture->nr_samples > 1)
1399 return FALSE;
1400
1401 if (util_format_is_compressed(texture->format)) {
1402 /* XXX Need to take a closer look to see why texture upload
1403 * with 3D texture with compressed format fails
1404 */
1405 if (texture->target == PIPE_TEXTURE_3D)
1406 return FALSE;
1407 }
1408 else if (texture->format == PIPE_FORMAT_R9G9B9E5_FLOAT) {
1409 return FALSE;
1410 }
1411
1412 return TRUE;
1413 }
1414
1415
1416 /**
1417 * Use upload buffer for the transfer map request.
1418 */
1419 void *
1420 svga_texture_transfer_map_upload(struct svga_context *svga,
1421 struct svga_transfer *st)
1422 {
1423 struct pipe_resource *texture = st->base.resource;
1424 struct pipe_resource *tex_buffer = NULL;
1425 void *tex_map;
1426 unsigned nblocksx, nblocksy;
1427 unsigned offset;
1428 unsigned upload_size;
1429
1430 assert(svga->tex_upload);
1431
1432 st->upload.box.x = st->base.box.x;
1433 st->upload.box.y = st->base.box.y;
1434 st->upload.box.z = st->base.box.z;
1435 st->upload.box.w = st->base.box.width;
1436 st->upload.box.h = st->base.box.height;
1437 st->upload.box.d = st->base.box.depth;
1438 st->upload.nlayers = 1;
1439
1440 switch (texture->target) {
1441 case PIPE_TEXTURE_CUBE:
1442 st->upload.box.z = 0;
1443 break;
1444 case PIPE_TEXTURE_2D_ARRAY:
1445 case PIPE_TEXTURE_CUBE_ARRAY:
1446 st->upload.nlayers = st->base.box.depth;
1447 st->upload.box.z = 0;
1448 st->upload.box.d = 1;
1449 break;
1450 case PIPE_TEXTURE_1D_ARRAY:
1451 st->upload.nlayers = st->base.box.depth;
1452 st->upload.box.y = st->upload.box.z = 0;
1453 st->upload.box.d = 1;
1454 break;
1455 default:
1456 break;
1457 }
1458
1459 nblocksx = util_format_get_nblocksx(texture->format, st->base.box.width);
1460 nblocksy = util_format_get_nblocksy(texture->format, st->base.box.height);
1461
1462 st->base.stride = nblocksx * util_format_get_blocksize(texture->format);
1463 st->base.layer_stride = st->base.stride * nblocksy;
1464
1465 /* In order to use the TransferFromBuffer command to update the
1466 * texture content from the buffer, the layer stride for a multi-layers
1467 * surface needs to be in multiples of 16 bytes.
1468 */
1469 if (st->upload.nlayers > 1 && st->base.layer_stride & 15)
1470 return NULL;
1471
1472 upload_size = st->base.layer_stride * st->base.box.depth;
1473 upload_size = align(upload_size, 16);
1474
1475 #ifdef DEBUG
1476 if (util_format_is_compressed(texture->format)) {
1477 struct svga_texture *tex = svga_texture(texture);
1478 unsigned blockw, blockh, bytesPerBlock;
1479
1480 svga_format_size(tex->key.format, &blockw, &blockh, &bytesPerBlock);
1481
1482 /* dest box must start on block boundary */
1483 assert((st->base.box.x % blockw) == 0);
1484 assert((st->base.box.y % blockh) == 0);
1485 }
1486 #endif
1487
1488 /* If the upload size exceeds the default buffer size, the
1489 * upload buffer manager code will try to allocate a new buffer
1490 * with the new buffer size.
1491 */
1492 u_upload_alloc(svga->tex_upload, 0, upload_size, 16,
1493 &offset, &tex_buffer, &tex_map);
1494
1495 if (!tex_map) {
1496 return NULL;
1497 }
1498
1499 st->upload.buf = tex_buffer;
1500 st->upload.map = tex_map;
1501 st->upload.offset = offset;
1502
1503 return tex_map;
1504 }
1505
1506
1507 /**
1508 * Unmap upload map transfer request
1509 */
1510 void
1511 svga_texture_transfer_unmap_upload(struct svga_context *svga,
1512 struct svga_transfer *st)
1513 {
1514 struct svga_winsys_surface *srcsurf;
1515 struct svga_winsys_surface *dstsurf;
1516 struct pipe_resource *texture = st->base.resource;
1517 struct svga_texture *tex = svga_texture(texture);
1518 enum pipe_error ret;
1519 unsigned subResource;
1520 unsigned numMipLevels;
1521 unsigned i, layer;
1522 unsigned offset = st->upload.offset;
1523
1524 assert(svga->tex_upload);
1525 assert(st->upload.buf);
1526
1527 /* unmap the texture upload buffer */
1528 u_upload_unmap(svga->tex_upload);
1529
1530 srcsurf = svga_buffer_handle(svga, st->upload.buf, 0);
1531 dstsurf = svga_texture(texture)->handle;
1532 assert(dstsurf);
1533
1534 numMipLevels = texture->last_level + 1;
1535
1536 for (i = 0, layer = st->slice; i < st->upload.nlayers; i++, layer++) {
1537 subResource = layer * numMipLevels + st->base.level;
1538
1539 /* send a transferFromBuffer command to update the host texture surface */
1540 assert((offset & 15) == 0);
1541
1542 ret = SVGA3D_vgpu10_TransferFromBuffer(svga->swc, srcsurf,
1543 offset,
1544 st->base.stride,
1545 st->base.layer_stride,
1546 dstsurf, subResource,
1547 &st->upload.box);
1548 if (ret != PIPE_OK) {
1549 svga_context_flush(svga, NULL);
1550 ret = SVGA3D_vgpu10_TransferFromBuffer(svga->swc, srcsurf,
1551 offset,
1552 st->base.stride,
1553 st->base.layer_stride,
1554 dstsurf, subResource,
1555 &st->upload.box);
1556 assert(ret == PIPE_OK);
1557 }
1558 offset += st->base.layer_stride;
1559
1560 /* Set rendered-to flag */
1561 svga_set_texture_rendered_to(tex, layer, st->base.level);
1562 }
1563
1564 pipe_resource_reference(&st->upload.buf, NULL);
1565 }
1566
1567 /**
1568 * Does the device format backing this surface have an
1569 * alpha channel?
1570 *
1571 * \param texture[in] The texture whose format we're querying
1572 * \return TRUE if the format has an alpha channel, FALSE otherwise
1573 *
1574 * For locally created textures, the device (svga) format is typically
1575 * identical to svga_format(texture->format), and we can use the gallium
1576 * format tests to determine whether the device format has an alpha channel
1577 * or not. However, for textures backed by imported svga surfaces that is
1578 * not always true, and we have to look at the SVGA3D utilities.
1579 */
1580 boolean
1581 svga_texture_device_format_has_alpha(struct pipe_resource *texture)
1582 {
1583 /* the svga_texture() call below is invalid for PIPE_BUFFER resources */
1584 assert(texture->target != PIPE_BUFFER);
1585
1586 enum svga3d_block_desc block_desc =
1587 svga3dsurface_get_desc(svga_texture(texture)->key.format)->block_desc;
1588
1589 return !!(block_desc & SVGA3DBLOCKDESC_ALPHA);
1590 }