src/gallium/drivers/svga/svga_resource_texture.c

   1 /**********************************************************
   2  * Copyright 2008-2009 VMware, Inc.  All rights reserved.
   3  *
   4  * Permission is hereby granted, free of charge, to any person
   5  * obtaining a copy of this software and associated documentation
   6  * files (the "Software"), to deal in the Software without
   7  * restriction, including without limitation the rights to use, copy,
   8  * modify, merge, publish, distribute, sublicense, and/or sell copies
   9  * of the Software, and to permit persons to whom the Software is
  10  * furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be
  13  * included in all copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  16  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  17  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  18  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  19  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  20  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  21  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  22  * SOFTWARE.
  23  *
  24  **********************************************************/
  25
  26 #include "svga3d_reg.h"
  27 #include "svga3d_surfacedefs.h"
  28
  29 #include "pipe/p_state.h"
  30 #include "pipe/p_defines.h"
  31 #include "os/os_thread.h"
  32 #include "os/os_time.h"
  33 #include "util/u_format.h"
  34 #include "util/u_inlines.h"
  35 #include "util/u_math.h"
  36 #include "util/u_memory.h"
  37 #include "util/u_resource.h"
  38
  39 #include "svga_cmd.h"
  40 #include "svga_format.h"
  41 #include "svga_screen.h"
  42 #include "svga_context.h"
  43 #include "svga_resource_texture.h"
  44 #include "svga_resource_buffer.h"
  45 #include "svga_sampler_view.h"
  46 #include "svga_winsys.h"
  47 #include "svga_debug.h"
  48
  49
  50 static void
  51 svga_transfer_dma_band(struct svga_context *svga,
  52                        struct svga_transfer *st,
  53                        SVGA3dTransferType transfer,
  54                        unsigned y, unsigned h, unsigned srcy,
  55                        SVGA3dSurfaceDMAFlags flags)
  56 {
  57    struct svga_texture *texture = svga_texture(st->base.resource);
  58    SVGA3dCopyBox box;
  59    enum pipe_error ret;
  60
  61    assert(!st->use_direct_map);
  62
  63    box.x = st->base.box.x;
  64    box.y = y;
  65    box.z = st->base.box.z;
  66    box.w = st->base.box.width;
  67    box.h = h;
  68    box.d = 1;
  69    box.srcx = 0;
  70    box.srcy = srcy;
  71    box.srcz = 0;
  72
  73    SVGA_DBG(DEBUG_DMA, "dma %s sid %p, face %u, (%u, %u, %u) - "
  74             "(%u, %u, %u), %ubpp\n",
  75             transfer == SVGA3D_WRITE_HOST_VRAM ? "to" : "from",
  76             texture->handle,
  77             st->slice,
  78             st->base.box.x,
  79             y,
  80             box.z,
  81             st->base.box.x + st->base.box.width,
  82             y + h,
  83             box.z + 1,
  84             util_format_get_blocksize(texture->b.b.format) * 8 /
  85             (util_format_get_blockwidth(texture->b.b.format)
  86              * util_format_get_blockheight(texture->b.b.format)));
  87
  88    ret = SVGA3D_SurfaceDMA(svga->swc, st, transfer, &box, 1, flags);
  89    if (ret != PIPE_OK) {
  90       svga_context_flush(svga, NULL);
  91       ret = SVGA3D_SurfaceDMA(svga->swc, st, transfer, &box, 1, flags);
  92       assert(ret == PIPE_OK);
  93    }
  94 }
  95
  96
  97 static void
  98 svga_transfer_dma(struct svga_context *svga,
  99                   struct svga_transfer *st,
 100                   SVGA3dTransferType transfer,
 101                   SVGA3dSurfaceDMAFlags flags)
 102 {
 103    struct svga_texture *texture = svga_texture(st->base.resource);
 104    struct svga_screen *screen = svga_screen(texture->b.b.screen);
 105    struct svga_winsys_screen *sws = screen->sws;
 106    struct pipe_fence_handle *fence = NULL;
 107
 108    assert(!st->use_direct_map);
 109
 110    if (transfer == SVGA3D_READ_HOST_VRAM) {
 111       SVGA_DBG(DEBUG_PERF, "%s: readback transfer\n", __FUNCTION__);
 112    }
 113
 114    /* Ensure any pending operations on host surfaces are queued on the command
 115     * buffer first.
 116     */
 117    svga_surfaces_flush( svga );
 118
 119    if (!st->swbuf) {
 120       /* Do the DMA transfer in a single go */
 121       svga_transfer_dma_band(svga, st, transfer,
 122                              st->base.box.y, st->base.box.height, 0,
 123                              flags);
 124
 125       if (transfer == SVGA3D_READ_HOST_VRAM) {
 126          svga_context_flush(svga, &fence);
 127          sws->fence_finish(sws, fence, 0);
 128          sws->fence_reference(sws, &fence, NULL);
 129       }
 130    }
 131    else {
 132       int y, h, srcy;
 133       unsigned blockheight =
 134          util_format_get_blockheight(st->base.resource->format);
 135
 136       h = st->hw_nblocksy * blockheight;
 137       srcy = 0;
 138
 139       for (y = 0; y < st->base.box.height; y += h) {
 140          unsigned offset, length;
 141          void *hw, *sw;
 142
 143          if (y + h > st->base.box.height)
 144             h = st->base.box.height - y;
 145
 146          /* Transfer band must be aligned to pixel block boundaries */
 147          assert(y % blockheight == 0);
 148          assert(h % blockheight == 0);
 149
 150          offset = y * st->base.stride / blockheight;
 151          length = h * st->base.stride / blockheight;
 152
 153          sw = (uint8_t *) st->swbuf + offset;
 154
 155          if (transfer == SVGA3D_WRITE_HOST_VRAM) {
 156             unsigned usage = PIPE_TRANSFER_WRITE;
 157
 158             /* Wait for the previous DMAs to complete */
 159             /* TODO: keep one DMA (at half the size) in the background */
 160             if (y) {
 161                svga_context_flush(svga, NULL);
 162                usage |= PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE;
 163             }
 164
 165             hw = sws->buffer_map(sws, st->hwbuf, usage);
 166             assert(hw);
 167             if (hw) {
 168                memcpy(hw, sw, length);
 169                sws->buffer_unmap(sws, st->hwbuf);
 170             }
 171          }
 172
 173          svga_transfer_dma_band(svga, st, transfer, y, h, srcy, flags);
 174
 175          /*
 176           * Prevent the texture contents to be discarded on the next band
 177           * upload.
 178           */
 179          flags.discard = FALSE;
 180
 181          if (transfer == SVGA3D_READ_HOST_VRAM) {
 182             svga_context_flush(svga, &fence);
 183             sws->fence_finish(sws, fence, 0);
 184
 185             hw = sws->buffer_map(sws, st->hwbuf, PIPE_TRANSFER_READ);
 186             assert(hw);
 187             if (hw) {
 188                memcpy(sw, hw, length);
 189                sws->buffer_unmap(sws, st->hwbuf);
 190             }
 191          }
 192       }
 193    }
 194 }
 195
 196
 197 static boolean
 198 svga_texture_get_handle(struct pipe_screen *screen,
 199                         struct pipe_resource *texture,
 200                         struct winsys_handle *whandle)
 201 {
 202    struct svga_winsys_screen *sws = svga_winsys_screen(texture->screen);
 203    unsigned stride;
 204
 205    assert(svga_texture(texture)->key.cachable == 0);
 206    svga_texture(texture)->key.cachable = 0;
 207
 208    stride = util_format_get_nblocksx(texture->format, texture->width0) *
 209             util_format_get_blocksize(texture->format);
 210
 211    return sws->surface_get_handle(sws, svga_texture(texture)->handle,
 212                                   stride, whandle);
 213 }
 214
 215
 216 static void
 217 svga_texture_destroy(struct pipe_screen *screen,
 218                      struct pipe_resource *pt)
 219 {
 220    struct svga_screen *ss = svga_screen(screen);
 221    struct svga_texture *tex = svga_texture(pt);
 222
 223    ss->texture_timestamp++;
 224
 225    svga_sampler_view_reference(&tex->cached_view, NULL);
 226
 227    /*
 228      DBG("%s deleting %p\n", __FUNCTION__, (void *) tex);
 229    */
 230    SVGA_DBG(DEBUG_DMA, "unref sid %p (texture)\n", tex->handle);
 231    svga_screen_surface_destroy(ss, &tex->key, &tex->handle);
 232
 233    ss->hud.total_resource_bytes -= tex->size;
 234
 235    FREE(tex->defined);
 236    FREE(tex->rendered_to);
 237    FREE(tex->dirty);
 238    FREE(tex);
 239
 240    assert(ss->hud.num_resources > 0);
 241    if (ss->hud.num_resources > 0)
 242       ss->hud.num_resources--;
 243 }
 244
 245
 246 /**
 247  * Determine if we need to read back a texture image before mapping it.
 248  */
 249 static boolean
 250 need_tex_readback(struct pipe_transfer *transfer)
 251 {
 252    struct svga_texture *t = svga_texture(transfer->resource);
 253
 254    if (transfer->usage & PIPE_TRANSFER_READ)
 255       return TRUE;
 256
 257    if ((transfer->usage & PIPE_TRANSFER_WRITE) &&
 258        ((transfer->usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) == 0)) {
 259       unsigned face;
 260
 261       if (transfer->resource->target == PIPE_TEXTURE_CUBE) {
 262          assert(transfer->box.depth == 1);
 263          face = transfer->box.z;
 264       }
 265       else {
 266          face = 0;
 267       }
 268       if (svga_was_texture_rendered_to(t, face, transfer->level)) {
 269          return TRUE;
 270       }
 271    }
 272
 273    return FALSE;
 274 }
 275
 276
 277 static enum pipe_error
 278 readback_image_vgpu9(struct svga_context *svga,
 279                    struct svga_winsys_surface *surf,
 280                    unsigned slice,
 281                    unsigned level)
 282 {
 283    enum pipe_error ret;
 284
 285    ret = SVGA3D_ReadbackGBImage(svga->swc, surf, slice, level);
 286    if (ret != PIPE_OK) {
 287       svga_context_flush(svga, NULL);
 288       ret = SVGA3D_ReadbackGBImage(svga->swc, surf, slice, level);
 289    }
 290    return ret;
 291 }
 292
 293
 294 static enum pipe_error
 295 readback_image_vgpu10(struct svga_context *svga,
 296                     struct svga_winsys_surface *surf,
 297                     unsigned slice,
 298                     unsigned level,
 299                     unsigned numMipLevels)
 300 {
 301    enum pipe_error ret;
 302    unsigned subResource;
 303
 304    subResource = slice * numMipLevels + level;
 305    ret = SVGA3D_vgpu10_ReadbackSubResource(svga->swc, surf, subResource);
 306    if (ret != PIPE_OK) {
 307       svga_context_flush(svga, NULL);
 308       ret = SVGA3D_vgpu10_ReadbackSubResource(svga->swc, surf, subResource);
 309    }
 310    return ret;
 311 }
 312
 313
 314 static void *
 315 svga_texture_transfer_map(struct pipe_context *pipe,
 316                           struct pipe_resource *texture,
 317                           unsigned level,
 318                           unsigned usage,
 319                           const struct pipe_box *box,
 320                           struct pipe_transfer **ptransfer)
 321 {
 322    struct svga_context *svga = svga_context(pipe);
 323    struct svga_screen *ss = svga_screen(pipe->screen);
 324    struct svga_winsys_screen *sws = ss->sws;
 325    struct svga_texture *tex = svga_texture(texture);
 326    struct svga_transfer *st;
 327    unsigned nblocksx, nblocksy;
 328    boolean use_direct_map = svga_have_gb_objects(svga) &&
 329       !svga_have_gb_dma(svga);
 330    unsigned d;
 331    void *returnVal;
 332    int64_t begin = os_time_get();
 333
 334    /* We can't map texture storage directly unless we have GB objects */
 335    if (usage & PIPE_TRANSFER_MAP_DIRECTLY) {
 336       if (svga_have_gb_objects(svga))
 337          use_direct_map = TRUE;
 338       else
 339          return NULL;
 340    }
 341
 342    st = CALLOC_STRUCT(svga_transfer);
 343    if (!st)
 344       return NULL;
 345
 346    {
 347       unsigned w, h;
 348       if (use_direct_map) {
 349          /* we'll directly access the guest-backed surface */
 350          w = u_minify(texture->width0, level);
 351          h = u_minify(texture->height0, level);
 352          d = u_minify(texture->depth0, level);
 353       }
 354       else {
 355          /* we'll put the data into a tightly packed buffer */
 356          w = box->width;
 357          h = box->height;
 358          d = box->depth;
 359       }
 360       nblocksx = util_format_get_nblocksx(texture->format, w);
 361       nblocksy = util_format_get_nblocksy(texture->format, h);
 362    }
 363
 364    pipe_resource_reference(&st->base.resource, texture);
 365
 366    st->base.level = level;
 367    st->base.usage = usage;
 368    st->base.box = *box;
 369    st->base.stride = nblocksx*util_format_get_blocksize(texture->format);
 370    st->base.layer_stride = st->base.stride * nblocksy;
 371
 372    switch (tex->b.b.target) {
 373    case PIPE_TEXTURE_CUBE:
 374    case PIPE_TEXTURE_2D_ARRAY:
 375    case PIPE_TEXTURE_1D_ARRAY:
 376       st->slice = st->base.box.z;
 377       st->base.box.z = 0;   /* so we don't apply double offsets below */
 378       break;
 379    default:
 380       st->slice = 0;
 381       break;
 382    }
 383
 384    if (usage & PIPE_TRANSFER_WRITE) {
 385       /* record texture upload for HUD */
 386       svga->hud.num_bytes_uploaded +=
 387          nblocksx * nblocksy * d * util_format_get_blocksize(texture->format);
 388    }
 389
 390    if (!use_direct_map) {
 391       /* Use a DMA buffer */
 392       st->hw_nblocksy = nblocksy;
 393
 394       st->hwbuf = svga_winsys_buffer_create(svga, 1, 0,
 395                                    st->hw_nblocksy * st->base.stride * d);
 396       while(!st->hwbuf && (st->hw_nblocksy /= 2)) {
 397          st->hwbuf = svga_winsys_buffer_create(svga, 1, 0,
 398                                    st->hw_nblocksy * st->base.stride * d);
 399       }
 400
 401       if (!st->hwbuf) {
 402          FREE(st);
 403          return NULL;
 404       }
 405
 406       if (st->hw_nblocksy < nblocksy) {
 407          /* We couldn't allocate a hardware buffer big enough for the transfer,
 408           * so allocate regular malloc memory instead */
 409          if (0) {
 410             debug_printf("%s: failed to allocate %u KB of DMA, "
 411                          "splitting into %u x %u KB DMA transfers\n",
 412                          __FUNCTION__,
 413                          (nblocksy*st->base.stride + 1023)/1024,
 414                          (nblocksy + st->hw_nblocksy - 1)/st->hw_nblocksy,
 415                          (st->hw_nblocksy*st->base.stride + 1023)/1024);
 416          }
 417
 418          st->swbuf = MALLOC(nblocksy * st->base.stride * d);
 419          if (!st->swbuf) {
 420             sws->buffer_destroy(sws, st->hwbuf);
 421             FREE(st);
 422             return NULL;
 423          }
 424       }
 425
 426       if (usage & PIPE_TRANSFER_READ) {
 427          SVGA3dSurfaceDMAFlags flags;
 428          memset(&flags, 0, sizeof flags);
 429          svga_transfer_dma(svga, st, SVGA3D_READ_HOST_VRAM, flags);
 430       }
 431    } else {
 432       struct pipe_transfer *transfer = &st->base;
 433       struct svga_winsys_surface *surf = tex->handle;
 434
 435       if (!surf) {
 436          FREE(st);
 437          return NULL;
 438       }
 439
 440       /* If this is the first time mapping to the surface in this
 441        * command buffer, clear the dirty masks of this surface.
 442        */
 443       if (sws->surface_is_flushed(sws, surf)) {
 444          svga_clear_texture_dirty(tex);
 445       }
 446
 447       if (need_tex_readback(transfer)) {
 448          enum pipe_error ret;
 449
 450          svga_surfaces_flush(svga);
 451
 452          if (svga_have_vgpu10(svga)) {
 453             ret = readback_image_vgpu10(svga, surf, st->slice, transfer->level,
 454                                         tex->b.b.last_level + 1);
 455          } else {
 456             ret = readback_image_vgpu9(svga, surf, st->slice, transfer->level);
 457          }
 458
 459          svga->hud.num_readbacks++;
 460
 461          assert(ret == PIPE_OK);
 462          (void) ret;
 463
 464          svga_context_flush(svga, NULL);
 465
 466          /*
 467           * Note: if PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE were specified
 468           * we could potentially clear the flag for all faces/layers/mips.
 469           */
 470          svga_clear_texture_rendered_to(tex, st->slice, transfer->level);
 471       }
 472       else {
 473          assert(transfer->usage & PIPE_TRANSFER_WRITE);
 474          if ((transfer->usage & PIPE_TRANSFER_UNSYNCHRONIZED) == 0) {
 475             if (svga_is_texture_dirty(tex, st->slice, transfer->level)) {
 476                /*
 477                 * do a surface flush if the subresource has been modified
 478                 * in this command buffer.
 479                 */
 480                svga_surfaces_flush(svga);
 481                if (!sws->surface_is_flushed(sws, surf)) {
 482                   svga->hud.surface_write_flushes++;
 483                   svga_context_flush(svga, NULL);
 484                }
 485             }
 486          }
 487       }
 488       if (transfer->usage & PIPE_TRANSFER_WRITE) {
 489          /* mark this texture level as dirty */
 490          svga_set_texture_dirty(tex, st->slice, transfer->level);
 491       }
 492    }
 493
 494    st->use_direct_map = use_direct_map;
 495
 496    *ptransfer = &st->base;
 497
 498    /*
 499     * Begin mapping code
 500     */
 501    if (st->swbuf) {
 502       returnVal = st->swbuf;
 503    }
 504    else if (!st->use_direct_map) {
 505       returnVal = sws->buffer_map(sws, st->hwbuf, usage);
 506    }
 507    else {
 508       SVGA3dSize baseLevelSize;
 509       struct svga_texture *tex = svga_texture(texture);
 510       struct svga_winsys_surface *surf = tex->handle;
 511       uint8_t *map;
 512       boolean retry;
 513       unsigned offset, mip_width, mip_height;
 514       unsigned xoffset = st->base.box.x;
 515       unsigned yoffset = st->base.box.y;
 516       unsigned zoffset = st->base.box.z;
 517
 518       map = svga->swc->surface_map(svga->swc, surf, usage, &retry);
 519       if (map == NULL && retry) {
 520          /*
 521           * At this point, the svga_surfaces_flush() should already have
 522           * called in svga_texture_get_transfer().
 523           */
 524          svga_context_flush(svga, NULL);
 525          map = svga->swc->surface_map(svga->swc, surf, usage, &retry);
 526       }
 527
 528       /*
 529        * Make sure we return NULL if the map fails
 530        */
 531       if (!map) {
 532          FREE(st);
 533          return map;
 534       }
 535
 536       /**
 537        * Compute the offset to the specific texture slice in the buffer.
 538        */
 539       baseLevelSize.width = tex->b.b.width0;
 540       baseLevelSize.height = tex->b.b.height0;
 541       baseLevelSize.depth = tex->b.b.depth0;
 542
 543       offset = svga3dsurface_get_image_offset(tex->key.format, baseLevelSize,
 544                                               tex->b.b.last_level + 1, /* numMips */
 545                                               st->slice, level);
 546       if (level > 0) {
 547          assert(offset > 0);
 548       }
 549
 550       mip_width = u_minify(tex->b.b.width0, level);
 551       mip_height = u_minify(tex->b.b.height0, level);
 552
 553       offset += svga3dsurface_get_pixel_offset(tex->key.format,
 554                                                mip_width, mip_height,
 555                                                xoffset, yoffset, zoffset);
 556       returnVal = (void *) (map + offset);
 557    }
 558
 559    svga->hud.map_buffer_time += (os_time_get() - begin);
 560    svga->hud.num_resources_mapped++;
 561
 562    return returnVal;
 563 }
 564
 565
 566 /**
 567  * Unmap a GB texture surface.
 568  */
 569 static void
 570 svga_texture_surface_unmap(struct svga_context *svga,
 571                            struct pipe_transfer *transfer)
 572 {
 573    struct svga_winsys_surface *surf = svga_texture(transfer->resource)->handle;
 574    struct svga_winsys_context *swc = svga->swc;
 575    boolean rebind;
 576
 577    assert(surf);
 578
 579    swc->surface_unmap(swc, surf, &rebind);
 580    if (rebind) {
 581       enum pipe_error ret;
 582       ret = SVGA3D_BindGBSurface(swc, surf);
 583       if (ret != PIPE_OK) {
 584          /* flush and retry */
 585          svga_context_flush(svga, NULL);
 586          ret = SVGA3D_BindGBSurface(swc, surf);
 587          assert(ret == PIPE_OK);
 588       }
 589    }
 590 }
 591
 592
 593 static enum pipe_error
 594 update_image_vgpu9(struct svga_context *svga,
 595                    struct svga_winsys_surface *surf,
 596                    const SVGA3dBox *box,
 597                    unsigned slice,
 598                    unsigned level)
 599 {
 600    enum pipe_error ret;
 601
 602    ret = SVGA3D_UpdateGBImage(svga->swc, surf, box, slice, level);
 603    if (ret != PIPE_OK) {
 604       svga_context_flush(svga, NULL);
 605       ret = SVGA3D_UpdateGBImage(svga->swc, surf, box, slice, level);
 606    }
 607    return ret;
 608 }
 609
 610
 611 static enum pipe_error
 612 update_image_vgpu10(struct svga_context *svga,
 613                     struct svga_winsys_surface *surf,
 614                     const SVGA3dBox *box,
 615                     unsigned slice,
 616                     unsigned level,
 617                     unsigned numMipLevels)
 618 {
 619    enum pipe_error ret;
 620    unsigned subResource;
 621
 622    subResource = slice * numMipLevels + level;
 623    ret = SVGA3D_vgpu10_UpdateSubResource(svga->swc, surf, box, subResource);
 624    if (ret != PIPE_OK) {
 625       svga_context_flush(svga, NULL);
 626       ret = SVGA3D_vgpu10_UpdateSubResource(svga->swc, surf, box, subResource);
 627    }
 628    return ret;
 629 }
 630
 631
 632 static void
 633 svga_texture_transfer_unmap(struct pipe_context *pipe,
 634                             struct pipe_transfer *transfer)
 635 {
 636    struct svga_context *svga = svga_context(pipe);
 637    struct svga_screen *ss = svga_screen(pipe->screen);
 638    struct svga_winsys_screen *sws = ss->sws;
 639    struct svga_transfer *st = svga_transfer(transfer);
 640    struct svga_texture *tex = svga_texture(transfer->resource);
 641
 642    if (!st->swbuf) {
 643       if (st->use_direct_map) {
 644          svga_texture_surface_unmap(svga, transfer);
 645       }
 646       else {
 647          sws->buffer_unmap(sws, st->hwbuf);
 648       }
 649    }
 650
 651    if (!st->use_direct_map && (st->base.usage & PIPE_TRANSFER_WRITE)) {
 652       /* Use DMA to transfer texture data */
 653       SVGA3dSurfaceDMAFlags flags;
 654
 655       memset(&flags, 0, sizeof flags);
 656       if (transfer->usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) {
 657          flags.discard = TRUE;
 658       }
 659       if (transfer->usage & PIPE_TRANSFER_UNSYNCHRONIZED) {
 660          flags.unsynchronized = TRUE;
 661       }
 662
 663       svga_transfer_dma(svga, st, SVGA3D_WRITE_HOST_VRAM, flags);
 664    } else if (transfer->usage & PIPE_TRANSFER_WRITE) {
 665       struct svga_winsys_surface *surf =
 666          svga_texture(transfer->resource)->handle;
 667       SVGA3dBox box;
 668       enum pipe_error ret;
 669
 670       assert(svga_have_gb_objects(svga));
 671
 672       /* update the effected region */
 673       box.x = transfer->box.x;
 674       box.y = transfer->box.y;
 675       switch (tex->b.b.target) {
 676       case PIPE_TEXTURE_CUBE:
 677       case PIPE_TEXTURE_2D_ARRAY:
 678          box.z = 0;
 679          break;
 680       case PIPE_TEXTURE_1D_ARRAY:
 681          box.y = box.z = 0;
 682          break;
 683       default:
 684          box.z = transfer->box.z;
 685          break;
 686       }
 687       box.w = transfer->box.width;
 688       box.h = transfer->box.height;
 689       box.d = transfer->box.depth;
 690
 691       if (0)
 692          debug_printf("%s %d, %d, %d  %d x %d x %d\n",
 693                       __FUNCTION__,
 694                       box.x, box.y, box.z,
 695                       box.w, box.h, box.d);
 696
 697       if (svga_have_vgpu10(svga)) {
 698          ret = update_image_vgpu10(svga, surf, &box, st->slice, transfer->level,
 699                                    tex->b.b.last_level + 1);
 700       } else {
 701          ret = update_image_vgpu9(svga, surf, &box, st->slice, transfer->level);
 702       }
 703
 704       svga->hud.num_resource_updates++;
 705
 706       assert(ret == PIPE_OK);
 707       (void) ret;
 708    }
 709
 710    ss->texture_timestamp++;
 711    svga_age_texture_view(tex, transfer->level);
 712    if (transfer->resource->target == PIPE_TEXTURE_CUBE)
 713       svga_define_texture_level(tex, st->slice, transfer->level);
 714    else
 715       svga_define_texture_level(tex, 0, transfer->level);
 716
 717    pipe_resource_reference(&st->base.resource, NULL);
 718
 719    FREE(st->swbuf);
 720    if (!st->use_direct_map) {
 721       sws->buffer_destroy(sws, st->hwbuf);
 722    }
 723    FREE(st);
 724 }
 725
 726
 727 /**
 728  * Does format store depth values?
 729  */
 730 static inline boolean
 731 format_has_depth(enum pipe_format format)
 732 {
 733    const struct util_format_description *desc = util_format_description(format);
 734    return util_format_has_depth(desc);
 735 }
 736
 737
 738 struct u_resource_vtbl svga_texture_vtbl =
 739 {
 740    svga_texture_get_handle,           /* get_handle */
 741    svga_texture_destroy,              /* resource_destroy */
 742    svga_texture_transfer_map,         /* transfer_map */
 743    u_default_transfer_flush_region,   /* transfer_flush_region */
 744    svga_texture_transfer_unmap,       /* transfer_unmap */
 745    u_default_transfer_inline_write    /* transfer_inline_write */
 746 };
 747
 748
 749 struct pipe_resource *
 750 svga_texture_create(struct pipe_screen *screen,
 751                     const struct pipe_resource *template)
 752 {
 753    struct svga_screen *svgascreen = svga_screen(screen);
 754    struct svga_texture *tex;
 755    unsigned bindings = template->bind;
 756
 757    assert(template->last_level < SVGA_MAX_TEXTURE_LEVELS);
 758    if (template->last_level >= SVGA_MAX_TEXTURE_LEVELS) {
 759       return NULL;
 760    }
 761
 762    tex = CALLOC_STRUCT(svga_texture);
 763    if (!tex) {
 764       return NULL;
 765    }
 766
 767    tex->defined = CALLOC(template->depth0 * template->array_size,
 768                          sizeof(tex->defined[0]));
 769    if (!tex->defined) {
 770       FREE(tex);
 771       return NULL;
 772    }
 773
 774    tex->rendered_to = CALLOC(template->depth0 * template->array_size,
 775                              sizeof(tex->rendered_to[0]));
 776    if (!tex->rendered_to) {
 777       goto fail;
 778    }
 779
 780    tex->dirty = CALLOC(template->depth0 * template->array_size,
 781                              sizeof(tex->dirty[0]));
 782    if (!tex->dirty) {
 783       goto fail;
 784    }
 785
 786    tex->b.b = *template;
 787    tex->b.vtbl = &svga_texture_vtbl;
 788    pipe_reference_init(&tex->b.b.reference, 1);
 789    tex->b.b.screen = screen;
 790
 791    tex->key.flags = 0;
 792    tex->key.size.width = template->width0;
 793    tex->key.size.height = template->height0;
 794    tex->key.size.depth = template->depth0;
 795    tex->key.arraySize = 1;
 796    tex->key.numFaces = 1;
 797    tex->key.sampleCount = template->nr_samples;
 798
 799    if (template->nr_samples > 1) {
 800       tex->key.flags |= SVGA3D_SURFACE_MASKABLE_ANTIALIAS;
 801    }
 802
 803    if (svgascreen->sws->have_vgpu10) {
 804       switch (template->target) {
 805       case PIPE_TEXTURE_1D:
 806          tex->key.flags |= SVGA3D_SURFACE_1D;
 807          break;
 808       case PIPE_TEXTURE_1D_ARRAY:
 809          tex->key.flags |= SVGA3D_SURFACE_1D;
 810          /* fall-through */
 811       case PIPE_TEXTURE_2D_ARRAY:
 812          tex->key.flags |= SVGA3D_SURFACE_ARRAY;
 813          tex->key.arraySize = template->array_size;
 814          break;
 815       case PIPE_TEXTURE_3D:
 816          tex->key.flags |= SVGA3D_SURFACE_VOLUME;
 817          break;
 818       case PIPE_TEXTURE_CUBE:
 819          tex->key.flags |= (SVGA3D_SURFACE_CUBEMAP | SVGA3D_SURFACE_ARRAY);
 820          tex->key.numFaces = 6;
 821          break;
 822       default:
 823          break;
 824       }
 825    }
 826    else {
 827       switch (template->target) {
 828       case PIPE_TEXTURE_3D:
 829          tex->key.flags |= SVGA3D_SURFACE_VOLUME;
 830          break;
 831       case PIPE_TEXTURE_CUBE:
 832          tex->key.flags |= SVGA3D_SURFACE_CUBEMAP;
 833          tex->key.numFaces = 6;
 834          break;
 835       default:
 836          break;
 837       }
 838    }
 839
 840    tex->key.cachable = 1;
 841
 842    if ((bindings & (PIPE_BIND_RENDER_TARGET | PIPE_BIND_DEPTH_STENCIL)) &&
 843        !(bindings & PIPE_BIND_SAMPLER_VIEW)) {
 844       /* Also check if the format can be sampled from */
 845       if (screen->is_format_supported(screen, template->format,
 846                                       template->target,
 847                                       template->nr_samples,
 848                                       PIPE_BIND_SAMPLER_VIEW)) {
 849          bindings |= PIPE_BIND_SAMPLER_VIEW;
 850       }
 851    }
 852
 853    if (bindings & PIPE_BIND_SAMPLER_VIEW) {
 854       tex->key.flags |= SVGA3D_SURFACE_HINT_TEXTURE;
 855       tex->key.flags |= SVGA3D_SURFACE_BIND_SHADER_RESOURCE;
 856
 857       if (!(bindings & PIPE_BIND_RENDER_TARGET)) {
 858          /* Also check if the format is renderable */
 859          if (screen->is_format_supported(screen, template->format,
 860                                          template->target,
 861                                          template->nr_samples,
 862                                          PIPE_BIND_RENDER_TARGET)) {
 863             bindings |= PIPE_BIND_RENDER_TARGET;
 864          }
 865       }
 866    }
 867
 868    if (bindings & PIPE_BIND_DISPLAY_TARGET) {
 869       tex->key.cachable = 0;
 870    }
 871
 872    if (bindings & PIPE_BIND_SHARED) {
 873       tex->key.cachable = 0;
 874    }
 875
 876    if (bindings & (PIPE_BIND_SCANOUT | PIPE_BIND_CURSOR)) {
 877       tex->key.scanout = 1;
 878       tex->key.cachable = 0;
 879    }
 880
 881    /*
 882     * Note: Previously we never passed the
 883     * SVGA3D_SURFACE_HINT_RENDERTARGET hint. Mesa cannot
 884     * know beforehand whether a texture will be used as a rendertarget or not
 885     * and it always requests PIPE_BIND_RENDER_TARGET, therefore
 886     * passing the SVGA3D_SURFACE_HINT_RENDERTARGET here defeats its purpose.
 887     *
 888     * However, this was changed since other state trackers
 889     * (XA for example) uses it accurately and certain device versions
 890     * relies on it in certain situations to render correctly.
 891     */
 892    if ((bindings & PIPE_BIND_RENDER_TARGET) &&
 893        !util_format_is_s3tc(template->format)) {
 894       tex->key.flags |= SVGA3D_SURFACE_HINT_RENDERTARGET;
 895       tex->key.flags |= SVGA3D_SURFACE_BIND_RENDER_TARGET;
 896    }
 897
 898    if (bindings & PIPE_BIND_DEPTH_STENCIL) {
 899       tex->key.flags |= SVGA3D_SURFACE_HINT_DEPTHSTENCIL;
 900       tex->key.flags |= SVGA3D_SURFACE_BIND_DEPTH_STENCIL;
 901    }
 902
 903    tex->key.numMipLevels = template->last_level + 1;
 904
 905    tex->key.format = svga_translate_format(svgascreen, template->format,
 906                                            bindings);
 907    if (tex->key.format == SVGA3D_FORMAT_INVALID) {
 908       goto fail;
 909    }
 910
 911    /* Use typeless formats for sRGB and depth resources.  Typeless
 912     * formats can be reinterpreted as other formats.  For example,
 913     * SVGA3D_R8G8B8A8_UNORM_TYPELESS can be interpreted as
 914     * SVGA3D_R8G8B8A8_UNORM_SRGB or SVGA3D_R8G8B8A8_UNORM.
 915     */
 916    if (svgascreen->sws->have_vgpu10 &&
 917        (util_format_is_srgb(template->format) ||
 918         format_has_depth(template->format))) {
 919       SVGA3dSurfaceFormat typeless = svga_typeless_format(tex->key.format);
 920       if (0) {
 921          debug_printf("Convert resource type %s -> %s (bind 0x%x)\n",
 922                       svga_format_name(tex->key.format),
 923                       svga_format_name(typeless),
 924                       bindings);
 925       }
 926       tex->key.format = typeless;
 927    }
 928
 929    SVGA_DBG(DEBUG_DMA, "surface_create for texture\n", tex->handle);
 930    tex->handle = svga_screen_surface_create(svgascreen, bindings,
 931                                             tex->b.b.usage, &tex->key);
 932    if (!tex->handle) {
 933       goto fail;
 934    }
 935
 936    SVGA_DBG(DEBUG_DMA, "  --> got sid %p (texture)\n", tex->handle);
 937
 938    debug_reference(&tex->b.b.reference,
 939                    (debug_reference_descriptor)debug_describe_resource, 0);
 940
 941    tex->size = util_resource_size(template);
 942    svgascreen->hud.total_resource_bytes += tex->size;
 943    svgascreen->hud.num_resources++;
 944
 945    return &tex->b.b;
 946
 947 fail:
 948    if (tex->dirty)
 949       FREE(tex->dirty);
 950    if (tex->rendered_to)
 951       FREE(tex->rendered_to);
 952    if (tex->defined)
 953       FREE(tex->defined);
 954    FREE(tex);
 955    return NULL;
 956 }
 957
 958
 959 struct pipe_resource *
 960 svga_texture_from_handle(struct pipe_screen *screen,
 961                          const struct pipe_resource *template,
 962                          struct winsys_handle *whandle)
 963 {
 964    struct svga_winsys_screen *sws = svga_winsys_screen(screen);
 965    struct svga_screen *ss = svga_screen(screen);
 966    struct svga_winsys_surface *srf;
 967    struct svga_texture *tex;
 968    enum SVGA3dSurfaceFormat format = 0;
 969    assert(screen);
 970
 971    /* Only supports one type */
 972    if ((template->target != PIPE_TEXTURE_2D &&
 973        template->target != PIPE_TEXTURE_RECT) ||
 974        template->last_level != 0 ||
 975        template->depth0 != 1) {
 976       return NULL;
 977    }
 978
 979    srf = sws->surface_from_handle(sws, whandle, &format);
 980
 981    if (!srf)
 982       return NULL;
 983
 984    if (svga_translate_format(svga_screen(screen), template->format,
 985                              template->bind) != format) {
 986       unsigned f1 = svga_translate_format(svga_screen(screen),
 987                                           template->format, template->bind);
 988       unsigned f2 = format;
 989
 990       /* It's okay for XRGB and ARGB or depth with/out stencil to get mixed up.
 991        */
 992       if (f1 == SVGA3D_B8G8R8A8_UNORM)
 993          f1 = SVGA3D_A8R8G8B8;
 994       if (f1 == SVGA3D_B8G8R8X8_UNORM)
 995          f1 = SVGA3D_X8R8G8B8;
 996
 997       if ( !( (f1 == f2) ||
 998               (f1 == SVGA3D_X8R8G8B8 && f2 == SVGA3D_A8R8G8B8) ||
 999               (f1 == SVGA3D_X8R8G8B8 && f2 == SVGA3D_B8G8R8X8_UNORM) ||
1000               (f1 == SVGA3D_A8R8G8B8 && f2 == SVGA3D_X8R8G8B8) ||
1001               (f1 == SVGA3D_A8R8G8B8 && f2 == SVGA3D_B8G8R8A8_UNORM) ||
1002               (f1 == SVGA3D_Z_D24X8 && f2 == SVGA3D_Z_D24S8) ||
1003               (f1 == SVGA3D_Z_DF24 && f2 == SVGA3D_Z_D24S8_INT) ) ) {
1004          debug_printf("%s wrong format %s != %s\n", __FUNCTION__,
1005                       svga_format_name(f1), svga_format_name(f2));
1006          return NULL;
1007       }
1008    }
1009
1010    tex = CALLOC_STRUCT(svga_texture);
1011    if (!tex)
1012       return NULL;
1013
1014    tex->defined = CALLOC(template->depth0 * template->array_size,
1015                          sizeof(tex->defined[0]));
1016    if (!tex->defined) {
1017       FREE(tex);
1018       return NULL;
1019    }
1020
1021    tex->b.b = *template;
1022    tex->b.vtbl = &svga_texture_vtbl;
1023    pipe_reference_init(&tex->b.b.reference, 1);
1024    tex->b.b.screen = screen;
1025
1026    SVGA_DBG(DEBUG_DMA, "wrap surface sid %p\n", srf);
1027
1028    tex->key.cachable = 0;
1029    tex->key.format = format;
1030    tex->handle = srf;
1031
1032    tex->rendered_to = CALLOC(1, sizeof(tex->rendered_to[0]));
1033    if (!tex->rendered_to)
1034       goto fail;
1035
1036    tex->dirty = CALLOC(1, sizeof(tex->dirty[0]));
1037    if (!tex->dirty)
1038       goto fail;
1039
1040    tex->imported = TRUE;
1041
1042    ss->hud.num_resources++;
1043
1044    return &tex->b.b;
1045
1046 fail:
1047    if (tex->defined)
1048       FREE(tex->defined);
1049    if (tex->rendered_to)
1050       FREE(tex->rendered_to);
1051    if (tex->dirty)
1052       FREE(tex->dirty);
1053    FREE(tex);
1054    return NULL;
1055 }
1056
1057 boolean
1058 svga_texture_generate_mipmap(struct pipe_context *pipe,
1059                              struct pipe_resource *pt,
1060                              enum pipe_format format,
1061                              unsigned base_level,
1062                              unsigned last_level,
1063                              unsigned first_layer,
1064                              unsigned last_layer)
1065 {
1066    struct pipe_sampler_view templ, *psv;
1067    struct svga_pipe_sampler_view *sv;
1068    struct svga_context *svga = svga_context(pipe);
1069    struct svga_texture *tex = svga_texture(pt);
1070    enum pipe_error ret;
1071
1072    assert(svga_have_vgpu10(svga));
1073
1074    /* Only support 2D texture for now */
1075    if (pt->target != PIPE_TEXTURE_2D)
1076       return FALSE;
1077
1078    /* Fallback to the mipmap generation utility for those formats that
1079     * do not support hw generate mipmap
1080     */
1081    if (!svga_format_support_gen_mips(format))
1082       return FALSE;
1083
1084    /* Make sure the texture surface was created with
1085     * SVGA3D_SURFACE_BIND_RENDER_TARGET
1086     */
1087    if (!tex->handle || !(tex->key.flags & SVGA3D_SURFACE_BIND_RENDER_TARGET))
1088       return FALSE;
1089
1090    templ.format = format;
1091    templ.u.tex.first_layer = first_layer;
1092    templ.u.tex.last_layer = last_layer;
1093    templ.u.tex.first_level = base_level;
1094    templ.u.tex.last_level = last_level;
1095
1096    psv = pipe->create_sampler_view(pipe, pt, &templ);
1097    if (psv == NULL)
1098       return FALSE;
1099
1100    sv = svga_pipe_sampler_view(psv);
1101    ret = svga_validate_pipe_sampler_view(svga, sv);
1102    if (ret != PIPE_OK) {
1103       svga_context_flush(svga, NULL);
1104       ret = svga_validate_pipe_sampler_view(svga, sv);
1105       assert(ret == PIPE_OK);
1106    }
1107
1108    ret = SVGA3D_vgpu10_GenMips(svga->swc, sv->id, tex->handle);
1109    if (ret != PIPE_OK) {
1110       svga_context_flush(svga, NULL);
1111       ret = SVGA3D_vgpu10_GenMips(svga->swc, sv->id, tex->handle);
1112    }
1113    pipe_sampler_view_reference(&psv, NULL);
1114
1115    svga->hud.num_generate_mipmap++;
1116
1117    return TRUE;
1118 }