1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
24 **********************************************************/
26 #include "svga3d_reg.h"
27 #include "svga3d_surfacedefs.h"
29 #include "pipe/p_state.h"
30 #include "pipe/p_defines.h"
31 #include "os/os_thread.h"
32 #include "util/u_format.h"
33 #include "util/u_inlines.h"
34 #include "util/u_math.h"
35 #include "util/u_memory.h"
36 #include "util/u_resource.h"
37 #include "util/u_upload_mgr.h"
40 #include "svga_format.h"
41 #include "svga_screen.h"
42 #include "svga_context.h"
43 #include "svga_resource_texture.h"
44 #include "svga_resource_buffer.h"
45 #include "svga_sampler_view.h"
46 #include "svga_winsys.h"
47 #include "svga_debug.h"
51 svga_transfer_dma_band(struct svga_context
*svga
,
52 struct svga_transfer
*st
,
53 SVGA3dTransferType transfer
,
54 unsigned x
, unsigned y
, unsigned z
,
55 unsigned w
, unsigned h
, unsigned d
,
56 unsigned srcx
, unsigned srcy
, unsigned srcz
,
57 SVGA3dSurfaceDMAFlags flags
)
59 struct svga_texture
*texture
= svga_texture(st
->base
.resource
);
63 assert(!st
->use_direct_map
);
75 SVGA_DBG(DEBUG_DMA
, "dma %s sid %p, face %u, (%u, %u, %u) - "
76 "(%u, %u, %u), %ubpp\n",
77 transfer
== SVGA3D_WRITE_HOST_VRAM
? "to" : "from",
86 util_format_get_blocksize(texture
->b
.b
.format
) * 8 /
87 (util_format_get_blockwidth(texture
->b
.b
.format
)
88 * util_format_get_blockheight(texture
->b
.b
.format
)));
90 ret
= SVGA3D_SurfaceDMA(svga
->swc
, st
, transfer
, &box
, 1, flags
);
92 svga_context_flush(svga
, NULL
);
93 ret
= SVGA3D_SurfaceDMA(svga
->swc
, st
, transfer
, &box
, 1, flags
);
94 assert(ret
== PIPE_OK
);
100 svga_transfer_dma(struct svga_context
*svga
,
101 struct svga_transfer
*st
,
102 SVGA3dTransferType transfer
,
103 SVGA3dSurfaceDMAFlags flags
)
105 struct svga_texture
*texture
= svga_texture(st
->base
.resource
);
106 struct svga_screen
*screen
= svga_screen(texture
->b
.b
.screen
);
107 struct svga_winsys_screen
*sws
= screen
->sws
;
108 struct pipe_fence_handle
*fence
= NULL
;
110 assert(!st
->use_direct_map
);
112 if (transfer
== SVGA3D_READ_HOST_VRAM
) {
113 SVGA_DBG(DEBUG_PERF
, "%s: readback transfer\n", __FUNCTION__
);
116 /* Ensure any pending operations on host surfaces are queued on the command
119 svga_surfaces_flush( svga
);
122 /* Do the DMA transfer in a single go */
123 svga_transfer_dma_band(svga
, st
, transfer
,
124 st
->box
.x
, st
->box
.y
, st
->box
.z
,
125 st
->box
.w
, st
->box
.h
, st
->box
.d
,
129 if (transfer
== SVGA3D_READ_HOST_VRAM
) {
130 svga_context_flush(svga
, &fence
);
131 sws
->fence_finish(sws
, fence
, PIPE_TIMEOUT_INFINITE
, 0);
132 sws
->fence_reference(sws
, &fence
, NULL
);
137 unsigned blockheight
=
138 util_format_get_blockheight(st
->base
.resource
->format
);
140 h
= st
->hw_nblocksy
* blockheight
;
143 for (y
= 0; y
< st
->box
.h
; y
+= h
) {
144 unsigned offset
, length
;
147 if (y
+ h
> st
->box
.h
)
150 /* Transfer band must be aligned to pixel block boundaries */
151 assert(y
% blockheight
== 0);
152 assert(h
% blockheight
== 0);
154 offset
= y
* st
->base
.stride
/ blockheight
;
155 length
= h
* st
->base
.stride
/ blockheight
;
157 sw
= (uint8_t *) st
->swbuf
+ offset
;
159 if (transfer
== SVGA3D_WRITE_HOST_VRAM
) {
160 unsigned usage
= PIPE_TRANSFER_WRITE
;
162 /* Wait for the previous DMAs to complete */
163 /* TODO: keep one DMA (at half the size) in the background */
165 svga_context_flush(svga
, NULL
);
166 usage
|= PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE
;
169 hw
= sws
->buffer_map(sws
, st
->hwbuf
, usage
);
172 memcpy(hw
, sw
, length
);
173 sws
->buffer_unmap(sws
, st
->hwbuf
);
177 svga_transfer_dma_band(svga
, st
, transfer
,
178 st
->box
.x
, y
, st
->box
.z
,
179 st
->box
.w
, h
, st
->box
.d
,
183 * Prevent the texture contents to be discarded on the next band
186 flags
.discard
= FALSE
;
188 if (transfer
== SVGA3D_READ_HOST_VRAM
) {
189 svga_context_flush(svga
, &fence
);
190 sws
->fence_finish(sws
, fence
, PIPE_TIMEOUT_INFINITE
, 0);
192 hw
= sws
->buffer_map(sws
, st
->hwbuf
, PIPE_TRANSFER_READ
);
195 memcpy(sw
, hw
, length
);
196 sws
->buffer_unmap(sws
, st
->hwbuf
);
206 svga_texture_get_handle(struct pipe_screen
*screen
,
207 struct pipe_resource
*texture
,
208 struct winsys_handle
*whandle
)
210 struct svga_winsys_screen
*sws
= svga_winsys_screen(texture
->screen
);
213 assert(svga_texture(texture
)->key
.cachable
== 0);
214 svga_texture(texture
)->key
.cachable
= 0;
216 stride
= util_format_get_nblocksx(texture
->format
, texture
->width0
) *
217 util_format_get_blocksize(texture
->format
);
219 return sws
->surface_get_handle(sws
, svga_texture(texture
)->handle
,
225 svga_texture_destroy(struct pipe_screen
*screen
,
226 struct pipe_resource
*pt
)
228 struct svga_screen
*ss
= svga_screen(screen
);
229 struct svga_texture
*tex
= svga_texture(pt
);
231 ss
->texture_timestamp
++;
233 svga_sampler_view_reference(&tex
->cached_view
, NULL
);
236 DBG("%s deleting %p\n", __FUNCTION__, (void *) tex);
238 SVGA_DBG(DEBUG_DMA
, "unref sid %p (texture)\n", tex
->handle
);
239 svga_screen_surface_destroy(ss
, &tex
->key
, &tex
->handle
);
241 /* Destroy the backed surface handle if exists */
242 if (tex
->backed_handle
)
243 svga_screen_surface_destroy(ss
, &tex
->backed_key
, &tex
->backed_handle
);
245 ss
->hud
.total_resource_bytes
-= tex
->size
;
248 FREE(tex
->rendered_to
);
252 assert(ss
->hud
.num_resources
> 0);
253 if (ss
->hud
.num_resources
> 0)
254 ss
->hud
.num_resources
--;
259 * Determine if we need to read back a texture image before mapping it.
261 static inline boolean
262 need_tex_readback(struct svga_transfer
*st
)
264 if (st
->base
.usage
& PIPE_TRANSFER_READ
)
267 if ((st
->base
.usage
& PIPE_TRANSFER_WRITE
) &&
268 ((st
->base
.usage
& PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE
) == 0)) {
269 return svga_was_texture_rendered_to(svga_texture(st
->base
.resource
),
270 st
->slice
, st
->base
.level
);
277 static enum pipe_error
278 readback_image_vgpu9(struct svga_context
*svga
,
279 struct svga_winsys_surface
*surf
,
285 ret
= SVGA3D_ReadbackGBImage(svga
->swc
, surf
, slice
, level
);
286 if (ret
!= PIPE_OK
) {
287 svga_context_flush(svga
, NULL
);
288 ret
= SVGA3D_ReadbackGBImage(svga
->swc
, surf
, slice
, level
);
294 static enum pipe_error
295 readback_image_vgpu10(struct svga_context
*svga
,
296 struct svga_winsys_surface
*surf
,
299 unsigned numMipLevels
)
302 unsigned subResource
;
304 subResource
= slice
* numMipLevels
+ level
;
305 ret
= SVGA3D_vgpu10_ReadbackSubResource(svga
->swc
, surf
, subResource
);
306 if (ret
!= PIPE_OK
) {
307 svga_context_flush(svga
, NULL
);
308 ret
= SVGA3D_vgpu10_ReadbackSubResource(svga
->swc
, surf
, subResource
);
315 * Use DMA for the transfer request
318 svga_texture_transfer_map_dma(struct svga_context
*svga
,
319 struct svga_transfer
*st
)
321 struct svga_winsys_screen
*sws
= svga_screen(svga
->pipe
.screen
)->sws
;
322 struct pipe_resource
*texture
= st
->base
.resource
;
323 unsigned nblocksx
, nblocksy
;
325 unsigned usage
= st
->base
.usage
;
327 /* we'll put the data into a tightly packed buffer */
328 nblocksx
= util_format_get_nblocksx(texture
->format
, st
->box
.w
);
329 nblocksy
= util_format_get_nblocksy(texture
->format
, st
->box
.h
);
332 st
->base
.stride
= nblocksx
*util_format_get_blocksize(texture
->format
);
333 st
->base
.layer_stride
= st
->base
.stride
* nblocksy
;
334 st
->hw_nblocksy
= nblocksy
;
336 st
->hwbuf
= svga_winsys_buffer_create(svga
, 1, 0,
337 st
->hw_nblocksy
* st
->base
.stride
* d
);
339 while (!st
->hwbuf
&& (st
->hw_nblocksy
/= 2)) {
341 svga_winsys_buffer_create(svga
, 1, 0,
342 st
->hw_nblocksy
* st
->base
.stride
* d
);
348 if (st
->hw_nblocksy
< nblocksy
) {
349 /* We couldn't allocate a hardware buffer big enough for the transfer,
350 * so allocate regular malloc memory instead
353 debug_printf("%s: failed to allocate %u KB of DMA, "
354 "splitting into %u x %u KB DMA transfers\n",
356 (nblocksy
* st
->base
.stride
+ 1023) / 1024,
357 (nblocksy
+ st
->hw_nblocksy
- 1) / st
->hw_nblocksy
,
358 (st
->hw_nblocksy
* st
->base
.stride
+ 1023) / 1024);
361 st
->swbuf
= MALLOC(nblocksy
* st
->base
.stride
* d
);
363 sws
->buffer_destroy(sws
, st
->hwbuf
);
368 if (usage
& PIPE_TRANSFER_READ
) {
369 SVGA3dSurfaceDMAFlags flags
;
370 memset(&flags
, 0, sizeof flags
);
371 svga_transfer_dma(svga
, st
, SVGA3D_READ_HOST_VRAM
, flags
);
378 return sws
->buffer_map(sws
, st
->hwbuf
, usage
);
384 * Use direct map for the transfer request
387 svga_texture_transfer_map_direct(struct svga_context
*svga
,
388 struct svga_transfer
*st
)
390 struct svga_winsys_screen
*sws
= svga_screen(svga
->pipe
.screen
)->sws
;
391 struct pipe_transfer
*transfer
= &st
->base
;
392 struct pipe_resource
*texture
= transfer
->resource
;
393 struct svga_texture
*tex
= svga_texture(texture
);
394 struct svga_winsys_surface
*surf
= tex
->handle
;
395 unsigned level
= st
->base
.level
;
396 unsigned w
, h
, nblocksx
, nblocksy
, i
;
397 unsigned usage
= st
->base
.usage
;
399 if (need_tex_readback(st
)) {
402 svga_surfaces_flush(svga
);
404 for (i
= 0; i
< st
->box
.d
; i
++) {
405 if (svga_have_vgpu10(svga
)) {
406 ret
= readback_image_vgpu10(svga
, surf
, st
->slice
+ i
, level
,
407 tex
->b
.b
.last_level
+ 1);
409 ret
= readback_image_vgpu9(svga
, surf
, st
->slice
+ i
, level
);
412 svga
->hud
.num_readbacks
++;
413 SVGA_STATS_COUNT_INC(sws
, SVGA_STATS_COUNT_TEXREADBACK
);
415 assert(ret
== PIPE_OK
);
418 svga_context_flush(svga
, NULL
);
420 * Note: if PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE were specified
421 * we could potentially clear the flag for all faces/layers/mips.
423 svga_clear_texture_rendered_to(tex
, st
->slice
, level
);
426 assert(usage
& PIPE_TRANSFER_WRITE
);
427 if ((usage
& PIPE_TRANSFER_UNSYNCHRONIZED
) == 0) {
428 if (svga_is_texture_dirty(tex
, st
->slice
, level
)) {
430 * do a surface flush if the subresource has been modified
431 * in this command buffer.
433 svga_surfaces_flush(svga
);
434 if (!sws
->surface_is_flushed(sws
, surf
)) {
435 svga
->hud
.surface_write_flushes
++;
436 SVGA_STATS_COUNT_INC(sws
, SVGA_STATS_COUNT_SURFACEWRITEFLUSH
);
437 svga_context_flush(svga
, NULL
);
443 /* we'll directly access the guest-backed surface */
444 w
= u_minify(texture
->width0
, level
);
445 h
= u_minify(texture
->height0
, level
);
446 nblocksx
= util_format_get_nblocksx(texture
->format
, w
);
447 nblocksy
= util_format_get_nblocksy(texture
->format
, h
);
448 st
->hw_nblocksy
= nblocksy
;
449 st
->base
.stride
= nblocksx
*util_format_get_blocksize(texture
->format
);
450 st
->base
.layer_stride
= st
->base
.stride
* nblocksy
;
456 SVGA3dSize baseLevelSize
;
459 unsigned offset
, mip_width
, mip_height
;
461 map
= svga
->swc
->surface_map(svga
->swc
, surf
, usage
, &retry
);
462 if (map
== NULL
&& retry
) {
464 * At this point, the svga_surfaces_flush() should already have
465 * called in svga_texture_get_transfer().
467 svga
->hud
.surface_write_flushes
++;
468 svga_context_flush(svga
, NULL
);
469 map
= svga
->swc
->surface_map(svga
->swc
, surf
, usage
, &retry
);
473 * Make sure we return NULL if the map fails
480 * Compute the offset to the specific texture slice in the buffer.
482 baseLevelSize
.width
= tex
->b
.b
.width0
;
483 baseLevelSize
.height
= tex
->b
.b
.height0
;
484 baseLevelSize
.depth
= tex
->b
.b
.depth0
;
486 if ((tex
->b
.b
.target
== PIPE_TEXTURE_1D_ARRAY
) ||
487 (tex
->b
.b
.target
== PIPE_TEXTURE_2D_ARRAY
) ||
488 (tex
->b
.b
.target
== PIPE_TEXTURE_CUBE_ARRAY
)) {
489 st
->base
.layer_stride
=
490 svga3dsurface_get_image_offset(tex
->key
.format
, baseLevelSize
,
491 tex
->b
.b
.last_level
+ 1, 1, 0);
494 offset
= svga3dsurface_get_image_offset(tex
->key
.format
, baseLevelSize
,
495 tex
->b
.b
.last_level
+ 1, /* numMips */
501 mip_width
= u_minify(tex
->b
.b
.width0
, level
);
502 mip_height
= u_minify(tex
->b
.b
.height0
, level
);
504 offset
+= svga3dsurface_get_pixel_offset(tex
->key
.format
,
505 mip_width
, mip_height
,
510 return (void *) (map
+ offset
);
516 * Request a transfer map to the texture resource
519 svga_texture_transfer_map(struct pipe_context
*pipe
,
520 struct pipe_resource
*texture
,
523 const struct pipe_box
*box
,
524 struct pipe_transfer
**ptransfer
)
526 struct svga_context
*svga
= svga_context(pipe
);
527 struct svga_winsys_screen
*sws
= svga_screen(pipe
->screen
)->sws
;
528 struct svga_texture
*tex
= svga_texture(texture
);
529 struct svga_transfer
*st
;
530 struct svga_winsys_surface
*surf
= tex
->handle
;
531 boolean use_direct_map
= svga_have_gb_objects(svga
) &&
532 !svga_have_gb_dma(svga
);
534 int64_t begin
= svga_get_time(svga
);
536 SVGA_STATS_TIME_PUSH(sws
, SVGA_STATS_TIME_TEXTRANSFERMAP
);
541 /* We can't map texture storage directly unless we have GB objects */
542 if (usage
& PIPE_TRANSFER_MAP_DIRECTLY
) {
543 if (svga_have_gb_objects(svga
))
544 use_direct_map
= TRUE
;
549 st
= CALLOC_STRUCT(svga_transfer
);
553 st
->base
.level
= level
;
554 st
->base
.usage
= usage
;
557 /* The modified transfer map box with the array index removed from z.
558 * The array index is specified in slice.
563 st
->box
.w
= box
->width
;
564 st
->box
.h
= box
->height
;
565 st
->box
.d
= box
->depth
;
567 switch (tex
->b
.b
.target
) {
568 case PIPE_TEXTURE_CUBE
:
569 st
->slice
= st
->base
.box
.z
;
570 st
->box
.z
= 0; /* so we don't apply double offsets below */
572 case PIPE_TEXTURE_1D_ARRAY
:
573 case PIPE_TEXTURE_2D_ARRAY
:
574 case PIPE_TEXTURE_CUBE_ARRAY
:
575 st
->slice
= st
->base
.box
.z
;
576 st
->box
.z
= 0; /* so we don't apply double offsets below */
578 /* Force direct map for transfering multiple slices */
579 if (st
->base
.box
.depth
> 1)
580 use_direct_map
= svga_have_gb_objects(svga
);
588 /* Force direct map for multisample surface */
589 if (texture
->nr_samples
> 1) {
590 assert(svga_have_gb_objects(svga
));
591 assert(sws
->have_sm4_1
);
592 use_direct_map
= TRUE
;
595 st
->use_direct_map
= use_direct_map
;
596 pipe_resource_reference(&st
->base
.resource
, texture
);
598 /* If this is the first time mapping to the surface in this
599 * command buffer, clear the dirty masks of this surface.
601 if (sws
->surface_is_flushed(sws
, surf
)) {
602 svga_clear_texture_dirty(tex
);
605 if (!use_direct_map
) {
606 /* upload to the DMA buffer */
607 map
= svga_texture_transfer_map_dma(svga
, st
);
610 boolean can_use_upload
= tex
->can_use_upload
&&
611 !(st
->base
.usage
& PIPE_TRANSFER_READ
);
612 boolean was_rendered_to
=
613 svga_was_texture_rendered_to(svga_texture(texture
),
614 st
->slice
, st
->base
.level
);
616 /* If the texture was already rendered to and upload buffer
617 * is supported, then we will use upload buffer to
618 * avoid the need to read back the texture content; otherwise,
619 * we'll first try to map directly to the GB surface, if it is blocked,
620 * then we'll try the upload buffer.
622 if (was_rendered_to
&& can_use_upload
) {
623 map
= svga_texture_transfer_map_upload(svga
, st
);
626 unsigned orig_usage
= st
->base
.usage
;
628 /* First try directly map to the GB surface */
630 st
->base
.usage
|= PIPE_TRANSFER_DONTBLOCK
;
631 map
= svga_texture_transfer_map_direct(svga
, st
);
632 st
->base
.usage
= orig_usage
;
634 if (!map
&& can_use_upload
) {
635 /* if direct map with DONTBLOCK fails, then try upload to the
636 * texture upload buffer.
638 map
= svga_texture_transfer_map_upload(svga
, st
);
642 /* If upload fails, then try direct map again without forcing it
646 map
= svga_texture_transfer_map_direct(svga
, st
);
654 *ptransfer
= &st
->base
;
655 svga
->hud
.num_textures_mapped
++;
656 if (usage
& PIPE_TRANSFER_WRITE
) {
657 /* record texture upload for HUD */
658 svga
->hud
.num_bytes_uploaded
+=
659 st
->base
.layer_stride
* st
->box
.d
;
661 /* mark this texture level as dirty */
662 svga_set_texture_dirty(tex
, st
->slice
, level
);
667 svga
->hud
.map_buffer_time
+= (svga_get_time(svga
) - begin
);
668 SVGA_STATS_TIME_POP(sws
);
675 * Unmap a GB texture surface.
678 svga_texture_surface_unmap(struct svga_context
*svga
,
679 struct pipe_transfer
*transfer
)
681 struct svga_winsys_surface
*surf
= svga_texture(transfer
->resource
)->handle
;
682 struct svga_winsys_context
*swc
= svga
->swc
;
687 swc
->surface_unmap(swc
, surf
, &rebind
);
690 ret
= SVGA3D_BindGBSurface(swc
, surf
);
691 if (ret
!= PIPE_OK
) {
692 /* flush and retry */
693 svga_context_flush(svga
, NULL
);
694 ret
= SVGA3D_BindGBSurface(swc
, surf
);
695 assert(ret
== PIPE_OK
);
701 static enum pipe_error
702 update_image_vgpu9(struct svga_context
*svga
,
703 struct svga_winsys_surface
*surf
,
704 const SVGA3dBox
*box
,
710 ret
= SVGA3D_UpdateGBImage(svga
->swc
, surf
, box
, slice
, level
);
711 if (ret
!= PIPE_OK
) {
712 svga_context_flush(svga
, NULL
);
713 ret
= SVGA3D_UpdateGBImage(svga
->swc
, surf
, box
, slice
, level
);
719 static enum pipe_error
720 update_image_vgpu10(struct svga_context
*svga
,
721 struct svga_winsys_surface
*surf
,
722 const SVGA3dBox
*box
,
725 unsigned numMipLevels
)
728 unsigned subResource
;
730 subResource
= slice
* numMipLevels
+ level
;
732 ret
= SVGA3D_vgpu10_UpdateSubResource(svga
->swc
, surf
, box
, subResource
);
733 if (ret
!= PIPE_OK
) {
734 svga_context_flush(svga
, NULL
);
735 ret
= SVGA3D_vgpu10_UpdateSubResource(svga
->swc
, surf
, box
, subResource
);
742 * unmap DMA transfer request
745 svga_texture_transfer_unmap_dma(struct svga_context
*svga
,
746 struct svga_transfer
*st
)
748 struct svga_winsys_screen
*sws
= svga_screen(svga
->pipe
.screen
)->sws
;
751 sws
->buffer_unmap(sws
, st
->hwbuf
);
753 if (st
->base
.usage
& PIPE_TRANSFER_WRITE
) {
754 /* Use DMA to transfer texture data */
755 SVGA3dSurfaceDMAFlags flags
;
757 memset(&flags
, 0, sizeof flags
);
758 if (st
->base
.usage
& PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE
) {
759 flags
.discard
= TRUE
;
761 if (st
->base
.usage
& PIPE_TRANSFER_UNSYNCHRONIZED
) {
762 flags
.unsynchronized
= TRUE
;
765 svga_transfer_dma(svga
, st
, SVGA3D_WRITE_HOST_VRAM
, flags
);
769 sws
->buffer_destroy(sws
, st
->hwbuf
);
774 * unmap direct map transfer request
777 svga_texture_transfer_unmap_direct(struct svga_context
*svga
,
778 struct svga_transfer
*st
)
780 struct pipe_transfer
*transfer
= &st
->base
;
781 struct svga_texture
*tex
= svga_texture(transfer
->resource
);
783 svga_texture_surface_unmap(svga
, transfer
);
785 /* Now send an update command to update the content in the backend. */
786 if (st
->base
.usage
& PIPE_TRANSFER_WRITE
) {
787 struct svga_winsys_surface
*surf
= tex
->handle
;
790 assert(svga_have_gb_objects(svga
));
792 /* update the effected region */
793 SVGA3dBox box
= st
->box
;
796 switch (tex
->b
.b
.target
) {
797 case PIPE_TEXTURE_2D_ARRAY
:
798 case PIPE_TEXTURE_CUBE_ARRAY
:
799 case PIPE_TEXTURE_1D_ARRAY
:
810 debug_printf("%s %d, %d, %d %d x %d x %d\n",
813 box
.w
, box
.h
, box
.d
);
815 if (svga_have_vgpu10(svga
)) {
818 for (i
= 0; i
< nlayers
; i
++) {
819 ret
= update_image_vgpu10(svga
, surf
, &box
,
820 st
->slice
+ i
, transfer
->level
,
821 tex
->b
.b
.last_level
+ 1);
822 assert(ret
== PIPE_OK
);
825 assert(nlayers
== 1);
826 ret
= update_image_vgpu9(svga
, surf
, &box
, st
->slice
, transfer
->level
);
827 assert(ret
== PIPE_OK
);
834 svga_texture_transfer_unmap(struct pipe_context
*pipe
,
835 struct pipe_transfer
*transfer
)
837 struct svga_context
*svga
= svga_context(pipe
);
838 struct svga_screen
*ss
= svga_screen(pipe
->screen
);
839 struct svga_winsys_screen
*sws
= ss
->sws
;
840 struct svga_transfer
*st
= svga_transfer(transfer
);
841 struct svga_texture
*tex
= svga_texture(transfer
->resource
);
843 SVGA_STATS_TIME_PUSH(sws
, SVGA_STATS_TIME_TEXTRANSFERUNMAP
);
845 if (!st
->use_direct_map
) {
846 svga_texture_transfer_unmap_dma(svga
, st
);
848 else if (st
->upload
.buf
) {
849 svga_texture_transfer_unmap_upload(svga
, st
);
852 svga_texture_transfer_unmap_direct(svga
, st
);
855 if (st
->base
.usage
& PIPE_TRANSFER_WRITE
) {
856 svga
->hud
.num_resource_updates
++;
858 /* Mark the texture level as dirty */
859 ss
->texture_timestamp
++;
860 svga_age_texture_view(tex
, transfer
->level
);
861 if (transfer
->resource
->target
== PIPE_TEXTURE_CUBE
)
862 svga_define_texture_level(tex
, st
->slice
, transfer
->level
);
864 svga_define_texture_level(tex
, 0, transfer
->level
);
867 pipe_resource_reference(&st
->base
.resource
, NULL
);
869 SVGA_STATS_TIME_POP(sws
);
875 * Does format store depth values?
877 static inline boolean
878 format_has_depth(enum pipe_format format
)
880 const struct util_format_description
*desc
= util_format_description(format
);
881 return util_format_has_depth(desc
);
885 struct u_resource_vtbl svga_texture_vtbl
=
887 svga_texture_get_handle
, /* get_handle */
888 svga_texture_destroy
, /* resource_destroy */
889 svga_texture_transfer_map
, /* transfer_map */
890 u_default_transfer_flush_region
, /* transfer_flush_region */
891 svga_texture_transfer_unmap
, /* transfer_unmap */
895 struct pipe_resource
*
896 svga_texture_create(struct pipe_screen
*screen
,
897 const struct pipe_resource
*template)
899 struct svga_screen
*svgascreen
= svga_screen(screen
);
900 struct svga_texture
*tex
;
901 unsigned bindings
= template->bind
;
903 SVGA_STATS_TIME_PUSH(svgascreen
->sws
,
904 SVGA_STATS_TIME_CREATETEXTURE
);
906 assert(template->last_level
< SVGA_MAX_TEXTURE_LEVELS
);
907 if (template->last_level
>= SVGA_MAX_TEXTURE_LEVELS
) {
911 /* Verify the number of mipmap levels isn't impossibly large. For example,
912 * if the base 2D image is 16x16, we can't have 8 mipmap levels.
913 * The state tracker should never ask us to create a resource with invalid
917 unsigned max_dim
= template->width0
;
919 switch (template->target
) {
920 case PIPE_TEXTURE_1D
:
921 case PIPE_TEXTURE_1D_ARRAY
:
924 case PIPE_TEXTURE_2D
:
925 case PIPE_TEXTURE_CUBE
:
926 case PIPE_TEXTURE_CUBE_ARRAY
:
927 case PIPE_TEXTURE_2D_ARRAY
:
928 max_dim
= MAX2(max_dim
, template->height0
);
930 case PIPE_TEXTURE_3D
:
931 max_dim
= MAX3(max_dim
, template->height0
, template->depth0
);
933 case PIPE_TEXTURE_RECT
:
935 assert(template->last_level
== 0);
936 /* the assertion below should always pass */
939 debug_printf("Unexpected texture target type\n");
941 assert(1 << template->last_level
<= max_dim
);
944 tex
= CALLOC_STRUCT(svga_texture
);
949 tex
->defined
= CALLOC(template->depth0
* template->array_size
,
950 sizeof(tex
->defined
[0]));
956 tex
->rendered_to
= CALLOC(template->depth0
* template->array_size
,
957 sizeof(tex
->rendered_to
[0]));
958 if (!tex
->rendered_to
) {
962 tex
->dirty
= CALLOC(template->depth0
* template->array_size
,
963 sizeof(tex
->dirty
[0]));
968 tex
->b
.b
= *template;
969 tex
->b
.vtbl
= &svga_texture_vtbl
;
970 pipe_reference_init(&tex
->b
.b
.reference
, 1);
971 tex
->b
.b
.screen
= screen
;
974 tex
->key
.size
.width
= template->width0
;
975 tex
->key
.size
.height
= template->height0
;
976 tex
->key
.size
.depth
= template->depth0
;
977 tex
->key
.arraySize
= 1;
978 tex
->key
.numFaces
= 1;
980 /* nr_samples=1 must be treated as a non-multisample texture */
981 if (tex
->b
.b
.nr_samples
== 1) {
982 tex
->b
.b
.nr_samples
= 0;
984 else if (tex
->b
.b
.nr_samples
> 1) {
985 assert(svgascreen
->sws
->have_sm4_1
);
986 tex
->key
.flags
|= SVGA3D_SURFACE_MULTISAMPLE
;
989 tex
->key
.sampleCount
= tex
->b
.b
.nr_samples
;
991 if (svgascreen
->sws
->have_vgpu10
) {
992 switch (template->target
) {
993 case PIPE_TEXTURE_1D
:
994 tex
->key
.flags
|= SVGA3D_SURFACE_1D
;
996 case PIPE_TEXTURE_1D_ARRAY
:
997 tex
->key
.flags
|= SVGA3D_SURFACE_1D
;
999 case PIPE_TEXTURE_2D_ARRAY
:
1000 tex
->key
.flags
|= SVGA3D_SURFACE_ARRAY
;
1001 tex
->key
.arraySize
= template->array_size
;
1003 case PIPE_TEXTURE_3D
:
1004 tex
->key
.flags
|= SVGA3D_SURFACE_VOLUME
;
1006 case PIPE_TEXTURE_CUBE
:
1007 tex
->key
.flags
|= (SVGA3D_SURFACE_CUBEMAP
| SVGA3D_SURFACE_ARRAY
);
1008 tex
->key
.numFaces
= 6;
1010 case PIPE_TEXTURE_CUBE_ARRAY
:
1011 assert(svgascreen
->sws
->have_sm4_1
);
1012 tex
->key
.flags
|= (SVGA3D_SURFACE_CUBEMAP
| SVGA3D_SURFACE_ARRAY
);
1013 tex
->key
.numFaces
= 1; // arraySize already includes the 6 faces
1014 tex
->key
.arraySize
= template->array_size
;
1021 switch (template->target
) {
1022 case PIPE_TEXTURE_3D
:
1023 tex
->key
.flags
|= SVGA3D_SURFACE_VOLUME
;
1025 case PIPE_TEXTURE_CUBE
:
1026 tex
->key
.flags
|= SVGA3D_SURFACE_CUBEMAP
;
1027 tex
->key
.numFaces
= 6;
1034 tex
->key
.cachable
= 1;
1036 if ((bindings
& (PIPE_BIND_RENDER_TARGET
| PIPE_BIND_DEPTH_STENCIL
)) &&
1037 !(bindings
& PIPE_BIND_SAMPLER_VIEW
)) {
1038 /* Also check if the format can be sampled from */
1039 if (screen
->is_format_supported(screen
, template->format
,
1041 template->nr_samples
,
1042 template->nr_storage_samples
,
1043 PIPE_BIND_SAMPLER_VIEW
)) {
1044 bindings
|= PIPE_BIND_SAMPLER_VIEW
;
1048 if (bindings
& PIPE_BIND_SAMPLER_VIEW
) {
1049 tex
->key
.flags
|= SVGA3D_SURFACE_HINT_TEXTURE
;
1050 tex
->key
.flags
|= SVGA3D_SURFACE_BIND_SHADER_RESOURCE
;
1052 if (!(bindings
& PIPE_BIND_RENDER_TARGET
)) {
1053 /* Also check if the format is color renderable */
1054 if (screen
->is_format_supported(screen
, template->format
,
1056 template->nr_samples
,
1057 template->nr_storage_samples
,
1058 PIPE_BIND_RENDER_TARGET
)) {
1059 bindings
|= PIPE_BIND_RENDER_TARGET
;
1063 if (!(bindings
& PIPE_BIND_DEPTH_STENCIL
)) {
1064 /* Also check if the format is depth/stencil renderable */
1065 if (screen
->is_format_supported(screen
, template->format
,
1067 template->nr_samples
,
1068 template->nr_storage_samples
,
1069 PIPE_BIND_DEPTH_STENCIL
)) {
1070 bindings
|= PIPE_BIND_DEPTH_STENCIL
;
1075 if (bindings
& PIPE_BIND_DISPLAY_TARGET
) {
1076 tex
->key
.cachable
= 0;
1079 if (bindings
& PIPE_BIND_SHARED
) {
1080 tex
->key
.cachable
= 0;
1083 if (bindings
& (PIPE_BIND_SCANOUT
| PIPE_BIND_CURSOR
)) {
1084 tex
->key
.scanout
= 1;
1085 tex
->key
.cachable
= 0;
1089 * Note: Previously we never passed the
1090 * SVGA3D_SURFACE_HINT_RENDERTARGET hint. Mesa cannot
1091 * know beforehand whether a texture will be used as a rendertarget or not
1092 * and it always requests PIPE_BIND_RENDER_TARGET, therefore
1093 * passing the SVGA3D_SURFACE_HINT_RENDERTARGET here defeats its purpose.
1095 * However, this was changed since other state trackers
1096 * (XA for example) uses it accurately and certain device versions
1097 * relies on it in certain situations to render correctly.
1099 if ((bindings
& PIPE_BIND_RENDER_TARGET
) &&
1100 !util_format_is_s3tc(template->format
)) {
1101 tex
->key
.flags
|= SVGA3D_SURFACE_HINT_RENDERTARGET
;
1102 tex
->key
.flags
|= SVGA3D_SURFACE_BIND_RENDER_TARGET
;
1105 if (bindings
& PIPE_BIND_DEPTH_STENCIL
) {
1106 tex
->key
.flags
|= SVGA3D_SURFACE_HINT_DEPTHSTENCIL
;
1107 tex
->key
.flags
|= SVGA3D_SURFACE_BIND_DEPTH_STENCIL
;
1110 tex
->key
.numMipLevels
= template->last_level
+ 1;
1112 tex
->key
.format
= svga_translate_format(svgascreen
, template->format
,
1114 if (tex
->key
.format
== SVGA3D_FORMAT_INVALID
) {
1118 /* Use typeless formats for sRGB and depth resources. Typeless
1119 * formats can be reinterpreted as other formats. For example,
1120 * SVGA3D_R8G8B8A8_UNORM_TYPELESS can be interpreted as
1121 * SVGA3D_R8G8B8A8_UNORM_SRGB or SVGA3D_R8G8B8A8_UNORM.
1123 if (svgascreen
->sws
->have_vgpu10
&&
1124 (util_format_is_srgb(template->format
) ||
1125 format_has_depth(template->format
))) {
1126 SVGA3dSurfaceFormat typeless
= svga_typeless_format(tex
->key
.format
);
1128 debug_printf("Convert resource type %s -> %s (bind 0x%x)\n",
1129 svga_format_name(tex
->key
.format
),
1130 svga_format_name(typeless
),
1134 if (svga_format_is_uncompressed_snorm(tex
->key
.format
)) {
1135 /* We can't normally render to snorm surfaces, but once we
1136 * substitute a typeless format, we can if the rendertarget view
1137 * is unorm. This can happen with GL_ARB_copy_image.
1139 tex
->key
.flags
|= SVGA3D_SURFACE_HINT_RENDERTARGET
;
1140 tex
->key
.flags
|= SVGA3D_SURFACE_BIND_RENDER_TARGET
;
1143 tex
->key
.format
= typeless
;
1146 SVGA_DBG(DEBUG_DMA
, "surface_create for texture\n", tex
->handle
);
1147 tex
->handle
= svga_screen_surface_create(svgascreen
, bindings
,
1149 &tex
->validated
, &tex
->key
);
1154 SVGA_DBG(DEBUG_DMA
, " --> got sid %p (texture)\n", tex
->handle
);
1156 debug_reference(&tex
->b
.b
.reference
,
1157 (debug_reference_descriptor
)debug_describe_resource
, 0);
1159 tex
->size
= util_resource_size(template);
1161 /* Determine if texture upload buffer can be used to upload this texture */
1162 tex
->can_use_upload
= svga_texture_transfer_map_can_upload(svgascreen
,
1165 /* Initialize the backing resource cache */
1166 tex
->backed_handle
= NULL
;
1168 svgascreen
->hud
.total_resource_bytes
+= tex
->size
;
1169 svgascreen
->hud
.num_resources
++;
1171 SVGA_STATS_TIME_POP(svgascreen
->sws
);
1178 if (tex
->rendered_to
)
1179 FREE(tex
->rendered_to
);
1184 SVGA_STATS_TIME_POP(svgascreen
->sws
);
1189 struct pipe_resource
*
1190 svga_texture_from_handle(struct pipe_screen
*screen
,
1191 const struct pipe_resource
*template,
1192 struct winsys_handle
*whandle
)
1194 struct svga_winsys_screen
*sws
= svga_winsys_screen(screen
);
1195 struct svga_screen
*ss
= svga_screen(screen
);
1196 struct svga_winsys_surface
*srf
;
1197 struct svga_texture
*tex
;
1198 enum SVGA3dSurfaceFormat format
= 0;
1201 /* Only supports one type */
1202 if ((template->target
!= PIPE_TEXTURE_2D
&&
1203 template->target
!= PIPE_TEXTURE_RECT
) ||
1204 template->last_level
!= 0 ||
1205 template->depth0
!= 1) {
1209 srf
= sws
->surface_from_handle(sws
, whandle
, &format
);
1214 if (!svga_format_is_shareable(ss
, template->format
, format
,
1215 template->bind
, true))
1218 tex
= CALLOC_STRUCT(svga_texture
);
1222 tex
->defined
= CALLOC(template->depth0
* template->array_size
,
1223 sizeof(tex
->defined
[0]));
1225 goto out_no_defined
;
1227 tex
->b
.b
= *template;
1228 tex
->b
.vtbl
= &svga_texture_vtbl
;
1229 pipe_reference_init(&tex
->b
.b
.reference
, 1);
1230 tex
->b
.b
.screen
= screen
;
1232 SVGA_DBG(DEBUG_DMA
, "wrap surface sid %p\n", srf
);
1234 tex
->key
.cachable
= 0;
1235 tex
->key
.format
= format
;
1238 tex
->rendered_to
= CALLOC(1, sizeof(tex
->rendered_to
[0]));
1239 if (!tex
->rendered_to
)
1240 goto out_no_rendered_to
;
1242 tex
->dirty
= CALLOC(1, sizeof(tex
->dirty
[0]));
1246 tex
->imported
= TRUE
;
1248 ss
->hud
.num_resources
++;
1253 FREE(tex
->rendered_to
);
1259 sws
->surface_reference(sws
, &srf
, NULL
);
1264 svga_texture_generate_mipmap(struct pipe_context
*pipe
,
1265 struct pipe_resource
*pt
,
1266 enum pipe_format format
,
1267 unsigned base_level
,
1268 unsigned last_level
,
1269 unsigned first_layer
,
1270 unsigned last_layer
)
1272 struct pipe_sampler_view templ
, *psv
;
1273 struct svga_pipe_sampler_view
*sv
;
1274 struct svga_context
*svga
= svga_context(pipe
);
1275 struct svga_texture
*tex
= svga_texture(pt
);
1276 enum pipe_error ret
;
1278 assert(svga_have_vgpu10(svga
));
1280 /* Only support 2D texture for now */
1281 if (pt
->target
!= PIPE_TEXTURE_2D
)
1284 /* Fallback to the mipmap generation utility for those formats that
1285 * do not support hw generate mipmap
1287 if (!svga_format_support_gen_mips(format
))
1290 /* Make sure the texture surface was created with
1291 * SVGA3D_SURFACE_BIND_RENDER_TARGET
1293 if (!tex
->handle
|| !(tex
->key
.flags
& SVGA3D_SURFACE_BIND_RENDER_TARGET
))
1296 templ
.format
= format
;
1297 templ
.u
.tex
.first_layer
= first_layer
;
1298 templ
.u
.tex
.last_layer
= last_layer
;
1299 templ
.u
.tex
.first_level
= base_level
;
1300 templ
.u
.tex
.last_level
= last_level
;
1302 psv
= pipe
->create_sampler_view(pipe
, pt
, &templ
);
1306 sv
= svga_pipe_sampler_view(psv
);
1307 ret
= svga_validate_pipe_sampler_view(svga
, sv
);
1308 if (ret
!= PIPE_OK
) {
1309 svga_context_flush(svga
, NULL
);
1310 ret
= svga_validate_pipe_sampler_view(svga
, sv
);
1311 assert(ret
== PIPE_OK
);
1314 ret
= SVGA3D_vgpu10_GenMips(svga
->swc
, sv
->id
, tex
->handle
);
1315 if (ret
!= PIPE_OK
) {
1316 svga_context_flush(svga
, NULL
);
1317 ret
= SVGA3D_vgpu10_GenMips(svga
->swc
, sv
->id
, tex
->handle
);
1319 pipe_sampler_view_reference(&psv
, NULL
);
1321 svga
->hud
.num_generate_mipmap
++;
1327 /* texture upload buffer default size in bytes */
1328 #define TEX_UPLOAD_DEFAULT_SIZE (1024 * 1024)
1331 * Create a texture upload buffer
1334 svga_texture_transfer_map_upload_create(struct svga_context
*svga
)
1336 svga
->tex_upload
= u_upload_create(&svga
->pipe
, TEX_UPLOAD_DEFAULT_SIZE
,
1337 0, PIPE_USAGE_STAGING
, 0);
1338 return svga
->tex_upload
!= NULL
;
1343 * Destroy the texture upload buffer
1346 svga_texture_transfer_map_upload_destroy(struct svga_context
*svga
)
1348 u_upload_destroy(svga
->tex_upload
);
1353 * Returns true if this transfer map request can use the upload buffer.
1356 svga_texture_transfer_map_can_upload(const struct svga_screen
*svgascreen
,
1357 const struct pipe_resource
*texture
)
1359 if (svgascreen
->sws
->have_transfer_from_buffer_cmd
== FALSE
)
1362 /* TransferFromBuffer command is not well supported with multi-samples surface */
1363 if (texture
->nr_samples
> 1)
1366 if (util_format_is_compressed(texture
->format
)) {
1367 /* XXX Need to take a closer look to see why texture upload
1368 * with 3D texture with compressed format fails
1370 if (texture
->target
== PIPE_TEXTURE_3D
)
1373 else if (texture
->format
== PIPE_FORMAT_R9G9B9E5_FLOAT
) {
1382 * Use upload buffer for the transfer map request.
1385 svga_texture_transfer_map_upload(struct svga_context
*svga
,
1386 struct svga_transfer
*st
)
1388 struct pipe_resource
*texture
= st
->base
.resource
;
1389 struct pipe_resource
*tex_buffer
= NULL
;
1391 unsigned nblocksx
, nblocksy
;
1393 unsigned upload_size
;
1395 assert(svga
->tex_upload
);
1397 st
->upload
.box
.x
= st
->base
.box
.x
;
1398 st
->upload
.box
.y
= st
->base
.box
.y
;
1399 st
->upload
.box
.z
= st
->base
.box
.z
;
1400 st
->upload
.box
.w
= st
->base
.box
.width
;
1401 st
->upload
.box
.h
= st
->base
.box
.height
;
1402 st
->upload
.box
.d
= st
->base
.box
.depth
;
1403 st
->upload
.nlayers
= 1;
1405 switch (texture
->target
) {
1406 case PIPE_TEXTURE_CUBE
:
1407 st
->upload
.box
.z
= 0;
1409 case PIPE_TEXTURE_2D_ARRAY
:
1410 case PIPE_TEXTURE_CUBE_ARRAY
:
1411 st
->upload
.nlayers
= st
->base
.box
.depth
;
1412 st
->upload
.box
.z
= 0;
1413 st
->upload
.box
.d
= 1;
1415 case PIPE_TEXTURE_1D_ARRAY
:
1416 st
->upload
.nlayers
= st
->base
.box
.depth
;
1417 st
->upload
.box
.y
= st
->upload
.box
.z
= 0;
1418 st
->upload
.box
.d
= 1;
1424 nblocksx
= util_format_get_nblocksx(texture
->format
, st
->base
.box
.width
);
1425 nblocksy
= util_format_get_nblocksy(texture
->format
, st
->base
.box
.height
);
1427 st
->base
.stride
= nblocksx
* util_format_get_blocksize(texture
->format
);
1428 st
->base
.layer_stride
= st
->base
.stride
* nblocksy
;
1430 /* In order to use the TransferFromBuffer command to update the
1431 * texture content from the buffer, the layer stride for a multi-layers
1432 * surface needs to be in multiples of 16 bytes.
1434 if (st
->upload
.nlayers
> 1 && st
->base
.layer_stride
& 15)
1437 upload_size
= st
->base
.layer_stride
* st
->base
.box
.depth
;
1438 upload_size
= align(upload_size
, 16);
1441 if (util_format_is_compressed(texture
->format
)) {
1442 struct svga_texture
*tex
= svga_texture(texture
);
1443 unsigned blockw
, blockh
, bytesPerBlock
;
1445 svga_format_size(tex
->key
.format
, &blockw
, &blockh
, &bytesPerBlock
);
1447 /* dest box must start on block boundary */
1448 assert((st
->base
.box
.x
% blockw
) == 0);
1449 assert((st
->base
.box
.y
% blockh
) == 0);
1453 /* If the upload size exceeds the default buffer size, the
1454 * upload buffer manager code will try to allocate a new buffer
1455 * with the new buffer size.
1457 u_upload_alloc(svga
->tex_upload
, 0, upload_size
, 16,
1458 &offset
, &tex_buffer
, &tex_map
);
1464 st
->upload
.buf
= tex_buffer
;
1465 st
->upload
.map
= tex_map
;
1466 st
->upload
.offset
= offset
;
1473 * Unmap upload map transfer request
1476 svga_texture_transfer_unmap_upload(struct svga_context
*svga
,
1477 struct svga_transfer
*st
)
1479 struct svga_winsys_surface
*srcsurf
;
1480 struct svga_winsys_surface
*dstsurf
;
1481 struct pipe_resource
*texture
= st
->base
.resource
;
1482 struct svga_texture
*tex
= svga_texture(texture
);
1483 enum pipe_error ret
;
1484 unsigned subResource
;
1485 unsigned numMipLevels
;
1487 unsigned offset
= st
->upload
.offset
;
1489 assert(svga
->tex_upload
);
1490 assert(st
->upload
.buf
);
1492 /* unmap the texture upload buffer */
1493 u_upload_unmap(svga
->tex_upload
);
1495 srcsurf
= svga_buffer_handle(svga
, st
->upload
.buf
, 0);
1496 dstsurf
= svga_texture(texture
)->handle
;
1499 numMipLevels
= texture
->last_level
+ 1;
1501 for (i
= 0, layer
= st
->slice
; i
< st
->upload
.nlayers
; i
++, layer
++) {
1502 subResource
= layer
* numMipLevels
+ st
->base
.level
;
1504 /* send a transferFromBuffer command to update the host texture surface */
1505 assert((offset
& 15) == 0);
1507 ret
= SVGA3D_vgpu10_TransferFromBuffer(svga
->swc
, srcsurf
,
1510 st
->base
.layer_stride
,
1511 dstsurf
, subResource
,
1513 if (ret
!= PIPE_OK
) {
1514 svga_context_flush(svga
, NULL
);
1515 ret
= SVGA3D_vgpu10_TransferFromBuffer(svga
->swc
, srcsurf
,
1518 st
->base
.layer_stride
,
1519 dstsurf
, subResource
,
1521 assert(ret
== PIPE_OK
);
1523 offset
+= st
->base
.layer_stride
;
1525 /* Set rendered-to flag */
1526 svga_set_texture_rendered_to(tex
, layer
, st
->base
.level
);
1529 pipe_resource_reference(&st
->upload
.buf
, NULL
);
1533 * Does the device format backing this surface have an
1536 * \param texture[in] The texture whose format we're querying
1537 * \return TRUE if the format has an alpha channel, FALSE otherwise
1539 * For locally created textures, the device (svga) format is typically
1540 * identical to svga_format(texture->format), and we can use the gallium
1541 * format tests to determine whether the device format has an alpha channel
1542 * or not. However, for textures backed by imported svga surfaces that is
1543 * not always true, and we have to look at the SVGA3D utilities.
1546 svga_texture_device_format_has_alpha(struct pipe_resource
*texture
)
1548 /* the svga_texture() call below is invalid for PIPE_BUFFER resources */
1549 assert(texture
->target
!= PIPE_BUFFER
);
1551 enum svga3d_block_desc block_desc
=
1552 svga3dsurface_get_desc(svga_texture(texture
)->key
.format
)->block_desc
;
1554 return !!(block_desc
& SVGA3DBLOCKDESC_ALPHA
);