src/gallium/drivers/svga/svga_resource_texture.c

   1 /**********************************************************
   2  * Copyright 2008-2009 VMware, Inc.  All rights reserved.
   3  *
   4  * Permission is hereby granted, free of charge, to any person
   5  * obtaining a copy of this software and associated documentation
   6  * files (the "Software"), to deal in the Software without
   7  * restriction, including without limitation the rights to use, copy,
   8  * modify, merge, publish, distribute, sublicense, and/or sell copies
   9  * of the Software, and to permit persons to whom the Software is
  10  * furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be
  13  * included in all copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  16  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  17  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  18  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  19  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  20  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  21  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  22  * SOFTWARE.
  23  *
  24  **********************************************************/
  25
  26 #include "svga3d_reg.h"
  27 #include "svga3d_surfacedefs.h"
  28
  29 #include "pipe/p_state.h"
  30 #include "pipe/p_defines.h"
  31 #include "os/os_thread.h"
  32 #include "util/u_format.h"
  33 #include "util/u_inlines.h"
  34 #include "util/u_math.h"
  35 #include "util/u_memory.h"
  36 #include "util/u_resource.h"
  37
  38 #include "svga_cmd.h"
  39 #include "svga_format.h"
  40 #include "svga_screen.h"
  41 #include "svga_context.h"
  42 #include "svga_resource_texture.h"
  43 #include "svga_resource_buffer.h"
  44 #include "svga_sampler_view.h"
  45 #include "svga_winsys.h"
  46 #include "svga_debug.h"
  47
  48
  49 static void
  50 svga_transfer_dma_band(struct svga_context *svga,
  51                        struct svga_transfer *st,
  52                        SVGA3dTransferType transfer,
  53                        unsigned y, unsigned h, unsigned srcy,
  54                        SVGA3dSurfaceDMAFlags flags)
  55 {
  56    struct svga_texture *texture = svga_texture(st->base.resource);
  57    SVGA3dCopyBox box;
  58    enum pipe_error ret;
  59
  60    assert(!st->use_direct_map);
  61
  62    box.x = st->base.box.x;
  63    box.y = y;
  64    box.z = st->base.box.z;
  65    box.w = st->base.box.width;
  66    box.h = h;
  67    box.d = 1;
  68    box.srcx = 0;
  69    box.srcy = srcy;
  70    box.srcz = 0;
  71
  72    SVGA_DBG(DEBUG_DMA, "dma %s sid %p, face %u, (%u, %u, %u) - "
  73             "(%u, %u, %u), %ubpp\n",
  74             transfer == SVGA3D_WRITE_HOST_VRAM ? "to" : "from",
  75             texture->handle,
  76             st->slice,
  77             st->base.box.x,
  78             y,
  79             box.z,
  80             st->base.box.x + st->base.box.width,
  81             y + h,
  82             box.z + 1,
  83             util_format_get_blocksize(texture->b.b.format) * 8 /
  84             (util_format_get_blockwidth(texture->b.b.format)
  85              * util_format_get_blockheight(texture->b.b.format)));
  86
  87    ret = SVGA3D_SurfaceDMA(svga->swc, st, transfer, &box, 1, flags);
  88    if (ret != PIPE_OK) {
  89       svga_context_flush(svga, NULL);
  90       ret = SVGA3D_SurfaceDMA(svga->swc, st, transfer, &box, 1, flags);
  91       assert(ret == PIPE_OK);
  92    }
  93 }
  94
  95
  96 static void
  97 svga_transfer_dma(struct svga_context *svga,
  98                   struct svga_transfer *st,
  99                   SVGA3dTransferType transfer,
 100                   SVGA3dSurfaceDMAFlags flags)
 101 {
 102    struct svga_texture *texture = svga_texture(st->base.resource);
 103    struct svga_screen *screen = svga_screen(texture->b.b.screen);
 104    struct svga_winsys_screen *sws = screen->sws;
 105    struct pipe_fence_handle *fence = NULL;
 106
 107    assert(!st->use_direct_map);
 108
 109    if (transfer == SVGA3D_READ_HOST_VRAM) {
 110       SVGA_DBG(DEBUG_PERF, "%s: readback transfer\n", __FUNCTION__);
 111    }
 112
 113    /* Ensure any pending operations on host surfaces are queued on the command
 114     * buffer first.
 115     */
 116    svga_surfaces_flush( svga );
 117
 118    if (!st->swbuf) {
 119       /* Do the DMA transfer in a single go */
 120       svga_transfer_dma_band(svga, st, transfer,
 121                              st->base.box.y, st->base.box.height, 0,
 122                              flags);
 123
 124       if (transfer == SVGA3D_READ_HOST_VRAM) {
 125          svga_context_flush(svga, &fence);
 126          sws->fence_finish(sws, fence, 0);
 127          sws->fence_reference(sws, &fence, NULL);
 128       }
 129    }
 130    else {
 131       int y, h, srcy;
 132       unsigned blockheight =
 133          util_format_get_blockheight(st->base.resource->format);
 134
 135       h = st->hw_nblocksy * blockheight;
 136       srcy = 0;
 137
 138       for (y = 0; y < st->base.box.height; y += h) {
 139          unsigned offset, length;
 140          void *hw, *sw;
 141
 142          if (y + h > st->base.box.height)
 143             h = st->base.box.height - y;
 144
 145          /* Transfer band must be aligned to pixel block boundaries */
 146          assert(y % blockheight == 0);
 147          assert(h % blockheight == 0);
 148
 149          offset = y * st->base.stride / blockheight;
 150          length = h * st->base.stride / blockheight;
 151
 152          sw = (uint8_t *) st->swbuf + offset;
 153
 154          if (transfer == SVGA3D_WRITE_HOST_VRAM) {
 155             unsigned usage = PIPE_TRANSFER_WRITE;
 156
 157             /* Wait for the previous DMAs to complete */
 158             /* TODO: keep one DMA (at half the size) in the background */
 159             if (y) {
 160                svga_context_flush(svga, NULL);
 161                usage |= PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE;
 162             }
 163
 164             hw = sws->buffer_map(sws, st->hwbuf, usage);
 165             assert(hw);
 166             if (hw) {
 167                memcpy(hw, sw, length);
 168                sws->buffer_unmap(sws, st->hwbuf);
 169             }
 170          }
 171
 172          svga_transfer_dma_band(svga, st, transfer, y, h, srcy, flags);
 173
 174          /*
 175           * Prevent the texture contents to be discarded on the next band
 176           * upload.
 177           */
 178          flags.discard = FALSE;
 179
 180          if (transfer == SVGA3D_READ_HOST_VRAM) {
 181             svga_context_flush(svga, &fence);
 182             sws->fence_finish(sws, fence, 0);
 183
 184             hw = sws->buffer_map(sws, st->hwbuf, PIPE_TRANSFER_READ);
 185             assert(hw);
 186             if (hw) {
 187                memcpy(sw, hw, length);
 188                sws->buffer_unmap(sws, st->hwbuf);
 189             }
 190          }
 191       }
 192    }
 193 }
 194
 195
 196 static boolean
 197 svga_texture_get_handle(struct pipe_screen *screen,
 198                         struct pipe_resource *texture,
 199                         struct winsys_handle *whandle)
 200 {
 201    struct svga_winsys_screen *sws = svga_winsys_screen(texture->screen);
 202    unsigned stride;
 203
 204    assert(svga_texture(texture)->key.cachable == 0);
 205    svga_texture(texture)->key.cachable = 0;
 206
 207    stride = util_format_get_nblocksx(texture->format, texture->width0) *
 208             util_format_get_blocksize(texture->format);
 209
 210    return sws->surface_get_handle(sws, svga_texture(texture)->handle,
 211                                   stride, whandle);
 212 }
 213
 214
 215 static void
 216 svga_texture_destroy(struct pipe_screen *screen,
 217                      struct pipe_resource *pt)
 218 {
 219    struct svga_screen *ss = svga_screen(screen);
 220    struct svga_texture *tex = svga_texture(pt);
 221
 222    ss->texture_timestamp++;
 223
 224    svga_sampler_view_reference(&tex->cached_view, NULL);
 225
 226    /*
 227      DBG("%s deleting %p\n", __FUNCTION__, (void *) tex);
 228    */
 229    SVGA_DBG(DEBUG_DMA, "unref sid %p (texture)\n", tex->handle);
 230    svga_screen_surface_destroy(ss, &tex->key, &tex->handle);
 231
 232    ss->total_resource_bytes -= tex->size;
 233
 234    FREE(tex->defined);
 235    FREE(tex->rendered_to);
 236    FREE(tex);
 237 }
 238
 239
 240 /**
 241  * Determine if we need to read back a texture image before mapping it.
 242  */
 243 static boolean
 244 need_tex_readback(struct pipe_transfer *transfer)
 245 {
 246    struct svga_texture *t = svga_texture(transfer->resource);
 247
 248    if (transfer->usage & PIPE_TRANSFER_READ)
 249       return TRUE;
 250
 251    if ((transfer->usage & PIPE_TRANSFER_WRITE) &&
 252        ((transfer->usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) == 0)) {
 253       unsigned face;
 254
 255       if (transfer->resource->target == PIPE_TEXTURE_CUBE) {
 256          assert(transfer->box.depth == 1);
 257          face = transfer->box.z;
 258       }
 259       else {
 260          face = 0;
 261       }
 262       if (svga_was_texture_rendered_to(t, face, transfer->level)) {
 263          return TRUE;
 264       }
 265    }
 266
 267    return FALSE;
 268 }
 269
 270
 271 static enum pipe_error
 272 readback_image_vgpu9(struct svga_context *svga,
 273                    struct svga_winsys_surface *surf,
 274                    unsigned slice,
 275                    unsigned level)
 276 {
 277    enum pipe_error ret;
 278
 279    ret = SVGA3D_ReadbackGBImage(svga->swc, surf, slice, level);
 280    if (ret != PIPE_OK) {
 281       svga_context_flush(svga, NULL);
 282       ret = SVGA3D_ReadbackGBImage(svga->swc, surf, slice, level);
 283    }
 284    return ret;
 285 }
 286
 287
 288 static enum pipe_error
 289 readback_image_vgpu10(struct svga_context *svga,
 290                     struct svga_winsys_surface *surf,
 291                     unsigned slice,
 292                     unsigned level,
 293                     unsigned numMipLevels)
 294 {
 295    enum pipe_error ret;
 296    unsigned subResource;
 297
 298    subResource = slice * numMipLevels + level;
 299    ret = SVGA3D_vgpu10_ReadbackSubResource(svga->swc, surf, subResource);
 300    if (ret != PIPE_OK) {
 301       svga_context_flush(svga, NULL);
 302       ret = SVGA3D_vgpu10_ReadbackSubResource(svga->swc, surf, subResource);
 303    }
 304    return ret;
 305 }
 306
 307
 308 static void *
 309 svga_texture_transfer_map(struct pipe_context *pipe,
 310                           struct pipe_resource *texture,
 311                           unsigned level,
 312                           unsigned usage,
 313                           const struct pipe_box *box,
 314                           struct pipe_transfer **ptransfer)
 315 {
 316    struct svga_context *svga = svga_context(pipe);
 317    struct svga_screen *ss = svga_screen(pipe->screen);
 318    struct svga_winsys_screen *sws = ss->sws;
 319    struct svga_texture *tex = svga_texture(texture);
 320    struct svga_transfer *st;
 321    unsigned nblocksx, nblocksy;
 322    boolean use_direct_map = svga_have_gb_objects(svga) &&
 323       !svga_have_gb_dma(svga);
 324    unsigned d;
 325
 326    /* We can't map texture storage directly unless we have GB objects */
 327    if (usage & PIPE_TRANSFER_MAP_DIRECTLY) {
 328       if (svga_have_gb_objects(svga))
 329          use_direct_map = TRUE;
 330       else
 331          return NULL;
 332    }
 333
 334    st = CALLOC_STRUCT(svga_transfer);
 335    if (!st)
 336       return NULL;
 337
 338    {
 339       unsigned w, h;
 340       if (use_direct_map) {
 341          /* we'll directly access the guest-backed surface */
 342          w = u_minify(texture->width0, level);
 343          h = u_minify(texture->height0, level);
 344          d = u_minify(texture->depth0, level);
 345       }
 346       else {
 347          /* we'll put the data into a tightly packed buffer */
 348          w = box->width;
 349          h = box->height;
 350          d = box->depth;
 351       }
 352       nblocksx = util_format_get_nblocksx(texture->format, w);
 353       nblocksy = util_format_get_nblocksy(texture->format, h);
 354    }
 355
 356    pipe_resource_reference(&st->base.resource, texture);
 357
 358    st->base.level = level;
 359    st->base.usage = usage;
 360    st->base.box = *box;
 361    st->base.stride = nblocksx*util_format_get_blocksize(texture->format);
 362    st->base.layer_stride = st->base.stride * nblocksy;
 363
 364    switch (tex->b.b.target) {
 365    case PIPE_TEXTURE_CUBE:
 366    case PIPE_TEXTURE_2D_ARRAY:
 367    case PIPE_TEXTURE_1D_ARRAY:
 368       st->slice = st->base.box.z;
 369       st->base.box.z = 0;   /* so we don't apply double offsets below */
 370       break;
 371    default:
 372       st->slice = 0;
 373       break;
 374    }
 375
 376    if (!use_direct_map) {
 377       /* Use a DMA buffer */
 378       st->hw_nblocksy = nblocksy;
 379
 380       st->hwbuf = svga_winsys_buffer_create(svga, 1, 0,
 381                                    st->hw_nblocksy * st->base.stride * d);
 382       while(!st->hwbuf && (st->hw_nblocksy /= 2)) {
 383          st->hwbuf = svga_winsys_buffer_create(svga, 1, 0,
 384                                    st->hw_nblocksy * st->base.stride * d);
 385       }
 386
 387       if (!st->hwbuf) {
 388          FREE(st);
 389          return NULL;
 390       }
 391
 392       if (st->hw_nblocksy < nblocksy) {
 393          /* We couldn't allocate a hardware buffer big enough for the transfer,
 394           * so allocate regular malloc memory instead */
 395          if (0) {
 396             debug_printf("%s: failed to allocate %u KB of DMA, "
 397                          "splitting into %u x %u KB DMA transfers\n",
 398                          __FUNCTION__,
 399                          (nblocksy*st->base.stride + 1023)/1024,
 400                          (nblocksy + st->hw_nblocksy - 1)/st->hw_nblocksy,
 401                          (st->hw_nblocksy*st->base.stride + 1023)/1024);
 402          }
 403
 404          st->swbuf = MALLOC(nblocksy * st->base.stride * d);
 405          if (!st->swbuf) {
 406             sws->buffer_destroy(sws, st->hwbuf);
 407             FREE(st);
 408             return NULL;
 409          }
 410       }
 411
 412       if (usage & PIPE_TRANSFER_READ) {
 413          SVGA3dSurfaceDMAFlags flags;
 414          memset(&flags, 0, sizeof flags);
 415          svga_transfer_dma(svga, st, SVGA3D_READ_HOST_VRAM, flags);
 416       }
 417    } else {
 418       struct pipe_transfer *transfer = &st->base;
 419       struct svga_winsys_surface *surf = tex->handle;
 420
 421       if (!surf) {
 422          FREE(st);
 423          return NULL;
 424       }
 425
 426       if (need_tex_readback(transfer)) {
 427          enum pipe_error ret;
 428
 429          svga_surfaces_flush(svga);
 430
 431          if (svga_have_vgpu10(svga)) {
 432             ret = readback_image_vgpu10(svga, surf, st->slice, transfer->level,
 433                                         tex->b.b.last_level + 1);
 434          } else {
 435             ret = readback_image_vgpu9(svga, surf, st->slice, transfer->level);
 436          }
 437
 438          assert(ret == PIPE_OK);
 439          (void) ret;
 440
 441          svga_context_flush(svga, NULL);
 442
 443          /*
 444           * Note: if PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE were specified
 445           * we could potentially clear the flag for all faces/layers/mips.
 446           */
 447          svga_clear_texture_rendered_to(tex, st->slice, transfer->level);
 448       }
 449       else {
 450          assert(transfer->usage & PIPE_TRANSFER_WRITE);
 451          if ((transfer->usage & PIPE_TRANSFER_UNSYNCHRONIZED) == 0) {
 452             svga_surfaces_flush(svga);
 453             if (!sws->surface_is_flushed(sws, surf))
 454                svga_context_flush(svga, NULL);
 455          }
 456       }
 457    }
 458
 459    st->use_direct_map = use_direct_map;
 460
 461    *ptransfer = &st->base;
 462
 463    /*
 464     * Begin mapping code
 465     */
 466    if (st->swbuf) {
 467       return st->swbuf;
 468    }
 469    else if (!st->use_direct_map) {
 470       return sws->buffer_map(sws, st->hwbuf, usage);
 471    }
 472    else {
 473       SVGA3dSize baseLevelSize;
 474       struct svga_texture *tex = svga_texture(texture);
 475       struct svga_winsys_surface *surf = tex->handle;
 476       uint8_t *map;
 477       boolean retry;
 478       unsigned offset, mip_width, mip_height;
 479       unsigned xoffset = st->base.box.x;
 480       unsigned yoffset = st->base.box.y;
 481       unsigned zoffset = st->base.box.z;
 482
 483       map = svga->swc->surface_map(svga->swc, surf, usage, &retry);
 484       if (map == NULL && retry) {
 485          /*
 486           * At this point, the svga_surfaces_flush() should already have
 487           * called in svga_texture_get_transfer().
 488           */
 489          svga_context_flush(svga, NULL);
 490          map = svga->swc->surface_map(svga->swc, surf, usage, &retry);
 491       }
 492
 493       /*
 494        * Make sure we return NULL if the map fails
 495        */
 496       if (map == NULL) {
 497          FREE(st);
 498          return map;
 499       }
 500
 501       /**
 502        * Compute the offset to the specific texture slice in the buffer.
 503        */
 504       baseLevelSize.width = tex->b.b.width0;
 505       baseLevelSize.height = tex->b.b.height0;
 506       baseLevelSize.depth = tex->b.b.depth0;
 507
 508       offset = svga3dsurface_get_image_offset(tex->key.format, baseLevelSize,
 509                                               tex->b.b.last_level + 1, /* numMips */
 510                                               st->slice, level);
 511       if (level > 0) {
 512          assert(offset > 0);
 513       }
 514
 515       mip_width = u_minify(tex->b.b.width0, level);
 516       mip_height = u_minify(tex->b.b.height0, level);
 517
 518       offset += svga3dsurface_get_pixel_offset(tex->key.format,
 519                                                mip_width, mip_height,
 520                                                xoffset, yoffset, zoffset);
 521
 522       return (void *) (map + offset);
 523    }
 524 }
 525
 526
 527 /**
 528  * Unmap a GB texture surface.
 529  */
 530 static void
 531 svga_texture_surface_unmap(struct svga_context *svga,
 532                            struct pipe_transfer *transfer)
 533 {
 534    struct svga_winsys_surface *surf = svga_texture(transfer->resource)->handle;
 535    struct svga_winsys_context *swc = svga->swc;
 536    boolean rebind;
 537
 538    assert(surf);
 539
 540    swc->surface_unmap(swc, surf, &rebind);
 541    if (rebind) {
 542       enum pipe_error ret;
 543       ret = SVGA3D_BindGBSurface(swc, surf);
 544       if (ret != PIPE_OK) {
 545          /* flush and retry */
 546          svga_context_flush(svga, NULL);
 547          ret = SVGA3D_BindGBSurface(swc, surf);
 548          assert(ret == PIPE_OK);
 549       }
 550    }
 551 }
 552
 553
 554 static enum pipe_error
 555 update_image_vgpu9(struct svga_context *svga,
 556                    struct svga_winsys_surface *surf,
 557                    const SVGA3dBox *box,
 558                    unsigned slice,
 559                    unsigned level)
 560 {
 561    enum pipe_error ret;
 562
 563    ret = SVGA3D_UpdateGBImage(svga->swc, surf, box, slice, level);
 564    if (ret != PIPE_OK) {
 565       svga_context_flush(svga, NULL);
 566       ret = SVGA3D_UpdateGBImage(svga->swc, surf, box, slice, level);
 567    }
 568    return ret;
 569 }
 570
 571
 572 static enum pipe_error
 573 update_image_vgpu10(struct svga_context *svga,
 574                     struct svga_winsys_surface *surf,
 575                     const SVGA3dBox *box,
 576                     unsigned slice,
 577                     unsigned level,
 578                     unsigned numMipLevels)
 579 {
 580    enum pipe_error ret;
 581    unsigned subResource;
 582
 583    subResource = slice * numMipLevels + level;
 584    ret = SVGA3D_vgpu10_UpdateSubResource(svga->swc, surf, box, subResource);
 585    if (ret != PIPE_OK) {
 586       svga_context_flush(svga, NULL);
 587       ret = SVGA3D_vgpu10_UpdateSubResource(svga->swc, surf, box, subResource);
 588    }
 589    return ret;
 590 }
 591
 592
 593 static void
 594 svga_texture_transfer_unmap(struct pipe_context *pipe,
 595                             struct pipe_transfer *transfer)
 596 {
 597    struct svga_context *svga = svga_context(pipe);
 598    struct svga_screen *ss = svga_screen(pipe->screen);
 599    struct svga_winsys_screen *sws = ss->sws;
 600    struct svga_transfer *st = svga_transfer(transfer);
 601    struct svga_texture *tex = svga_texture(transfer->resource);
 602
 603    if (!st->swbuf) {
 604       if (st->use_direct_map) {
 605          svga_texture_surface_unmap(svga, transfer);
 606       }
 607       else {
 608          sws->buffer_unmap(sws, st->hwbuf);
 609       }
 610    }
 611
 612    if (!st->use_direct_map && (st->base.usage & PIPE_TRANSFER_WRITE)) {
 613       /* Use DMA to transfer texture data */
 614       SVGA3dSurfaceDMAFlags flags;
 615
 616       memset(&flags, 0, sizeof flags);
 617       if (transfer->usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) {
 618          flags.discard = TRUE;
 619       }
 620       if (transfer->usage & PIPE_TRANSFER_UNSYNCHRONIZED) {
 621          flags.unsynchronized = TRUE;
 622       }
 623
 624       svga_transfer_dma(svga, st, SVGA3D_WRITE_HOST_VRAM, flags);
 625    } else if (transfer->usage & PIPE_TRANSFER_WRITE) {
 626       struct svga_winsys_surface *surf =
 627          svga_texture(transfer->resource)->handle;
 628       SVGA3dBox box;
 629       enum pipe_error ret;
 630
 631       assert(svga_have_gb_objects(svga));
 632
 633       /* update the effected region */
 634       box.x = transfer->box.x;
 635       box.y = transfer->box.y;
 636       switch (tex->b.b.target) {
 637       case PIPE_TEXTURE_CUBE:
 638       case PIPE_TEXTURE_2D_ARRAY:
 639          box.z = 0;
 640          break;
 641       case PIPE_TEXTURE_1D_ARRAY:
 642          box.y = box.z = 0;
 643          break;
 644       default:
 645          box.z = transfer->box.z;
 646          break;
 647       }
 648       box.w = transfer->box.width;
 649       box.h = transfer->box.height;
 650       box.d = transfer->box.depth;
 651
 652       if (0)
 653          debug_printf("%s %d, %d, %d  %d x %d x %d\n",
 654                       __FUNCTION__,
 655                       box.x, box.y, box.z,
 656                       box.w, box.h, box.d);
 657
 658       if (svga_have_vgpu10(svga)) {
 659          ret = update_image_vgpu10(svga, surf, &box, st->slice, transfer->level,
 660                                    tex->b.b.last_level + 1);
 661       } else {
 662          ret = update_image_vgpu9(svga, surf, &box, st->slice, transfer->level);
 663       }
 664
 665       assert(ret == PIPE_OK);
 666       (void) ret;
 667    }
 668
 669    ss->texture_timestamp++;
 670    svga_age_texture_view(tex, transfer->level);
 671    if (transfer->resource->target == PIPE_TEXTURE_CUBE)
 672       svga_define_texture_level(tex, st->slice, transfer->level);
 673    else
 674       svga_define_texture_level(tex, 0, transfer->level);
 675
 676    pipe_resource_reference(&st->base.resource, NULL);
 677
 678    FREE(st->swbuf);
 679    if (!st->use_direct_map) {
 680       sws->buffer_destroy(sws, st->hwbuf);
 681    }
 682    FREE(st);
 683 }
 684
 685
 686 /**
 687  * Does format store depth values?
 688  */
 689 static inline boolean
 690 format_has_depth(enum pipe_format format)
 691 {
 692    const struct util_format_description *desc = util_format_description(format);
 693    return util_format_has_depth(desc);
 694 }
 695
 696
 697 struct u_resource_vtbl svga_texture_vtbl =
 698 {
 699    svga_texture_get_handle,           /* get_handle */
 700    svga_texture_destroy,              /* resource_destroy */
 701    svga_texture_transfer_map,         /* transfer_map */
 702    u_default_transfer_flush_region,   /* transfer_flush_region */
 703    svga_texture_transfer_unmap,       /* transfer_unmap */
 704    u_default_transfer_inline_write    /* transfer_inline_write */
 705 };
 706
 707
 708 struct pipe_resource *
 709 svga_texture_create(struct pipe_screen *screen,
 710                     const struct pipe_resource *template)
 711 {
 712    struct svga_screen *svgascreen = svga_screen(screen);
 713    struct svga_texture *tex;
 714    unsigned bindings = template->bind;
 715
 716    assert(template->last_level < SVGA_MAX_TEXTURE_LEVELS);
 717    if (template->last_level >= SVGA_MAX_TEXTURE_LEVELS) {
 718       return NULL;
 719    }
 720
 721    tex = CALLOC_STRUCT(svga_texture);
 722    if (!tex) {
 723       return NULL;
 724    }
 725
 726    tex->defined = CALLOC(template->depth0 * template->array_size,
 727                          sizeof(tex->defined[0]));
 728    if (!tex->defined) {
 729       FREE(tex);
 730       return NULL;
 731    }
 732
 733    tex->rendered_to = CALLOC(template->depth0 * template->array_size,
 734                              sizeof(tex->rendered_to[0]));
 735    if (!tex->rendered_to) {
 736       FREE(tex->defined);
 737       FREE(tex);
 738       return NULL;
 739    }
 740
 741    tex->b.b = *template;
 742    tex->b.vtbl = &svga_texture_vtbl;
 743    pipe_reference_init(&tex->b.b.reference, 1);
 744    tex->b.b.screen = screen;
 745
 746    tex->key.flags = 0;
 747    tex->key.size.width = template->width0;
 748    tex->key.size.height = template->height0;
 749    tex->key.size.depth = template->depth0;
 750    tex->key.arraySize = 1;
 751    tex->key.numFaces = 1;
 752    tex->key.sampleCount = template->nr_samples;
 753
 754    if (template->nr_samples > 1) {
 755       tex->key.flags |= SVGA3D_SURFACE_MASKABLE_ANTIALIAS;
 756    }
 757
 758    if (svgascreen->sws->have_vgpu10) {
 759       switch (template->target) {
 760       case PIPE_TEXTURE_1D:
 761          tex->key.flags |= SVGA3D_SURFACE_1D;
 762          break;
 763       case PIPE_TEXTURE_1D_ARRAY:
 764          tex->key.flags |= SVGA3D_SURFACE_1D;
 765          /* fall-through */
 766       case PIPE_TEXTURE_2D_ARRAY:
 767          tex->key.flags |= SVGA3D_SURFACE_ARRAY;
 768          tex->key.arraySize = template->array_size;
 769          break;
 770       case PIPE_TEXTURE_3D:
 771          tex->key.flags |= SVGA3D_SURFACE_VOLUME;
 772          break;
 773       case PIPE_TEXTURE_CUBE:
 774          tex->key.flags |= (SVGA3D_SURFACE_CUBEMAP | SVGA3D_SURFACE_ARRAY);
 775          tex->key.numFaces = 6;
 776          break;
 777       default:
 778          break;
 779       }
 780    }
 781    else {
 782       switch (template->target) {
 783       case PIPE_TEXTURE_3D:
 784          tex->key.flags |= SVGA3D_SURFACE_VOLUME;
 785          break;
 786       case PIPE_TEXTURE_CUBE:
 787          tex->key.flags |= SVGA3D_SURFACE_CUBEMAP;
 788          tex->key.numFaces = 6;
 789          break;
 790       default:
 791          break;
 792       }
 793    }
 794
 795    tex->key.cachable = 1;
 796
 797    if (bindings & PIPE_BIND_SAMPLER_VIEW) {
 798       tex->key.flags |= SVGA3D_SURFACE_HINT_TEXTURE;
 799       tex->key.flags |= SVGA3D_SURFACE_BIND_SHADER_RESOURCE;
 800
 801       if (!(bindings & PIPE_BIND_RENDER_TARGET)) {
 802          /* Also check if the format is renderable */
 803          if (screen->is_format_supported(screen, template->format,
 804                                          template->target,
 805                                          template->nr_samples,
 806                                          PIPE_BIND_RENDER_TARGET)) {
 807             bindings |= PIPE_BIND_RENDER_TARGET;
 808          }
 809       }
 810    }
 811
 812    if (bindings & PIPE_BIND_DISPLAY_TARGET) {
 813       tex->key.cachable = 0;
 814    }
 815
 816    if (bindings & PIPE_BIND_SHARED) {
 817       tex->key.cachable = 0;
 818    }
 819
 820    if (bindings & (PIPE_BIND_SCANOUT | PIPE_BIND_CURSOR)) {
 821       tex->key.scanout = 1;
 822       tex->key.cachable = 0;
 823    }
 824
 825    /*
 826     * Note: Previously we never passed the
 827     * SVGA3D_SURFACE_HINT_RENDERTARGET hint. Mesa cannot
 828     * know beforehand whether a texture will be used as a rendertarget or not
 829     * and it always requests PIPE_BIND_RENDER_TARGET, therefore
 830     * passing the SVGA3D_SURFACE_HINT_RENDERTARGET here defeats its purpose.
 831     *
 832     * However, this was changed since other state trackers
 833     * (XA for example) uses it accurately and certain device versions
 834     * relies on it in certain situations to render correctly.
 835     */
 836    if ((bindings & PIPE_BIND_RENDER_TARGET) &&
 837        !util_format_is_s3tc(template->format)) {
 838       tex->key.flags |= SVGA3D_SURFACE_HINT_RENDERTARGET;
 839       tex->key.flags |= SVGA3D_SURFACE_BIND_RENDER_TARGET;
 840    }
 841
 842    if (bindings & PIPE_BIND_DEPTH_STENCIL) {
 843       tex->key.flags |= SVGA3D_SURFACE_HINT_DEPTHSTENCIL;
 844       tex->key.flags |= SVGA3D_SURFACE_BIND_DEPTH_STENCIL;
 845    }
 846
 847    tex->key.numMipLevels = template->last_level + 1;
 848
 849    tex->key.format = svga_translate_format(svgascreen, template->format,
 850                                            bindings);
 851    if (tex->key.format == SVGA3D_FORMAT_INVALID) {
 852       FREE(tex->defined);
 853       FREE(tex->rendered_to);
 854       FREE(tex);
 855       return NULL;
 856    }
 857
 858    /* Use typeless formats for sRGB and depth resources.  Typeless
 859     * formats can be reinterpreted as other formats.  For example,
 860     * SVGA3D_R8G8B8A8_UNORM_TYPELESS can be interpreted as
 861     * SVGA3D_R8G8B8A8_UNORM_SRGB or SVGA3D_R8G8B8A8_UNORM.
 862     */
 863    if (svgascreen->sws->have_vgpu10 &&
 864        (util_format_is_srgb(template->format) ||
 865         format_has_depth(template->format))) {
 866       SVGA3dSurfaceFormat typeless = svga_typeless_format(tex->key.format);
 867       if (0) {
 868          debug_printf("Convert resource type %s -> %s (bind 0x%x)\n",
 869                       svga_format_name(tex->key.format),
 870                       svga_format_name(typeless),
 871                       bindings);
 872       }
 873       tex->key.format = typeless;
 874    }
 875
 876    SVGA_DBG(DEBUG_DMA, "surface_create for texture\n", tex->handle);
 877    tex->handle = svga_screen_surface_create(svgascreen, bindings,
 878                                             tex->b.b.usage, &tex->key);
 879    if (!tex->handle) {
 880       FREE(tex->defined);
 881       FREE(tex->rendered_to);
 882       FREE(tex);
 883       return NULL;
 884    }
 885
 886    SVGA_DBG(DEBUG_DMA, "  --> got sid %p (texture)\n", tex->handle);
 887
 888    debug_reference(&tex->b.b.reference,
 889                    (debug_reference_descriptor)debug_describe_resource, 0);
 890
 891    tex->size = util_resource_size(template);
 892    svgascreen->total_resource_bytes += tex->size;
 893
 894    return &tex->b.b;
 895 }
 896
 897
 898 struct pipe_resource *
 899 svga_texture_from_handle(struct pipe_screen *screen,
 900                          const struct pipe_resource *template,
 901                          struct winsys_handle *whandle)
 902 {
 903    struct svga_winsys_screen *sws = svga_winsys_screen(screen);
 904    struct svga_winsys_surface *srf;
 905    struct svga_texture *tex;
 906    enum SVGA3dSurfaceFormat format = 0;
 907    assert(screen);
 908
 909    /* Only supports one type */
 910    if ((template->target != PIPE_TEXTURE_2D &&
 911        template->target != PIPE_TEXTURE_RECT) ||
 912        template->last_level != 0 ||
 913        template->depth0 != 1) {
 914       return NULL;
 915    }
 916
 917    srf = sws->surface_from_handle(sws, whandle, &format);
 918
 919    if (!srf)
 920       return NULL;
 921
 922    if (svga_translate_format(svga_screen(screen), template->format,
 923                              template->bind) != format) {
 924       unsigned f1 = svga_translate_format(svga_screen(screen),
 925                                           template->format, template->bind);
 926       unsigned f2 = format;
 927
 928       /* It's okay for XRGB and ARGB or depth with/out stencil to get mixed up.
 929        */
 930       if (f1 == SVGA3D_B8G8R8A8_UNORM)
 931          f1 = SVGA3D_A8R8G8B8;
 932       if (f1 == SVGA3D_B8G8R8X8_UNORM)
 933          f1 = SVGA3D_X8R8G8B8;
 934
 935       if ( !( (f1 == f2) ||
 936               (f1 == SVGA3D_X8R8G8B8 && f2 == SVGA3D_A8R8G8B8) ||
 937               (f1 == SVGA3D_X8R8G8B8 && f2 == SVGA3D_B8G8R8X8_UNORM) ||
 938               (f1 == SVGA3D_A8R8G8B8 && f2 == SVGA3D_X8R8G8B8) ||
 939               (f1 == SVGA3D_A8R8G8B8 && f2 == SVGA3D_B8G8R8A8_UNORM) ||
 940               (f1 == SVGA3D_Z_D24X8 && f2 == SVGA3D_Z_D24S8) ||
 941               (f1 == SVGA3D_Z_DF24 && f2 == SVGA3D_Z_D24S8_INT) ) ) {
 942          debug_printf("%s wrong format %s != %s\n", __FUNCTION__,
 943                       svga_format_name(f1), svga_format_name(f2));
 944          return NULL;
 945       }
 946    }
 947
 948    tex = CALLOC_STRUCT(svga_texture);
 949    if (!tex)
 950       return NULL;
 951
 952    tex->defined = CALLOC(template->depth0 * template->array_size,
 953                          sizeof(tex->defined[0]));
 954    if (!tex->defined) {
 955       FREE(tex);
 956       return NULL;
 957    }
 958
 959    tex->b.b = *template;
 960    tex->b.vtbl = &svga_texture_vtbl;
 961    pipe_reference_init(&tex->b.b.reference, 1);
 962    tex->b.b.screen = screen;
 963
 964    SVGA_DBG(DEBUG_DMA, "wrap surface sid %p\n", srf);
 965
 966    tex->key.cachable = 0;
 967    tex->key.format = format;
 968    tex->handle = srf;
 969
 970    tex->rendered_to = CALLOC(1, sizeof(tex->rendered_to[0]));
 971    tex->imported = TRUE;
 972
 973    return &tex->b.b;
 974 }