1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
24 **********************************************************/
28 #include "pipe/p_state.h"
29 #include "pipe/p_defines.h"
30 #include "util/u_inlines.h"
31 #include "os/os_thread.h"
32 #include "util/u_format.h"
33 #include "util/u_math.h"
34 #include "util/u_memory.h"
36 #include "svga_screen.h"
37 #include "svga_context.h"
38 #include "svga_resource_texture.h"
39 #include "svga_resource_buffer.h"
40 #include "svga_sampler_view.h"
41 #include "svga_winsys.h"
42 #include "svga_debug.h"
45 /* XXX: This isn't a real hardware flag, but just a hack for kernel to
46 * know about primary surfaces. Find a better way to accomplish this.
48 #define SVGA3D_SURFACE_HINT_SCANOUT (1 << 9)
52 svga_texture_is_referenced( struct pipe_context
*pipe
,
53 struct pipe_resource
*texture
,
54 unsigned face
, unsigned level
)
56 struct svga_texture
*tex
= svga_texture(texture
);
57 struct svga_screen
*ss
= svga_screen(pipe
->screen
);
60 * The screen does not cache texture writes.
63 if (!tex
->handle
|| ss
->sws
->surface_is_flushed(ss
->sws
, tex
->handle
))
64 return PIPE_UNREFERENCED
;
67 * sws->surface_is_flushed() does not distinguish between read references
68 * and write references. So assume a reference is both.
71 return PIPE_REFERENCED_FOR_READ
| PIPE_REFERENCED_FOR_WRITE
;
77 * Helper function and arrays
81 svga_translate_format(enum pipe_format format
)
85 case PIPE_FORMAT_B8G8R8A8_UNORM
:
86 return SVGA3D_A8R8G8B8
;
87 case PIPE_FORMAT_B8G8R8X8_UNORM
:
88 return SVGA3D_X8R8G8B8
;
90 /* Required for GL2.1:
92 case PIPE_FORMAT_B8G8R8A8_SRGB
:
93 return SVGA3D_A8R8G8B8
;
95 case PIPE_FORMAT_B5G6R5_UNORM
:
97 case PIPE_FORMAT_B5G5R5A1_UNORM
:
98 return SVGA3D_A1R5G5B5
;
99 case PIPE_FORMAT_B4G4R4A4_UNORM
:
100 return SVGA3D_A4R4G4B4
;
103 /* XXX: Doesn't seem to work properly.
104 case PIPE_FORMAT_Z32_UNORM:
107 case PIPE_FORMAT_Z16_UNORM
:
109 case PIPE_FORMAT_S8_USCALED_Z24_UNORM
:
110 return SVGA3D_Z_D24S8
;
111 case PIPE_FORMAT_X8Z24_UNORM
:
112 return SVGA3D_Z_D24X8
;
114 case PIPE_FORMAT_A8_UNORM
:
115 return SVGA3D_ALPHA8
;
116 case PIPE_FORMAT_L8_UNORM
:
117 return SVGA3D_LUMINANCE8
;
119 case PIPE_FORMAT_DXT1_RGB
:
120 case PIPE_FORMAT_DXT1_RGBA
:
122 case PIPE_FORMAT_DXT3_RGBA
:
124 case PIPE_FORMAT_DXT5_RGBA
:
128 return SVGA3D_FORMAT_INVALID
;
134 svga_translate_format_render(enum pipe_format format
)
137 case PIPE_FORMAT_B8G8R8A8_UNORM
:
138 case PIPE_FORMAT_B8G8R8X8_UNORM
:
139 case PIPE_FORMAT_B5G5R5A1_UNORM
:
140 case PIPE_FORMAT_B4G4R4A4_UNORM
:
141 case PIPE_FORMAT_B5G6R5_UNORM
:
142 case PIPE_FORMAT_S8_USCALED_Z24_UNORM
:
143 case PIPE_FORMAT_X8Z24_UNORM
:
144 case PIPE_FORMAT_Z32_UNORM
:
145 case PIPE_FORMAT_Z16_UNORM
:
146 case PIPE_FORMAT_L8_UNORM
:
147 return svga_translate_format(format
);
150 /* For on host conversion */
151 case PIPE_FORMAT_DXT1_RGB
:
152 return SVGA3D_X8R8G8B8
;
153 case PIPE_FORMAT_DXT1_RGBA
:
154 case PIPE_FORMAT_DXT3_RGBA
:
155 case PIPE_FORMAT_DXT5_RGBA
:
156 return SVGA3D_A8R8G8B8
;
160 return SVGA3D_FORMAT_INVALID
;
166 svga_transfer_dma_band(struct svga_transfer
*st
,
167 SVGA3dTransferType transfer
,
168 unsigned y
, unsigned h
, unsigned srcy
)
170 struct svga_texture
*texture
= svga_texture(st
->base
.resource
);
171 struct svga_screen
*screen
= svga_screen(texture
->b
.b
.screen
);
175 SVGA_DBG(DEBUG_DMA
, "dma %s sid %p, face %u, (%u, %u, %u) - (%u, %u, %u), %ubpp\n",
176 transfer
== SVGA3D_WRITE_HOST_VRAM
? "to" : "from",
182 st
->base
.box
.x
+ st
->base
.box
.width
,
185 util_format_get_blocksize(texture
->b
.b
.format
) * 8 /
186 (util_format_get_blockwidth(texture
->b
.b
.format
)*util_format_get_blockheight(texture
->b
.b
.format
)));
188 box
.x
= st
->base
.box
.x
;
190 box
.z
= st
->base
.box
.z
;
191 box
.w
= st
->base
.box
.width
;
198 pipe_mutex_lock(screen
->swc_mutex
);
199 ret
= SVGA3D_SurfaceDMA(screen
->swc
, st
, transfer
, &box
, 1);
201 screen
->swc
->flush(screen
->swc
, NULL
);
202 ret
= SVGA3D_SurfaceDMA(screen
->swc
, st
, transfer
, &box
, 1);
203 assert(ret
== PIPE_OK
);
205 pipe_mutex_unlock(screen
->swc_mutex
);
210 svga_transfer_dma(struct svga_transfer
*st
,
211 SVGA3dTransferType transfer
)
213 struct svga_texture
*texture
= svga_texture(st
->base
.resource
);
214 struct svga_screen
*screen
= svga_screen(texture
->b
.b
.screen
);
215 struct svga_winsys_screen
*sws
= screen
->sws
;
216 struct pipe_fence_handle
*fence
= NULL
;
218 if (transfer
== SVGA3D_READ_HOST_VRAM
) {
219 SVGA_DBG(DEBUG_PERF
, "%s: readback transfer\n", __FUNCTION__
);
224 /* Do the DMA transfer in a single go */
226 svga_transfer_dma_band(st
, transfer
, st
->base
.box
.y
, st
->base
.box
.height
, 0);
228 if(transfer
== SVGA3D_READ_HOST_VRAM
) {
229 svga_screen_flush(screen
, &fence
);
230 sws
->fence_finish(sws
, fence
, 0);
231 sws
->fence_reference(sws
, &fence
, NULL
);
236 unsigned blockheight
= util_format_get_blockheight(st
->base
.resource
->format
);
237 h
= st
->hw_nblocksy
* blockheight
;
239 for(y
= 0; y
< st
->base
.box
.height
; y
+= h
) {
240 unsigned offset
, length
;
243 if (y
+ h
> st
->base
.box
.height
)
244 h
= st
->base
.box
.height
- y
;
246 /* Transfer band must be aligned to pixel block boundaries */
247 assert(y
% blockheight
== 0);
248 assert(h
% blockheight
== 0);
250 offset
= y
* st
->base
.stride
/ blockheight
;
251 length
= h
* st
->base
.stride
/ blockheight
;
253 sw
= (uint8_t *)st
->swbuf
+ offset
;
255 if(transfer
== SVGA3D_WRITE_HOST_VRAM
) {
256 /* Wait for the previous DMAs to complete */
257 /* TODO: keep one DMA (at half the size) in the background */
259 svga_screen_flush(screen
, &fence
);
260 sws
->fence_finish(sws
, fence
, 0);
261 sws
->fence_reference(sws
, &fence
, NULL
);
264 hw
= sws
->buffer_map(sws
, st
->hwbuf
, PIPE_TRANSFER_WRITE
);
267 memcpy(hw
, sw
, length
);
268 sws
->buffer_unmap(sws
, st
->hwbuf
);
272 svga_transfer_dma_band(st
, transfer
, y
, h
, srcy
);
274 if(transfer
== SVGA3D_READ_HOST_VRAM
) {
275 svga_screen_flush(screen
, &fence
);
276 sws
->fence_finish(sws
, fence
, 0);
278 hw
= sws
->buffer_map(sws
, st
->hwbuf
, PIPE_TRANSFER_READ
);
281 memcpy(sw
, hw
, length
);
282 sws
->buffer_unmap(sws
, st
->hwbuf
);
294 svga_texture_get_handle(struct pipe_screen
*screen
,
295 struct pipe_resource
*texture
,
296 struct winsys_handle
*whandle
)
298 struct svga_winsys_screen
*sws
= svga_winsys_screen(texture
->screen
);
301 assert(svga_texture(texture
)->key
.cachable
== 0);
302 svga_texture(texture
)->key
.cachable
= 0;
303 stride
= util_format_get_nblocksx(texture
->format
, texture
->width0
) *
304 util_format_get_blocksize(texture
->format
);
305 return sws
->surface_get_handle(sws
, svga_texture(texture
)->handle
, stride
, whandle
);
310 svga_texture_destroy(struct pipe_screen
*screen
,
311 struct pipe_resource
*pt
)
313 struct svga_screen
*ss
= svga_screen(screen
);
314 struct svga_texture
*tex
= (struct svga_texture
*)pt
;
316 ss
->texture_timestamp
++;
318 svga_sampler_view_reference(&tex
->cached_view
, NULL
);
321 DBG("%s deleting %p\n", __FUNCTION__, (void *) tex);
323 SVGA_DBG(DEBUG_DMA
, "unref sid %p (texture)\n", tex
->handle
);
324 svga_screen_surface_destroy(ss
, &tex
->key
, &tex
->handle
);
335 /* XXX: Still implementing this as if it was a screen function, but
336 * can now modify it to queue transfers on the context.
338 static struct pipe_transfer
*
339 svga_texture_get_transfer(struct pipe_context
*pipe
,
340 struct pipe_resource
*texture
,
341 struct pipe_subresource sr
,
343 const struct pipe_box
*box
)
345 struct svga_screen
*ss
= svga_screen(pipe
->screen
);
346 struct svga_winsys_screen
*sws
= ss
->sws
;
347 struct svga_transfer
*st
;
348 unsigned nblocksx
= util_format_get_nblocksx(texture
->format
, box
->width
);
349 unsigned nblocksy
= util_format_get_nblocksy(texture
->format
, box
->height
);
351 /* We can't map texture storage directly */
352 if (usage
& PIPE_TRANSFER_MAP_DIRECTLY
)
355 st
= CALLOC_STRUCT(svga_transfer
);
359 pipe_resource_reference(&st
->base
.resource
, texture
);
361 st
->base
.usage
= usage
;
363 st
->base
.stride
= nblocksx
*util_format_get_blocksize(texture
->format
);
364 st
->base
.slice_stride
= 0;
366 st
->hw_nblocksy
= nblocksy
;
368 st
->hwbuf
= svga_winsys_buffer_create(ss
,
371 st
->hw_nblocksy
*st
->base
.stride
);
372 while(!st
->hwbuf
&& (st
->hw_nblocksy
/= 2)) {
373 st
->hwbuf
= svga_winsys_buffer_create(ss
,
376 st
->hw_nblocksy
*st
->base
.stride
);
382 if(st
->hw_nblocksy
< nblocksy
) {
383 /* We couldn't allocate a hardware buffer big enough for the transfer,
384 * so allocate regular malloc memory instead */
385 debug_printf("%s: failed to allocate %u KB of DMA, splitting into %u x %u KB DMA transfers\n",
387 (nblocksy
*st
->base
.stride
+ 1023)/1024,
388 (nblocksy
+ st
->hw_nblocksy
- 1)/st
->hw_nblocksy
,
389 (st
->hw_nblocksy
*st
->base
.stride
+ 1023)/1024);
390 st
->swbuf
= MALLOC(nblocksy
*st
->base
.stride
);
395 if (usage
& PIPE_TRANSFER_READ
)
396 svga_transfer_dma(st
, SVGA3D_READ_HOST_VRAM
);
401 sws
->buffer_destroy(sws
, st
->hwbuf
);
408 /* XXX: Still implementing this as if it was a screen function, but
409 * can now modify it to queue transfers on the context.
412 svga_texture_transfer_map( struct pipe_context
*pipe
,
413 struct pipe_transfer
*transfer
)
415 struct svga_screen
*ss
= svga_screen(pipe
->screen
);
416 struct svga_winsys_screen
*sws
= ss
->sws
;
417 struct svga_transfer
*st
= svga_transfer(transfer
);
422 /* The wait for read transfers already happened when svga_transfer_dma
424 return sws
->buffer_map(sws
, st
->hwbuf
, transfer
->usage
);
428 /* XXX: Still implementing this as if it was a screen function, but
429 * can now modify it to queue transfers on the context.
432 svga_texture_transfer_unmap(struct pipe_context
*pipe
,
433 struct pipe_transfer
*transfer
)
435 struct svga_screen
*ss
= svga_screen(pipe
->screen
);
436 struct svga_winsys_screen
*sws
= ss
->sws
;
437 struct svga_transfer
*st
= svga_transfer(transfer
);
440 sws
->buffer_unmap(sws
, st
->hwbuf
);
445 svga_texture_transfer_destroy(struct pipe_context
*pipe
,
446 struct pipe_transfer
*transfer
)
448 struct svga_texture
*tex
= svga_texture(transfer
->resource
);
449 struct svga_screen
*ss
= svga_screen(pipe
->screen
);
450 struct svga_winsys_screen
*sws
= ss
->sws
;
451 struct svga_transfer
*st
= svga_transfer(transfer
);
453 if (st
->base
.usage
& PIPE_TRANSFER_WRITE
) {
454 svga_transfer_dma(st
, SVGA3D_WRITE_HOST_VRAM
);
455 ss
->texture_timestamp
++;
456 tex
->view_age
[transfer
->sr
.level
] = ++(tex
->age
);
457 tex
->defined
[transfer
->sr
.face
][transfer
->sr
.level
] = TRUE
;
460 pipe_resource_reference(&st
->base
.resource
, NULL
);
462 sws
->buffer_destroy(sws
, st
->hwbuf
);
470 struct u_resource_vtbl svga_texture_vtbl
=
472 svga_texture_get_handle
, /* get_handle */
473 svga_texture_destroy
, /* resource_destroy */
474 svga_texture_is_referenced
, /* is_resource_referenced */
475 svga_texture_get_transfer
, /* get_transfer */
476 svga_texture_transfer_destroy
, /* transfer_destroy */
477 svga_texture_transfer_map
, /* transfer_map */
478 u_default_transfer_flush_region
, /* transfer_flush_region */
479 svga_texture_transfer_unmap
, /* transfer_unmap */
480 u_default_transfer_inline_write
/* transfer_inline_write */
486 struct pipe_resource
*
487 svga_texture_create(struct pipe_screen
*screen
,
488 const struct pipe_resource
*template)
490 struct svga_screen
*svgascreen
= svga_screen(screen
);
491 struct svga_texture
*tex
= CALLOC_STRUCT(svga_texture
);
496 tex
->b
.b
= *template;
497 tex
->b
.vtbl
= &svga_texture_vtbl
;
498 pipe_reference_init(&tex
->b
.b
.reference
, 1);
499 tex
->b
.b
.screen
= screen
;
501 assert(template->last_level
< SVGA_MAX_TEXTURE_LEVELS
);
502 if(template->last_level
>= SVGA_MAX_TEXTURE_LEVELS
)
506 tex
->key
.size
.width
= template->width0
;
507 tex
->key
.size
.height
= template->height0
;
508 tex
->key
.size
.depth
= template->depth0
;
510 if(template->target
== PIPE_TEXTURE_CUBE
) {
511 tex
->key
.flags
|= SVGA3D_SURFACE_CUBEMAP
;
512 tex
->key
.numFaces
= 6;
515 tex
->key
.numFaces
= 1;
518 tex
->key
.cachable
= 1;
520 if (template->bind
& PIPE_BIND_SAMPLER_VIEW
)
521 tex
->key
.flags
|= SVGA3D_SURFACE_HINT_TEXTURE
;
523 if (template->bind
& PIPE_BIND_DISPLAY_TARGET
) {
524 tex
->key
.cachable
= 0;
527 if (template->bind
& PIPE_BIND_SHARED
) {
528 tex
->key
.cachable
= 0;
531 if (template->bind
& PIPE_BIND_SCANOUT
) {
532 tex
->key
.flags
|= SVGA3D_SURFACE_HINT_SCANOUT
;
533 tex
->key
.cachable
= 0;
537 * XXX: Never pass the SVGA3D_SURFACE_HINT_RENDERTARGET hint. Mesa cannot
538 * know beforehand whether a texture will be used as a rendertarget or not
539 * and it always requests PIPE_BIND_RENDER_TARGET, therefore
540 * passing the SVGA3D_SURFACE_HINT_RENDERTARGET here defeats its purpose.
543 if((template->bind
& PIPE_BIND_RENDER_TARGET
) &&
544 !util_format_is_s3tc(template->format
))
545 tex
->key
.flags
|= SVGA3D_SURFACE_HINT_RENDERTARGET
;
548 if(template->bind
& PIPE_BIND_DEPTH_STENCIL
)
549 tex
->key
.flags
|= SVGA3D_SURFACE_HINT_DEPTHSTENCIL
;
551 tex
->key
.numMipLevels
= template->last_level
+ 1;
553 tex
->key
.format
= svga_translate_format(template->format
);
554 if(tex
->key
.format
== SVGA3D_FORMAT_INVALID
)
557 SVGA_DBG(DEBUG_DMA
, "surface_create for texture\n", tex
->handle
);
558 tex
->handle
= svga_screen_surface_create(svgascreen
, &tex
->key
);
560 SVGA_DBG(DEBUG_DMA
, " --> got sid %p (texture)\n", tex
->handle
);
573 struct pipe_resource
*
574 svga_texture_from_handle(struct pipe_screen
*screen
,
575 const struct pipe_resource
*template,
576 struct winsys_handle
*whandle
)
578 struct svga_winsys_screen
*sws
= svga_winsys_screen(screen
);
579 struct svga_winsys_surface
*srf
;
580 struct svga_texture
*tex
;
581 enum SVGA3dSurfaceFormat format
= 0;
584 /* Only supports one type */
585 if (template->target
!= PIPE_TEXTURE_2D
||
586 template->last_level
!= 0 ||
587 template->depth0
!= 1) {
591 srf
= sws
->surface_from_handle(sws
, whandle
, &format
);
596 if (svga_translate_format(template->format
) != format
) {
597 unsigned f1
= svga_translate_format(template->format
);
598 unsigned f2
= format
;
600 /* It's okay for XRGB and ARGB or depth with/out stencil to get mixed up */
601 if ( !( (f1
== SVGA3D_X8R8G8B8
&& f2
== SVGA3D_A8R8G8B8
) ||
602 (f1
== SVGA3D_A8R8G8B8
&& f2
== SVGA3D_X8R8G8B8
) ||
603 (f1
== SVGA3D_Z_D24X8
&& f2
== SVGA3D_Z_D24S8
) ) ) {
604 debug_printf("%s wrong format %u != %u\n", __FUNCTION__
, f1
, f2
);
609 tex
= CALLOC_STRUCT(svga_texture
);
613 tex
->b
.b
= *template;
614 tex
->b
.vtbl
= &svga_texture_vtbl
;
615 pipe_reference_init(&tex
->b
.b
.reference
, 1);
616 tex
->b
.b
.screen
= screen
;
618 if (format
== SVGA3D_X8R8G8B8
)
619 tex
->b
.b
.format
= PIPE_FORMAT_B8G8R8X8_UNORM
;
620 else if (format
== SVGA3D_A8R8G8B8
)
621 tex
->b
.b
.format
= PIPE_FORMAT_B8G8R8A8_UNORM
;
626 SVGA_DBG(DEBUG_DMA
, "wrap surface sid %p\n", srf
);
628 tex
->key
.cachable
= 0;