1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
24 **********************************************************/
26 #include "svga3d_reg.h"
27 #include "svga3d_surfacedefs.h"
29 #include "pipe/p_state.h"
30 #include "pipe/p_defines.h"
31 #include "os/os_thread.h"
32 #include "util/u_format.h"
33 #include "util/u_inlines.h"
34 #include "util/u_math.h"
35 #include "util/u_memory.h"
36 #include "util/u_resource.h"
37 #include "util/u_upload_mgr.h"
40 #include "svga_format.h"
41 #include "svga_screen.h"
42 #include "svga_context.h"
43 #include "svga_resource_texture.h"
44 #include "svga_resource_buffer.h"
45 #include "svga_sampler_view.h"
46 #include "svga_winsys.h"
47 #include "svga_debug.h"
51 svga_transfer_dma_band(struct svga_context
*svga
,
52 struct svga_transfer
*st
,
53 SVGA3dTransferType transfer
,
54 unsigned x
, unsigned y
, unsigned z
,
55 unsigned w
, unsigned h
, unsigned d
,
56 unsigned srcx
, unsigned srcy
, unsigned srcz
,
57 SVGA3dSurfaceDMAFlags flags
)
59 struct svga_texture
*texture
= svga_texture(st
->base
.resource
);
63 assert(!st
->use_direct_map
);
75 SVGA_DBG(DEBUG_DMA
, "dma %s sid %p, face %u, (%u, %u, %u) - "
76 "(%u, %u, %u), %ubpp\n",
77 transfer
== SVGA3D_WRITE_HOST_VRAM
? "to" : "from",
86 util_format_get_blocksize(texture
->b
.b
.format
) * 8 /
87 (util_format_get_blockwidth(texture
->b
.b
.format
)
88 * util_format_get_blockheight(texture
->b
.b
.format
)));
90 ret
= SVGA3D_SurfaceDMA(svga
->swc
, st
, transfer
, &box
, 1, flags
);
92 svga_context_flush(svga
, NULL
);
93 ret
= SVGA3D_SurfaceDMA(svga
->swc
, st
, transfer
, &box
, 1, flags
);
94 assert(ret
== PIPE_OK
);
100 svga_transfer_dma(struct svga_context
*svga
,
101 struct svga_transfer
*st
,
102 SVGA3dTransferType transfer
,
103 SVGA3dSurfaceDMAFlags flags
)
105 struct svga_texture
*texture
= svga_texture(st
->base
.resource
);
106 struct svga_screen
*screen
= svga_screen(texture
->b
.b
.screen
);
107 struct svga_winsys_screen
*sws
= screen
->sws
;
108 struct pipe_fence_handle
*fence
= NULL
;
110 assert(!st
->use_direct_map
);
112 if (transfer
== SVGA3D_READ_HOST_VRAM
) {
113 SVGA_DBG(DEBUG_PERF
, "%s: readback transfer\n", __FUNCTION__
);
116 /* Ensure any pending operations on host surfaces are queued on the command
119 svga_surfaces_flush( svga
);
122 /* Do the DMA transfer in a single go */
123 svga_transfer_dma_band(svga
, st
, transfer
,
124 st
->base
.box
.x
, st
->base
.box
.y
, st
->base
.box
.z
,
125 st
->base
.box
.width
, st
->base
.box
.height
, st
->base
.box
.depth
,
129 if (transfer
== SVGA3D_READ_HOST_VRAM
) {
130 svga_context_flush(svga
, &fence
);
131 sws
->fence_finish(sws
, fence
, 0);
132 sws
->fence_reference(sws
, &fence
, NULL
);
137 unsigned blockheight
=
138 util_format_get_blockheight(st
->base
.resource
->format
);
140 h
= st
->hw_nblocksy
* blockheight
;
143 for (y
= 0; y
< st
->base
.box
.height
; y
+= h
) {
144 unsigned offset
, length
;
147 if (y
+ h
> st
->base
.box
.height
)
148 h
= st
->base
.box
.height
- y
;
150 /* Transfer band must be aligned to pixel block boundaries */
151 assert(y
% blockheight
== 0);
152 assert(h
% blockheight
== 0);
154 offset
= y
* st
->base
.stride
/ blockheight
;
155 length
= h
* st
->base
.stride
/ blockheight
;
157 sw
= (uint8_t *) st
->swbuf
+ offset
;
159 if (transfer
== SVGA3D_WRITE_HOST_VRAM
) {
160 unsigned usage
= PIPE_TRANSFER_WRITE
;
162 /* Wait for the previous DMAs to complete */
163 /* TODO: keep one DMA (at half the size) in the background */
165 svga_context_flush(svga
, NULL
);
166 usage
|= PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE
;
169 hw
= sws
->buffer_map(sws
, st
->hwbuf
, usage
);
172 memcpy(hw
, sw
, length
);
173 sws
->buffer_unmap(sws
, st
->hwbuf
);
177 svga_transfer_dma_band(svga
, st
, transfer
,
178 st
->base
.box
.x
, y
, st
->base
.box
.z
,
179 st
->base
.box
.width
, h
, st
->base
.box
.depth
,
183 * Prevent the texture contents to be discarded on the next band
186 flags
.discard
= FALSE
;
188 if (transfer
== SVGA3D_READ_HOST_VRAM
) {
189 svga_context_flush(svga
, &fence
);
190 sws
->fence_finish(sws
, fence
, 0);
192 hw
= sws
->buffer_map(sws
, st
->hwbuf
, PIPE_TRANSFER_READ
);
195 memcpy(sw
, hw
, length
);
196 sws
->buffer_unmap(sws
, st
->hwbuf
);
206 svga_texture_get_handle(struct pipe_screen
*screen
,
207 struct pipe_resource
*texture
,
208 struct winsys_handle
*whandle
)
210 struct svga_winsys_screen
*sws
= svga_winsys_screen(texture
->screen
);
213 assert(svga_texture(texture
)->key
.cachable
== 0);
214 svga_texture(texture
)->key
.cachable
= 0;
216 stride
= util_format_get_nblocksx(texture
->format
, texture
->width0
) *
217 util_format_get_blocksize(texture
->format
);
219 return sws
->surface_get_handle(sws
, svga_texture(texture
)->handle
,
225 svga_texture_destroy(struct pipe_screen
*screen
,
226 struct pipe_resource
*pt
)
228 struct svga_screen
*ss
= svga_screen(screen
);
229 struct svga_texture
*tex
= svga_texture(pt
);
231 ss
->texture_timestamp
++;
233 svga_sampler_view_reference(&tex
->cached_view
, NULL
);
236 DBG("%s deleting %p\n", __FUNCTION__, (void *) tex);
238 SVGA_DBG(DEBUG_DMA
, "unref sid %p (texture)\n", tex
->handle
);
239 svga_screen_surface_destroy(ss
, &tex
->key
, &tex
->handle
);
241 /* Destroy the backed surface handle if exists */
242 if (tex
->backed_handle
)
243 svga_screen_surface_destroy(ss
, &tex
->backed_key
, &tex
->backed_handle
);
245 ss
->hud
.total_resource_bytes
-= tex
->size
;
248 FREE(tex
->rendered_to
);
252 assert(ss
->hud
.num_resources
> 0);
253 if (ss
->hud
.num_resources
> 0)
254 ss
->hud
.num_resources
--;
259 * Determine if the resource was rendered to
261 static inline boolean
262 was_tex_rendered_to(struct pipe_resource
*resource
,
263 const struct pipe_transfer
*transfer
)
267 if (resource
->target
== PIPE_TEXTURE_CUBE
) {
268 assert(transfer
->box
.depth
== 1);
269 face
= transfer
->box
.z
;
275 return svga_was_texture_rendered_to(svga_texture(resource
),
276 face
, transfer
->level
);
281 * Determine if we need to read back a texture image before mapping it.
283 static inline boolean
284 need_tex_readback(struct pipe_transfer
*transfer
)
286 if (transfer
->usage
& PIPE_TRANSFER_READ
)
289 if ((transfer
->usage
& PIPE_TRANSFER_WRITE
) &&
290 ((transfer
->usage
& PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE
) == 0)) {
291 return was_tex_rendered_to(transfer
->resource
, transfer
);
298 static enum pipe_error
299 readback_image_vgpu9(struct svga_context
*svga
,
300 struct svga_winsys_surface
*surf
,
306 ret
= SVGA3D_ReadbackGBImage(svga
->swc
, surf
, slice
, level
);
307 if (ret
!= PIPE_OK
) {
308 svga_context_flush(svga
, NULL
);
309 ret
= SVGA3D_ReadbackGBImage(svga
->swc
, surf
, slice
, level
);
315 static enum pipe_error
316 readback_image_vgpu10(struct svga_context
*svga
,
317 struct svga_winsys_surface
*surf
,
320 unsigned numMipLevels
)
323 unsigned subResource
;
325 subResource
= slice
* numMipLevels
+ level
;
326 ret
= SVGA3D_vgpu10_ReadbackSubResource(svga
->swc
, surf
, subResource
);
327 if (ret
!= PIPE_OK
) {
328 svga_context_flush(svga
, NULL
);
329 ret
= SVGA3D_vgpu10_ReadbackSubResource(svga
->swc
, surf
, subResource
);
336 * Use DMA for the transfer request
339 svga_texture_transfer_map_dma(struct svga_context
*svga
,
340 struct svga_transfer
*st
)
342 struct svga_winsys_screen
*sws
= svga_screen(svga
->pipe
.screen
)->sws
;
343 struct pipe_resource
*texture
= st
->base
.resource
;
344 unsigned nblocksx
, nblocksy
;
346 unsigned usage
= st
->base
.usage
;
348 /* we'll put the data into a tightly packed buffer */
349 nblocksx
= util_format_get_nblocksx(texture
->format
, st
->base
.box
.width
);
350 nblocksy
= util_format_get_nblocksy(texture
->format
, st
->base
.box
.height
);
351 d
= st
->base
.box
.depth
;
353 st
->base
.stride
= nblocksx
*util_format_get_blocksize(texture
->format
);
354 st
->base
.layer_stride
= st
->base
.stride
* nblocksy
;
355 st
->hw_nblocksy
= nblocksy
;
357 st
->hwbuf
= svga_winsys_buffer_create(svga
, 1, 0,
358 st
->hw_nblocksy
* st
->base
.stride
* d
);
360 while (!st
->hwbuf
&& (st
->hw_nblocksy
/= 2)) {
362 svga_winsys_buffer_create(svga
, 1, 0,
363 st
->hw_nblocksy
* st
->base
.stride
* d
);
369 if (st
->hw_nblocksy
< nblocksy
) {
370 /* We couldn't allocate a hardware buffer big enough for the transfer,
371 * so allocate regular malloc memory instead
374 debug_printf("%s: failed to allocate %u KB of DMA, "
375 "splitting into %u x %u KB DMA transfers\n",
377 (nblocksy
* st
->base
.stride
+ 1023) / 1024,
378 (nblocksy
+ st
->hw_nblocksy
- 1) / st
->hw_nblocksy
,
379 (st
->hw_nblocksy
* st
->base
.stride
+ 1023) / 1024);
382 st
->swbuf
= MALLOC(nblocksy
* st
->base
.stride
* d
);
384 sws
->buffer_destroy(sws
, st
->hwbuf
);
389 if (usage
& PIPE_TRANSFER_READ
) {
390 SVGA3dSurfaceDMAFlags flags
;
391 memset(&flags
, 0, sizeof flags
);
392 svga_transfer_dma(svga
, st
, SVGA3D_READ_HOST_VRAM
, flags
);
399 return sws
->buffer_map(sws
, st
->hwbuf
, usage
);
405 * Use direct map for the transfer request
408 svga_texture_transfer_map_direct(struct svga_context
*svga
,
409 struct svga_transfer
*st
)
411 struct svga_winsys_screen
*sws
= svga_screen(svga
->pipe
.screen
)->sws
;
412 struct pipe_transfer
*transfer
= &st
->base
;
413 struct pipe_resource
*texture
= transfer
->resource
;
414 struct svga_texture
*tex
= svga_texture(texture
);
415 struct svga_winsys_surface
*surf
= tex
->handle
;
416 unsigned level
= st
->base
.level
;
417 unsigned w
, h
, nblocksx
, nblocksy
, i
;
418 unsigned usage
= st
->base
.usage
;
420 if (need_tex_readback(transfer
)) {
423 svga_surfaces_flush(svga
);
425 for (i
= 0; i
< st
->base
.box
.depth
; i
++) {
426 if (svga_have_vgpu10(svga
)) {
427 ret
= readback_image_vgpu10(svga
, surf
, st
->slice
+ i
, level
,
428 tex
->b
.b
.last_level
+ 1);
430 ret
= readback_image_vgpu9(svga
, surf
, st
->slice
+ i
, level
);
433 svga
->hud
.num_readbacks
++;
434 SVGA_STATS_COUNT_INC(sws
, SVGA_STATS_COUNT_TEXREADBACK
);
436 assert(ret
== PIPE_OK
);
439 svga_context_flush(svga
, NULL
);
441 * Note: if PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE were specified
442 * we could potentially clear the flag for all faces/layers/mips.
444 svga_clear_texture_rendered_to(tex
, st
->slice
, level
);
447 assert(usage
& PIPE_TRANSFER_WRITE
);
448 if ((usage
& PIPE_TRANSFER_UNSYNCHRONIZED
) == 0) {
449 if (svga_is_texture_dirty(tex
, st
->slice
, level
)) {
451 * do a surface flush if the subresource has been modified
452 * in this command buffer.
454 svga_surfaces_flush(svga
);
455 if (!sws
->surface_is_flushed(sws
, surf
)) {
456 svga
->hud
.surface_write_flushes
++;
457 SVGA_STATS_COUNT_INC(sws
, SVGA_STATS_COUNT_SURFACEWRITEFLUSH
);
458 svga_context_flush(svga
, NULL
);
464 /* we'll directly access the guest-backed surface */
465 w
= u_minify(texture
->width0
, level
);
466 h
= u_minify(texture
->height0
, level
);
467 nblocksx
= util_format_get_nblocksx(texture
->format
, w
);
468 nblocksy
= util_format_get_nblocksy(texture
->format
, h
);
469 st
->hw_nblocksy
= nblocksy
;
470 st
->base
.stride
= nblocksx
*util_format_get_blocksize(texture
->format
);
471 st
->base
.layer_stride
= st
->base
.stride
* nblocksy
;
477 SVGA3dSize baseLevelSize
;
480 unsigned offset
, mip_width
, mip_height
;
482 map
= svga
->swc
->surface_map(svga
->swc
, surf
, usage
, &retry
);
483 if (map
== NULL
&& retry
) {
485 * At this point, the svga_surfaces_flush() should already have
486 * called in svga_texture_get_transfer().
488 svga
->hud
.surface_write_flushes
++;
489 svga_context_flush(svga
, NULL
);
490 map
= svga
->swc
->surface_map(svga
->swc
, surf
, usage
, &retry
);
494 * Make sure we return NULL if the map fails
501 * Compute the offset to the specific texture slice in the buffer.
503 baseLevelSize
.width
= tex
->b
.b
.width0
;
504 baseLevelSize
.height
= tex
->b
.b
.height0
;
505 baseLevelSize
.depth
= tex
->b
.b
.depth0
;
507 if ((tex
->b
.b
.target
== PIPE_TEXTURE_1D_ARRAY
) ||
508 (tex
->b
.b
.target
== PIPE_TEXTURE_2D_ARRAY
)) {
509 st
->base
.layer_stride
=
510 svga3dsurface_get_image_offset(tex
->key
.format
, baseLevelSize
,
511 tex
->b
.b
.last_level
+ 1, 1, 0);
514 offset
= svga3dsurface_get_image_offset(tex
->key
.format
, baseLevelSize
,
515 tex
->b
.b
.last_level
+ 1, /* numMips */
521 mip_width
= u_minify(tex
->b
.b
.width0
, level
);
522 mip_height
= u_minify(tex
->b
.b
.height0
, level
);
524 offset
+= svga3dsurface_get_pixel_offset(tex
->key
.format
,
525 mip_width
, mip_height
,
529 return (void *) (map
+ offset
);
535 * Request a transfer map to the texture resource
538 svga_texture_transfer_map(struct pipe_context
*pipe
,
539 struct pipe_resource
*texture
,
542 const struct pipe_box
*box
,
543 struct pipe_transfer
**ptransfer
)
545 struct svga_context
*svga
= svga_context(pipe
);
546 struct svga_winsys_screen
*sws
= svga_screen(pipe
->screen
)->sws
;
547 struct svga_texture
*tex
= svga_texture(texture
);
548 struct svga_transfer
*st
;
549 struct svga_winsys_surface
*surf
= tex
->handle
;
550 boolean use_direct_map
= svga_have_gb_objects(svga
) &&
551 !svga_have_gb_dma(svga
);
553 int64_t begin
= svga_get_time(svga
);
555 SVGA_STATS_TIME_PUSH(sws
, SVGA_STATS_TIME_TEXTRANSFERMAP
);
560 /* We can't map texture storage directly unless we have GB objects */
561 if (usage
& PIPE_TRANSFER_MAP_DIRECTLY
) {
562 if (svga_have_gb_objects(svga
))
563 use_direct_map
= TRUE
;
568 st
= CALLOC_STRUCT(svga_transfer
);
572 st
->base
.level
= level
;
573 st
->base
.usage
= usage
;
576 switch (tex
->b
.b
.target
) {
577 case PIPE_TEXTURE_CUBE
:
578 st
->slice
= st
->base
.box
.z
;
579 st
->base
.box
.z
= 0; /* so we don't apply double offsets below */
581 case PIPE_TEXTURE_2D_ARRAY
:
582 case PIPE_TEXTURE_1D_ARRAY
:
583 st
->slice
= st
->base
.box
.z
;
584 st
->base
.box
.z
= 0; /* so we don't apply double offsets below */
586 /* Force direct map for transfering multiple slices */
587 if (st
->base
.box
.depth
> 1)
588 use_direct_map
= svga_have_gb_objects(svga
);
596 st
->use_direct_map
= use_direct_map
;
597 pipe_resource_reference(&st
->base
.resource
, texture
);
599 /* If this is the first time mapping to the surface in this
600 * command buffer, clear the dirty masks of this surface.
602 if (sws
->surface_is_flushed(sws
, surf
)) {
603 svga_clear_texture_dirty(tex
);
606 if (!use_direct_map
) {
607 /* upload to the DMA buffer */
608 map
= svga_texture_transfer_map_dma(svga
, st
);
611 boolean can_use_upload
= tex
->can_use_upload
&&
612 !(st
->base
.usage
& PIPE_TRANSFER_READ
);
613 boolean was_rendered_to
= was_tex_rendered_to(texture
, &st
->base
);
615 /* If the texture was already rendered to and upload buffer
616 * is supported, then we will use upload buffer to
617 * avoid the need to read back the texture content; otherwise,
618 * we'll first try to map directly to the GB surface, if it is blocked,
619 * then we'll try the upload buffer.
621 if (was_rendered_to
&& can_use_upload
) {
622 map
= svga_texture_transfer_map_upload(svga
, st
);
625 unsigned orig_usage
= st
->base
.usage
;
627 /* First try directly map to the GB surface */
629 st
->base
.usage
|= PIPE_TRANSFER_DONTBLOCK
;
630 map
= svga_texture_transfer_map_direct(svga
, st
);
631 st
->base
.usage
= orig_usage
;
633 if (!map
&& can_use_upload
) {
634 /* if direct map with DONTBLOCK fails, then try upload to the
635 * texture upload buffer.
637 map
= svga_texture_transfer_map_upload(svga
, st
);
641 /* If upload fails, then try direct map again without forcing it
645 map
= svga_texture_transfer_map_direct(svga
, st
);
653 *ptransfer
= &st
->base
;
654 svga
->hud
.num_textures_mapped
++;
655 if (usage
& PIPE_TRANSFER_WRITE
) {
656 /* record texture upload for HUD */
657 svga
->hud
.num_bytes_uploaded
+=
658 st
->base
.layer_stride
* st
->base
.box
.depth
;
660 /* mark this texture level as dirty */
661 svga_set_texture_dirty(tex
, st
->slice
, level
);
666 svga
->hud
.map_buffer_time
+= (svga_get_time(svga
) - begin
);
667 SVGA_STATS_TIME_POP(sws
);
674 * Unmap a GB texture surface.
677 svga_texture_surface_unmap(struct svga_context
*svga
,
678 struct pipe_transfer
*transfer
)
680 struct svga_winsys_surface
*surf
= svga_texture(transfer
->resource
)->handle
;
681 struct svga_winsys_context
*swc
= svga
->swc
;
686 swc
->surface_unmap(swc
, surf
, &rebind
);
689 ret
= SVGA3D_BindGBSurface(swc
, surf
);
690 if (ret
!= PIPE_OK
) {
691 /* flush and retry */
692 svga_context_flush(svga
, NULL
);
693 ret
= SVGA3D_BindGBSurface(swc
, surf
);
694 assert(ret
== PIPE_OK
);
700 static enum pipe_error
701 update_image_vgpu9(struct svga_context
*svga
,
702 struct svga_winsys_surface
*surf
,
703 const SVGA3dBox
*box
,
709 ret
= SVGA3D_UpdateGBImage(svga
->swc
, surf
, box
, slice
, level
);
710 if (ret
!= PIPE_OK
) {
711 svga_context_flush(svga
, NULL
);
712 ret
= SVGA3D_UpdateGBImage(svga
->swc
, surf
, box
, slice
, level
);
718 static enum pipe_error
719 update_image_vgpu10(struct svga_context
*svga
,
720 struct svga_winsys_surface
*surf
,
721 const SVGA3dBox
*box
,
724 unsigned numMipLevels
)
727 unsigned subResource
;
729 subResource
= slice
* numMipLevels
+ level
;
730 ret
= SVGA3D_vgpu10_UpdateSubResource(svga
->swc
, surf
, box
, subResource
);
731 if (ret
!= PIPE_OK
) {
732 svga_context_flush(svga
, NULL
);
733 ret
= SVGA3D_vgpu10_UpdateSubResource(svga
->swc
, surf
, box
, subResource
);
740 * unmap DMA transfer request
743 svga_texture_transfer_unmap_dma(struct svga_context
*svga
,
744 struct svga_transfer
*st
)
746 struct svga_winsys_screen
*sws
= svga_screen(svga
->pipe
.screen
)->sws
;
749 sws
->buffer_unmap(sws
, st
->hwbuf
);
751 if (st
->base
.usage
& PIPE_TRANSFER_WRITE
) {
752 /* Use DMA to transfer texture data */
753 SVGA3dSurfaceDMAFlags flags
;
755 memset(&flags
, 0, sizeof flags
);
756 if (st
->base
.usage
& PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE
) {
757 flags
.discard
= TRUE
;
759 if (st
->base
.usage
& PIPE_TRANSFER_UNSYNCHRONIZED
) {
760 flags
.unsynchronized
= TRUE
;
763 svga_transfer_dma(svga
, st
, SVGA3D_WRITE_HOST_VRAM
, flags
);
767 sws
->buffer_destroy(sws
, st
->hwbuf
);
772 * unmap direct map transfer request
775 svga_texture_transfer_unmap_direct(struct svga_context
*svga
,
776 struct svga_transfer
*st
)
778 struct pipe_transfer
*transfer
= &st
->base
;
779 struct svga_texture
*tex
= svga_texture(transfer
->resource
);
781 svga_texture_surface_unmap(svga
, transfer
);
783 /* Now send an update command to update the content in the backend. */
784 if (st
->base
.usage
& PIPE_TRANSFER_WRITE
) {
785 struct svga_winsys_surface
*surf
= tex
->handle
;
788 unsigned nlayers
= 1;
790 assert(svga_have_gb_objects(svga
));
792 /* update the effected region */
793 box
.x
= transfer
->box
.x
;
794 box
.y
= transfer
->box
.y
;
795 box
.w
= transfer
->box
.width
;
796 box
.h
= transfer
->box
.height
;
797 box
.d
= transfer
->box
.depth
;
799 switch (tex
->b
.b
.target
) {
800 case PIPE_TEXTURE_CUBE
:
803 case PIPE_TEXTURE_2D_ARRAY
:
808 case PIPE_TEXTURE_1D_ARRAY
:
814 box
.z
= transfer
->box
.z
;
819 debug_printf("%s %d, %d, %d %d x %d x %d\n",
822 box
.w
, box
.h
, box
.d
);
824 if (svga_have_vgpu10(svga
)) {
826 for (i
= 0; i
< nlayers
; i
++) {
827 ret
= update_image_vgpu10(svga
, surf
, &box
,
828 st
->slice
+ i
, transfer
->level
,
829 tex
->b
.b
.last_level
+ 1);
830 assert(ret
== PIPE_OK
);
833 assert(nlayers
== 1);
834 ret
= update_image_vgpu9(svga
, surf
, &box
, st
->slice
, transfer
->level
);
835 assert(ret
== PIPE_OK
);
842 svga_texture_transfer_unmap(struct pipe_context
*pipe
,
843 struct pipe_transfer
*transfer
)
845 struct svga_context
*svga
= svga_context(pipe
);
846 struct svga_screen
*ss
= svga_screen(pipe
->screen
);
847 struct svga_winsys_screen
*sws
= ss
->sws
;
848 struct svga_transfer
*st
= svga_transfer(transfer
);
849 struct svga_texture
*tex
= svga_texture(transfer
->resource
);
851 SVGA_STATS_TIME_PUSH(sws
, SVGA_STATS_TIME_TEXTRANSFERUNMAP
);
853 if (!st
->use_direct_map
) {
854 svga_texture_transfer_unmap_dma(svga
, st
);
856 else if (st
->upload
.buf
) {
857 svga_texture_transfer_unmap_upload(svga
, st
);
860 svga_texture_transfer_unmap_direct(svga
, st
);
863 if (st
->base
.usage
& PIPE_TRANSFER_WRITE
) {
864 svga
->hud
.num_resource_updates
++;
866 /* Mark the texture level as dirty */
867 ss
->texture_timestamp
++;
868 svga_age_texture_view(tex
, transfer
->level
);
869 if (transfer
->resource
->target
== PIPE_TEXTURE_CUBE
)
870 svga_define_texture_level(tex
, st
->slice
, transfer
->level
);
872 svga_define_texture_level(tex
, 0, transfer
->level
);
875 pipe_resource_reference(&st
->base
.resource
, NULL
);
877 SVGA_STATS_TIME_POP(sws
);
883 * Does format store depth values?
885 static inline boolean
886 format_has_depth(enum pipe_format format
)
888 const struct util_format_description
*desc
= util_format_description(format
);
889 return util_format_has_depth(desc
);
893 struct u_resource_vtbl svga_texture_vtbl
=
895 svga_texture_get_handle
, /* get_handle */
896 svga_texture_destroy
, /* resource_destroy */
897 svga_texture_transfer_map
, /* transfer_map */
898 u_default_transfer_flush_region
, /* transfer_flush_region */
899 svga_texture_transfer_unmap
, /* transfer_unmap */
903 struct pipe_resource
*
904 svga_texture_create(struct pipe_screen
*screen
,
905 const struct pipe_resource
*template)
907 struct svga_screen
*svgascreen
= svga_screen(screen
);
908 struct svga_texture
*tex
;
909 unsigned bindings
= template->bind
;
911 SVGA_STATS_TIME_PUSH(svgascreen
->sws
,
912 SVGA_STATS_TIME_CREATETEXTURE
);
914 assert(template->last_level
< SVGA_MAX_TEXTURE_LEVELS
);
915 if (template->last_level
>= SVGA_MAX_TEXTURE_LEVELS
) {
919 tex
= CALLOC_STRUCT(svga_texture
);
924 tex
->defined
= CALLOC(template->depth0
* template->array_size
,
925 sizeof(tex
->defined
[0]));
931 tex
->rendered_to
= CALLOC(template->depth0
* template->array_size
,
932 sizeof(tex
->rendered_to
[0]));
933 if (!tex
->rendered_to
) {
937 tex
->dirty
= CALLOC(template->depth0
* template->array_size
,
938 sizeof(tex
->dirty
[0]));
943 tex
->b
.b
= *template;
944 tex
->b
.vtbl
= &svga_texture_vtbl
;
945 pipe_reference_init(&tex
->b
.b
.reference
, 1);
946 tex
->b
.b
.screen
= screen
;
949 tex
->key
.size
.width
= template->width0
;
950 tex
->key
.size
.height
= template->height0
;
951 tex
->key
.size
.depth
= template->depth0
;
952 tex
->key
.arraySize
= 1;
953 tex
->key
.numFaces
= 1;
955 /* single sample texture can be treated as non-multisamples texture */
956 tex
->key
.sampleCount
= template->nr_samples
> 1 ? template->nr_samples
: 0;
958 if (template->nr_samples
> 1) {
959 tex
->key
.flags
|= SVGA3D_SURFACE_MASKABLE_ANTIALIAS
;
962 if (svgascreen
->sws
->have_vgpu10
) {
963 switch (template->target
) {
964 case PIPE_TEXTURE_1D
:
965 tex
->key
.flags
|= SVGA3D_SURFACE_1D
;
967 case PIPE_TEXTURE_1D_ARRAY
:
968 tex
->key
.flags
|= SVGA3D_SURFACE_1D
;
970 case PIPE_TEXTURE_2D_ARRAY
:
971 tex
->key
.flags
|= SVGA3D_SURFACE_ARRAY
;
972 tex
->key
.arraySize
= template->array_size
;
974 case PIPE_TEXTURE_3D
:
975 tex
->key
.flags
|= SVGA3D_SURFACE_VOLUME
;
977 case PIPE_TEXTURE_CUBE
:
978 tex
->key
.flags
|= (SVGA3D_SURFACE_CUBEMAP
| SVGA3D_SURFACE_ARRAY
);
979 tex
->key
.numFaces
= 6;
986 switch (template->target
) {
987 case PIPE_TEXTURE_3D
:
988 tex
->key
.flags
|= SVGA3D_SURFACE_VOLUME
;
990 case PIPE_TEXTURE_CUBE
:
991 tex
->key
.flags
|= SVGA3D_SURFACE_CUBEMAP
;
992 tex
->key
.numFaces
= 6;
999 tex
->key
.cachable
= 1;
1001 if ((bindings
& (PIPE_BIND_RENDER_TARGET
| PIPE_BIND_DEPTH_STENCIL
)) &&
1002 !(bindings
& PIPE_BIND_SAMPLER_VIEW
)) {
1003 /* Also check if the format can be sampled from */
1004 if (screen
->is_format_supported(screen
, template->format
,
1006 template->nr_samples
,
1007 PIPE_BIND_SAMPLER_VIEW
)) {
1008 bindings
|= PIPE_BIND_SAMPLER_VIEW
;
1012 if (bindings
& PIPE_BIND_SAMPLER_VIEW
) {
1013 tex
->key
.flags
|= SVGA3D_SURFACE_HINT_TEXTURE
;
1014 tex
->key
.flags
|= SVGA3D_SURFACE_BIND_SHADER_RESOURCE
;
1016 if (!(bindings
& PIPE_BIND_RENDER_TARGET
)) {
1017 /* Also check if the format is color renderable */
1018 if (screen
->is_format_supported(screen
, template->format
,
1020 template->nr_samples
,
1021 PIPE_BIND_RENDER_TARGET
)) {
1022 bindings
|= PIPE_BIND_RENDER_TARGET
;
1026 if (!(bindings
& PIPE_BIND_DEPTH_STENCIL
)) {
1027 /* Also check if the format is depth/stencil renderable */
1028 if (screen
->is_format_supported(screen
, template->format
,
1030 template->nr_samples
,
1031 PIPE_BIND_DEPTH_STENCIL
)) {
1032 bindings
|= PIPE_BIND_DEPTH_STENCIL
;
1037 if (bindings
& PIPE_BIND_DISPLAY_TARGET
) {
1038 tex
->key
.cachable
= 0;
1041 if (bindings
& PIPE_BIND_SHARED
) {
1042 tex
->key
.cachable
= 0;
1045 if (bindings
& (PIPE_BIND_SCANOUT
| PIPE_BIND_CURSOR
)) {
1046 tex
->key
.scanout
= 1;
1047 tex
->key
.cachable
= 0;
1051 * Note: Previously we never passed the
1052 * SVGA3D_SURFACE_HINT_RENDERTARGET hint. Mesa cannot
1053 * know beforehand whether a texture will be used as a rendertarget or not
1054 * and it always requests PIPE_BIND_RENDER_TARGET, therefore
1055 * passing the SVGA3D_SURFACE_HINT_RENDERTARGET here defeats its purpose.
1057 * However, this was changed since other state trackers
1058 * (XA for example) uses it accurately and certain device versions
1059 * relies on it in certain situations to render correctly.
1061 if ((bindings
& PIPE_BIND_RENDER_TARGET
) &&
1062 !util_format_is_s3tc(template->format
)) {
1063 tex
->key
.flags
|= SVGA3D_SURFACE_HINT_RENDERTARGET
;
1064 tex
->key
.flags
|= SVGA3D_SURFACE_BIND_RENDER_TARGET
;
1067 if (bindings
& PIPE_BIND_DEPTH_STENCIL
) {
1068 tex
->key
.flags
|= SVGA3D_SURFACE_HINT_DEPTHSTENCIL
;
1069 tex
->key
.flags
|= SVGA3D_SURFACE_BIND_DEPTH_STENCIL
;
1072 tex
->key
.numMipLevels
= template->last_level
+ 1;
1074 tex
->key
.format
= svga_translate_format(svgascreen
, template->format
,
1076 if (tex
->key
.format
== SVGA3D_FORMAT_INVALID
) {
1080 /* Use typeless formats for sRGB and depth resources. Typeless
1081 * formats can be reinterpreted as other formats. For example,
1082 * SVGA3D_R8G8B8A8_UNORM_TYPELESS can be interpreted as
1083 * SVGA3D_R8G8B8A8_UNORM_SRGB or SVGA3D_R8G8B8A8_UNORM.
1085 if (svgascreen
->sws
->have_vgpu10
&&
1086 (util_format_is_srgb(template->format
) ||
1087 format_has_depth(template->format
))) {
1088 SVGA3dSurfaceFormat typeless
= svga_typeless_format(tex
->key
.format
);
1090 debug_printf("Convert resource type %s -> %s (bind 0x%x)\n",
1091 svga_format_name(tex
->key
.format
),
1092 svga_format_name(typeless
),
1096 if (svga_format_is_uncompressed_snorm(tex
->key
.format
)) {
1097 /* We can't normally render to snorm surfaces, but once we
1098 * substitute a typeless format, we can if the rendertarget view
1099 * is unorm. This can happen with GL_ARB_copy_image.
1101 tex
->key
.flags
|= SVGA3D_SURFACE_HINT_RENDERTARGET
;
1102 tex
->key
.flags
|= SVGA3D_SURFACE_BIND_RENDER_TARGET
;
1105 tex
->key
.format
= typeless
;
1108 SVGA_DBG(DEBUG_DMA
, "surface_create for texture\n", tex
->handle
);
1109 tex
->handle
= svga_screen_surface_create(svgascreen
, bindings
,
1111 &tex
->validated
, &tex
->key
);
1116 SVGA_DBG(DEBUG_DMA
, " --> got sid %p (texture)\n", tex
->handle
);
1118 debug_reference(&tex
->b
.b
.reference
,
1119 (debug_reference_descriptor
)debug_describe_resource
, 0);
1121 tex
->size
= util_resource_size(template);
1123 /* Determine if texture upload buffer can be used to upload this texture */
1124 tex
->can_use_upload
= svga_texture_transfer_map_can_upload(svgascreen
,
1127 /* Initialize the backing resource cache */
1128 tex
->backed_handle
= NULL
;
1130 svgascreen
->hud
.total_resource_bytes
+= tex
->size
;
1131 svgascreen
->hud
.num_resources
++;
1133 SVGA_STATS_TIME_POP(svgascreen
->sws
);
1140 if (tex
->rendered_to
)
1141 FREE(tex
->rendered_to
);
1146 SVGA_STATS_TIME_POP(svgascreen
->sws
);
1151 struct pipe_resource
*
1152 svga_texture_from_handle(struct pipe_screen
*screen
,
1153 const struct pipe_resource
*template,
1154 struct winsys_handle
*whandle
)
1156 struct svga_winsys_screen
*sws
= svga_winsys_screen(screen
);
1157 struct svga_screen
*ss
= svga_screen(screen
);
1158 struct svga_winsys_surface
*srf
;
1159 struct svga_texture
*tex
;
1160 enum SVGA3dSurfaceFormat format
= 0;
1163 /* Only supports one type */
1164 if ((template->target
!= PIPE_TEXTURE_2D
&&
1165 template->target
!= PIPE_TEXTURE_RECT
) ||
1166 template->last_level
!= 0 ||
1167 template->depth0
!= 1) {
1171 srf
= sws
->surface_from_handle(sws
, whandle
, &format
);
1176 if (!svga_format_is_shareable(ss
, template->format
, format
,
1177 template->bind
, true))
1180 tex
= CALLOC_STRUCT(svga_texture
);
1184 tex
->defined
= CALLOC(template->depth0
* template->array_size
,
1185 sizeof(tex
->defined
[0]));
1187 goto out_no_defined
;
1189 tex
->b
.b
= *template;
1190 tex
->b
.vtbl
= &svga_texture_vtbl
;
1191 pipe_reference_init(&tex
->b
.b
.reference
, 1);
1192 tex
->b
.b
.screen
= screen
;
1194 SVGA_DBG(DEBUG_DMA
, "wrap surface sid %p\n", srf
);
1196 tex
->key
.cachable
= 0;
1197 tex
->key
.format
= format
;
1200 tex
->rendered_to
= CALLOC(1, sizeof(tex
->rendered_to
[0]));
1201 if (!tex
->rendered_to
)
1202 goto out_no_rendered_to
;
1204 tex
->dirty
= CALLOC(1, sizeof(tex
->dirty
[0]));
1208 tex
->imported
= TRUE
;
1210 ss
->hud
.num_resources
++;
1215 FREE(tex
->rendered_to
);
1221 sws
->surface_reference(sws
, &srf
, NULL
);
1226 svga_texture_generate_mipmap(struct pipe_context
*pipe
,
1227 struct pipe_resource
*pt
,
1228 enum pipe_format format
,
1229 unsigned base_level
,
1230 unsigned last_level
,
1231 unsigned first_layer
,
1232 unsigned last_layer
)
1234 struct pipe_sampler_view templ
, *psv
;
1235 struct svga_pipe_sampler_view
*sv
;
1236 struct svga_context
*svga
= svga_context(pipe
);
1237 struct svga_texture
*tex
= svga_texture(pt
);
1238 enum pipe_error ret
;
1240 assert(svga_have_vgpu10(svga
));
1242 /* Only support 2D texture for now */
1243 if (pt
->target
!= PIPE_TEXTURE_2D
)
1246 /* Fallback to the mipmap generation utility for those formats that
1247 * do not support hw generate mipmap
1249 if (!svga_format_support_gen_mips(format
))
1252 /* Make sure the texture surface was created with
1253 * SVGA3D_SURFACE_BIND_RENDER_TARGET
1255 if (!tex
->handle
|| !(tex
->key
.flags
& SVGA3D_SURFACE_BIND_RENDER_TARGET
))
1258 templ
.format
= format
;
1259 templ
.u
.tex
.first_layer
= first_layer
;
1260 templ
.u
.tex
.last_layer
= last_layer
;
1261 templ
.u
.tex
.first_level
= base_level
;
1262 templ
.u
.tex
.last_level
= last_level
;
1264 psv
= pipe
->create_sampler_view(pipe
, pt
, &templ
);
1268 sv
= svga_pipe_sampler_view(psv
);
1269 ret
= svga_validate_pipe_sampler_view(svga
, sv
);
1270 if (ret
!= PIPE_OK
) {
1271 svga_context_flush(svga
, NULL
);
1272 ret
= svga_validate_pipe_sampler_view(svga
, sv
);
1273 assert(ret
== PIPE_OK
);
1276 ret
= SVGA3D_vgpu10_GenMips(svga
->swc
, sv
->id
, tex
->handle
);
1277 if (ret
!= PIPE_OK
) {
1278 svga_context_flush(svga
, NULL
);
1279 ret
= SVGA3D_vgpu10_GenMips(svga
->swc
, sv
->id
, tex
->handle
);
1281 pipe_sampler_view_reference(&psv
, NULL
);
1283 svga
->hud
.num_generate_mipmap
++;
1289 /* texture upload buffer default size in bytes */
1290 #define TEX_UPLOAD_DEFAULT_SIZE (1024 * 1024)
1293 * Create a texture upload buffer
1296 svga_texture_transfer_map_upload_create(struct svga_context
*svga
)
1298 svga
->tex_upload
= u_upload_create(&svga
->pipe
, TEX_UPLOAD_DEFAULT_SIZE
,
1299 0, PIPE_USAGE_STAGING
);
1300 return svga
->tex_upload
!= NULL
;
1305 * Destroy the texture upload buffer
1308 svga_texture_transfer_map_upload_destroy(struct svga_context
*svga
)
1310 u_upload_destroy(svga
->tex_upload
);
1315 * Returns true if this transfer map request can use the upload buffer.
1318 svga_texture_transfer_map_can_upload(const struct svga_screen
*svgascreen
,
1319 const struct pipe_resource
*texture
)
1321 if (svgascreen
->sws
->have_transfer_from_buffer_cmd
== FALSE
)
1324 /* TransferFromBuffer command is not well supported with multi-samples surface */
1325 if (texture
->nr_samples
> 1)
1328 if (util_format_is_compressed(texture
->format
)) {
1329 /* XXX Need to take a closer look to see why texture upload
1330 * with 3D texture with compressed format fails
1332 if (texture
->target
== PIPE_TEXTURE_3D
)
1335 else if (texture
->format
== PIPE_FORMAT_R9G9B9E5_FLOAT
) {
1344 * Use upload buffer for the transfer map request.
1347 svga_texture_transfer_map_upload(struct svga_context
*svga
,
1348 struct svga_transfer
*st
)
1350 struct pipe_resource
*texture
= st
->base
.resource
;
1351 struct pipe_resource
*tex_buffer
= NULL
;
1353 unsigned nblocksx
, nblocksy
;
1355 unsigned upload_size
;
1357 assert(svga
->tex_upload
);
1359 st
->upload
.box
.x
= st
->base
.box
.x
;
1360 st
->upload
.box
.y
= st
->base
.box
.y
;
1361 st
->upload
.box
.z
= st
->base
.box
.z
;
1362 st
->upload
.box
.w
= st
->base
.box
.width
;
1363 st
->upload
.box
.h
= st
->base
.box
.height
;
1364 st
->upload
.box
.d
= st
->base
.box
.depth
;
1365 st
->upload
.nlayers
= 1;
1367 switch (texture
->target
) {
1368 case PIPE_TEXTURE_CUBE
:
1369 st
->upload
.box
.z
= 0;
1371 case PIPE_TEXTURE_2D_ARRAY
:
1372 st
->upload
.nlayers
= st
->base
.box
.depth
;
1373 st
->upload
.box
.z
= 0;
1374 st
->upload
.box
.d
= 1;
1376 case PIPE_TEXTURE_1D_ARRAY
:
1377 st
->upload
.nlayers
= st
->base
.box
.depth
;
1378 st
->upload
.box
.y
= st
->upload
.box
.z
= 0;
1379 st
->upload
.box
.d
= 1;
1385 nblocksx
= util_format_get_nblocksx(texture
->format
, st
->base
.box
.width
);
1386 nblocksy
= util_format_get_nblocksy(texture
->format
, st
->base
.box
.height
);
1388 st
->base
.stride
= nblocksx
* util_format_get_blocksize(texture
->format
);
1389 st
->base
.layer_stride
= st
->base
.stride
* nblocksy
;
1391 /* In order to use the TransferFromBuffer command to update the
1392 * texture content from the buffer, the layer stride for a multi-layers
1393 * surface needs to be in multiples of 16 bytes.
1395 if (st
->upload
.nlayers
> 1 && st
->base
.layer_stride
& 15)
1398 upload_size
= st
->base
.layer_stride
* st
->base
.box
.depth
;
1399 upload_size
= align(upload_size
, 16);
1402 if (util_format_is_compressed(texture
->format
)) {
1403 struct svga_texture
*tex
= svga_texture(texture
);
1404 unsigned blockw
, blockh
, bytesPerBlock
;
1406 svga_format_size(tex
->key
.format
, &blockw
, &blockh
, &bytesPerBlock
);
1408 /* dest box must start on block boundary */
1409 assert((st
->base
.box
.x
% blockw
) == 0);
1410 assert((st
->base
.box
.y
% blockh
) == 0);
1414 /* If the upload size exceeds the default buffer size, the
1415 * upload buffer manager code will try to allocate a new buffer
1416 * with the new buffer size.
1418 u_upload_alloc(svga
->tex_upload
, 0, upload_size
, 16,
1419 &offset
, &tex_buffer
, &tex_map
);
1425 st
->upload
.buf
= tex_buffer
;
1426 st
->upload
.map
= tex_map
;
1427 st
->upload
.offset
= offset
;
1434 * Unmap upload map transfer request
1437 svga_texture_transfer_unmap_upload(struct svga_context
*svga
,
1438 struct svga_transfer
*st
)
1440 struct svga_winsys_surface
*srcsurf
;
1441 struct svga_winsys_surface
*dstsurf
;
1442 struct pipe_resource
*texture
= st
->base
.resource
;
1443 struct svga_texture
*tex
= svga_texture(texture
);
1444 enum pipe_error ret
;
1445 unsigned subResource
;
1446 unsigned numMipLevels
;
1448 unsigned offset
= st
->upload
.offset
;
1450 assert(svga
->tex_upload
);
1451 assert(st
->upload
.buf
);
1453 /* unmap the texture upload buffer */
1454 u_upload_unmap(svga
->tex_upload
);
1456 srcsurf
= svga_buffer_handle(svga
, st
->upload
.buf
, 0);
1457 dstsurf
= svga_texture(texture
)->handle
;
1460 numMipLevels
= texture
->last_level
+ 1;
1462 for (i
= 0, layer
= st
->slice
; i
< st
->upload
.nlayers
; i
++, layer
++) {
1463 subResource
= layer
* numMipLevels
+ st
->base
.level
;
1465 /* send a transferFromBuffer command to update the host texture surface */
1466 assert((offset
& 15) == 0);
1468 ret
= SVGA3D_vgpu10_TransferFromBuffer(svga
->swc
, srcsurf
,
1471 st
->base
.layer_stride
,
1472 dstsurf
, subResource
,
1474 if (ret
!= PIPE_OK
) {
1475 svga_context_flush(svga
, NULL
);
1476 ret
= SVGA3D_vgpu10_TransferFromBuffer(svga
->swc
, srcsurf
,
1479 st
->base
.layer_stride
,
1480 dstsurf
, subResource
,
1482 assert(ret
== PIPE_OK
);
1484 offset
+= st
->base
.layer_stride
;
1486 /* Set rendered-to flag */
1487 svga_set_texture_rendered_to(tex
, layer
, st
->base
.level
);
1490 pipe_resource_reference(&st
->upload
.buf
, NULL
);
1494 * Does the device format backing this surface have an
1497 * \param texture[in] The texture whose format we're querying
1498 * \return TRUE if the format has an alpha channel, FALSE otherwise
1500 * For locally created textures, the device (svga) format is typically
1501 * identical to svga_format(texture->format), and we can use the gallium
1502 * format tests to determine whether the device format has an alpha channel
1503 * or not. However, for textures backed by imported svga surfaces that is
1504 * not always true, and we have to look at the SVGA3D utilities.
1507 svga_texture_device_format_has_alpha(struct pipe_resource
*texture
)
1509 enum svga3d_block_desc block_desc
=
1510 svga3dsurface_get_desc(svga_texture(texture
)->key
.format
)->block_desc
;
1512 return !!(block_desc
& SVGA3DBLOCKDESC_ALPHA
);