src/gallium/drivers/svga/svga_resource_texture.c

   1 /**********************************************************
   2  * Copyright 2008-2009 VMware, Inc.  All rights reserved.
   3  *
   4  * Permission is hereby granted, free of charge, to any person
   5  * obtaining a copy of this software and associated documentation
   6  * files (the "Software"), to deal in the Software without
   7  * restriction, including without limitation the rights to use, copy,
   8  * modify, merge, publish, distribute, sublicense, and/or sell copies
   9  * of the Software, and to permit persons to whom the Software is
  10  * furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be
  13  * included in all copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  16  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  17  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  18  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  19  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  20  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  21  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  22  * SOFTWARE.
  23  *
  24  **********************************************************/
  25
  26 #include "svga_cmd.h"
  27
  28 #include "pipe/p_state.h"
  29 #include "pipe/p_defines.h"
  30 #include "util/u_inlines.h"
  31 #include "os/os_thread.h"
  32 #include "util/u_format.h"
  33 #include "util/u_math.h"
  34 #include "util/u_memory.h"
  35
  36 #include "svga_screen.h"
  37 #include "svga_context.h"
  38 #include "svga_resource_texture.h"
  39 #include "svga_resource_buffer.h"
  40 #include "svga_sampler_view.h"
  41 #include "svga_winsys.h"
  42 #include "svga_debug.h"
  43
  44
  45 /* XXX: This isn't a real hardware flag, but just a hack for kernel to
  46  * know about primary surfaces. Find a better way to accomplish this.
  47  */
  48 #define SVGA3D_SURFACE_HINT_SCANOUT (1 << 9)
  49
  50
  51 static unsigned int
  52 svga_texture_is_referenced( struct pipe_context *pipe,
  53                             struct pipe_resource *texture,
  54                             unsigned level, int layer)
  55 {
  56    struct svga_texture *tex = svga_texture(texture);
  57    struct svga_screen *ss = svga_screen(pipe->screen);
  58
  59    /**
  60     * The screen does not cache texture writes.
  61     */
  62
  63    if (!tex->handle || ss->sws->surface_is_flushed(ss->sws, tex->handle))
  64       return PIPE_UNREFERENCED;
  65
  66    /**
  67     * sws->surface_is_flushed() does not distinguish between read references
  68     * and write references. So assume a reference is both.
  69     */
  70
  71    return PIPE_REFERENCED_FOR_READ | PIPE_REFERENCED_FOR_WRITE;
  72 }
  73
  74
  75
  76 /*
  77  * Helper function and arrays
  78  */
  79
  80 SVGA3dSurfaceFormat
  81 svga_translate_format(enum pipe_format format)
  82 {
  83    switch(format) {
  84
  85    case PIPE_FORMAT_B8G8R8A8_UNORM:
  86       return SVGA3D_A8R8G8B8;
  87    case PIPE_FORMAT_B8G8R8X8_UNORM:
  88       return SVGA3D_X8R8G8B8;
  89
  90       /* Required for GL2.1:
  91        */
  92    case PIPE_FORMAT_B8G8R8A8_SRGB:
  93       return SVGA3D_A8R8G8B8;
  94
  95    case PIPE_FORMAT_B5G6R5_UNORM:
  96       return SVGA3D_R5G6B5;
  97    case PIPE_FORMAT_B5G5R5A1_UNORM:
  98       return SVGA3D_A1R5G5B5;
  99    case PIPE_FORMAT_B4G4R4A4_UNORM:
 100       return SVGA3D_A4R4G4B4;
 101
 102
 103    /* XXX: Doesn't seem to work properly.
 104    case PIPE_FORMAT_Z32_UNORM:
 105       return SVGA3D_Z_D32;
 106     */
 107    case PIPE_FORMAT_Z16_UNORM:
 108       return SVGA3D_Z_D16;
 109    case PIPE_FORMAT_S8_USCALED_Z24_UNORM:
 110       return SVGA3D_Z_D24S8;
 111    case PIPE_FORMAT_X8Z24_UNORM:
 112       return SVGA3D_Z_D24X8;
 113
 114    case PIPE_FORMAT_A8_UNORM:
 115       return SVGA3D_ALPHA8;
 116    case PIPE_FORMAT_L8_UNORM:
 117       return SVGA3D_LUMINANCE8;
 118
 119    case PIPE_FORMAT_DXT1_RGB:
 120    case PIPE_FORMAT_DXT1_RGBA:
 121       return SVGA3D_DXT1;
 122    case PIPE_FORMAT_DXT3_RGBA:
 123       return SVGA3D_DXT3;
 124    case PIPE_FORMAT_DXT5_RGBA:
 125       return SVGA3D_DXT5;
 126
 127    default:
 128       return SVGA3D_FORMAT_INVALID;
 129    }
 130 }
 131
 132
 133 SVGA3dSurfaceFormat
 134 svga_translate_format_render(enum pipe_format format)
 135 {
 136    switch(format) {
 137    case PIPE_FORMAT_B8G8R8A8_UNORM:
 138    case PIPE_FORMAT_B8G8R8X8_UNORM:
 139    case PIPE_FORMAT_B5G5R5A1_UNORM:
 140    case PIPE_FORMAT_B4G4R4A4_UNORM:
 141    case PIPE_FORMAT_B5G6R5_UNORM:
 142    case PIPE_FORMAT_S8_USCALED_Z24_UNORM:
 143    case PIPE_FORMAT_X8Z24_UNORM:
 144    case PIPE_FORMAT_Z32_UNORM:
 145    case PIPE_FORMAT_Z16_UNORM:
 146    case PIPE_FORMAT_L8_UNORM:
 147       return svga_translate_format(format);
 148
 149    default:
 150       return SVGA3D_FORMAT_INVALID;
 151    }
 152 }
 153
 154
 155 static INLINE void
 156 svga_transfer_dma_band(struct svga_context *svga,
 157                        struct svga_transfer *st,
 158                        SVGA3dTransferType transfer,
 159                        unsigned y, unsigned h, unsigned srcy,
 160                        SVGA3dSurfaceDMAFlags flags)
 161 {
 162    struct svga_texture *texture = svga_texture(st->base.resource);
 163    SVGA3dCopyBox box;
 164    enum pipe_error ret;
 165
 166    box.x = st->base.box.x;
 167    box.y = y;
 168    box.z = st->base.box.z;
 169    box.w = st->base.box.width;
 170    box.h = h;
 171    box.d = 1;
 172    box.srcx = 0;
 173    box.srcy = srcy;
 174    box.srcz = 0;
 175
 176    if (st->base.resource->target == PIPE_TEXTURE_CUBE) {
 177       st->face = st->base.box.z;
 178       box.z = 0;
 179    }
 180    else
 181       st->face = 0;
 182
 183    SVGA_DBG(DEBUG_DMA, "dma %s sid %p, face %u, (%u, %u, %u) - (%u, %u, %u), %ubpp\n",
 184                 transfer == SVGA3D_WRITE_HOST_VRAM ? "to" : "from",
 185                 texture->handle,
 186                 st->face,
 187                 st->base.box.x,
 188                 y,
 189                 box.z,
 190                 st->base.box.x + st->base.box.width,
 191                 y + h,
 192                 box.z + 1,
 193                 util_format_get_blocksize(texture->b.b.format) * 8 /
 194                 (util_format_get_blockwidth(texture->b.b.format)*util_format_get_blockheight(texture->b.b.format)));
 195
 196    ret = SVGA3D_SurfaceDMA(svga->swc, st, transfer, &box, 1, flags);
 197    if(ret != PIPE_OK) {
 198       svga_context_flush(svga, NULL);
 199       ret = SVGA3D_SurfaceDMA(svga->swc, st, transfer, &box, 1, flags);
 200       assert(ret == PIPE_OK);
 201    }
 202 }
 203
 204
 205 static INLINE void
 206 svga_transfer_dma(struct svga_context *svga,
 207                   struct svga_transfer *st,
 208                   SVGA3dTransferType transfer,
 209                   SVGA3dSurfaceDMAFlags flags)
 210 {
 211    struct svga_texture *texture = svga_texture(st->base.resource);
 212    struct svga_screen *screen = svga_screen(texture->b.b.screen);
 213    struct svga_winsys_screen *sws = screen->sws;
 214    struct pipe_fence_handle *fence = NULL;
 215
 216    if (transfer == SVGA3D_READ_HOST_VRAM) {
 217       SVGA_DBG(DEBUG_PERF, "%s: readback transfer\n", __FUNCTION__);
 218    }
 219
 220    /* Ensure any pending operations on host surfaces are queued on the command
 221     * buffer first.
 222     */
 223    svga_surfaces_flush( svga );
 224
 225    if(!st->swbuf) {
 226       /* Do the DMA transfer in a single go */
 227
 228       svga_transfer_dma_band(svga, st, transfer,
 229                              st->base.box.y, st->base.box.height, 0,
 230                              flags);
 231
 232       if(transfer == SVGA3D_READ_HOST_VRAM) {
 233          svga_context_flush(svga, &fence);
 234          sws->fence_finish(sws, fence, 0);
 235          sws->fence_reference(sws, &fence, NULL);
 236       }
 237    }
 238    else {
 239       unsigned y, h, srcy;
 240       unsigned blockheight = util_format_get_blockheight(st->base.resource->format);
 241       h = st->hw_nblocksy * blockheight;
 242       srcy = 0;
 243       for(y = 0; y < st->base.box.height; y += h) {
 244          unsigned offset, length;
 245          void *hw, *sw;
 246
 247          if (y + h > st->base.box.height)
 248             h = st->base.box.height - y;
 249
 250          /* Transfer band must be aligned to pixel block boundaries */
 251          assert(y % blockheight == 0);
 252          assert(h % blockheight == 0);
 253
 254          offset = y * st->base.stride / blockheight;
 255          length = h * st->base.stride / blockheight;
 256
 257          sw = (uint8_t *)st->swbuf + offset;
 258
 259          if(transfer == SVGA3D_WRITE_HOST_VRAM) {
 260             /* Wait for the previous DMAs to complete */
 261             /* TODO: keep one DMA (at half the size) in the background */
 262             if(y) {
 263                svga_context_flush(svga, &fence);
 264                sws->fence_finish(sws, fence, 0);
 265                sws->fence_reference(sws, &fence, NULL);
 266             }
 267
 268             hw = sws->buffer_map(sws, st->hwbuf, PIPE_TRANSFER_WRITE);
 269             assert(hw);
 270             if(hw) {
 271                memcpy(hw, sw, length);
 272                sws->buffer_unmap(sws, st->hwbuf);
 273             }
 274          }
 275
 276          svga_transfer_dma_band(svga, st, transfer, y, h, srcy, flags);
 277
 278          /*
 279           * Prevent the texture contents to be discarded on the next band
 280           * upload.
 281           */
 282
 283          flags.discard = FALSE;
 284
 285          if(transfer == SVGA3D_READ_HOST_VRAM) {
 286             svga_context_flush(svga, &fence);
 287             sws->fence_finish(sws, fence, 0);
 288
 289             hw = sws->buffer_map(sws, st->hwbuf, PIPE_TRANSFER_READ);
 290             assert(hw);
 291             if(hw) {
 292                memcpy(sw, hw, length);
 293                sws->buffer_unmap(sws, st->hwbuf);
 294             }
 295          }
 296       }
 297    }
 298 }
 299
 300
 301
 302
 303
 304 static boolean
 305 svga_texture_get_handle(struct pipe_screen *screen,
 306                                struct pipe_resource *texture,
 307                                struct winsys_handle *whandle)
 308 {
 309    struct svga_winsys_screen *sws = svga_winsys_screen(texture->screen);
 310    unsigned stride;
 311
 312    assert(svga_texture(texture)->key.cachable == 0);
 313    svga_texture(texture)->key.cachable = 0;
 314    stride = util_format_get_nblocksx(texture->format, texture->width0) *
 315             util_format_get_blocksize(texture->format);
 316    return sws->surface_get_handle(sws, svga_texture(texture)->handle, stride, whandle);
 317 }
 318
 319
 320 static void
 321 svga_texture_destroy(struct pipe_screen *screen,
 322                      struct pipe_resource *pt)
 323 {
 324    struct svga_screen *ss = svga_screen(screen);
 325    struct svga_texture *tex = (struct svga_texture *)pt;
 326
 327    ss->texture_timestamp++;
 328
 329    svga_sampler_view_reference(&tex->cached_view, NULL);
 330
 331    /*
 332      DBG("%s deleting %p\n", __FUNCTION__, (void *) tex);
 333    */
 334    SVGA_DBG(DEBUG_DMA, "unref sid %p (texture)\n", tex->handle);
 335    svga_screen_surface_destroy(ss, &tex->key, &tex->handle);
 336
 337    FREE(tex);
 338 }
 339
 340
 341
 342
 343
 344
 345
 346 /* XXX: Still implementing this as if it was a screen function, but
 347  * can now modify it to queue transfers on the context.
 348  */
 349 static struct pipe_transfer *
 350 svga_texture_get_transfer(struct pipe_context *pipe,
 351                           struct pipe_resource *texture,
 352                           unsigned level,
 353                           unsigned usage,
 354                           const struct pipe_box *box)
 355 {
 356    struct svga_context *svga = svga_context(pipe);
 357    struct svga_screen *ss = svga_screen(pipe->screen);
 358    struct svga_winsys_screen *sws = ss->sws;
 359    struct svga_transfer *st;
 360    unsigned nblocksx = util_format_get_nblocksx(texture->format, box->width);
 361    unsigned nblocksy = util_format_get_nblocksy(texture->format, box->height);
 362
 363    /* We can't map texture storage directly */
 364    if (usage & PIPE_TRANSFER_MAP_DIRECTLY)
 365       return NULL;
 366
 367    assert(box->depth == 1);
 368    st = CALLOC_STRUCT(svga_transfer);
 369    if (!st)
 370       return NULL;
 371
 372    pipe_resource_reference(&st->base.resource, texture);
 373    st->base.level = level;
 374    st->base.usage = usage;
 375    st->base.box = *box;
 376    st->base.stride = nblocksx*util_format_get_blocksize(texture->format);
 377    st->base.layer_stride = 0;
 378
 379    st->hw_nblocksy = nblocksy;
 380
 381    st->hwbuf = svga_winsys_buffer_create(svga,
 382                                          1,
 383                                          0,
 384                                          st->hw_nblocksy*st->base.stride);
 385    while(!st->hwbuf && (st->hw_nblocksy /= 2)) {
 386       st->hwbuf = svga_winsys_buffer_create(svga,
 387                                             1,
 388                                             0,
 389                                             st->hw_nblocksy*st->base.stride);
 390    }
 391
 392    if(!st->hwbuf)
 393       goto no_hwbuf;
 394
 395    if(st->hw_nblocksy < nblocksy) {
 396       /* We couldn't allocate a hardware buffer big enough for the transfer,
 397        * so allocate regular malloc memory instead */
 398       if (0) {
 399          debug_printf("%s: failed to allocate %u KB of DMA, "
 400                       "splitting into %u x %u KB DMA transfers\n",
 401                       __FUNCTION__,
 402                       (nblocksy*st->base.stride + 1023)/1024,
 403                       (nblocksy + st->hw_nblocksy - 1)/st->hw_nblocksy,
 404                       (st->hw_nblocksy*st->base.stride + 1023)/1024);
 405       }
 406
 407       st->swbuf = MALLOC(nblocksy*st->base.stride);
 408       if(!st->swbuf)
 409          goto no_swbuf;
 410    }
 411
 412    if (usage & PIPE_TRANSFER_READ) {
 413       SVGA3dSurfaceDMAFlags flags;
 414       memset(&flags, 0, sizeof flags);
 415       svga_transfer_dma(svga, st, SVGA3D_READ_HOST_VRAM, flags);
 416    }
 417
 418    return &st->base;
 419
 420 no_swbuf:
 421    sws->buffer_destroy(sws, st->hwbuf);
 422 no_hwbuf:
 423    FREE(st);
 424    return NULL;
 425 }
 426
 427
 428 /* XXX: Still implementing this as if it was a screen function, but
 429  * can now modify it to queue transfers on the context.
 430  */
 431 static void *
 432 svga_texture_transfer_map( struct pipe_context *pipe,
 433                            struct pipe_transfer *transfer )
 434 {
 435    struct svga_screen *ss = svga_screen(pipe->screen);
 436    struct svga_winsys_screen *sws = ss->sws;
 437    struct svga_transfer *st = svga_transfer(transfer);
 438
 439    if(st->swbuf)
 440       return st->swbuf;
 441    else
 442       /* The wait for read transfers already happened when svga_transfer_dma
 443        * was called. */
 444       return sws->buffer_map(sws, st->hwbuf, transfer->usage);
 445 }
 446
 447
 448 /* XXX: Still implementing this as if it was a screen function, but
 449  * can now modify it to queue transfers on the context.
 450  */
 451 static void
 452 svga_texture_transfer_unmap(struct pipe_context *pipe,
 453                             struct pipe_transfer *transfer)
 454 {
 455    struct svga_screen *ss = svga_screen(pipe->screen);
 456    struct svga_winsys_screen *sws = ss->sws;
 457    struct svga_transfer *st = svga_transfer(transfer);
 458
 459    if(!st->swbuf)
 460       sws->buffer_unmap(sws, st->hwbuf);
 461 }
 462
 463
 464 static void
 465 svga_texture_transfer_destroy(struct pipe_context *pipe,
 466                               struct pipe_transfer *transfer)
 467 {
 468    struct svga_context *svga = svga_context(pipe);
 469    struct svga_texture *tex = svga_texture(transfer->resource);
 470    struct svga_screen *ss = svga_screen(pipe->screen);
 471    struct svga_winsys_screen *sws = ss->sws;
 472    struct svga_transfer *st = svga_transfer(transfer);
 473
 474    if (st->base.usage & PIPE_TRANSFER_WRITE) {
 475       SVGA3dSurfaceDMAFlags flags;
 476
 477       memset(&flags, 0, sizeof flags);
 478       if (transfer->usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) {
 479          flags.discard = TRUE;
 480       }
 481       if (transfer->usage & PIPE_TRANSFER_UNSYNCHRONIZED) {
 482          flags.unsynchronized = TRUE;
 483       }
 484
 485       svga_transfer_dma(svga, st, SVGA3D_WRITE_HOST_VRAM, flags);
 486       ss->texture_timestamp++;
 487       tex->view_age[transfer->level] = ++(tex->age);
 488       if (transfer->resource->target == PIPE_TEXTURE_CUBE)
 489          tex->defined[transfer->box.z][transfer->level] = TRUE;
 490       else
 491          tex->defined[0][transfer->level] = TRUE;
 492    }
 493
 494    pipe_resource_reference(&st->base.resource, NULL);
 495    FREE(st->swbuf);
 496    sws->buffer_destroy(sws, st->hwbuf);
 497    FREE(st);
 498 }
 499
 500
 501
 502
 503
 504 struct u_resource_vtbl svga_texture_vtbl =
 505 {
 506    svga_texture_get_handle,           /* get_handle */
 507    svga_texture_destroy,              /* resource_destroy */
 508    svga_texture_is_referenced,        /* is_resource_referenced */
 509    svga_texture_get_transfer,         /* get_transfer */
 510    svga_texture_transfer_destroy,     /* transfer_destroy */
 511    svga_texture_transfer_map,         /* transfer_map */
 512    u_default_transfer_flush_region,   /* transfer_flush_region */
 513    svga_texture_transfer_unmap,       /* transfer_unmap */
 514    u_default_transfer_inline_write    /* transfer_inline_write */
 515 };
 516
 517
 518
 519
 520 struct pipe_resource *
 521 svga_texture_create(struct pipe_screen *screen,
 522                     const struct pipe_resource *template)
 523 {
 524    struct svga_screen *svgascreen = svga_screen(screen);
 525    struct svga_texture *tex = CALLOC_STRUCT(svga_texture);
 526
 527    if (!tex)
 528       goto error1;
 529
 530    tex->b.b = *template;
 531    tex->b.vtbl = &svga_texture_vtbl;
 532    pipe_reference_init(&tex->b.b.reference, 1);
 533    tex->b.b.screen = screen;
 534
 535    assert(template->last_level < SVGA_MAX_TEXTURE_LEVELS);
 536    if(template->last_level >= SVGA_MAX_TEXTURE_LEVELS)
 537       goto error2;
 538
 539    tex->key.flags = 0;
 540    tex->key.size.width = template->width0;
 541    tex->key.size.height = template->height0;
 542    tex->key.size.depth = template->depth0;
 543
 544    if(template->target == PIPE_TEXTURE_CUBE) {
 545       tex->key.flags |= SVGA3D_SURFACE_CUBEMAP;
 546       tex->key.numFaces = 6;
 547    }
 548    else {
 549       tex->key.numFaces = 1;
 550    }
 551
 552    /* XXX: Disabled for now */
 553    tex->key.cachable = 0;
 554
 555    if (template->bind & PIPE_BIND_SAMPLER_VIEW)
 556       tex->key.flags |= SVGA3D_SURFACE_HINT_TEXTURE;
 557
 558    if (template->bind & PIPE_BIND_DISPLAY_TARGET) {
 559       tex->key.cachable = 0;
 560    }
 561
 562    if (template->bind & PIPE_BIND_SHARED) {
 563       tex->key.cachable = 0;
 564    }
 565
 566    if (template->bind & PIPE_BIND_SCANOUT) {
 567       tex->key.flags |= SVGA3D_SURFACE_HINT_SCANOUT;
 568       tex->key.cachable = 0;
 569    }
 570
 571    /*
 572     * XXX: Never pass the SVGA3D_SURFACE_HINT_RENDERTARGET hint. Mesa cannot
 573     * know beforehand whether a texture will be used as a rendertarget or not
 574     * and it always requests PIPE_BIND_RENDER_TARGET, therefore
 575     * passing the SVGA3D_SURFACE_HINT_RENDERTARGET here defeats its purpose.
 576     */
 577 #if 0
 578    if((template->bind & PIPE_BIND_RENDER_TARGET) &&
 579       !util_format_is_s3tc(template->format))
 580       tex->key.flags |= SVGA3D_SURFACE_HINT_RENDERTARGET;
 581 #endif
 582
 583    if(template->bind & PIPE_BIND_DEPTH_STENCIL)
 584       tex->key.flags |= SVGA3D_SURFACE_HINT_DEPTHSTENCIL;
 585
 586    tex->key.numMipLevels = template->last_level + 1;
 587
 588    tex->key.format = svga_translate_format(template->format);
 589    if(tex->key.format == SVGA3D_FORMAT_INVALID)
 590       goto error2;
 591
 592    SVGA_DBG(DEBUG_DMA, "surface_create for texture\n", tex->handle);
 593    tex->handle = svga_screen_surface_create(svgascreen, &tex->key);
 594    if (tex->handle)
 595       SVGA_DBG(DEBUG_DMA, "  --> got sid %p (texture)\n", tex->handle);
 596
 597    debug_reference(&tex->b.b.reference,
 598                    (debug_reference_descriptor)debug_describe_resource, 0);
 599
 600    return &tex->b.b;
 601
 602 error2:
 603    FREE(tex);
 604 error1:
 605    return NULL;
 606 }
 607
 608
 609
 610
 611 struct pipe_resource *
 612 svga_texture_from_handle(struct pipe_screen *screen,
 613                          const struct pipe_resource *template,
 614                          struct winsys_handle *whandle)
 615 {
 616    struct svga_winsys_screen *sws = svga_winsys_screen(screen);
 617    struct svga_winsys_surface *srf;
 618    struct svga_texture *tex;
 619    enum SVGA3dSurfaceFormat format = 0;
 620    assert(screen);
 621
 622    /* Only supports one type */
 623    if ((template->target != PIPE_TEXTURE_2D &&
 624        template->target != PIPE_TEXTURE_RECT) ||
 625        template->last_level != 0 ||
 626        template->depth0 != 1) {
 627       return NULL;
 628    }
 629
 630    srf = sws->surface_from_handle(sws, whandle, &format);
 631
 632    if (!srf)
 633       return NULL;
 634
 635    if (svga_translate_format(template->format) != format) {
 636       unsigned f1 = svga_translate_format(template->format);
 637       unsigned f2 = format;
 638
 639       /* It's okay for XRGB and ARGB or depth with/out stencil to get mixed up */
 640       if ( !( (f1 == SVGA3D_X8R8G8B8 && f2 == SVGA3D_A8R8G8B8) ||
 641               (f1 == SVGA3D_A8R8G8B8 && f2 == SVGA3D_X8R8G8B8) ||
 642               (f1 == SVGA3D_Z_D24X8 && f2 == SVGA3D_Z_D24S8) ) ) {
 643          debug_printf("%s wrong format %u != %u\n", __FUNCTION__, f1, f2);
 644          return NULL;
 645       }
 646    }
 647
 648    tex = CALLOC_STRUCT(svga_texture);
 649    if (!tex)
 650       return NULL;
 651
 652    tex->b.b = *template;
 653    tex->b.vtbl = &svga_texture_vtbl;
 654    pipe_reference_init(&tex->b.b.reference, 1);
 655    tex->b.b.screen = screen;
 656
 657    if (format == SVGA3D_X8R8G8B8)
 658       tex->b.b.format = PIPE_FORMAT_B8G8R8X8_UNORM;
 659    else if (format == SVGA3D_A8R8G8B8)
 660       tex->b.b.format = PIPE_FORMAT_B8G8R8A8_UNORM;
 661    else {
 662       /* ?? */
 663    }
 664
 665    SVGA_DBG(DEBUG_DMA, "wrap surface sid %p\n", srf);
 666
 667    tex->key.cachable = 0;
 668    tex->handle = srf;
 669
 670    return &tex->b.b;
 671 }
 672