src/gallium/drivers/svga/svga_resource_texture.c

   1 /**********************************************************
   2  * Copyright 2008-2009 VMware, Inc.  All rights reserved.
   3  *
   4  * Permission is hereby granted, free of charge, to any person
   5  * obtaining a copy of this software and associated documentation
   6  * files (the "Software"), to deal in the Software without
   7  * restriction, including without limitation the rights to use, copy,
   8  * modify, merge, publish, distribute, sublicense, and/or sell copies
   9  * of the Software, and to permit persons to whom the Software is
  10  * furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be
  13  * included in all copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  16  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  17  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  18  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  19  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  20  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  21  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  22  * SOFTWARE.
  23  *
  24  **********************************************************/
  25
  26 #include "svga_cmd.h"
  27
  28 #include "pipe/p_state.h"
  29 #include "pipe/p_defines.h"
  30 #include "util/u_inlines.h"
  31 #include "os/os_thread.h"
  32 #include "util/u_format.h"
  33 #include "util/u_math.h"
  34 #include "util/u_memory.h"
  35
  36 #include "svga_screen.h"
  37 #include "svga_context.h"
  38 #include "svga_resource_texture.h"
  39 #include "svga_resource_buffer.h"
  40 #include "svga_sampler_view.h"
  41 #include "svga_winsys.h"
  42 #include "svga_debug.h"
  43
  44
  45 /* XXX: This isn't a real hardware flag, but just a hack for kernel to
  46  * know about primary surfaces. Find a better way to accomplish this.
  47  */
  48 #define SVGA3D_SURFACE_HINT_SCANOUT (1 << 9)
  49
  50
  51 static unsigned int
  52 svga_texture_is_referenced( struct pipe_context *pipe,
  53                             struct pipe_resource *texture,
  54                             unsigned level, int layer)
  55 {
  56    struct svga_texture *tex = svga_texture(texture);
  57    struct svga_screen *ss = svga_screen(pipe->screen);
  58
  59    /**
  60     * The screen does not cache texture writes.
  61     */
  62
  63    if (!tex->handle || ss->sws->surface_is_flushed(ss->sws, tex->handle))
  64       return PIPE_UNREFERENCED;
  65
  66    /**
  67     * sws->surface_is_flushed() does not distinguish between read references
  68     * and write references. So assume a reference is both.
  69     */
  70
  71    return PIPE_REFERENCED_FOR_READ | PIPE_REFERENCED_FOR_WRITE;
  72 }
  73
  74
  75
  76 /*
  77  * Helper function and arrays
  78  */
  79
  80 SVGA3dSurfaceFormat
  81 svga_translate_format(enum pipe_format format)
  82 {
  83    switch(format) {
  84
  85    case PIPE_FORMAT_B8G8R8A8_UNORM:
  86       return SVGA3D_A8R8G8B8;
  87    case PIPE_FORMAT_B8G8R8X8_UNORM:
  88       return SVGA3D_X8R8G8B8;
  89
  90       /* Required for GL2.1:
  91        */
  92    case PIPE_FORMAT_B8G8R8A8_SRGB:
  93       return SVGA3D_A8R8G8B8;
  94
  95    case PIPE_FORMAT_B5G6R5_UNORM:
  96       return SVGA3D_R5G6B5;
  97    case PIPE_FORMAT_B5G5R5A1_UNORM:
  98       return SVGA3D_A1R5G5B5;
  99    case PIPE_FORMAT_B4G4R4A4_UNORM:
 100       return SVGA3D_A4R4G4B4;
 101
 102
 103    /* XXX: Doesn't seem to work properly.
 104    case PIPE_FORMAT_Z32_UNORM:
 105       return SVGA3D_Z_D32;
 106     */
 107    case PIPE_FORMAT_Z16_UNORM:
 108       return SVGA3D_Z_D16;
 109    case PIPE_FORMAT_S8_USCALED_Z24_UNORM:
 110       return SVGA3D_Z_D24S8;
 111    case PIPE_FORMAT_X8Z24_UNORM:
 112       return SVGA3D_Z_D24X8;
 113
 114    case PIPE_FORMAT_A8_UNORM:
 115       return SVGA3D_ALPHA8;
 116    case PIPE_FORMAT_L8_UNORM:
 117       return SVGA3D_LUMINANCE8;
 118
 119    case PIPE_FORMAT_DXT1_RGB:
 120    case PIPE_FORMAT_DXT1_RGBA:
 121       return SVGA3D_DXT1;
 122    case PIPE_FORMAT_DXT3_RGBA:
 123       return SVGA3D_DXT3;
 124    case PIPE_FORMAT_DXT5_RGBA:
 125       return SVGA3D_DXT5;
 126
 127    default:
 128       return SVGA3D_FORMAT_INVALID;
 129    }
 130 }
 131
 132
 133 SVGA3dSurfaceFormat
 134 svga_translate_format_render(enum pipe_format format)
 135 {
 136    switch(format) {
 137    case PIPE_FORMAT_B8G8R8A8_UNORM:
 138    case PIPE_FORMAT_B8G8R8X8_UNORM:
 139    case PIPE_FORMAT_B5G5R5A1_UNORM:
 140    case PIPE_FORMAT_B4G4R4A4_UNORM:
 141    case PIPE_FORMAT_B5G6R5_UNORM:
 142    case PIPE_FORMAT_S8_USCALED_Z24_UNORM:
 143    case PIPE_FORMAT_X8Z24_UNORM:
 144    case PIPE_FORMAT_Z32_UNORM:
 145    case PIPE_FORMAT_Z16_UNORM:
 146    case PIPE_FORMAT_L8_UNORM:
 147       return svga_translate_format(format);
 148
 149 #if 1
 150    /* For on host conversion */
 151    case PIPE_FORMAT_DXT1_RGB:
 152       return SVGA3D_X8R8G8B8;
 153    case PIPE_FORMAT_DXT1_RGBA:
 154    case PIPE_FORMAT_DXT3_RGBA:
 155    case PIPE_FORMAT_DXT5_RGBA:
 156       return SVGA3D_A8R8G8B8;
 157 #endif
 158
 159    default:
 160       return SVGA3D_FORMAT_INVALID;
 161    }
 162 }
 163
 164
 165 static INLINE void
 166 svga_transfer_dma_band(struct svga_context *svga,
 167                        struct svga_transfer *st,
 168                        SVGA3dTransferType transfer,
 169                        unsigned y, unsigned h, unsigned srcy)
 170 {
 171    struct svga_texture *texture = svga_texture(st->base.resource);
 172    SVGA3dCopyBox box;
 173    enum pipe_error ret;
 174
 175    box.x = st->base.box.x;
 176    box.y = y;
 177    box.z = st->base.box.z;
 178    box.w = st->base.box.width;
 179    box.h = h;
 180    box.d = 1;
 181    box.srcx = 0;
 182    box.srcy = srcy;
 183    box.srcz = 0;
 184
 185    if (st->base.resource->target == PIPE_TEXTURE_CUBE) {
 186       st->face = st->base.box.z;
 187       box.z = 0;
 188    }
 189    else
 190       st->face = 0;
 191
 192    SVGA_DBG(DEBUG_DMA, "dma %s sid %p, face %u, (%u, %u, %u) - (%u, %u, %u), %ubpp\n",
 193                 transfer == SVGA3D_WRITE_HOST_VRAM ? "to" : "from",
 194                 texture->handle,
 195                 st->face,
 196                 st->base.box.x,
 197                 y,
 198                 box.z,
 199                 st->base.box.x + st->base.box.width,
 200                 y + h,
 201                 box.z + 1,
 202                 util_format_get_blocksize(texture->b.b.format) * 8 /
 203                 (util_format_get_blockwidth(texture->b.b.format)*util_format_get_blockheight(texture->b.b.format)));
 204
 205    ret = SVGA3D_SurfaceDMA(svga->swc, st, transfer, &box, 1);
 206    if(ret != PIPE_OK) {
 207       svga_context_flush(svga, NULL);
 208       ret = SVGA3D_SurfaceDMA(svga->swc, st, transfer, &box, 1);
 209       assert(ret == PIPE_OK);
 210    }
 211 }
 212
 213
 214 static INLINE void
 215 svga_transfer_dma(struct svga_context *svga,
 216                   struct svga_transfer *st,
 217                   SVGA3dTransferType transfer)
 218 {
 219    struct svga_texture *texture = svga_texture(st->base.resource);
 220    struct svga_screen *screen = svga_screen(texture->b.b.screen);
 221    struct svga_winsys_screen *sws = screen->sws;
 222    struct pipe_fence_handle *fence = NULL;
 223
 224    if (transfer == SVGA3D_READ_HOST_VRAM) {
 225       SVGA_DBG(DEBUG_PERF, "%s: readback transfer\n", __FUNCTION__);
 226    }
 227
 228
 229    if(!st->swbuf) {
 230       /* Do the DMA transfer in a single go */
 231
 232       svga_transfer_dma_band(svga, st, transfer, st->base.box.y, st->base.box.height, 0);
 233
 234       if(transfer == SVGA3D_READ_HOST_VRAM) {
 235          svga_context_flush(svga, &fence);
 236          sws->fence_finish(sws, fence, 0);
 237          sws->fence_reference(sws, &fence, NULL);
 238       }
 239    }
 240    else {
 241       unsigned y, h, srcy;
 242       unsigned blockheight = util_format_get_blockheight(st->base.resource->format);
 243       h = st->hw_nblocksy * blockheight;
 244       srcy = 0;
 245       for(y = 0; y < st->base.box.height; y += h) {
 246          unsigned offset, length;
 247          void *hw, *sw;
 248
 249          if (y + h > st->base.box.height)
 250             h = st->base.box.height - y;
 251
 252          /* Transfer band must be aligned to pixel block boundaries */
 253          assert(y % blockheight == 0);
 254          assert(h % blockheight == 0);
 255
 256          offset = y * st->base.stride / blockheight;
 257          length = h * st->base.stride / blockheight;
 258
 259          sw = (uint8_t *)st->swbuf + offset;
 260
 261          if(transfer == SVGA3D_WRITE_HOST_VRAM) {
 262             /* Wait for the previous DMAs to complete */
 263             /* TODO: keep one DMA (at half the size) in the background */
 264             if(y) {
 265                svga_context_flush(svga, &fence);
 266                sws->fence_finish(sws, fence, 0);
 267                sws->fence_reference(sws, &fence, NULL);
 268             }
 269
 270             hw = sws->buffer_map(sws, st->hwbuf, PIPE_TRANSFER_WRITE);
 271             assert(hw);
 272             if(hw) {
 273                memcpy(hw, sw, length);
 274                sws->buffer_unmap(sws, st->hwbuf);
 275             }
 276          }
 277
 278          svga_transfer_dma_band(svga, st, transfer, y, h, srcy);
 279
 280          if(transfer == SVGA3D_READ_HOST_VRAM) {
 281             svga_context_flush(svga, &fence);
 282             sws->fence_finish(sws, fence, 0);
 283
 284             hw = sws->buffer_map(sws, st->hwbuf, PIPE_TRANSFER_READ);
 285             assert(hw);
 286             if(hw) {
 287                memcpy(sw, hw, length);
 288                sws->buffer_unmap(sws, st->hwbuf);
 289             }
 290          }
 291       }
 292    }
 293 }
 294
 295
 296
 297
 298
 299 static boolean
 300 svga_texture_get_handle(struct pipe_screen *screen,
 301                                struct pipe_resource *texture,
 302                                struct winsys_handle *whandle)
 303 {
 304    struct svga_winsys_screen *sws = svga_winsys_screen(texture->screen);
 305    unsigned stride;
 306
 307    assert(svga_texture(texture)->key.cachable == 0);
 308    svga_texture(texture)->key.cachable = 0;
 309    stride = util_format_get_nblocksx(texture->format, texture->width0) *
 310             util_format_get_blocksize(texture->format);
 311    return sws->surface_get_handle(sws, svga_texture(texture)->handle, stride, whandle);
 312 }
 313
 314
 315 static void
 316 svga_texture_destroy(struct pipe_screen *screen,
 317                      struct pipe_resource *pt)
 318 {
 319    struct svga_screen *ss = svga_screen(screen);
 320    struct svga_texture *tex = (struct svga_texture *)pt;
 321
 322    ss->texture_timestamp++;
 323
 324    svga_sampler_view_reference(&tex->cached_view, NULL);
 325
 326    /*
 327      DBG("%s deleting %p\n", __FUNCTION__, (void *) tex);
 328    */
 329    SVGA_DBG(DEBUG_DMA, "unref sid %p (texture)\n", tex->handle);
 330    svga_screen_surface_destroy(ss, &tex->key, &tex->handle);
 331
 332    FREE(tex);
 333 }
 334
 335
 336
 337
 338
 339
 340
 341 /* XXX: Still implementing this as if it was a screen function, but
 342  * can now modify it to queue transfers on the context.
 343  */
 344 static struct pipe_transfer *
 345 svga_texture_get_transfer(struct pipe_context *pipe,
 346                           struct pipe_resource *texture,
 347                           unsigned level,
 348                           unsigned usage,
 349                           const struct pipe_box *box)
 350 {
 351    struct svga_context *svga = svga_context(pipe);
 352    struct svga_screen *ss = svga_screen(pipe->screen);
 353    struct svga_winsys_screen *sws = ss->sws;
 354    struct svga_transfer *st;
 355    unsigned nblocksx = util_format_get_nblocksx(texture->format, box->width);
 356    unsigned nblocksy = util_format_get_nblocksy(texture->format, box->height);
 357
 358    /* We can't map texture storage directly */
 359    if (usage & PIPE_TRANSFER_MAP_DIRECTLY)
 360       return NULL;
 361
 362    assert(box->depth == 1);
 363    st = CALLOC_STRUCT(svga_transfer);
 364    if (!st)
 365       return NULL;
 366
 367    pipe_resource_reference(&st->base.resource, texture);
 368    st->base.level = level;
 369    st->base.usage = usage;
 370    st->base.box = *box;
 371    st->base.stride = nblocksx*util_format_get_blocksize(texture->format);
 372    st->base.layer_stride = 0;
 373
 374    st->hw_nblocksy = nblocksy;
 375
 376    st->hwbuf = svga_winsys_buffer_create(svga,
 377                                          1,
 378                                          0,
 379                                          st->hw_nblocksy*st->base.stride);
 380    while(!st->hwbuf && (st->hw_nblocksy /= 2)) {
 381       st->hwbuf = svga_winsys_buffer_create(svga,
 382                                             1,
 383                                             0,
 384                                             st->hw_nblocksy*st->base.stride);
 385    }
 386
 387    if(!st->hwbuf)
 388       goto no_hwbuf;
 389
 390    if(st->hw_nblocksy < nblocksy) {
 391       /* We couldn't allocate a hardware buffer big enough for the transfer,
 392        * so allocate regular malloc memory instead */
 393       debug_printf("%s: failed to allocate %u KB of DMA, splitting into %u x %u KB DMA transfers\n",
 394                    __FUNCTION__,
 395                    (nblocksy*st->base.stride + 1023)/1024,
 396                    (nblocksy + st->hw_nblocksy - 1)/st->hw_nblocksy,
 397                    (st->hw_nblocksy*st->base.stride + 1023)/1024);
 398       st->swbuf = MALLOC(nblocksy*st->base.stride);
 399       if(!st->swbuf)
 400          goto no_swbuf;
 401    }
 402
 403    if (usage & PIPE_TRANSFER_READ)
 404       svga_transfer_dma(svga, st, SVGA3D_READ_HOST_VRAM);
 405
 406    return &st->base;
 407
 408 no_swbuf:
 409    sws->buffer_destroy(sws, st->hwbuf);
 410 no_hwbuf:
 411    FREE(st);
 412    return NULL;
 413 }
 414
 415
 416 /* XXX: Still implementing this as if it was a screen function, but
 417  * can now modify it to queue transfers on the context.
 418  */
 419 static void *
 420 svga_texture_transfer_map( struct pipe_context *pipe,
 421                            struct pipe_transfer *transfer )
 422 {
 423    struct svga_screen *ss = svga_screen(pipe->screen);
 424    struct svga_winsys_screen *sws = ss->sws;
 425    struct svga_transfer *st = svga_transfer(transfer);
 426
 427    if(st->swbuf)
 428       return st->swbuf;
 429    else
 430       /* The wait for read transfers already happened when svga_transfer_dma
 431        * was called. */
 432       return sws->buffer_map(sws, st->hwbuf, transfer->usage);
 433 }
 434
 435
 436 /* XXX: Still implementing this as if it was a screen function, but
 437  * can now modify it to queue transfers on the context.
 438  */
 439 static void
 440 svga_texture_transfer_unmap(struct pipe_context *pipe,
 441                             struct pipe_transfer *transfer)
 442 {
 443    struct svga_screen *ss = svga_screen(pipe->screen);
 444    struct svga_winsys_screen *sws = ss->sws;
 445    struct svga_transfer *st = svga_transfer(transfer);
 446
 447    if(!st->swbuf)
 448       sws->buffer_unmap(sws, st->hwbuf);
 449 }
 450
 451
 452 static void
 453 svga_texture_transfer_destroy(struct pipe_context *pipe,
 454                               struct pipe_transfer *transfer)
 455 {
 456    struct svga_context *svga = svga_context(pipe);
 457    struct svga_texture *tex = svga_texture(transfer->resource);
 458    struct svga_screen *ss = svga_screen(pipe->screen);
 459    struct svga_winsys_screen *sws = ss->sws;
 460    struct svga_transfer *st = svga_transfer(transfer);
 461
 462    if (st->base.usage & PIPE_TRANSFER_WRITE) {
 463       svga_transfer_dma(svga, st, SVGA3D_WRITE_HOST_VRAM);
 464       ss->texture_timestamp++;
 465       tex->view_age[transfer->level] = ++(tex->age);
 466       if (transfer->resource->target == PIPE_TEXTURE_CUBE)
 467          tex->defined[transfer->box.z][transfer->level] = TRUE;
 468       else
 469          tex->defined[0][transfer->level] = TRUE;
 470    }
 471
 472    pipe_resource_reference(&st->base.resource, NULL);
 473    FREE(st->swbuf);
 474    sws->buffer_destroy(sws, st->hwbuf);
 475    FREE(st);
 476 }
 477
 478
 479
 480
 481
 482 struct u_resource_vtbl svga_texture_vtbl =
 483 {
 484    svga_texture_get_handle,           /* get_handle */
 485    svga_texture_destroy,              /* resource_destroy */
 486    svga_texture_is_referenced,        /* is_resource_referenced */
 487    svga_texture_get_transfer,         /* get_transfer */
 488    svga_texture_transfer_destroy,     /* transfer_destroy */
 489    svga_texture_transfer_map,         /* transfer_map */
 490    u_default_transfer_flush_region,   /* transfer_flush_region */
 491    svga_texture_transfer_unmap,       /* transfer_unmap */
 492    u_default_transfer_inline_write    /* transfer_inline_write */
 493 };
 494
 495
 496
 497
 498 struct pipe_resource *
 499 svga_texture_create(struct pipe_screen *screen,
 500                     const struct pipe_resource *template)
 501 {
 502    struct svga_screen *svgascreen = svga_screen(screen);
 503    struct svga_texture *tex = CALLOC_STRUCT(svga_texture);
 504
 505    if (!tex)
 506       goto error1;
 507
 508    tex->b.b = *template;
 509    tex->b.vtbl = &svga_texture_vtbl;
 510    pipe_reference_init(&tex->b.b.reference, 1);
 511    tex->b.b.screen = screen;
 512
 513    assert(template->last_level < SVGA_MAX_TEXTURE_LEVELS);
 514    if(template->last_level >= SVGA_MAX_TEXTURE_LEVELS)
 515       goto error2;
 516
 517    tex->key.flags = 0;
 518    tex->key.size.width = template->width0;
 519    tex->key.size.height = template->height0;
 520    tex->key.size.depth = template->depth0;
 521
 522    if(template->target == PIPE_TEXTURE_CUBE) {
 523       tex->key.flags |= SVGA3D_SURFACE_CUBEMAP;
 524       tex->key.numFaces = 6;
 525    }
 526    else {
 527       tex->key.numFaces = 1;
 528    }
 529
 530    tex->key.cachable = 1;
 531
 532    if (template->bind & PIPE_BIND_SAMPLER_VIEW)
 533       tex->key.flags |= SVGA3D_SURFACE_HINT_TEXTURE;
 534
 535    if (template->bind & PIPE_BIND_DISPLAY_TARGET) {
 536       tex->key.cachable = 0;
 537    }
 538
 539    if (template->bind & PIPE_BIND_SHARED) {
 540       tex->key.cachable = 0;
 541    }
 542
 543    if (template->bind & PIPE_BIND_SCANOUT) {
 544       tex->key.flags |= SVGA3D_SURFACE_HINT_SCANOUT;
 545       tex->key.cachable = 0;
 546    }
 547
 548    /*
 549     * XXX: Never pass the SVGA3D_SURFACE_HINT_RENDERTARGET hint. Mesa cannot
 550     * know beforehand whether a texture will be used as a rendertarget or not
 551     * and it always requests PIPE_BIND_RENDER_TARGET, therefore
 552     * passing the SVGA3D_SURFACE_HINT_RENDERTARGET here defeats its purpose.
 553     */
 554 #if 0
 555    if((template->bind & PIPE_BIND_RENDER_TARGET) &&
 556       !util_format_is_s3tc(template->format))
 557       tex->key.flags |= SVGA3D_SURFACE_HINT_RENDERTARGET;
 558 #endif
 559
 560    if(template->bind & PIPE_BIND_DEPTH_STENCIL)
 561       tex->key.flags |= SVGA3D_SURFACE_HINT_DEPTHSTENCIL;
 562
 563    tex->key.numMipLevels = template->last_level + 1;
 564
 565    tex->key.format = svga_translate_format(template->format);
 566    if(tex->key.format == SVGA3D_FORMAT_INVALID)
 567       goto error2;
 568
 569    SVGA_DBG(DEBUG_DMA, "surface_create for texture\n", tex->handle);
 570    tex->handle = svga_screen_surface_create(svgascreen, &tex->key);
 571    if (tex->handle)
 572       SVGA_DBG(DEBUG_DMA, "  --> got sid %p (texture)\n", tex->handle);
 573
 574    return &tex->b.b;
 575
 576 error2:
 577    FREE(tex);
 578 error1:
 579    return NULL;
 580 }
 581
 582
 583
 584
 585 struct pipe_resource *
 586 svga_texture_from_handle(struct pipe_screen *screen,
 587                          const struct pipe_resource *template,
 588                          struct winsys_handle *whandle)
 589 {
 590    struct svga_winsys_screen *sws = svga_winsys_screen(screen);
 591    struct svga_winsys_surface *srf;
 592    struct svga_texture *tex;
 593    enum SVGA3dSurfaceFormat format = 0;
 594    assert(screen);
 595
 596    /* Only supports one type */
 597    if ((template->target != PIPE_TEXTURE_2D &&
 598        template->target != PIPE_TEXTURE_RECT) ||
 599        template->last_level != 0 ||
 600        template->depth0 != 1) {
 601       return NULL;
 602    }
 603
 604    srf = sws->surface_from_handle(sws, whandle, &format);
 605
 606    if (!srf)
 607       return NULL;
 608
 609    if (svga_translate_format(template->format) != format) {
 610       unsigned f1 = svga_translate_format(template->format);
 611       unsigned f2 = format;
 612
 613       /* It's okay for XRGB and ARGB or depth with/out stencil to get mixed up */
 614       if ( !( (f1 == SVGA3D_X8R8G8B8 && f2 == SVGA3D_A8R8G8B8) ||
 615               (f1 == SVGA3D_A8R8G8B8 && f2 == SVGA3D_X8R8G8B8) ||
 616               (f1 == SVGA3D_Z_D24X8 && f2 == SVGA3D_Z_D24S8) ) ) {
 617          debug_printf("%s wrong format %u != %u\n", __FUNCTION__, f1, f2);
 618          return NULL;
 619       }
 620    }
 621
 622    tex = CALLOC_STRUCT(svga_texture);
 623    if (!tex)
 624       return NULL;
 625
 626    tex->b.b = *template;
 627    tex->b.vtbl = &svga_texture_vtbl;
 628    pipe_reference_init(&tex->b.b.reference, 1);
 629    tex->b.b.screen = screen;
 630
 631    if (format == SVGA3D_X8R8G8B8)
 632       tex->b.b.format = PIPE_FORMAT_B8G8R8X8_UNORM;
 633    else if (format == SVGA3D_A8R8G8B8)
 634       tex->b.b.format = PIPE_FORMAT_B8G8R8A8_UNORM;
 635    else {
 636       /* ?? */
 637    }
 638
 639    SVGA_DBG(DEBUG_DMA, "wrap surface sid %p\n", srf);
 640
 641    tex->key.cachable = 0;
 642    tex->handle = srf;
 643
 644    return &tex->b.b;
 645 }
 646