src/gallium/drivers/svga/svga_resource_texture.c

   1 /**********************************************************
   2  * Copyright 2008-2009 VMware, Inc.  All rights reserved.
   3  *
   4  * Permission is hereby granted, free of charge, to any person
   5  * obtaining a copy of this software and associated documentation
   6  * files (the "Software"), to deal in the Software without
   7  * restriction, including without limitation the rights to use, copy,
   8  * modify, merge, publish, distribute, sublicense, and/or sell copies
   9  * of the Software, and to permit persons to whom the Software is
  10  * furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be
  13  * included in all copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  16  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  17  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  18  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  19  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  20  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  21  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  22  * SOFTWARE.
  23  *
  24  **********************************************************/
  25
  26 #include "svga_cmd.h"
  27
  28 #include "pipe/p_state.h"
  29 #include "pipe/p_defines.h"
  30 #include "util/u_inlines.h"
  31 #include "os/os_thread.h"
  32 #include "util/u_format.h"
  33 #include "util/u_math.h"
  34 #include "util/u_memory.h"
  35
  36 #include "svga_screen.h"
  37 #include "svga_context.h"
  38 #include "svga_resource_texture.h"
  39 #include "svga_resource_buffer.h"
  40 #include "svga_sampler_view.h"
  41 #include "svga_winsys.h"
  42 #include "svga_debug.h"
  43
  44
  45 /* XXX: This isn't a real hardware flag, but just a hack for kernel to
  46  * know about primary surfaces. Find a better way to accomplish this.
  47  */
  48 #define SVGA3D_SURFACE_HINT_SCANOUT (1 << 9)
  49
  50
  51 static unsigned int
  52 svga_texture_is_referenced( struct pipe_context *pipe,
  53                             struct pipe_resource *texture,
  54                             unsigned level, int layer)
  55 {
  56    struct svga_texture *tex = svga_texture(texture);
  57    struct svga_screen *ss = svga_screen(pipe->screen);
  58
  59    /**
  60     * The screen does not cache texture writes.
  61     */
  62
  63    if (!tex->handle || ss->sws->surface_is_flushed(ss->sws, tex->handle))
  64       return PIPE_UNREFERENCED;
  65
  66    /**
  67     * sws->surface_is_flushed() does not distinguish between read references
  68     * and write references. So assume a reference is both.
  69     */
  70
  71    return PIPE_REFERENCED_FOR_READ | PIPE_REFERENCED_FOR_WRITE;
  72 }
  73
  74
  75
  76 /*
  77  * Helper function and arrays
  78  */
  79
  80 SVGA3dSurfaceFormat
  81 svga_translate_format(enum pipe_format format)
  82 {
  83    switch(format) {
  84
  85    case PIPE_FORMAT_B8G8R8A8_UNORM:
  86       return SVGA3D_A8R8G8B8;
  87    case PIPE_FORMAT_B8G8R8X8_UNORM:
  88       return SVGA3D_X8R8G8B8;
  89
  90       /* Required for GL2.1:
  91        */
  92    case PIPE_FORMAT_B8G8R8A8_SRGB:
  93       return SVGA3D_A8R8G8B8;
  94
  95    case PIPE_FORMAT_B5G6R5_UNORM:
  96       return SVGA3D_R5G6B5;
  97    case PIPE_FORMAT_B5G5R5A1_UNORM:
  98       return SVGA3D_A1R5G5B5;
  99    case PIPE_FORMAT_B4G4R4A4_UNORM:
 100       return SVGA3D_A4R4G4B4;
 101
 102
 103    /* XXX: Doesn't seem to work properly.
 104    case PIPE_FORMAT_Z32_UNORM:
 105       return SVGA3D_Z_D32;
 106     */
 107    case PIPE_FORMAT_Z16_UNORM:
 108       return SVGA3D_Z_D16;
 109    case PIPE_FORMAT_S8_USCALED_Z24_UNORM:
 110       return SVGA3D_Z_D24S8;
 111    case PIPE_FORMAT_X8Z24_UNORM:
 112       return SVGA3D_Z_D24X8;
 113
 114    case PIPE_FORMAT_A8_UNORM:
 115       return SVGA3D_ALPHA8;
 116    case PIPE_FORMAT_L8_UNORM:
 117       return SVGA3D_LUMINANCE8;
 118
 119    case PIPE_FORMAT_DXT1_RGB:
 120    case PIPE_FORMAT_DXT1_RGBA:
 121       return SVGA3D_DXT1;
 122    case PIPE_FORMAT_DXT3_RGBA:
 123       return SVGA3D_DXT3;
 124    case PIPE_FORMAT_DXT5_RGBA:
 125       return SVGA3D_DXT5;
 126
 127    default:
 128       return SVGA3D_FORMAT_INVALID;
 129    }
 130 }
 131
 132
 133 SVGA3dSurfaceFormat
 134 svga_translate_format_render(enum pipe_format format)
 135 {
 136    switch(format) {
 137    case PIPE_FORMAT_B8G8R8A8_UNORM:
 138    case PIPE_FORMAT_B8G8R8X8_UNORM:
 139    case PIPE_FORMAT_B5G5R5A1_UNORM:
 140    case PIPE_FORMAT_B4G4R4A4_UNORM:
 141    case PIPE_FORMAT_B5G6R5_UNORM:
 142    case PIPE_FORMAT_S8_USCALED_Z24_UNORM:
 143    case PIPE_FORMAT_X8Z24_UNORM:
 144    case PIPE_FORMAT_Z32_UNORM:
 145    case PIPE_FORMAT_Z16_UNORM:
 146    case PIPE_FORMAT_L8_UNORM:
 147       return svga_translate_format(format);
 148
 149    default:
 150       return SVGA3D_FORMAT_INVALID;
 151    }
 152 }
 153
 154
 155 static INLINE void
 156 svga_transfer_dma_band(struct svga_context *svga,
 157                        struct svga_transfer *st,
 158                        SVGA3dTransferType transfer,
 159                        unsigned y, unsigned h, unsigned srcy)
 160 {
 161    struct svga_texture *texture = svga_texture(st->base.resource);
 162    SVGA3dCopyBox box;
 163    enum pipe_error ret;
 164
 165    box.x = st->base.box.x;
 166    box.y = y;
 167    box.z = st->base.box.z;
 168    box.w = st->base.box.width;
 169    box.h = h;
 170    box.d = 1;
 171    box.srcx = 0;
 172    box.srcy = srcy;
 173    box.srcz = 0;
 174
 175    if (st->base.resource->target == PIPE_TEXTURE_CUBE) {
 176       st->face = st->base.box.z;
 177       box.z = 0;
 178    }
 179    else
 180       st->face = 0;
 181
 182    SVGA_DBG(DEBUG_DMA, "dma %s sid %p, face %u, (%u, %u, %u) - (%u, %u, %u), %ubpp\n",
 183                 transfer == SVGA3D_WRITE_HOST_VRAM ? "to" : "from",
 184                 texture->handle,
 185                 st->face,
 186                 st->base.box.x,
 187                 y,
 188                 box.z,
 189                 st->base.box.x + st->base.box.width,
 190                 y + h,
 191                 box.z + 1,
 192                 util_format_get_blocksize(texture->b.b.format) * 8 /
 193                 (util_format_get_blockwidth(texture->b.b.format)*util_format_get_blockheight(texture->b.b.format)));
 194
 195    ret = SVGA3D_SurfaceDMA(svga->swc, st, transfer, &box, 1);
 196    if(ret != PIPE_OK) {
 197       svga_context_flush(svga, NULL);
 198       ret = SVGA3D_SurfaceDMA(svga->swc, st, transfer, &box, 1);
 199       assert(ret == PIPE_OK);
 200    }
 201 }
 202
 203
 204 static INLINE void
 205 svga_transfer_dma(struct svga_context *svga,
 206                   struct svga_transfer *st,
 207                   SVGA3dTransferType transfer)
 208 {
 209    struct svga_texture *texture = svga_texture(st->base.resource);
 210    struct svga_screen *screen = svga_screen(texture->b.b.screen);
 211    struct svga_winsys_screen *sws = screen->sws;
 212    struct pipe_fence_handle *fence = NULL;
 213
 214    if (transfer == SVGA3D_READ_HOST_VRAM) {
 215       SVGA_DBG(DEBUG_PERF, "%s: readback transfer\n", __FUNCTION__);
 216    }
 217
 218
 219    if(!st->swbuf) {
 220       /* Do the DMA transfer in a single go */
 221
 222       svga_transfer_dma_band(svga, st, transfer, st->base.box.y, st->base.box.height, 0);
 223
 224       if(transfer == SVGA3D_READ_HOST_VRAM) {
 225          svga_context_flush(svga, &fence);
 226          sws->fence_finish(sws, fence, 0);
 227          sws->fence_reference(sws, &fence, NULL);
 228       }
 229    }
 230    else {
 231       unsigned y, h, srcy;
 232       unsigned blockheight = util_format_get_blockheight(st->base.resource->format);
 233       h = st->hw_nblocksy * blockheight;
 234       srcy = 0;
 235       for(y = 0; y < st->base.box.height; y += h) {
 236          unsigned offset, length;
 237          void *hw, *sw;
 238
 239          if (y + h > st->base.box.height)
 240             h = st->base.box.height - y;
 241
 242          /* Transfer band must be aligned to pixel block boundaries */
 243          assert(y % blockheight == 0);
 244          assert(h % blockheight == 0);
 245
 246          offset = y * st->base.stride / blockheight;
 247          length = h * st->base.stride / blockheight;
 248
 249          sw = (uint8_t *)st->swbuf + offset;
 250
 251          if(transfer == SVGA3D_WRITE_HOST_VRAM) {
 252             /* Wait for the previous DMAs to complete */
 253             /* TODO: keep one DMA (at half the size) in the background */
 254             if(y) {
 255                svga_context_flush(svga, &fence);
 256                sws->fence_finish(sws, fence, 0);
 257                sws->fence_reference(sws, &fence, NULL);
 258             }
 259
 260             hw = sws->buffer_map(sws, st->hwbuf, PIPE_TRANSFER_WRITE);
 261             assert(hw);
 262             if(hw) {
 263                memcpy(hw, sw, length);
 264                sws->buffer_unmap(sws, st->hwbuf);
 265             }
 266          }
 267
 268          svga_transfer_dma_band(svga, st, transfer, y, h, srcy);
 269
 270          if(transfer == SVGA3D_READ_HOST_VRAM) {
 271             svga_context_flush(svga, &fence);
 272             sws->fence_finish(sws, fence, 0);
 273
 274             hw = sws->buffer_map(sws, st->hwbuf, PIPE_TRANSFER_READ);
 275             assert(hw);
 276             if(hw) {
 277                memcpy(sw, hw, length);
 278                sws->buffer_unmap(sws, st->hwbuf);
 279             }
 280          }
 281       }
 282    }
 283 }
 284
 285
 286
 287
 288
 289 static boolean
 290 svga_texture_get_handle(struct pipe_screen *screen,
 291                                struct pipe_resource *texture,
 292                                struct winsys_handle *whandle)
 293 {
 294    struct svga_winsys_screen *sws = svga_winsys_screen(texture->screen);
 295    unsigned stride;
 296
 297    assert(svga_texture(texture)->key.cachable == 0);
 298    svga_texture(texture)->key.cachable = 0;
 299    stride = util_format_get_nblocksx(texture->format, texture->width0) *
 300             util_format_get_blocksize(texture->format);
 301    return sws->surface_get_handle(sws, svga_texture(texture)->handle, stride, whandle);
 302 }
 303
 304
 305 static void
 306 svga_texture_destroy(struct pipe_screen *screen,
 307                      struct pipe_resource *pt)
 308 {
 309    struct svga_screen *ss = svga_screen(screen);
 310    struct svga_texture *tex = (struct svga_texture *)pt;
 311
 312    ss->texture_timestamp++;
 313
 314    svga_sampler_view_reference(&tex->cached_view, NULL);
 315
 316    /*
 317      DBG("%s deleting %p\n", __FUNCTION__, (void *) tex);
 318    */
 319    SVGA_DBG(DEBUG_DMA, "unref sid %p (texture)\n", tex->handle);
 320    svga_screen_surface_destroy(ss, &tex->key, &tex->handle);
 321
 322    FREE(tex);
 323 }
 324
 325
 326
 327
 328
 329
 330
 331 /* XXX: Still implementing this as if it was a screen function, but
 332  * can now modify it to queue transfers on the context.
 333  */
 334 static struct pipe_transfer *
 335 svga_texture_get_transfer(struct pipe_context *pipe,
 336                           struct pipe_resource *texture,
 337                           unsigned level,
 338                           unsigned usage,
 339                           const struct pipe_box *box)
 340 {
 341    struct svga_context *svga = svga_context(pipe);
 342    struct svga_screen *ss = svga_screen(pipe->screen);
 343    struct svga_winsys_screen *sws = ss->sws;
 344    struct svga_transfer *st;
 345    unsigned nblocksx = util_format_get_nblocksx(texture->format, box->width);
 346    unsigned nblocksy = util_format_get_nblocksy(texture->format, box->height);
 347
 348    /* We can't map texture storage directly */
 349    if (usage & PIPE_TRANSFER_MAP_DIRECTLY)
 350       return NULL;
 351
 352    assert(box->depth == 1);
 353    st = CALLOC_STRUCT(svga_transfer);
 354    if (!st)
 355       return NULL;
 356
 357    pipe_resource_reference(&st->base.resource, texture);
 358    st->base.level = level;
 359    st->base.usage = usage;
 360    st->base.box = *box;
 361    st->base.stride = nblocksx*util_format_get_blocksize(texture->format);
 362    st->base.layer_stride = 0;
 363
 364    st->hw_nblocksy = nblocksy;
 365
 366    st->hwbuf = svga_winsys_buffer_create(svga,
 367                                          1,
 368                                          0,
 369                                          st->hw_nblocksy*st->base.stride);
 370    while(!st->hwbuf && (st->hw_nblocksy /= 2)) {
 371       st->hwbuf = svga_winsys_buffer_create(svga,
 372                                             1,
 373                                             0,
 374                                             st->hw_nblocksy*st->base.stride);
 375    }
 376
 377    if(!st->hwbuf)
 378       goto no_hwbuf;
 379
 380    if(st->hw_nblocksy < nblocksy) {
 381       /* We couldn't allocate a hardware buffer big enough for the transfer,
 382        * so allocate regular malloc memory instead */
 383       if (0) {
 384          debug_printf("%s: failed to allocate %u KB of DMA, "
 385                       "splitting into %u x %u KB DMA transfers\n",
 386                       __FUNCTION__,
 387                       (nblocksy*st->base.stride + 1023)/1024,
 388                       (nblocksy + st->hw_nblocksy - 1)/st->hw_nblocksy,
 389                       (st->hw_nblocksy*st->base.stride + 1023)/1024);
 390       }
 391
 392       st->swbuf = MALLOC(nblocksy*st->base.stride);
 393       if(!st->swbuf)
 394          goto no_swbuf;
 395    }
 396
 397    if (usage & PIPE_TRANSFER_READ)
 398       svga_transfer_dma(svga, st, SVGA3D_READ_HOST_VRAM);
 399
 400    return &st->base;
 401
 402 no_swbuf:
 403    sws->buffer_destroy(sws, st->hwbuf);
 404 no_hwbuf:
 405    FREE(st);
 406    return NULL;
 407 }
 408
 409
 410 /* XXX: Still implementing this as if it was a screen function, but
 411  * can now modify it to queue transfers on the context.
 412  */
 413 static void *
 414 svga_texture_transfer_map( struct pipe_context *pipe,
 415                            struct pipe_transfer *transfer )
 416 {
 417    struct svga_screen *ss = svga_screen(pipe->screen);
 418    struct svga_winsys_screen *sws = ss->sws;
 419    struct svga_transfer *st = svga_transfer(transfer);
 420
 421    if(st->swbuf)
 422       return st->swbuf;
 423    else
 424       /* The wait for read transfers already happened when svga_transfer_dma
 425        * was called. */
 426       return sws->buffer_map(sws, st->hwbuf, transfer->usage);
 427 }
 428
 429
 430 /* XXX: Still implementing this as if it was a screen function, but
 431  * can now modify it to queue transfers on the context.
 432  */
 433 static void
 434 svga_texture_transfer_unmap(struct pipe_context *pipe,
 435                             struct pipe_transfer *transfer)
 436 {
 437    struct svga_screen *ss = svga_screen(pipe->screen);
 438    struct svga_winsys_screen *sws = ss->sws;
 439    struct svga_transfer *st = svga_transfer(transfer);
 440
 441    if(!st->swbuf)
 442       sws->buffer_unmap(sws, st->hwbuf);
 443 }
 444
 445
 446 static void
 447 svga_texture_transfer_destroy(struct pipe_context *pipe,
 448                               struct pipe_transfer *transfer)
 449 {
 450    struct svga_context *svga = svga_context(pipe);
 451    struct svga_texture *tex = svga_texture(transfer->resource);
 452    struct svga_screen *ss = svga_screen(pipe->screen);
 453    struct svga_winsys_screen *sws = ss->sws;
 454    struct svga_transfer *st = svga_transfer(transfer);
 455
 456    if (st->base.usage & PIPE_TRANSFER_WRITE) {
 457       svga_transfer_dma(svga, st, SVGA3D_WRITE_HOST_VRAM);
 458       ss->texture_timestamp++;
 459       tex->view_age[transfer->level] = ++(tex->age);
 460       if (transfer->resource->target == PIPE_TEXTURE_CUBE)
 461          tex->defined[transfer->box.z][transfer->level] = TRUE;
 462       else
 463          tex->defined[0][transfer->level] = TRUE;
 464    }
 465
 466    pipe_resource_reference(&st->base.resource, NULL);
 467    FREE(st->swbuf);
 468    sws->buffer_destroy(sws, st->hwbuf);
 469    FREE(st);
 470 }
 471
 472
 473
 474
 475
 476 struct u_resource_vtbl svga_texture_vtbl =
 477 {
 478    svga_texture_get_handle,           /* get_handle */
 479    svga_texture_destroy,              /* resource_destroy */
 480    svga_texture_is_referenced,        /* is_resource_referenced */
 481    svga_texture_get_transfer,         /* get_transfer */
 482    svga_texture_transfer_destroy,     /* transfer_destroy */
 483    svga_texture_transfer_map,         /* transfer_map */
 484    u_default_transfer_flush_region,   /* transfer_flush_region */
 485    svga_texture_transfer_unmap,       /* transfer_unmap */
 486    u_default_transfer_inline_write    /* transfer_inline_write */
 487 };
 488
 489
 490
 491
 492 struct pipe_resource *
 493 svga_texture_create(struct pipe_screen *screen,
 494                     const struct pipe_resource *template)
 495 {
 496    struct svga_screen *svgascreen = svga_screen(screen);
 497    struct svga_texture *tex = CALLOC_STRUCT(svga_texture);
 498
 499    if (!tex)
 500       goto error1;
 501
 502    tex->b.b = *template;
 503    tex->b.vtbl = &svga_texture_vtbl;
 504    pipe_reference_init(&tex->b.b.reference, 1);
 505    tex->b.b.screen = screen;
 506
 507    assert(template->last_level < SVGA_MAX_TEXTURE_LEVELS);
 508    if(template->last_level >= SVGA_MAX_TEXTURE_LEVELS)
 509       goto error2;
 510
 511    tex->key.flags = 0;
 512    tex->key.size.width = template->width0;
 513    tex->key.size.height = template->height0;
 514    tex->key.size.depth = template->depth0;
 515
 516    if(template->target == PIPE_TEXTURE_CUBE) {
 517       tex->key.flags |= SVGA3D_SURFACE_CUBEMAP;
 518       tex->key.numFaces = 6;
 519    }
 520    else {
 521       tex->key.numFaces = 1;
 522    }
 523
 524    tex->key.cachable = 1;
 525
 526    if (template->bind & PIPE_BIND_SAMPLER_VIEW)
 527       tex->key.flags |= SVGA3D_SURFACE_HINT_TEXTURE;
 528
 529    if (template->bind & PIPE_BIND_DISPLAY_TARGET) {
 530       tex->key.cachable = 0;
 531    }
 532
 533    if (template->bind & PIPE_BIND_SHARED) {
 534       tex->key.cachable = 0;
 535    }
 536
 537    if (template->bind & PIPE_BIND_SCANOUT) {
 538       tex->key.flags |= SVGA3D_SURFACE_HINT_SCANOUT;
 539       tex->key.cachable = 0;
 540    }
 541
 542    /*
 543     * XXX: Never pass the SVGA3D_SURFACE_HINT_RENDERTARGET hint. Mesa cannot
 544     * know beforehand whether a texture will be used as a rendertarget or not
 545     * and it always requests PIPE_BIND_RENDER_TARGET, therefore
 546     * passing the SVGA3D_SURFACE_HINT_RENDERTARGET here defeats its purpose.
 547     */
 548 #if 0
 549    if((template->bind & PIPE_BIND_RENDER_TARGET) &&
 550       !util_format_is_s3tc(template->format))
 551       tex->key.flags |= SVGA3D_SURFACE_HINT_RENDERTARGET;
 552 #endif
 553
 554    if(template->bind & PIPE_BIND_DEPTH_STENCIL)
 555       tex->key.flags |= SVGA3D_SURFACE_HINT_DEPTHSTENCIL;
 556
 557    tex->key.numMipLevels = template->last_level + 1;
 558
 559    tex->key.format = svga_translate_format(template->format);
 560    if(tex->key.format == SVGA3D_FORMAT_INVALID)
 561       goto error2;
 562
 563    SVGA_DBG(DEBUG_DMA, "surface_create for texture\n", tex->handle);
 564    tex->handle = svga_screen_surface_create(svgascreen, &tex->key);
 565    if (tex->handle)
 566       SVGA_DBG(DEBUG_DMA, "  --> got sid %p (texture)\n", tex->handle);
 567
 568    return &tex->b.b;
 569
 570 error2:
 571    FREE(tex);
 572 error1:
 573    return NULL;
 574 }
 575
 576
 577
 578
 579 struct pipe_resource *
 580 svga_texture_from_handle(struct pipe_screen *screen,
 581                          const struct pipe_resource *template,
 582                          struct winsys_handle *whandle)
 583 {
 584    struct svga_winsys_screen *sws = svga_winsys_screen(screen);
 585    struct svga_winsys_surface *srf;
 586    struct svga_texture *tex;
 587    enum SVGA3dSurfaceFormat format = 0;
 588    assert(screen);
 589
 590    /* Only supports one type */
 591    if ((template->target != PIPE_TEXTURE_2D &&
 592        template->target != PIPE_TEXTURE_RECT) ||
 593        template->last_level != 0 ||
 594        template->depth0 != 1) {
 595       return NULL;
 596    }
 597
 598    srf = sws->surface_from_handle(sws, whandle, &format);
 599
 600    if (!srf)
 601       return NULL;
 602
 603    if (svga_translate_format(template->format) != format) {
 604       unsigned f1 = svga_translate_format(template->format);
 605       unsigned f2 = format;
 606
 607       /* It's okay for XRGB and ARGB or depth with/out stencil to get mixed up */
 608       if ( !( (f1 == SVGA3D_X8R8G8B8 && f2 == SVGA3D_A8R8G8B8) ||
 609               (f1 == SVGA3D_A8R8G8B8 && f2 == SVGA3D_X8R8G8B8) ||
 610               (f1 == SVGA3D_Z_D24X8 && f2 == SVGA3D_Z_D24S8) ) ) {
 611          debug_printf("%s wrong format %u != %u\n", __FUNCTION__, f1, f2);
 612          return NULL;
 613       }
 614    }
 615
 616    tex = CALLOC_STRUCT(svga_texture);
 617    if (!tex)
 618       return NULL;
 619
 620    tex->b.b = *template;
 621    tex->b.vtbl = &svga_texture_vtbl;
 622    pipe_reference_init(&tex->b.b.reference, 1);
 623    tex->b.b.screen = screen;
 624
 625    if (format == SVGA3D_X8R8G8B8)
 626       tex->b.b.format = PIPE_FORMAT_B8G8R8X8_UNORM;
 627    else if (format == SVGA3D_A8R8G8B8)
 628       tex->b.b.format = PIPE_FORMAT_B8G8R8A8_UNORM;
 629    else {
 630       /* ?? */
 631    }
 632
 633    SVGA_DBG(DEBUG_DMA, "wrap surface sid %p\n", srf);
 634
 635    tex->key.cachable = 0;
 636    tex->handle = srf;
 637
 638    return &tex->b.b;
 639 }
 640