src/gallium/drivers/svga/svga_resource_texture.c

   1 /**********************************************************
   2  * Copyright 2008-2009 VMware, Inc.  All rights reserved.
   3  *
   4  * Permission is hereby granted, free of charge, to any person
   5  * obtaining a copy of this software and associated documentation
   6  * files (the "Software"), to deal in the Software without
   7  * restriction, including without limitation the rights to use, copy,
   8  * modify, merge, publish, distribute, sublicense, and/or sell copies
   9  * of the Software, and to permit persons to whom the Software is
  10  * furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be
  13  * included in all copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  16  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  17  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  18  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  19  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  20  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  21  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  22  * SOFTWARE.
  23  *
  24  **********************************************************/
  25
  26 #include "svga3d_reg.h"
  27 #include "svga3d_surfacedefs.h"
  28
  29 #include "pipe/p_state.h"
  30 #include "pipe/p_defines.h"
  31 #include "os/os_thread.h"
  32 #include "os/os_time.h"
  33 #include "util/u_format.h"
  34 #include "util/u_inlines.h"
  35 #include "util/u_math.h"
  36 #include "util/u_memory.h"
  37 #include "util/u_resource.h"
  38
  39 #include "svga_cmd.h"
  40 #include "svga_format.h"
  41 #include "svga_screen.h"
  42 #include "svga_context.h"
  43 #include "svga_resource_texture.h"
  44 #include "svga_resource_buffer.h"
  45 #include "svga_sampler_view.h"
  46 #include "svga_winsys.h"
  47 #include "svga_debug.h"
  48
  49
  50 static void
  51 svga_transfer_dma_band(struct svga_context *svga,
  52                        struct svga_transfer *st,
  53                        SVGA3dTransferType transfer,
  54                        unsigned y, unsigned h, unsigned srcy,
  55                        SVGA3dSurfaceDMAFlags flags)
  56 {
  57    struct svga_texture *texture = svga_texture(st->base.resource);
  58    SVGA3dCopyBox box;
  59    enum pipe_error ret;
  60
  61    assert(!st->use_direct_map);
  62
  63    box.x = st->base.box.x;
  64    box.y = y;
  65    box.z = st->base.box.z;
  66    box.w = st->base.box.width;
  67    box.h = h;
  68    box.d = 1;
  69    box.srcx = 0;
  70    box.srcy = srcy;
  71    box.srcz = 0;
  72
  73    SVGA_DBG(DEBUG_DMA, "dma %s sid %p, face %u, (%u, %u, %u) - "
  74             "(%u, %u, %u), %ubpp\n",
  75             transfer == SVGA3D_WRITE_HOST_VRAM ? "to" : "from",
  76             texture->handle,
  77             st->slice,
  78             st->base.box.x,
  79             y,
  80             box.z,
  81             st->base.box.x + st->base.box.width,
  82             y + h,
  83             box.z + 1,
  84             util_format_get_blocksize(texture->b.b.format) * 8 /
  85             (util_format_get_blockwidth(texture->b.b.format)
  86              * util_format_get_blockheight(texture->b.b.format)));
  87
  88    ret = SVGA3D_SurfaceDMA(svga->swc, st, transfer, &box, 1, flags);
  89    if (ret != PIPE_OK) {
  90       svga_context_flush(svga, NULL);
  91       ret = SVGA3D_SurfaceDMA(svga->swc, st, transfer, &box, 1, flags);
  92       assert(ret == PIPE_OK);
  93    }
  94 }
  95
  96
  97 static void
  98 svga_transfer_dma(struct svga_context *svga,
  99                   struct svga_transfer *st,
 100                   SVGA3dTransferType transfer,
 101                   SVGA3dSurfaceDMAFlags flags)
 102 {
 103    struct svga_texture *texture = svga_texture(st->base.resource);
 104    struct svga_screen *screen = svga_screen(texture->b.b.screen);
 105    struct svga_winsys_screen *sws = screen->sws;
 106    struct pipe_fence_handle *fence = NULL;
 107
 108    assert(!st->use_direct_map);
 109
 110    if (transfer == SVGA3D_READ_HOST_VRAM) {
 111       SVGA_DBG(DEBUG_PERF, "%s: readback transfer\n", __FUNCTION__);
 112    }
 113
 114    /* Ensure any pending operations on host surfaces are queued on the command
 115     * buffer first.
 116     */
 117    svga_surfaces_flush( svga );
 118
 119    if (!st->swbuf) {
 120       /* Do the DMA transfer in a single go */
 121       svga_transfer_dma_band(svga, st, transfer,
 122                              st->base.box.y, st->base.box.height, 0,
 123                              flags);
 124
 125       if (transfer == SVGA3D_READ_HOST_VRAM) {
 126          svga_context_flush(svga, &fence);
 127          sws->fence_finish(sws, fence, 0);
 128          sws->fence_reference(sws, &fence, NULL);
 129       }
 130    }
 131    else {
 132       int y, h, srcy;
 133       unsigned blockheight =
 134          util_format_get_blockheight(st->base.resource->format);
 135
 136       h = st->hw_nblocksy * blockheight;
 137       srcy = 0;
 138
 139       for (y = 0; y < st->base.box.height; y += h) {
 140          unsigned offset, length;
 141          void *hw, *sw;
 142
 143          if (y + h > st->base.box.height)
 144             h = st->base.box.height - y;
 145
 146          /* Transfer band must be aligned to pixel block boundaries */
 147          assert(y % blockheight == 0);
 148          assert(h % blockheight == 0);
 149
 150          offset = y * st->base.stride / blockheight;
 151          length = h * st->base.stride / blockheight;
 152
 153          sw = (uint8_t *) st->swbuf + offset;
 154
 155          if (transfer == SVGA3D_WRITE_HOST_VRAM) {
 156             unsigned usage = PIPE_TRANSFER_WRITE;
 157
 158             /* Wait for the previous DMAs to complete */
 159             /* TODO: keep one DMA (at half the size) in the background */
 160             if (y) {
 161                svga_context_flush(svga, NULL);
 162                usage |= PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE;
 163             }
 164
 165             hw = sws->buffer_map(sws, st->hwbuf, usage);
 166             assert(hw);
 167             if (hw) {
 168                memcpy(hw, sw, length);
 169                sws->buffer_unmap(sws, st->hwbuf);
 170             }
 171          }
 172
 173          svga_transfer_dma_band(svga, st, transfer, y, h, srcy, flags);
 174
 175          /*
 176           * Prevent the texture contents to be discarded on the next band
 177           * upload.
 178           */
 179          flags.discard = FALSE;
 180
 181          if (transfer == SVGA3D_READ_HOST_VRAM) {
 182             svga_context_flush(svga, &fence);
 183             sws->fence_finish(sws, fence, 0);
 184
 185             hw = sws->buffer_map(sws, st->hwbuf, PIPE_TRANSFER_READ);
 186             assert(hw);
 187             if (hw) {
 188                memcpy(sw, hw, length);
 189                sws->buffer_unmap(sws, st->hwbuf);
 190             }
 191          }
 192       }
 193    }
 194 }
 195
 196
 197 static boolean
 198 svga_texture_get_handle(struct pipe_screen *screen,
 199                         struct pipe_resource *texture,
 200                         struct winsys_handle *whandle)
 201 {
 202    struct svga_winsys_screen *sws = svga_winsys_screen(texture->screen);
 203    unsigned stride;
 204
 205    assert(svga_texture(texture)->key.cachable == 0);
 206    svga_texture(texture)->key.cachable = 0;
 207
 208    stride = util_format_get_nblocksx(texture->format, texture->width0) *
 209             util_format_get_blocksize(texture->format);
 210
 211    return sws->surface_get_handle(sws, svga_texture(texture)->handle,
 212                                   stride, whandle);
 213 }
 214
 215
 216 static void
 217 svga_texture_destroy(struct pipe_screen *screen,
 218                      struct pipe_resource *pt)
 219 {
 220    struct svga_screen *ss = svga_screen(screen);
 221    struct svga_texture *tex = svga_texture(pt);
 222
 223    ss->texture_timestamp++;
 224
 225    svga_sampler_view_reference(&tex->cached_view, NULL);
 226
 227    /*
 228      DBG("%s deleting %p\n", __FUNCTION__, (void *) tex);
 229    */
 230    SVGA_DBG(DEBUG_DMA, "unref sid %p (texture)\n", tex->handle);
 231    svga_screen_surface_destroy(ss, &tex->key, &tex->handle);
 232
 233    ss->hud.total_resource_bytes -= tex->size;
 234
 235    FREE(tex->defined);
 236    FREE(tex->rendered_to);
 237    FREE(tex);
 238
 239    assert(ss->hud.num_resources > 0);
 240    if (ss->hud.num_resources > 0)
 241       ss->hud.num_resources--;
 242 }
 243
 244
 245 /**
 246  * Determine if we need to read back a texture image before mapping it.
 247  */
 248 static boolean
 249 need_tex_readback(struct pipe_transfer *transfer)
 250 {
 251    struct svga_texture *t = svga_texture(transfer->resource);
 252
 253    if (transfer->usage & PIPE_TRANSFER_READ)
 254       return TRUE;
 255
 256    if ((transfer->usage & PIPE_TRANSFER_WRITE) &&
 257        ((transfer->usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) == 0)) {
 258       unsigned face;
 259
 260       if (transfer->resource->target == PIPE_TEXTURE_CUBE) {
 261          assert(transfer->box.depth == 1);
 262          face = transfer->box.z;
 263       }
 264       else {
 265          face = 0;
 266       }
 267       if (svga_was_texture_rendered_to(t, face, transfer->level)) {
 268          return TRUE;
 269       }
 270    }
 271
 272    return FALSE;
 273 }
 274
 275
 276 static enum pipe_error
 277 readback_image_vgpu9(struct svga_context *svga,
 278                    struct svga_winsys_surface *surf,
 279                    unsigned slice,
 280                    unsigned level)
 281 {
 282    enum pipe_error ret;
 283
 284    ret = SVGA3D_ReadbackGBImage(svga->swc, surf, slice, level);
 285    if (ret != PIPE_OK) {
 286       svga_context_flush(svga, NULL);
 287       ret = SVGA3D_ReadbackGBImage(svga->swc, surf, slice, level);
 288    }
 289    return ret;
 290 }
 291
 292
 293 static enum pipe_error
 294 readback_image_vgpu10(struct svga_context *svga,
 295                     struct svga_winsys_surface *surf,
 296                     unsigned slice,
 297                     unsigned level,
 298                     unsigned numMipLevels)
 299 {
 300    enum pipe_error ret;
 301    unsigned subResource;
 302
 303    subResource = slice * numMipLevels + level;
 304    ret = SVGA3D_vgpu10_ReadbackSubResource(svga->swc, surf, subResource);
 305    if (ret != PIPE_OK) {
 306       svga_context_flush(svga, NULL);
 307       ret = SVGA3D_vgpu10_ReadbackSubResource(svga->swc, surf, subResource);
 308    }
 309    return ret;
 310 }
 311
 312
 313 static void *
 314 svga_texture_transfer_map(struct pipe_context *pipe,
 315                           struct pipe_resource *texture,
 316                           unsigned level,
 317                           unsigned usage,
 318                           const struct pipe_box *box,
 319                           struct pipe_transfer **ptransfer)
 320 {
 321    struct svga_context *svga = svga_context(pipe);
 322    struct svga_screen *ss = svga_screen(pipe->screen);
 323    struct svga_winsys_screen *sws = ss->sws;
 324    struct svga_texture *tex = svga_texture(texture);
 325    struct svga_transfer *st;
 326    unsigned nblocksx, nblocksy;
 327    boolean use_direct_map = svga_have_gb_objects(svga) &&
 328       !svga_have_gb_dma(svga);
 329    unsigned d;
 330    void *returnVal;
 331    int64_t begin = os_time_get();
 332
 333    /* We can't map texture storage directly unless we have GB objects */
 334    if (usage & PIPE_TRANSFER_MAP_DIRECTLY) {
 335       if (svga_have_gb_objects(svga))
 336          use_direct_map = TRUE;
 337       else
 338          return NULL;
 339    }
 340
 341    st = CALLOC_STRUCT(svga_transfer);
 342    if (!st)
 343       return NULL;
 344
 345    {
 346       unsigned w, h;
 347       if (use_direct_map) {
 348          /* we'll directly access the guest-backed surface */
 349          w = u_minify(texture->width0, level);
 350          h = u_minify(texture->height0, level);
 351          d = u_minify(texture->depth0, level);
 352       }
 353       else {
 354          /* we'll put the data into a tightly packed buffer */
 355          w = box->width;
 356          h = box->height;
 357          d = box->depth;
 358       }
 359       nblocksx = util_format_get_nblocksx(texture->format, w);
 360       nblocksy = util_format_get_nblocksy(texture->format, h);
 361    }
 362
 363    pipe_resource_reference(&st->base.resource, texture);
 364
 365    st->base.level = level;
 366    st->base.usage = usage;
 367    st->base.box = *box;
 368    st->base.stride = nblocksx*util_format_get_blocksize(texture->format);
 369    st->base.layer_stride = st->base.stride * nblocksy;
 370
 371    switch (tex->b.b.target) {
 372    case PIPE_TEXTURE_CUBE:
 373    case PIPE_TEXTURE_2D_ARRAY:
 374    case PIPE_TEXTURE_1D_ARRAY:
 375       st->slice = st->base.box.z;
 376       st->base.box.z = 0;   /* so we don't apply double offsets below */
 377       break;
 378    default:
 379       st->slice = 0;
 380       break;
 381    }
 382
 383    if (!use_direct_map) {
 384       /* Use a DMA buffer */
 385       st->hw_nblocksy = nblocksy;
 386
 387       st->hwbuf = svga_winsys_buffer_create(svga, 1, 0,
 388                                    st->hw_nblocksy * st->base.stride * d);
 389       while(!st->hwbuf && (st->hw_nblocksy /= 2)) {
 390          st->hwbuf = svga_winsys_buffer_create(svga, 1, 0,
 391                                    st->hw_nblocksy * st->base.stride * d);
 392       }
 393
 394       if (!st->hwbuf) {
 395          FREE(st);
 396          return NULL;
 397       }
 398
 399       if (st->hw_nblocksy < nblocksy) {
 400          /* We couldn't allocate a hardware buffer big enough for the transfer,
 401           * so allocate regular malloc memory instead */
 402          if (0) {
 403             debug_printf("%s: failed to allocate %u KB of DMA, "
 404                          "splitting into %u x %u KB DMA transfers\n",
 405                          __FUNCTION__,
 406                          (nblocksy*st->base.stride + 1023)/1024,
 407                          (nblocksy + st->hw_nblocksy - 1)/st->hw_nblocksy,
 408                          (st->hw_nblocksy*st->base.stride + 1023)/1024);
 409          }
 410
 411          st->swbuf = MALLOC(nblocksy * st->base.stride * d);
 412          if (!st->swbuf) {
 413             sws->buffer_destroy(sws, st->hwbuf);
 414             FREE(st);
 415             return NULL;
 416          }
 417       }
 418
 419       if (usage & PIPE_TRANSFER_READ) {
 420          SVGA3dSurfaceDMAFlags flags;
 421          memset(&flags, 0, sizeof flags);
 422          svga_transfer_dma(svga, st, SVGA3D_READ_HOST_VRAM, flags);
 423       }
 424    } else {
 425       struct pipe_transfer *transfer = &st->base;
 426       struct svga_winsys_surface *surf = tex->handle;
 427
 428       if (!surf) {
 429          FREE(st);
 430          return NULL;
 431       }
 432
 433       if (need_tex_readback(transfer)) {
 434          enum pipe_error ret;
 435
 436          svga_surfaces_flush(svga);
 437
 438          if (svga_have_vgpu10(svga)) {
 439             ret = readback_image_vgpu10(svga, surf, st->slice, transfer->level,
 440                                         tex->b.b.last_level + 1);
 441          } else {
 442             ret = readback_image_vgpu9(svga, surf, st->slice, transfer->level);
 443          }
 444
 445          assert(ret == PIPE_OK);
 446          (void) ret;
 447
 448          svga_context_flush(svga, NULL);
 449
 450          /*
 451           * Note: if PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE were specified
 452           * we could potentially clear the flag for all faces/layers/mips.
 453           */
 454          svga_clear_texture_rendered_to(tex, st->slice, transfer->level);
 455       }
 456       else {
 457          assert(transfer->usage & PIPE_TRANSFER_WRITE);
 458          if ((transfer->usage & PIPE_TRANSFER_UNSYNCHRONIZED) == 0) {
 459             svga_surfaces_flush(svga);
 460             if (!sws->surface_is_flushed(sws, surf))
 461                svga_context_flush(svga, NULL);
 462          }
 463       }
 464    }
 465
 466    st->use_direct_map = use_direct_map;
 467
 468    *ptransfer = &st->base;
 469
 470    /*
 471     * Begin mapping code
 472     */
 473    if (st->swbuf) {
 474       returnVal = st->swbuf;
 475    }
 476    else if (!st->use_direct_map) {
 477       returnVal = sws->buffer_map(sws, st->hwbuf, usage);
 478    }
 479    else {
 480       SVGA3dSize baseLevelSize;
 481       struct svga_texture *tex = svga_texture(texture);
 482       struct svga_winsys_surface *surf = tex->handle;
 483       uint8_t *map;
 484       boolean retry;
 485       unsigned offset, mip_width, mip_height;
 486       unsigned xoffset = st->base.box.x;
 487       unsigned yoffset = st->base.box.y;
 488       unsigned zoffset = st->base.box.z;
 489
 490       map = svga->swc->surface_map(svga->swc, surf, usage, &retry);
 491       if (map == NULL && retry) {
 492          /*
 493           * At this point, the svga_surfaces_flush() should already have
 494           * called in svga_texture_get_transfer().
 495           */
 496          svga_context_flush(svga, NULL);
 497          map = svga->swc->surface_map(svga->swc, surf, usage, &retry);
 498       }
 499
 500       /*
 501        * Make sure we return NULL if the map fails
 502        */
 503       if (map == NULL) {
 504          FREE(st);
 505          return map;
 506       }
 507
 508       /**
 509        * Compute the offset to the specific texture slice in the buffer.
 510        */
 511       baseLevelSize.width = tex->b.b.width0;
 512       baseLevelSize.height = tex->b.b.height0;
 513       baseLevelSize.depth = tex->b.b.depth0;
 514
 515       offset = svga3dsurface_get_image_offset(tex->key.format, baseLevelSize,
 516                                               tex->b.b.last_level + 1, /* numMips */
 517                                               st->slice, level);
 518       if (level > 0) {
 519          assert(offset > 0);
 520       }
 521
 522       mip_width = u_minify(tex->b.b.width0, level);
 523       mip_height = u_minify(tex->b.b.height0, level);
 524
 525       offset += svga3dsurface_get_pixel_offset(tex->key.format,
 526                                                mip_width, mip_height,
 527                                                xoffset, yoffset, zoffset);
 528       returnVal = (void *) (map + offset);
 529    }
 530
 531    svga->hud.map_buffer_time += (os_time_get() - begin);
 532    svga->hud.num_resources_mapped++;
 533
 534    return returnVal;
 535 }
 536
 537
 538 /**
 539  * Unmap a GB texture surface.
 540  */
 541 static void
 542 svga_texture_surface_unmap(struct svga_context *svga,
 543                            struct pipe_transfer *transfer)
 544 {
 545    struct svga_winsys_surface *surf = svga_texture(transfer->resource)->handle;
 546    struct svga_winsys_context *swc = svga->swc;
 547    boolean rebind;
 548
 549    assert(surf);
 550
 551    swc->surface_unmap(swc, surf, &rebind);
 552    if (rebind) {
 553       enum pipe_error ret;
 554       ret = SVGA3D_BindGBSurface(swc, surf);
 555       if (ret != PIPE_OK) {
 556          /* flush and retry */
 557          svga_context_flush(svga, NULL);
 558          ret = SVGA3D_BindGBSurface(swc, surf);
 559          assert(ret == PIPE_OK);
 560       }
 561    }
 562 }
 563
 564
 565 static enum pipe_error
 566 update_image_vgpu9(struct svga_context *svga,
 567                    struct svga_winsys_surface *surf,
 568                    const SVGA3dBox *box,
 569                    unsigned slice,
 570                    unsigned level)
 571 {
 572    enum pipe_error ret;
 573
 574    ret = SVGA3D_UpdateGBImage(svga->swc, surf, box, slice, level);
 575    if (ret != PIPE_OK) {
 576       svga_context_flush(svga, NULL);
 577       ret = SVGA3D_UpdateGBImage(svga->swc, surf, box, slice, level);
 578    }
 579    return ret;
 580 }
 581
 582
 583 static enum pipe_error
 584 update_image_vgpu10(struct svga_context *svga,
 585                     struct svga_winsys_surface *surf,
 586                     const SVGA3dBox *box,
 587                     unsigned slice,
 588                     unsigned level,
 589                     unsigned numMipLevels)
 590 {
 591    enum pipe_error ret;
 592    unsigned subResource;
 593
 594    subResource = slice * numMipLevels + level;
 595    ret = SVGA3D_vgpu10_UpdateSubResource(svga->swc, surf, box, subResource);
 596    if (ret != PIPE_OK) {
 597       svga_context_flush(svga, NULL);
 598       ret = SVGA3D_vgpu10_UpdateSubResource(svga->swc, surf, box, subResource);
 599    }
 600    return ret;
 601 }
 602
 603
 604 static void
 605 svga_texture_transfer_unmap(struct pipe_context *pipe,
 606                             struct pipe_transfer *transfer)
 607 {
 608    struct svga_context *svga = svga_context(pipe);
 609    struct svga_screen *ss = svga_screen(pipe->screen);
 610    struct svga_winsys_screen *sws = ss->sws;
 611    struct svga_transfer *st = svga_transfer(transfer);
 612    struct svga_texture *tex = svga_texture(transfer->resource);
 613
 614    if (!st->swbuf) {
 615       if (st->use_direct_map) {
 616          svga_texture_surface_unmap(svga, transfer);
 617       }
 618       else {
 619          sws->buffer_unmap(sws, st->hwbuf);
 620       }
 621    }
 622
 623    if (!st->use_direct_map && (st->base.usage & PIPE_TRANSFER_WRITE)) {
 624       /* Use DMA to transfer texture data */
 625       SVGA3dSurfaceDMAFlags flags;
 626
 627       memset(&flags, 0, sizeof flags);
 628       if (transfer->usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) {
 629          flags.discard = TRUE;
 630       }
 631       if (transfer->usage & PIPE_TRANSFER_UNSYNCHRONIZED) {
 632          flags.unsynchronized = TRUE;
 633       }
 634
 635       svga_transfer_dma(svga, st, SVGA3D_WRITE_HOST_VRAM, flags);
 636    } else if (transfer->usage & PIPE_TRANSFER_WRITE) {
 637       struct svga_winsys_surface *surf =
 638          svga_texture(transfer->resource)->handle;
 639       SVGA3dBox box;
 640       enum pipe_error ret;
 641
 642       assert(svga_have_gb_objects(svga));
 643
 644       /* update the effected region */
 645       box.x = transfer->box.x;
 646       box.y = transfer->box.y;
 647       switch (tex->b.b.target) {
 648       case PIPE_TEXTURE_CUBE:
 649       case PIPE_TEXTURE_2D_ARRAY:
 650          box.z = 0;
 651          break;
 652       case PIPE_TEXTURE_1D_ARRAY:
 653          box.y = box.z = 0;
 654          break;
 655       default:
 656          box.z = transfer->box.z;
 657          break;
 658       }
 659       box.w = transfer->box.width;
 660       box.h = transfer->box.height;
 661       box.d = transfer->box.depth;
 662
 663       if (0)
 664          debug_printf("%s %d, %d, %d  %d x %d x %d\n",
 665                       __FUNCTION__,
 666                       box.x, box.y, box.z,
 667                       box.w, box.h, box.d);
 668
 669       if (svga_have_vgpu10(svga)) {
 670          ret = update_image_vgpu10(svga, surf, &box, st->slice, transfer->level,
 671                                    tex->b.b.last_level + 1);
 672       } else {
 673          ret = update_image_vgpu9(svga, surf, &box, st->slice, transfer->level);
 674       }
 675
 676       assert(ret == PIPE_OK);
 677       (void) ret;
 678    }
 679
 680    ss->texture_timestamp++;
 681    svga_age_texture_view(tex, transfer->level);
 682    if (transfer->resource->target == PIPE_TEXTURE_CUBE)
 683       svga_define_texture_level(tex, st->slice, transfer->level);
 684    else
 685       svga_define_texture_level(tex, 0, transfer->level);
 686
 687    pipe_resource_reference(&st->base.resource, NULL);
 688
 689    FREE(st->swbuf);
 690    if (!st->use_direct_map) {
 691       sws->buffer_destroy(sws, st->hwbuf);
 692    }
 693    FREE(st);
 694 }
 695
 696
 697 /**
 698  * Does format store depth values?
 699  */
 700 static inline boolean
 701 format_has_depth(enum pipe_format format)
 702 {
 703    const struct util_format_description *desc = util_format_description(format);
 704    return util_format_has_depth(desc);
 705 }
 706
 707
 708 struct u_resource_vtbl svga_texture_vtbl =
 709 {
 710    svga_texture_get_handle,           /* get_handle */
 711    svga_texture_destroy,              /* resource_destroy */
 712    svga_texture_transfer_map,         /* transfer_map */
 713    u_default_transfer_flush_region,   /* transfer_flush_region */
 714    svga_texture_transfer_unmap,       /* transfer_unmap */
 715    u_default_transfer_inline_write    /* transfer_inline_write */
 716 };
 717
 718
 719 struct pipe_resource *
 720 svga_texture_create(struct pipe_screen *screen,
 721                     const struct pipe_resource *template)
 722 {
 723    struct svga_screen *svgascreen = svga_screen(screen);
 724    struct svga_texture *tex;
 725    unsigned bindings = template->bind;
 726
 727    assert(template->last_level < SVGA_MAX_TEXTURE_LEVELS);
 728    if (template->last_level >= SVGA_MAX_TEXTURE_LEVELS) {
 729       return NULL;
 730    }
 731
 732    tex = CALLOC_STRUCT(svga_texture);
 733    if (!tex) {
 734       return NULL;
 735    }
 736
 737    tex->defined = CALLOC(template->depth0 * template->array_size,
 738                          sizeof(tex->defined[0]));
 739    if (!tex->defined) {
 740       FREE(tex);
 741       return NULL;
 742    }
 743
 744    tex->rendered_to = CALLOC(template->depth0 * template->array_size,
 745                              sizeof(tex->rendered_to[0]));
 746    if (!tex->rendered_to) {
 747       FREE(tex->defined);
 748       FREE(tex);
 749       return NULL;
 750    }
 751
 752    tex->b.b = *template;
 753    tex->b.vtbl = &svga_texture_vtbl;
 754    pipe_reference_init(&tex->b.b.reference, 1);
 755    tex->b.b.screen = screen;
 756
 757    tex->key.flags = 0;
 758    tex->key.size.width = template->width0;
 759    tex->key.size.height = template->height0;
 760    tex->key.size.depth = template->depth0;
 761    tex->key.arraySize = 1;
 762    tex->key.numFaces = 1;
 763    tex->key.sampleCount = template->nr_samples;
 764
 765    if (template->nr_samples > 1) {
 766       tex->key.flags |= SVGA3D_SURFACE_MASKABLE_ANTIALIAS;
 767    }
 768
 769    if (svgascreen->sws->have_vgpu10) {
 770       switch (template->target) {
 771       case PIPE_TEXTURE_1D:
 772          tex->key.flags |= SVGA3D_SURFACE_1D;
 773          break;
 774       case PIPE_TEXTURE_1D_ARRAY:
 775          tex->key.flags |= SVGA3D_SURFACE_1D;
 776          /* fall-through */
 777       case PIPE_TEXTURE_2D_ARRAY:
 778          tex->key.flags |= SVGA3D_SURFACE_ARRAY;
 779          tex->key.arraySize = template->array_size;
 780          break;
 781       case PIPE_TEXTURE_3D:
 782          tex->key.flags |= SVGA3D_SURFACE_VOLUME;
 783          break;
 784       case PIPE_TEXTURE_CUBE:
 785          tex->key.flags |= (SVGA3D_SURFACE_CUBEMAP | SVGA3D_SURFACE_ARRAY);
 786          tex->key.numFaces = 6;
 787          break;
 788       default:
 789          break;
 790       }
 791    }
 792    else {
 793       switch (template->target) {
 794       case PIPE_TEXTURE_3D:
 795          tex->key.flags |= SVGA3D_SURFACE_VOLUME;
 796          break;
 797       case PIPE_TEXTURE_CUBE:
 798          tex->key.flags |= SVGA3D_SURFACE_CUBEMAP;
 799          tex->key.numFaces = 6;
 800          break;
 801       default:
 802          break;
 803       }
 804    }
 805
 806    tex->key.cachable = 1;
 807
 808    if (bindings & PIPE_BIND_SAMPLER_VIEW) {
 809       tex->key.flags |= SVGA3D_SURFACE_HINT_TEXTURE;
 810       tex->key.flags |= SVGA3D_SURFACE_BIND_SHADER_RESOURCE;
 811
 812       if (!(bindings & PIPE_BIND_RENDER_TARGET)) {
 813          /* Also check if the format is renderable */
 814          if (screen->is_format_supported(screen, template->format,
 815                                          template->target,
 816                                          template->nr_samples,
 817                                          PIPE_BIND_RENDER_TARGET)) {
 818             bindings |= PIPE_BIND_RENDER_TARGET;
 819          }
 820       }
 821    }
 822
 823    if (bindings & PIPE_BIND_DISPLAY_TARGET) {
 824       tex->key.cachable = 0;
 825    }
 826
 827    if (bindings & PIPE_BIND_SHARED) {
 828       tex->key.cachable = 0;
 829    }
 830
 831    if (bindings & (PIPE_BIND_SCANOUT | PIPE_BIND_CURSOR)) {
 832       tex->key.scanout = 1;
 833       tex->key.cachable = 0;
 834    }
 835
 836    /*
 837     * Note: Previously we never passed the
 838     * SVGA3D_SURFACE_HINT_RENDERTARGET hint. Mesa cannot
 839     * know beforehand whether a texture will be used as a rendertarget or not
 840     * and it always requests PIPE_BIND_RENDER_TARGET, therefore
 841     * passing the SVGA3D_SURFACE_HINT_RENDERTARGET here defeats its purpose.
 842     *
 843     * However, this was changed since other state trackers
 844     * (XA for example) uses it accurately and certain device versions
 845     * relies on it in certain situations to render correctly.
 846     */
 847    if ((bindings & PIPE_BIND_RENDER_TARGET) &&
 848        !util_format_is_s3tc(template->format)) {
 849       tex->key.flags |= SVGA3D_SURFACE_HINT_RENDERTARGET;
 850       tex->key.flags |= SVGA3D_SURFACE_BIND_RENDER_TARGET;
 851    }
 852
 853    if (bindings & PIPE_BIND_DEPTH_STENCIL) {
 854       tex->key.flags |= SVGA3D_SURFACE_HINT_DEPTHSTENCIL;
 855       tex->key.flags |= SVGA3D_SURFACE_BIND_DEPTH_STENCIL;
 856    }
 857
 858    tex->key.numMipLevels = template->last_level + 1;
 859
 860    tex->key.format = svga_translate_format(svgascreen, template->format,
 861                                            bindings);
 862    if (tex->key.format == SVGA3D_FORMAT_INVALID) {
 863       FREE(tex->defined);
 864       FREE(tex->rendered_to);
 865       FREE(tex);
 866       return NULL;
 867    }
 868
 869    /* Use typeless formats for sRGB and depth resources.  Typeless
 870     * formats can be reinterpreted as other formats.  For example,
 871     * SVGA3D_R8G8B8A8_UNORM_TYPELESS can be interpreted as
 872     * SVGA3D_R8G8B8A8_UNORM_SRGB or SVGA3D_R8G8B8A8_UNORM.
 873     */
 874    if (svgascreen->sws->have_vgpu10 &&
 875        (util_format_is_srgb(template->format) ||
 876         format_has_depth(template->format))) {
 877       SVGA3dSurfaceFormat typeless = svga_typeless_format(tex->key.format);
 878       if (0) {
 879          debug_printf("Convert resource type %s -> %s (bind 0x%x)\n",
 880                       svga_format_name(tex->key.format),
 881                       svga_format_name(typeless),
 882                       bindings);
 883       }
 884       tex->key.format = typeless;
 885    }
 886
 887    SVGA_DBG(DEBUG_DMA, "surface_create for texture\n", tex->handle);
 888    tex->handle = svga_screen_surface_create(svgascreen, bindings,
 889                                             tex->b.b.usage, &tex->key);
 890    if (!tex->handle) {
 891       FREE(tex->defined);
 892       FREE(tex->rendered_to);
 893       FREE(tex);
 894       return NULL;
 895    }
 896
 897    SVGA_DBG(DEBUG_DMA, "  --> got sid %p (texture)\n", tex->handle);
 898
 899    debug_reference(&tex->b.b.reference,
 900                    (debug_reference_descriptor)debug_describe_resource, 0);
 901
 902    tex->size = util_resource_size(template);
 903    svgascreen->hud.total_resource_bytes += tex->size;
 904    svgascreen->hud.num_resources++;
 905
 906    return &tex->b.b;
 907 }
 908
 909
 910 struct pipe_resource *
 911 svga_texture_from_handle(struct pipe_screen *screen,
 912                          const struct pipe_resource *template,
 913                          struct winsys_handle *whandle)
 914 {
 915    struct svga_winsys_screen *sws = svga_winsys_screen(screen);
 916    struct svga_screen *ss = svga_screen(screen);
 917    struct svga_winsys_surface *srf;
 918    struct svga_texture *tex;
 919    enum SVGA3dSurfaceFormat format = 0;
 920    assert(screen);
 921
 922    /* Only supports one type */
 923    if ((template->target != PIPE_TEXTURE_2D &&
 924        template->target != PIPE_TEXTURE_RECT) ||
 925        template->last_level != 0 ||
 926        template->depth0 != 1) {
 927       return NULL;
 928    }
 929
 930    srf = sws->surface_from_handle(sws, whandle, &format);
 931
 932    if (!srf)
 933       return NULL;
 934
 935    if (svga_translate_format(svga_screen(screen), template->format,
 936                              template->bind) != format) {
 937       unsigned f1 = svga_translate_format(svga_screen(screen),
 938                                           template->format, template->bind);
 939       unsigned f2 = format;
 940
 941       /* It's okay for XRGB and ARGB or depth with/out stencil to get mixed up.
 942        */
 943       if (f1 == SVGA3D_B8G8R8A8_UNORM)
 944          f1 = SVGA3D_A8R8G8B8;
 945       if (f1 == SVGA3D_B8G8R8X8_UNORM)
 946          f1 = SVGA3D_X8R8G8B8;
 947
 948       if ( !( (f1 == f2) ||
 949               (f1 == SVGA3D_X8R8G8B8 && f2 == SVGA3D_A8R8G8B8) ||
 950               (f1 == SVGA3D_X8R8G8B8 && f2 == SVGA3D_B8G8R8X8_UNORM) ||
 951               (f1 == SVGA3D_A8R8G8B8 && f2 == SVGA3D_X8R8G8B8) ||
 952               (f1 == SVGA3D_A8R8G8B8 && f2 == SVGA3D_B8G8R8A8_UNORM) ||
 953               (f1 == SVGA3D_Z_D24X8 && f2 == SVGA3D_Z_D24S8) ||
 954               (f1 == SVGA3D_Z_DF24 && f2 == SVGA3D_Z_D24S8_INT) ) ) {
 955          debug_printf("%s wrong format %s != %s\n", __FUNCTION__,
 956                       svga_format_name(f1), svga_format_name(f2));
 957          return NULL;
 958       }
 959    }
 960
 961    tex = CALLOC_STRUCT(svga_texture);
 962    if (!tex)
 963       return NULL;
 964
 965    tex->defined = CALLOC(template->depth0 * template->array_size,
 966                          sizeof(tex->defined[0]));
 967    if (!tex->defined) {
 968       FREE(tex);
 969       return NULL;
 970    }
 971
 972    tex->b.b = *template;
 973    tex->b.vtbl = &svga_texture_vtbl;
 974    pipe_reference_init(&tex->b.b.reference, 1);
 975    tex->b.b.screen = screen;
 976
 977    SVGA_DBG(DEBUG_DMA, "wrap surface sid %p\n", srf);
 978
 979    tex->key.cachable = 0;
 980    tex->key.format = format;
 981    tex->handle = srf;
 982
 983    tex->rendered_to = CALLOC(1, sizeof(tex->rendered_to[0]));
 984    tex->imported = TRUE;
 985
 986    ss->hud.num_resources++;
 987
 988    return &tex->b.b;
 989 }