src/gallium/drivers/svga/svga_resource_texture.c

   1 /**********************************************************
   2  * Copyright 2008-2009 VMware, Inc.  All rights reserved.
   3  *
   4  * Permission is hereby granted, free of charge, to any person
   5  * obtaining a copy of this software and associated documentation
   6  * files (the "Software"), to deal in the Software without
   7  * restriction, including without limitation the rights to use, copy,
   8  * modify, merge, publish, distribute, sublicense, and/or sell copies
   9  * of the Software, and to permit persons to whom the Software is
  10  * furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be
  13  * included in all copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  16  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  17  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  18  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  19  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  20  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  21  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  22  * SOFTWARE.
  23  *
  24  **********************************************************/
  25
  26 #include "svga_cmd.h"
  27
  28 #include "pipe/p_state.h"
  29 #include "pipe/p_defines.h"
  30 #include "util/u_inlines.h"
  31 #include "os/os_thread.h"
  32 #include "util/u_format.h"
  33 #include "util/u_math.h"
  34 #include "util/u_memory.h"
  35
  36 #include "svga_format.h"
  37 #include "svga_screen.h"
  38 #include "svga_context.h"
  39 #include "svga_resource_texture.h"
  40 #include "svga_resource_buffer.h"
  41 #include "svga_sampler_view.h"
  42 #include "svga_winsys.h"
  43 #include "svga_debug.h"
  44
  45
  46 /* XXX: This isn't a real hardware flag, but just a hack for kernel to
  47  * know about primary surfaces. Find a better way to accomplish this.
  48  */
  49 #define SVGA3D_SURFACE_HINT_SCANOUT (1 << 9)
  50
  51
  52 static INLINE void
  53 svga_transfer_dma_band(struct svga_context *svga,
  54                        struct svga_transfer *st,
  55                        SVGA3dTransferType transfer,
  56                        unsigned y, unsigned h, unsigned srcy,
  57                        SVGA3dSurfaceDMAFlags flags)
  58 {
  59    struct svga_texture *texture = svga_texture(st->base.resource);
  60    SVGA3dCopyBox box;
  61    enum pipe_error ret;
  62
  63    box.x = st->base.box.x;
  64    box.y = y;
  65    box.z = st->base.box.z;
  66    box.w = st->base.box.width;
  67    box.h = h;
  68    box.d = 1;
  69    box.srcx = 0;
  70    box.srcy = srcy;
  71    box.srcz = 0;
  72
  73    if (st->base.resource->target == PIPE_TEXTURE_CUBE) {
  74       st->face = st->base.box.z;
  75       box.z = 0;
  76    }
  77    else
  78       st->face = 0;
  79
  80    SVGA_DBG(DEBUG_DMA, "dma %s sid %p, face %u, (%u, %u, %u) - (%u, %u, %u), %ubpp\n",
  81                 transfer == SVGA3D_WRITE_HOST_VRAM ? "to" : "from",
  82                 texture->handle,
  83                 st->face,
  84                 st->base.box.x,
  85                 y,
  86                 box.z,
  87                 st->base.box.x + st->base.box.width,
  88                 y + h,
  89                 box.z + 1,
  90                 util_format_get_blocksize(texture->b.b.format) * 8 /
  91                 (util_format_get_blockwidth(texture->b.b.format)*util_format_get_blockheight(texture->b.b.format)));
  92
  93    ret = SVGA3D_SurfaceDMA(svga->swc, st, transfer, &box, 1, flags);
  94    if(ret != PIPE_OK) {
  95       svga_context_flush(svga, NULL);
  96       ret = SVGA3D_SurfaceDMA(svga->swc, st, transfer, &box, 1, flags);
  97       assert(ret == PIPE_OK);
  98    }
  99 }
 100
 101
 102 static INLINE void
 103 svga_transfer_dma(struct svga_context *svga,
 104                   struct svga_transfer *st,
 105                   SVGA3dTransferType transfer,
 106                   SVGA3dSurfaceDMAFlags flags)
 107 {
 108    struct svga_texture *texture = svga_texture(st->base.resource);
 109    struct svga_screen *screen = svga_screen(texture->b.b.screen);
 110    struct svga_winsys_screen *sws = screen->sws;
 111    struct pipe_fence_handle *fence = NULL;
 112
 113    if (transfer == SVGA3D_READ_HOST_VRAM) {
 114       SVGA_DBG(DEBUG_PERF, "%s: readback transfer\n", __FUNCTION__);
 115    }
 116
 117    /* Ensure any pending operations on host surfaces are queued on the command
 118     * buffer first.
 119     */
 120    svga_surfaces_flush( svga );
 121
 122    if(!st->swbuf) {
 123       /* Do the DMA transfer in a single go */
 124
 125       svga_transfer_dma_band(svga, st, transfer,
 126                              st->base.box.y, st->base.box.height, 0,
 127                              flags);
 128
 129       if(transfer == SVGA3D_READ_HOST_VRAM) {
 130          svga_context_flush(svga, &fence);
 131          sws->fence_finish(sws, fence, 0);
 132          sws->fence_reference(sws, &fence, NULL);
 133       }
 134    }
 135    else {
 136       unsigned y, h, srcy;
 137       unsigned blockheight = util_format_get_blockheight(st->base.resource->format);
 138       h = st->hw_nblocksy * blockheight;
 139       srcy = 0;
 140       for(y = 0; y < st->base.box.height; y += h) {
 141          unsigned offset, length;
 142          void *hw, *sw;
 143
 144          if (y + h > st->base.box.height)
 145             h = st->base.box.height - y;
 146
 147          /* Transfer band must be aligned to pixel block boundaries */
 148          assert(y % blockheight == 0);
 149          assert(h % blockheight == 0);
 150
 151          offset = y * st->base.stride / blockheight;
 152          length = h * st->base.stride / blockheight;
 153
 154          sw = (uint8_t *)st->swbuf + offset;
 155
 156          if (transfer == SVGA3D_WRITE_HOST_VRAM) {
 157             unsigned usage = PIPE_TRANSFER_WRITE;
 158
 159             /* Wait for the previous DMAs to complete */
 160             /* TODO: keep one DMA (at half the size) in the background */
 161             if (y) {
 162                svga_context_flush(svga, NULL);
 163                usage |= PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE;
 164             }
 165
 166             hw = sws->buffer_map(sws, st->hwbuf, usage);
 167             assert(hw);
 168             if (hw) {
 169                memcpy(hw, sw, length);
 170                sws->buffer_unmap(sws, st->hwbuf);
 171             }
 172          }
 173
 174          svga_transfer_dma_band(svga, st, transfer, y, h, srcy, flags);
 175
 176          /*
 177           * Prevent the texture contents to be discarded on the next band
 178           * upload.
 179           */
 180
 181          flags.discard = FALSE;
 182
 183          if(transfer == SVGA3D_READ_HOST_VRAM) {
 184             svga_context_flush(svga, &fence);
 185             sws->fence_finish(sws, fence, 0);
 186
 187             hw = sws->buffer_map(sws, st->hwbuf, PIPE_TRANSFER_READ);
 188             assert(hw);
 189             if(hw) {
 190                memcpy(sw, hw, length);
 191                sws->buffer_unmap(sws, st->hwbuf);
 192             }
 193          }
 194       }
 195    }
 196 }
 197
 198
 199
 200
 201
 202 static boolean
 203 svga_texture_get_handle(struct pipe_screen *screen,
 204                                struct pipe_resource *texture,
 205                                struct winsys_handle *whandle)
 206 {
 207    struct svga_winsys_screen *sws = svga_winsys_screen(texture->screen);
 208    unsigned stride;
 209
 210    assert(svga_texture(texture)->key.cachable == 0);
 211    svga_texture(texture)->key.cachable = 0;
 212    stride = util_format_get_nblocksx(texture->format, texture->width0) *
 213             util_format_get_blocksize(texture->format);
 214    return sws->surface_get_handle(sws, svga_texture(texture)->handle, stride, whandle);
 215 }
 216
 217
 218 static void
 219 svga_texture_destroy(struct pipe_screen *screen,
 220                      struct pipe_resource *pt)
 221 {
 222    struct svga_screen *ss = svga_screen(screen);
 223    struct svga_texture *tex = (struct svga_texture *)pt;
 224
 225    ss->texture_timestamp++;
 226
 227    svga_sampler_view_reference(&tex->cached_view, NULL);
 228
 229    /*
 230      DBG("%s deleting %p\n", __FUNCTION__, (void *) tex);
 231    */
 232    SVGA_DBG(DEBUG_DMA, "unref sid %p (texture)\n", tex->handle);
 233    svga_screen_surface_destroy(ss, &tex->key, &tex->handle);
 234
 235    FREE(tex);
 236 }
 237
 238
 239
 240
 241
 242
 243
 244 /* XXX: Still implementing this as if it was a screen function, but
 245  * can now modify it to queue transfers on the context.
 246  */
 247 static struct pipe_transfer *
 248 svga_texture_get_transfer(struct pipe_context *pipe,
 249                           struct pipe_resource *texture,
 250                           unsigned level,
 251                           unsigned usage,
 252                           const struct pipe_box *box)
 253 {
 254    struct svga_context *svga = svga_context(pipe);
 255    struct svga_screen *ss = svga_screen(pipe->screen);
 256    struct svga_winsys_screen *sws = ss->sws;
 257    struct svga_transfer *st;
 258    unsigned nblocksx = util_format_get_nblocksx(texture->format, box->width);
 259    unsigned nblocksy = util_format_get_nblocksy(texture->format, box->height);
 260
 261    /* We can't map texture storage directly */
 262    if (usage & PIPE_TRANSFER_MAP_DIRECTLY)
 263       return NULL;
 264
 265    assert(box->depth == 1);
 266    st = CALLOC_STRUCT(svga_transfer);
 267    if (!st)
 268       return NULL;
 269
 270    pipe_resource_reference(&st->base.resource, texture);
 271    st->base.level = level;
 272    st->base.usage = usage;
 273    st->base.box = *box;
 274    st->base.stride = nblocksx*util_format_get_blocksize(texture->format);
 275    st->base.layer_stride = 0;
 276
 277    st->hw_nblocksy = nblocksy;
 278
 279    st->hwbuf = svga_winsys_buffer_create(svga,
 280                                          1,
 281                                          0,
 282                                          st->hw_nblocksy*st->base.stride);
 283    while(!st->hwbuf && (st->hw_nblocksy /= 2)) {
 284       st->hwbuf = svga_winsys_buffer_create(svga,
 285                                             1,
 286                                             0,
 287                                             st->hw_nblocksy*st->base.stride);
 288    }
 289
 290    if(!st->hwbuf)
 291       goto no_hwbuf;
 292
 293    if(st->hw_nblocksy < nblocksy) {
 294       /* We couldn't allocate a hardware buffer big enough for the transfer,
 295        * so allocate regular malloc memory instead */
 296       if (0) {
 297          debug_printf("%s: failed to allocate %u KB of DMA, "
 298                       "splitting into %u x %u KB DMA transfers\n",
 299                       __FUNCTION__,
 300                       (nblocksy*st->base.stride + 1023)/1024,
 301                       (nblocksy + st->hw_nblocksy - 1)/st->hw_nblocksy,
 302                       (st->hw_nblocksy*st->base.stride + 1023)/1024);
 303       }
 304
 305       st->swbuf = MALLOC(nblocksy*st->base.stride);
 306       if(!st->swbuf)
 307          goto no_swbuf;
 308    }
 309
 310    if (usage & PIPE_TRANSFER_READ) {
 311       SVGA3dSurfaceDMAFlags flags;
 312       memset(&flags, 0, sizeof flags);
 313       svga_transfer_dma(svga, st, SVGA3D_READ_HOST_VRAM, flags);
 314    }
 315
 316    return &st->base;
 317
 318 no_swbuf:
 319    sws->buffer_destroy(sws, st->hwbuf);
 320 no_hwbuf:
 321    FREE(st);
 322    return NULL;
 323 }
 324
 325
 326 /* XXX: Still implementing this as if it was a screen function, but
 327  * can now modify it to queue transfers on the context.
 328  */
 329 static void *
 330 svga_texture_transfer_map( struct pipe_context *pipe,
 331                            struct pipe_transfer *transfer )
 332 {
 333    struct svga_screen *ss = svga_screen(pipe->screen);
 334    struct svga_winsys_screen *sws = ss->sws;
 335    struct svga_transfer *st = svga_transfer(transfer);
 336
 337    if(st->swbuf)
 338       return st->swbuf;
 339    else
 340       /* The wait for read transfers already happened when svga_transfer_dma
 341        * was called. */
 342       return sws->buffer_map(sws, st->hwbuf, transfer->usage);
 343 }
 344
 345
 346 /* XXX: Still implementing this as if it was a screen function, but
 347  * can now modify it to queue transfers on the context.
 348  */
 349 static void
 350 svga_texture_transfer_unmap(struct pipe_context *pipe,
 351                             struct pipe_transfer *transfer)
 352 {
 353    struct svga_screen *ss = svga_screen(pipe->screen);
 354    struct svga_winsys_screen *sws = ss->sws;
 355    struct svga_transfer *st = svga_transfer(transfer);
 356
 357    if(!st->swbuf)
 358       sws->buffer_unmap(sws, st->hwbuf);
 359 }
 360
 361
 362 static void
 363 svga_texture_transfer_destroy(struct pipe_context *pipe,
 364                               struct pipe_transfer *transfer)
 365 {
 366    struct svga_context *svga = svga_context(pipe);
 367    struct svga_texture *tex = svga_texture(transfer->resource);
 368    struct svga_screen *ss = svga_screen(pipe->screen);
 369    struct svga_winsys_screen *sws = ss->sws;
 370    struct svga_transfer *st = svga_transfer(transfer);
 371
 372    if (st->base.usage & PIPE_TRANSFER_WRITE) {
 373       SVGA3dSurfaceDMAFlags flags;
 374
 375       memset(&flags, 0, sizeof flags);
 376       if (transfer->usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) {
 377          flags.discard = TRUE;
 378       }
 379       if (transfer->usage & PIPE_TRANSFER_UNSYNCHRONIZED) {
 380          flags.unsynchronized = TRUE;
 381       }
 382
 383       svga_transfer_dma(svga, st, SVGA3D_WRITE_HOST_VRAM, flags);
 384       ss->texture_timestamp++;
 385       tex->view_age[transfer->level] = ++(tex->age);
 386       if (transfer->resource->target == PIPE_TEXTURE_CUBE)
 387          tex->defined[transfer->box.z][transfer->level] = TRUE;
 388       else
 389          tex->defined[0][transfer->level] = TRUE;
 390    }
 391
 392    pipe_resource_reference(&st->base.resource, NULL);
 393    FREE(st->swbuf);
 394    sws->buffer_destroy(sws, st->hwbuf);
 395    FREE(st);
 396 }
 397
 398
 399
 400
 401
 402 struct u_resource_vtbl svga_texture_vtbl =
 403 {
 404    svga_texture_get_handle,           /* get_handle */
 405    svga_texture_destroy,              /* resource_destroy */
 406    svga_texture_get_transfer,         /* get_transfer */
 407    svga_texture_transfer_destroy,     /* transfer_destroy */
 408    svga_texture_transfer_map,         /* transfer_map */
 409    u_default_transfer_flush_region,   /* transfer_flush_region */
 410    svga_texture_transfer_unmap,       /* transfer_unmap */
 411    u_default_transfer_inline_write    /* transfer_inline_write */
 412 };
 413
 414
 415
 416
 417 struct pipe_resource *
 418 svga_texture_create(struct pipe_screen *screen,
 419                     const struct pipe_resource *template)
 420 {
 421    struct svga_screen *svgascreen = svga_screen(screen);
 422    struct svga_texture *tex = CALLOC_STRUCT(svga_texture);
 423
 424    if (!tex)
 425       goto error1;
 426
 427    tex->b.b = *template;
 428    tex->b.vtbl = &svga_texture_vtbl;
 429    pipe_reference_init(&tex->b.b.reference, 1);
 430    tex->b.b.screen = screen;
 431
 432    assert(template->last_level < SVGA_MAX_TEXTURE_LEVELS);
 433    if(template->last_level >= SVGA_MAX_TEXTURE_LEVELS)
 434       goto error2;
 435
 436    tex->key.flags = 0;
 437    tex->key.size.width = template->width0;
 438    tex->key.size.height = template->height0;
 439    tex->key.size.depth = template->depth0;
 440
 441    if(template->target == PIPE_TEXTURE_CUBE) {
 442       tex->key.flags |= SVGA3D_SURFACE_CUBEMAP;
 443       tex->key.numFaces = 6;
 444    }
 445    else {
 446       tex->key.numFaces = 1;
 447    }
 448
 449    /* XXX: Disabled for now */
 450    tex->key.cachable = 0;
 451
 452    if (template->bind & PIPE_BIND_SAMPLER_VIEW)
 453       tex->key.flags |= SVGA3D_SURFACE_HINT_TEXTURE;
 454
 455    if (template->bind & PIPE_BIND_DISPLAY_TARGET) {
 456       tex->key.cachable = 0;
 457    }
 458
 459    if (template->bind & PIPE_BIND_SHARED) {
 460       tex->key.cachable = 0;
 461    }
 462
 463    if (template->bind & PIPE_BIND_SCANOUT) {
 464       tex->key.flags |= SVGA3D_SURFACE_HINT_SCANOUT;
 465       tex->key.cachable = 0;
 466    }
 467
 468    /*
 469     * XXX: Never pass the SVGA3D_SURFACE_HINT_RENDERTARGET hint. Mesa cannot
 470     * know beforehand whether a texture will be used as a rendertarget or not
 471     * and it always requests PIPE_BIND_RENDER_TARGET, therefore
 472     * passing the SVGA3D_SURFACE_HINT_RENDERTARGET here defeats its purpose.
 473     */
 474 #if 0
 475    if((template->bind & PIPE_BIND_RENDER_TARGET) &&
 476       !util_format_is_s3tc(template->format))
 477       tex->key.flags |= SVGA3D_SURFACE_HINT_RENDERTARGET;
 478 #endif
 479
 480    if(template->bind & PIPE_BIND_DEPTH_STENCIL)
 481       tex->key.flags |= SVGA3D_SURFACE_HINT_DEPTHSTENCIL;
 482
 483    tex->key.numMipLevels = template->last_level + 1;
 484
 485    tex->key.format = svga_translate_format(svgascreen, template->format, template->bind);
 486    if(tex->key.format == SVGA3D_FORMAT_INVALID)
 487       goto error2;
 488
 489    SVGA_DBG(DEBUG_DMA, "surface_create for texture\n", tex->handle);
 490    tex->handle = svga_screen_surface_create(svgascreen, &tex->key);
 491    if (tex->handle)
 492       SVGA_DBG(DEBUG_DMA, "  --> got sid %p (texture)\n", tex->handle);
 493
 494    debug_reference(&tex->b.b.reference,
 495                    (debug_reference_descriptor)debug_describe_resource, 0);
 496
 497    return &tex->b.b;
 498
 499 error2:
 500    FREE(tex);
 501 error1:
 502    return NULL;
 503 }
 504
 505
 506
 507
 508 struct pipe_resource *
 509 svga_texture_from_handle(struct pipe_screen *screen,
 510                          const struct pipe_resource *template,
 511                          struct winsys_handle *whandle)
 512 {
 513    struct svga_winsys_screen *sws = svga_winsys_screen(screen);
 514    struct svga_winsys_surface *srf;
 515    struct svga_texture *tex;
 516    enum SVGA3dSurfaceFormat format = 0;
 517    assert(screen);
 518
 519    /* Only supports one type */
 520    if ((template->target != PIPE_TEXTURE_2D &&
 521        template->target != PIPE_TEXTURE_RECT) ||
 522        template->last_level != 0 ||
 523        template->depth0 != 1) {
 524       return NULL;
 525    }
 526
 527    srf = sws->surface_from_handle(sws, whandle, &format);
 528
 529    if (!srf)
 530       return NULL;
 531
 532    if (svga_translate_format(svga_screen(screen), template->format, template->bind) != format) {
 533       unsigned f1 = svga_translate_format(svga_screen(screen), template->format, template->bind);
 534       unsigned f2 = format;
 535
 536       /* It's okay for XRGB and ARGB or depth with/out stencil to get mixed up */
 537       if ( !( (f1 == SVGA3D_X8R8G8B8 && f2 == SVGA3D_A8R8G8B8) ||
 538               (f1 == SVGA3D_A8R8G8B8 && f2 == SVGA3D_X8R8G8B8) ||
 539               (f1 == SVGA3D_Z_D24X8 && f2 == SVGA3D_Z_D24S8) ||
 540               (f1 == SVGA3D_Z_DF24 && f2 == SVGA3D_Z_D24S8_INT) ) ) {
 541          debug_printf("%s wrong format %u != %u\n", __FUNCTION__, f1, f2);
 542          return NULL;
 543       }
 544    }
 545
 546    tex = CALLOC_STRUCT(svga_texture);
 547    if (!tex)
 548       return NULL;
 549
 550    tex->b.b = *template;
 551    tex->b.vtbl = &svga_texture_vtbl;
 552    pipe_reference_init(&tex->b.b.reference, 1);
 553    tex->b.b.screen = screen;
 554
 555    if (format == SVGA3D_X8R8G8B8)
 556       tex->b.b.format = PIPE_FORMAT_B8G8R8X8_UNORM;
 557    else if (format == SVGA3D_A8R8G8B8)
 558       tex->b.b.format = PIPE_FORMAT_B8G8R8A8_UNORM;
 559    else {
 560       /* ?? */
 561    }
 562
 563    SVGA_DBG(DEBUG_DMA, "wrap surface sid %p\n", srf);
 564
 565    tex->key.cachable = 0;
 566    tex->handle = srf;
 567
 568    return &tex->b.b;
 569 }
 570