src/gallium/drivers/svga/svga_resource_texture.c

   1 /**********************************************************
   2  * Copyright 2008-2009 VMware, Inc.  All rights reserved.
   3  *
   4  * Permission is hereby granted, free of charge, to any person
   5  * obtaining a copy of this software and associated documentation
   6  * files (the "Software"), to deal in the Software without
   7  * restriction, including without limitation the rights to use, copy,
   8  * modify, merge, publish, distribute, sublicense, and/or sell copies
   9  * of the Software, and to permit persons to whom the Software is
  10  * furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be
  13  * included in all copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  16  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  17  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  18  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  19  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  20  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  21  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  22  * SOFTWARE.
  23  *
  24  **********************************************************/
  25
  26 #include "svga3d_reg.h"
  27 #include "svga3d_surfacedefs.h"
  28
  29 #include "pipe/p_state.h"
  30 #include "pipe/p_defines.h"
  31 #include "os/os_thread.h"
  32 #include "util/u_format.h"
  33 #include "util/u_inlines.h"
  34 #include "util/u_math.h"
  35 #include "util/u_memory.h"
  36 #include "util/u_resource.h"
  37
  38 #include "svga_cmd.h"
  39 #include "svga_format.h"
  40 #include "svga_screen.h"
  41 #include "svga_context.h"
  42 #include "svga_resource_texture.h"
  43 #include "svga_resource_buffer.h"
  44 #include "svga_sampler_view.h"
  45 #include "svga_winsys.h"
  46 #include "svga_debug.h"
  47
  48
  49 static void
  50 svga_transfer_dma_band(struct svga_context *svga,
  51                        struct svga_transfer *st,
  52                        SVGA3dTransferType transfer,
  53                        unsigned x, unsigned y, unsigned z,
  54                        unsigned w, unsigned h, unsigned d,
  55                        unsigned srcx, unsigned srcy, unsigned srcz,
  56                        SVGA3dSurfaceDMAFlags flags)
  57 {
  58    struct svga_texture *texture = svga_texture(st->base.resource);
  59    SVGA3dCopyBox box;
  60    enum pipe_error ret;
  61
  62    assert(!st->use_direct_map);
  63
  64    box.x = x;
  65    box.y = y;
  66    box.z = z;
  67    box.w = w;
  68    box.h = h;
  69    box.d = d;
  70    box.srcx = srcx;
  71    box.srcy = srcy;
  72    box.srcz = srcz;
  73
  74    SVGA_DBG(DEBUG_DMA, "dma %s sid %p, face %u, (%u, %u, %u) - "
  75             "(%u, %u, %u), %ubpp\n",
  76             transfer == SVGA3D_WRITE_HOST_VRAM ? "to" : "from",
  77             texture->handle,
  78             st->slice,
  79             x,
  80             y,
  81             z,
  82             x + w,
  83             y + h,
  84             z + 1,
  85             util_format_get_blocksize(texture->b.b.format) * 8 /
  86             (util_format_get_blockwidth(texture->b.b.format)
  87              * util_format_get_blockheight(texture->b.b.format)));
  88
  89    ret = SVGA3D_SurfaceDMA(svga->swc, st, transfer, &box, 1, flags);
  90    if (ret != PIPE_OK) {
  91       svga_context_flush(svga, NULL);
  92       ret = SVGA3D_SurfaceDMA(svga->swc, st, transfer, &box, 1, flags);
  93       assert(ret == PIPE_OK);
  94    }
  95 }
  96
  97
  98 static void
  99 svga_transfer_dma(struct svga_context *svga,
 100                   struct svga_transfer *st,
 101                   SVGA3dTransferType transfer,
 102                   SVGA3dSurfaceDMAFlags flags)
 103 {
 104    struct svga_texture *texture = svga_texture(st->base.resource);
 105    struct svga_screen *screen = svga_screen(texture->b.b.screen);
 106    struct svga_winsys_screen *sws = screen->sws;
 107    struct pipe_fence_handle *fence = NULL;
 108
 109    assert(!st->use_direct_map);
 110
 111    if (transfer == SVGA3D_READ_HOST_VRAM) {
 112       SVGA_DBG(DEBUG_PERF, "%s: readback transfer\n", __FUNCTION__);
 113    }
 114
 115    /* Ensure any pending operations on host surfaces are queued on the command
 116     * buffer first.
 117     */
 118    svga_surfaces_flush( svga );
 119
 120    if (!st->swbuf) {
 121       /* Do the DMA transfer in a single go */
 122       svga_transfer_dma_band(svga, st, transfer,
 123                              st->base.box.x, st->base.box.y, st->base.box.z,
 124                              st->base.box.width, st->base.box.height, st->base.box.depth,
 125                              0, 0, 0,
 126                              flags);
 127
 128       if (transfer == SVGA3D_READ_HOST_VRAM) {
 129          svga_context_flush(svga, &fence);
 130          sws->fence_finish(sws, fence, 0);
 131          sws->fence_reference(sws, &fence, NULL);
 132       }
 133    }
 134    else {
 135       int y, h, srcy;
 136       unsigned blockheight =
 137          util_format_get_blockheight(st->base.resource->format);
 138
 139       h = st->hw_nblocksy * blockheight;
 140       srcy = 0;
 141
 142       for (y = 0; y < st->base.box.height; y += h) {
 143          unsigned offset, length;
 144          void *hw, *sw;
 145
 146          if (y + h > st->base.box.height)
 147             h = st->base.box.height - y;
 148
 149          /* Transfer band must be aligned to pixel block boundaries */
 150          assert(y % blockheight == 0);
 151          assert(h % blockheight == 0);
 152
 153          offset = y * st->base.stride / blockheight;
 154          length = h * st->base.stride / blockheight;
 155
 156          sw = (uint8_t *) st->swbuf + offset;
 157
 158          if (transfer == SVGA3D_WRITE_HOST_VRAM) {
 159             unsigned usage = PIPE_TRANSFER_WRITE;
 160
 161             /* Wait for the previous DMAs to complete */
 162             /* TODO: keep one DMA (at half the size) in the background */
 163             if (y) {
 164                svga_context_flush(svga, NULL);
 165                usage |= PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE;
 166             }
 167
 168             hw = sws->buffer_map(sws, st->hwbuf, usage);
 169             assert(hw);
 170             if (hw) {
 171                memcpy(hw, sw, length);
 172                sws->buffer_unmap(sws, st->hwbuf);
 173             }
 174          }
 175
 176          svga_transfer_dma_band(svga, st, transfer,
 177                                 st->base.box.x, y, st->base.box.z,
 178                                 st->base.box.width, h, st->base.box.depth,
 179                                 0, srcy, 0, flags);
 180
 181          /*
 182           * Prevent the texture contents to be discarded on the next band
 183           * upload.
 184           */
 185          flags.discard = FALSE;
 186
 187          if (transfer == SVGA3D_READ_HOST_VRAM) {
 188             svga_context_flush(svga, &fence);
 189             sws->fence_finish(sws, fence, 0);
 190
 191             hw = sws->buffer_map(sws, st->hwbuf, PIPE_TRANSFER_READ);
 192             assert(hw);
 193             if (hw) {
 194                memcpy(sw, hw, length);
 195                sws->buffer_unmap(sws, st->hwbuf);
 196             }
 197          }
 198       }
 199    }
 200 }
 201
 202
 203
 204 static boolean
 205 svga_texture_get_handle(struct pipe_screen *screen,
 206                         struct pipe_resource *texture,
 207                         struct winsys_handle *whandle)
 208 {
 209    struct svga_winsys_screen *sws = svga_winsys_screen(texture->screen);
 210    unsigned stride;
 211
 212    assert(svga_texture(texture)->key.cachable == 0);
 213    svga_texture(texture)->key.cachable = 0;
 214
 215    stride = util_format_get_nblocksx(texture->format, texture->width0) *
 216             util_format_get_blocksize(texture->format);
 217
 218    return sws->surface_get_handle(sws, svga_texture(texture)->handle,
 219                                   stride, whandle);
 220 }
 221
 222
 223 static void
 224 svga_texture_destroy(struct pipe_screen *screen,
 225                      struct pipe_resource *pt)
 226 {
 227    struct svga_screen *ss = svga_screen(screen);
 228    struct svga_texture *tex = svga_texture(pt);
 229
 230    ss->texture_timestamp++;
 231
 232    svga_sampler_view_reference(&tex->cached_view, NULL);
 233
 234    /*
 235      DBG("%s deleting %p\n", __FUNCTION__, (void *) tex);
 236    */
 237    SVGA_DBG(DEBUG_DMA, "unref sid %p (texture)\n", tex->handle);
 238    svga_screen_surface_destroy(ss, &tex->key, &tex->handle);
 239
 240    ss->hud.total_resource_bytes -= tex->size;
 241
 242    FREE(tex->defined);
 243    FREE(tex->rendered_to);
 244    FREE(tex->dirty);
 245    FREE(tex);
 246
 247    assert(ss->hud.num_resources > 0);
 248    if (ss->hud.num_resources > 0)
 249       ss->hud.num_resources--;
 250 }
 251
 252
 253 /**
 254  * Determine if we need to read back a texture image before mapping it.
 255  */
 256 static boolean
 257 need_tex_readback(struct pipe_transfer *transfer)
 258 {
 259    struct svga_texture *t = svga_texture(transfer->resource);
 260
 261    if (transfer->usage & PIPE_TRANSFER_READ)
 262       return TRUE;
 263
 264    if ((transfer->usage & PIPE_TRANSFER_WRITE) &&
 265        ((transfer->usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) == 0)) {
 266       unsigned face;
 267
 268       if (transfer->resource->target == PIPE_TEXTURE_CUBE) {
 269          assert(transfer->box.depth == 1);
 270          face = transfer->box.z;
 271       }
 272       else {
 273          face = 0;
 274       }
 275       if (svga_was_texture_rendered_to(t, face, transfer->level)) {
 276          return TRUE;
 277       }
 278    }
 279
 280    return FALSE;
 281 }
 282
 283
 284 static enum pipe_error
 285 readback_image_vgpu9(struct svga_context *svga,
 286                    struct svga_winsys_surface *surf,
 287                    unsigned slice,
 288                    unsigned level)
 289 {
 290    enum pipe_error ret;
 291
 292    ret = SVGA3D_ReadbackGBImage(svga->swc, surf, slice, level);
 293    if (ret != PIPE_OK) {
 294       svga_context_flush(svga, NULL);
 295       ret = SVGA3D_ReadbackGBImage(svga->swc, surf, slice, level);
 296    }
 297    return ret;
 298 }
 299
 300
 301 static enum pipe_error
 302 readback_image_vgpu10(struct svga_context *svga,
 303                     struct svga_winsys_surface *surf,
 304                     unsigned slice,
 305                     unsigned level,
 306                     unsigned numMipLevels)
 307 {
 308    enum pipe_error ret;
 309    unsigned subResource;
 310
 311    subResource = slice * numMipLevels + level;
 312    ret = SVGA3D_vgpu10_ReadbackSubResource(svga->swc, surf, subResource);
 313    if (ret != PIPE_OK) {
 314       svga_context_flush(svga, NULL);
 315       ret = SVGA3D_vgpu10_ReadbackSubResource(svga->swc, surf, subResource);
 316    }
 317    return ret;
 318 }
 319
 320
 321 /**
 322  * Use DMA for the transfer request
 323  */
 324 static void *
 325 svga_texture_transfer_map_dma(struct svga_context *svga,
 326                               struct svga_transfer *st)
 327 {
 328    struct svga_winsys_screen *sws = svga_screen(svga->pipe.screen)->sws;
 329    struct pipe_resource *texture = st->base.resource;
 330    unsigned nblocksx, nblocksy;
 331    unsigned d;
 332    unsigned usage = st->base.usage;
 333
 334    /* we'll put the data into a tightly packed buffer */
 335    nblocksx = util_format_get_nblocksx(texture->format, st->base.box.width);
 336    nblocksy = util_format_get_nblocksy(texture->format, st->base.box.height);
 337    d = st->base.box.depth;
 338
 339    st->base.stride = nblocksx*util_format_get_blocksize(texture->format);
 340    st->base.layer_stride = st->base.stride * nblocksy;
 341    st->hw_nblocksy = nblocksy;
 342
 343    st->hwbuf = svga_winsys_buffer_create(svga, 1, 0,
 344                                          st->hw_nblocksy * st->base.stride * d);
 345
 346    while (!st->hwbuf && (st->hw_nblocksy /= 2)) {
 347       st->hwbuf =
 348          svga_winsys_buffer_create(svga, 1, 0,
 349                                    st->hw_nblocksy * st->base.stride * d);
 350    }
 351
 352    if (!st->hwbuf)
 353       return NULL;
 354
 355    if (st->hw_nblocksy < nblocksy) {
 356       /* We couldn't allocate a hardware buffer big enough for the transfer,
 357        * so allocate regular malloc memory instead
 358        */
 359       if (0) {
 360          debug_printf("%s: failed to allocate %u KB of DMA, "
 361                       "splitting into %u x %u KB DMA transfers\n",
 362                       __FUNCTION__,
 363                       (nblocksy * st->base.stride + 1023) / 1024,
 364                       (nblocksy + st->hw_nblocksy - 1) / st->hw_nblocksy,
 365                       (st->hw_nblocksy * st->base.stride + 1023) / 1024);
 366       }
 367
 368       st->swbuf = MALLOC(nblocksy * st->base.stride * d);
 369       if (!st->swbuf) {
 370          sws->buffer_destroy(sws, st->hwbuf);
 371          return NULL;
 372       }
 373    }
 374
 375    if (usage & PIPE_TRANSFER_READ) {
 376       SVGA3dSurfaceDMAFlags flags;
 377       memset(&flags, 0, sizeof flags);
 378       svga_transfer_dma(svga, st, SVGA3D_READ_HOST_VRAM, flags);
 379    }
 380
 381    if (st->swbuf) {
 382       return st->swbuf;
 383    }
 384    else {
 385       return sws->buffer_map(sws, st->hwbuf, usage);
 386    }
 387 }
 388
 389
 390 /**
 391  * Use direct map for the transfer request
 392  */
 393 static void *
 394 svga_texture_transfer_map_direct(struct svga_context *svga,
 395                                  struct svga_transfer *st)
 396 {
 397    struct svga_winsys_screen *sws = svga_screen(svga->pipe.screen)->sws;
 398    struct pipe_transfer *transfer = &st->base;
 399    struct pipe_resource *texture = transfer->resource;
 400    struct svga_texture *tex = svga_texture(texture);
 401    struct svga_winsys_surface *surf = tex->handle;
 402    unsigned level = st->base.level;
 403    unsigned w, h, nblocksx, nblocksy;
 404    unsigned usage = st->base.usage;
 405
 406    if (!surf) {
 407       FREE(st);
 408       return NULL;
 409    }
 410
 411    /* we'll directly access the guest-backed surface */
 412    w = u_minify(texture->width0, level);
 413    h = u_minify(texture->height0, level);
 414    nblocksx = util_format_get_nblocksx(texture->format, w);
 415    nblocksy = util_format_get_nblocksy(texture->format, h);
 416    st->hw_nblocksy = nblocksy;
 417    st->base.stride = nblocksx*util_format_get_blocksize(texture->format);
 418    st->base.layer_stride = st->base.stride * nblocksy;
 419
 420    /* If this is the first time mapping to the surface in this
 421     * command buffer, clear the dirty masks of this surface.
 422     */
 423    if (sws->surface_is_flushed(sws, surf)) {
 424       svga_clear_texture_dirty(tex);
 425    }
 426
 427    if (need_tex_readback(transfer)) {
 428       enum pipe_error ret;
 429
 430       svga_surfaces_flush(svga);
 431
 432       if (svga_have_vgpu10(svga)) {
 433          ret = readback_image_vgpu10(svga, surf, st->slice, level,
 434                                      tex->b.b.last_level + 1);
 435       } else {
 436          ret = readback_image_vgpu9(svga, surf, st->slice, level);
 437       }
 438
 439       svga->hud.num_readbacks++;
 440       SVGA_STATS_COUNT_INC(sws, SVGA_STATS_COUNT_TEXREADBACK);
 441
 442       assert(ret == PIPE_OK);
 443       (void) ret;
 444
 445       svga_context_flush(svga, NULL);
 446
 447       /*
 448        * Note: if PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE were specified
 449        * we could potentially clear the flag for all faces/layers/mips.
 450        */
 451       svga_clear_texture_rendered_to(tex, st->slice, level);
 452    }
 453    else {
 454       assert(usage & PIPE_TRANSFER_WRITE);
 455       if ((usage & PIPE_TRANSFER_UNSYNCHRONIZED) == 0) {
 456          if (svga_is_texture_dirty(tex, st->slice, level)) {
 457             /*
 458              * do a surface flush if the subresource has been modified
 459              * in this command buffer.
 460              */
 461             svga_surfaces_flush(svga);
 462             if (!sws->surface_is_flushed(sws, surf)) {
 463                svga->hud.surface_write_flushes++;
 464                SVGA_STATS_COUNT_INC(sws, SVGA_STATS_COUNT_SURFACEWRITEFLUSH);
 465                svga_context_flush(svga, NULL);
 466             }
 467          }
 468       }
 469    }
 470
 471    /*
 472     * Begin mapping code
 473     */
 474    {
 475       SVGA3dSize baseLevelSize;
 476       uint8_t *map;
 477       boolean retry;
 478       unsigned offset, mip_width, mip_height;
 479
 480       map = svga->swc->surface_map(svga->swc, surf, usage, &retry);
 481       if (map == NULL && retry) {
 482          /*
 483           * At this point, the svga_surfaces_flush() should already have
 484           * called in svga_texture_get_transfer().
 485           */
 486          svga->hud.surface_write_flushes++;
 487          svga_context_flush(svga, NULL);
 488          map = svga->swc->surface_map(svga->swc, surf, usage, &retry);
 489       }
 490
 491       /*
 492        * Make sure we return NULL if the map fails
 493        */
 494       if (!map) {
 495          return NULL;
 496       }
 497
 498       /**
 499        * Compute the offset to the specific texture slice in the buffer.
 500        */
 501       baseLevelSize.width = tex->b.b.width0;
 502       baseLevelSize.height = tex->b.b.height0;
 503       baseLevelSize.depth = tex->b.b.depth0;
 504
 505       if ((tex->b.b.target == PIPE_TEXTURE_1D_ARRAY) ||
 506           (tex->b.b.target == PIPE_TEXTURE_2D_ARRAY)) {
 507          st->base.layer_stride =
 508             svga3dsurface_get_image_offset(tex->key.format, baseLevelSize,
 509                                            tex->b.b.last_level + 1, 1, 0);
 510       }
 511
 512       offset = svga3dsurface_get_image_offset(tex->key.format, baseLevelSize,
 513                                               tex->b.b.last_level + 1, /* numMips */
 514                                               st->slice, level);
 515       if (level > 0) {
 516          assert(offset > 0);
 517       }
 518
 519       mip_width = u_minify(tex->b.b.width0, level);
 520       mip_height = u_minify(tex->b.b.height0, level);
 521
 522       offset += svga3dsurface_get_pixel_offset(tex->key.format,
 523                                                mip_width, mip_height,
 524                                                st->base.box.x,
 525                                                st->base.box.y,
 526                                                st->base.box.z);
 527
 528       if (usage & PIPE_TRANSFER_WRITE) {
 529          /* mark this texture level as dirty */
 530          svga_set_texture_dirty(tex, st->slice, level);
 531       }
 532
 533       return (void *) (map + offset);
 534    }
 535 }
 536
 537
 538 /**
 539  * Request a transfer map to the texture resource
 540  */
 541 static void *
 542 svga_texture_transfer_map(struct pipe_context *pipe,
 543                           struct pipe_resource *texture,
 544                           unsigned level,
 545                           unsigned usage,
 546                           const struct pipe_box *box,
 547                           struct pipe_transfer **ptransfer)
 548 {
 549    struct svga_context *svga = svga_context(pipe);
 550    struct svga_winsys_screen *sws = svga_screen(pipe->screen)->sws;
 551    struct svga_texture *tex = svga_texture(texture);
 552    struct svga_transfer *st;
 553    boolean use_direct_map = svga_have_gb_objects(svga) &&
 554                             !svga_have_gb_dma(svga);
 555    void *returnVal = NULL;
 556    int64_t begin = svga_get_time(svga);
 557
 558    SVGA_STATS_TIME_PUSH(sws, SVGA_STATS_TIME_TEXTRANSFERMAP);
 559
 560    /* We can't map texture storage directly unless we have GB objects */
 561    if (usage & PIPE_TRANSFER_MAP_DIRECTLY) {
 562       if (svga_have_gb_objects(svga))
 563          use_direct_map = TRUE;
 564       else
 565          goto done;
 566    }
 567
 568    st = CALLOC_STRUCT(svga_transfer);
 569    if (!st)
 570       goto done;
 571
 572    st->base.level = level;
 573    st->base.usage = usage;
 574    st->base.box = *box;
 575
 576    switch (tex->b.b.target) {
 577    case PIPE_TEXTURE_CUBE:
 578       st->slice = st->base.box.z;
 579       st->base.box.z = 0;   /* so we don't apply double offsets below */
 580       break;
 581    case PIPE_TEXTURE_2D_ARRAY:
 582    case PIPE_TEXTURE_1D_ARRAY:
 583       st->slice = st->base.box.z;
 584       st->base.box.z = 0;   /* so we don't apply double offsets below */
 585
 586       /* Force direct map for transfering multiple slices */
 587       if (st->base.box.depth > 1)
 588          use_direct_map = svga_have_gb_objects(svga);
 589
 590       break;
 591    default:
 592       st->slice = 0;
 593       break;
 594    }
 595
 596    st->use_direct_map = use_direct_map;
 597    pipe_resource_reference(&st->base.resource, texture);
 598
 599    if (use_direct_map) {
 600       returnVal = svga_texture_transfer_map_direct(svga, st);
 601    }
 602    else {
 603       returnVal = svga_texture_transfer_map_dma(svga, st);
 604    }
 605
 606    if (!returnVal) {
 607       FREE(st);
 608    }
 609    else {
 610       *ptransfer = &st->base;
 611       svga->hud.num_textures_mapped++;
 612       if (usage & PIPE_TRANSFER_WRITE) {
 613          /* record texture upload for HUD */
 614          svga->hud.num_bytes_uploaded +=
 615             st->base.layer_stride * st->base.box.depth;
 616       }
 617    }
 618
 619 done:
 620    svga->hud.map_buffer_time += (svga_get_time(svga) - begin);
 621    SVGA_STATS_TIME_POP(sws);
 622    return returnVal;
 623 }
 624
 625 /**
 626  * Unmap a GB texture surface.
 627  */
 628 static void
 629 svga_texture_surface_unmap(struct svga_context *svga,
 630                            struct pipe_transfer *transfer)
 631 {
 632    struct svga_winsys_surface *surf = svga_texture(transfer->resource)->handle;
 633    struct svga_winsys_context *swc = svga->swc;
 634    boolean rebind;
 635
 636    assert(surf);
 637
 638    swc->surface_unmap(swc, surf, &rebind);
 639    if (rebind) {
 640       enum pipe_error ret;
 641       ret = SVGA3D_BindGBSurface(swc, surf);
 642       if (ret != PIPE_OK) {
 643          /* flush and retry */
 644          svga_context_flush(svga, NULL);
 645          ret = SVGA3D_BindGBSurface(swc, surf);
 646          assert(ret == PIPE_OK);
 647       }
 648    }
 649 }
 650
 651
 652 static enum pipe_error
 653 update_image_vgpu9(struct svga_context *svga,
 654                    struct svga_winsys_surface *surf,
 655                    const SVGA3dBox *box,
 656                    unsigned slice,
 657                    unsigned level)
 658 {
 659    enum pipe_error ret;
 660
 661    ret = SVGA3D_UpdateGBImage(svga->swc, surf, box, slice, level);
 662    if (ret != PIPE_OK) {
 663       svga_context_flush(svga, NULL);
 664       ret = SVGA3D_UpdateGBImage(svga->swc, surf, box, slice, level);
 665    }
 666    return ret;
 667 }
 668
 669
 670 static enum pipe_error
 671 update_image_vgpu10(struct svga_context *svga,
 672                     struct svga_winsys_surface *surf,
 673                     const SVGA3dBox *box,
 674                     unsigned slice,
 675                     unsigned level,
 676                     unsigned numMipLevels)
 677 {
 678    enum pipe_error ret;
 679    unsigned subResource;
 680
 681    subResource = slice * numMipLevels + level;
 682    ret = SVGA3D_vgpu10_UpdateSubResource(svga->swc, surf, box, subResource);
 683    if (ret != PIPE_OK) {
 684       svga_context_flush(svga, NULL);
 685       ret = SVGA3D_vgpu10_UpdateSubResource(svga->swc, surf, box, subResource);
 686    }
 687    return ret;
 688 }
 689
 690
 691 /**
 692  * unmap DMA transfer request
 693  */
 694 static void
 695 svga_texture_transfer_unmap_dma(struct svga_context *svga,
 696                                 struct svga_transfer *st)
 697 {
 698    struct svga_winsys_screen *sws = svga_screen(svga->pipe.screen)->sws;
 699
 700    if (st->hwbuf)
 701       sws->buffer_unmap(sws, st->hwbuf);
 702
 703    if (st->base.usage & PIPE_TRANSFER_WRITE) {
 704       /* Use DMA to transfer texture data */
 705       SVGA3dSurfaceDMAFlags flags;
 706
 707       memset(&flags, 0, sizeof flags);
 708       if (st->base.usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) {
 709          flags.discard = TRUE;
 710       }
 711       if (st->base.usage & PIPE_TRANSFER_UNSYNCHRONIZED) {
 712          flags.unsynchronized = TRUE;
 713       }
 714
 715       svga_transfer_dma(svga, st, SVGA3D_WRITE_HOST_VRAM, flags);
 716    }
 717
 718    FREE(st->swbuf);
 719    sws->buffer_destroy(sws, st->hwbuf);
 720 }
 721
 722
 723 /**
 724  * unmap direct map transfer request
 725  */
 726 static void
 727 svga_texture_transfer_unmap_direct(struct svga_context *svga,
 728                                    struct svga_transfer *st)
 729 {
 730    struct pipe_transfer *transfer = &st->base;
 731    struct svga_texture *tex = svga_texture(transfer->resource);
 732
 733    svga_texture_surface_unmap(svga, transfer);
 734
 735    if (st->base.usage & PIPE_TRANSFER_WRITE) {
 736       struct svga_winsys_surface *surf = tex->handle;
 737       SVGA3dBox box;
 738       enum pipe_error ret;
 739       unsigned nlayers = 1;
 740
 741       assert(svga_have_gb_objects(svga));
 742
 743       /* update the effected region */
 744       box.x = transfer->box.x;
 745       box.y = transfer->box.y;
 746       box.w = transfer->box.width;
 747       box.h = transfer->box.height;
 748       box.d = transfer->box.depth;
 749
 750       switch (tex->b.b.target) {
 751       case PIPE_TEXTURE_CUBE:
 752          box.z = 0;
 753          break;
 754       case PIPE_TEXTURE_2D_ARRAY:
 755          nlayers = box.d;
 756          box.z = 0;
 757          box.d = 1;
 758          break;
 759       case PIPE_TEXTURE_1D_ARRAY:
 760          nlayers = box.d;
 761          box.y = box.z = 0;
 762          box.d = 1;
 763          break;
 764       default:
 765          box.z = transfer->box.z;
 766          break;
 767       }
 768
 769       if (0)
 770          debug_printf("%s %d, %d, %d  %d x %d x %d\n",
 771                       __FUNCTION__,
 772                       box.x, box.y, box.z,
 773                       box.w, box.h, box.d);
 774
 775       if (svga_have_vgpu10(svga)) {
 776          unsigned i;
 777          for (i = 0; i < nlayers; i++) {
 778             ret = update_image_vgpu10(svga, surf, &box,
 779                                       st->slice + i, transfer->level,
 780                                       tex->b.b.last_level + 1);
 781             assert(ret == PIPE_OK);
 782          }
 783       } else {
 784          assert(nlayers == 1);
 785          ret = update_image_vgpu9(svga, surf, &box, st->slice, transfer->level);
 786          assert(ret == PIPE_OK);
 787       }
 788    }
 789 }
 790
 791 static void
 792 svga_texture_transfer_unmap(struct pipe_context *pipe,
 793                             struct pipe_transfer *transfer)
 794 {
 795    struct svga_context *svga = svga_context(pipe);
 796    struct svga_screen *ss = svga_screen(pipe->screen);
 797    struct svga_winsys_screen *sws = ss->sws;
 798    struct svga_transfer *st = svga_transfer(transfer);
 799    struct svga_texture *tex = svga_texture(transfer->resource);
 800
 801    SVGA_STATS_TIME_PUSH(sws, SVGA_STATS_TIME_TEXTRANSFERUNMAP);
 802
 803    if (st->use_direct_map) {
 804       svga_texture_transfer_unmap_direct(svga, st);
 805    }
 806    else {
 807       svga_texture_transfer_unmap_dma(svga, st);
 808    }
 809
 810    if (st->base.usage & PIPE_TRANSFER_WRITE) {
 811       svga->hud.num_resource_updates++;
 812
 813       ss->texture_timestamp++;
 814       svga_age_texture_view(tex, transfer->level);
 815       if (transfer->resource->target == PIPE_TEXTURE_CUBE)
 816          svga_define_texture_level(tex, st->slice, transfer->level);
 817       else
 818          svga_define_texture_level(tex, 0, transfer->level);
 819    }
 820
 821    pipe_resource_reference(&st->base.resource, NULL);
 822    FREE(st);
 823    SVGA_STATS_TIME_POP(sws);
 824 }
 825
 826
 827 /**
 828  * Does format store depth values?
 829  */
 830 static inline boolean
 831 format_has_depth(enum pipe_format format)
 832 {
 833    const struct util_format_description *desc = util_format_description(format);
 834    return util_format_has_depth(desc);
 835 }
 836
 837
 838 struct u_resource_vtbl svga_texture_vtbl =
 839 {
 840    svga_texture_get_handle,           /* get_handle */
 841    svga_texture_destroy,              /* resource_destroy */
 842    svga_texture_transfer_map,         /* transfer_map */
 843    u_default_transfer_flush_region,   /* transfer_flush_region */
 844    svga_texture_transfer_unmap,       /* transfer_unmap */
 845 };
 846
 847
 848 struct pipe_resource *
 849 svga_texture_create(struct pipe_screen *screen,
 850                     const struct pipe_resource *template)
 851 {
 852    struct svga_screen *svgascreen = svga_screen(screen);
 853    struct svga_texture *tex;
 854    unsigned bindings = template->bind;
 855
 856    SVGA_STATS_TIME_PUSH(svgascreen->sws,
 857                         SVGA_STATS_TIME_CREATETEXTURE);
 858
 859    assert(template->last_level < SVGA_MAX_TEXTURE_LEVELS);
 860    if (template->last_level >= SVGA_MAX_TEXTURE_LEVELS) {
 861       goto fail_notex;
 862    }
 863
 864    tex = CALLOC_STRUCT(svga_texture);
 865    if (!tex) {
 866       goto fail_notex;
 867    }
 868
 869    tex->defined = CALLOC(template->depth0 * template->array_size,
 870                          sizeof(tex->defined[0]));
 871    if (!tex->defined) {
 872       FREE(tex);
 873       goto fail_notex;
 874    }
 875
 876    tex->rendered_to = CALLOC(template->depth0 * template->array_size,
 877                              sizeof(tex->rendered_to[0]));
 878    if (!tex->rendered_to) {
 879       goto fail;
 880    }
 881
 882    tex->dirty = CALLOC(template->depth0 * template->array_size,
 883                              sizeof(tex->dirty[0]));
 884    if (!tex->dirty) {
 885       goto fail;
 886    }
 887
 888    tex->b.b = *template;
 889    tex->b.vtbl = &svga_texture_vtbl;
 890    pipe_reference_init(&tex->b.b.reference, 1);
 891    tex->b.b.screen = screen;
 892
 893    tex->key.flags = 0;
 894    tex->key.size.width = template->width0;
 895    tex->key.size.height = template->height0;
 896    tex->key.size.depth = template->depth0;
 897    tex->key.arraySize = 1;
 898    tex->key.numFaces = 1;
 899
 900    /* single sample texture can be treated as non-multisamples texture */
 901    tex->key.sampleCount = template->nr_samples > 1 ? template->nr_samples : 0;
 902
 903    if (template->nr_samples > 1) {
 904       tex->key.flags |= SVGA3D_SURFACE_MASKABLE_ANTIALIAS;
 905    }
 906
 907    if (svgascreen->sws->have_vgpu10) {
 908       switch (template->target) {
 909       case PIPE_TEXTURE_1D:
 910          tex->key.flags |= SVGA3D_SURFACE_1D;
 911          break;
 912       case PIPE_TEXTURE_1D_ARRAY:
 913          tex->key.flags |= SVGA3D_SURFACE_1D;
 914          /* fall-through */
 915       case PIPE_TEXTURE_2D_ARRAY:
 916          tex->key.flags |= SVGA3D_SURFACE_ARRAY;
 917          tex->key.arraySize = template->array_size;
 918          break;
 919       case PIPE_TEXTURE_3D:
 920          tex->key.flags |= SVGA3D_SURFACE_VOLUME;
 921          break;
 922       case PIPE_TEXTURE_CUBE:
 923          tex->key.flags |= (SVGA3D_SURFACE_CUBEMAP | SVGA3D_SURFACE_ARRAY);
 924          tex->key.numFaces = 6;
 925          break;
 926       default:
 927          break;
 928       }
 929    }
 930    else {
 931       switch (template->target) {
 932       case PIPE_TEXTURE_3D:
 933          tex->key.flags |= SVGA3D_SURFACE_VOLUME;
 934          break;
 935       case PIPE_TEXTURE_CUBE:
 936          tex->key.flags |= SVGA3D_SURFACE_CUBEMAP;
 937          tex->key.numFaces = 6;
 938          break;
 939       default:
 940          break;
 941       }
 942    }
 943
 944    tex->key.cachable = 1;
 945
 946    if ((bindings & (PIPE_BIND_RENDER_TARGET | PIPE_BIND_DEPTH_STENCIL)) &&
 947        !(bindings & PIPE_BIND_SAMPLER_VIEW)) {
 948       /* Also check if the format can be sampled from */
 949       if (screen->is_format_supported(screen, template->format,
 950                                       template->target,
 951                                       template->nr_samples,
 952                                       PIPE_BIND_SAMPLER_VIEW)) {
 953          bindings |= PIPE_BIND_SAMPLER_VIEW;
 954       }
 955    }
 956
 957    if (bindings & PIPE_BIND_SAMPLER_VIEW) {
 958       tex->key.flags |= SVGA3D_SURFACE_HINT_TEXTURE;
 959       tex->key.flags |= SVGA3D_SURFACE_BIND_SHADER_RESOURCE;
 960
 961       if (!(bindings & PIPE_BIND_RENDER_TARGET)) {
 962          /* Also check if the format is renderable */
 963          if (screen->is_format_supported(screen, template->format,
 964                                          template->target,
 965                                          template->nr_samples,
 966                                          PIPE_BIND_RENDER_TARGET)) {
 967             bindings |= PIPE_BIND_RENDER_TARGET;
 968          }
 969       }
 970    }
 971
 972    if (bindings & PIPE_BIND_DISPLAY_TARGET) {
 973       tex->key.cachable = 0;
 974    }
 975
 976    if (bindings & PIPE_BIND_SHARED) {
 977       tex->key.cachable = 0;
 978    }
 979
 980    if (bindings & (PIPE_BIND_SCANOUT | PIPE_BIND_CURSOR)) {
 981       tex->key.scanout = 1;
 982       tex->key.cachable = 0;
 983    }
 984
 985    /*
 986     * Note: Previously we never passed the
 987     * SVGA3D_SURFACE_HINT_RENDERTARGET hint. Mesa cannot
 988     * know beforehand whether a texture will be used as a rendertarget or not
 989     * and it always requests PIPE_BIND_RENDER_TARGET, therefore
 990     * passing the SVGA3D_SURFACE_HINT_RENDERTARGET here defeats its purpose.
 991     *
 992     * However, this was changed since other state trackers
 993     * (XA for example) uses it accurately and certain device versions
 994     * relies on it in certain situations to render correctly.
 995     */
 996    if ((bindings & PIPE_BIND_RENDER_TARGET) &&
 997        !util_format_is_s3tc(template->format)) {
 998       tex->key.flags |= SVGA3D_SURFACE_HINT_RENDERTARGET;
 999       tex->key.flags |= SVGA3D_SURFACE_BIND_RENDER_TARGET;
1000    }
1001
1002    if (bindings & PIPE_BIND_DEPTH_STENCIL) {
1003       tex->key.flags |= SVGA3D_SURFACE_HINT_DEPTHSTENCIL;
1004       tex->key.flags |= SVGA3D_SURFACE_BIND_DEPTH_STENCIL;
1005    }
1006
1007    tex->key.numMipLevels = template->last_level + 1;
1008
1009    tex->key.format = svga_translate_format(svgascreen, template->format,
1010                                            bindings);
1011    if (tex->key.format == SVGA3D_FORMAT_INVALID) {
1012       goto fail;
1013    }
1014
1015    /* The actual allocation is done with a typeless format.  Typeless
1016     * formats can be reinterpreted as other formats.  For example,
1017     * SVGA3D_R8G8B8A8_UNORM_TYPELESS can be interpreted as
1018     * SVGA3D_R8G8B8A8_UNORM_SRGB or SVGA3D_R8G8B8A8_UNORM.
1019     * Do not use typeless formats for SHARED, DISPLAY_TARGET or SCANOUT
1020     * buffers.
1021     */
1022    if (svgascreen->sws->have_vgpu10
1023        && ((bindings & (PIPE_BIND_SHARED |
1024                         PIPE_BIND_DISPLAY_TARGET |
1025                         PIPE_BIND_SCANOUT)) == 0)) {
1026       SVGA3dSurfaceFormat typeless = svga_typeless_format(tex->key.format);
1027       if (0) {
1028          debug_printf("Convert resource type %s -> %s (bind 0x%x)\n",
1029                       svga_format_name(tex->key.format),
1030                       svga_format_name(typeless),
1031                       bindings);
1032       }
1033
1034       if (svga_format_is_uncompressed_snorm(tex->key.format)) {
1035          /* We can't normally render to snorm surfaces, but once we
1036           * substitute a typeless format, we can if the rendertarget view
1037           * is unorm.  This can happen with GL_ARB_copy_image.
1038           */
1039          tex->key.flags |= SVGA3D_SURFACE_HINT_RENDERTARGET;
1040          tex->key.flags |= SVGA3D_SURFACE_BIND_RENDER_TARGET;
1041       }
1042
1043       tex->key.format = typeless;
1044    }
1045
1046    SVGA_DBG(DEBUG_DMA, "surface_create for texture\n", tex->handle);
1047    tex->handle = svga_screen_surface_create(svgascreen, bindings,
1048                                             tex->b.b.usage, &tex->key);
1049    if (!tex->handle) {
1050       goto fail;
1051    }
1052
1053    SVGA_DBG(DEBUG_DMA, "  --> got sid %p (texture)\n", tex->handle);
1054
1055    debug_reference(&tex->b.b.reference,
1056                    (debug_reference_descriptor)debug_describe_resource, 0);
1057
1058    tex->size = util_resource_size(template);
1059    svgascreen->hud.total_resource_bytes += tex->size;
1060    svgascreen->hud.num_resources++;
1061
1062    SVGA_STATS_TIME_POP(svgascreen->sws);
1063
1064    return &tex->b.b;
1065
1066 fail:
1067    if (tex->dirty)
1068       FREE(tex->dirty);
1069    if (tex->rendered_to)
1070       FREE(tex->rendered_to);
1071    if (tex->defined)
1072       FREE(tex->defined);
1073    FREE(tex);
1074 fail_notex:
1075    SVGA_STATS_TIME_POP(svgascreen->sws);
1076    return NULL;
1077 }
1078
1079
1080 struct pipe_resource *
1081 svga_texture_from_handle(struct pipe_screen *screen,
1082                          const struct pipe_resource *template,
1083                          struct winsys_handle *whandle)
1084 {
1085    struct svga_winsys_screen *sws = svga_winsys_screen(screen);
1086    struct svga_screen *ss = svga_screen(screen);
1087    struct svga_winsys_surface *srf;
1088    struct svga_texture *tex;
1089    enum SVGA3dSurfaceFormat format = 0;
1090    assert(screen);
1091
1092    /* Only supports one type */
1093    if ((template->target != PIPE_TEXTURE_2D &&
1094        template->target != PIPE_TEXTURE_RECT) ||
1095        template->last_level != 0 ||
1096        template->depth0 != 1) {
1097       return NULL;
1098    }
1099
1100    srf = sws->surface_from_handle(sws, whandle, &format);
1101
1102    if (!srf)
1103       return NULL;
1104
1105    if (svga_translate_format(svga_screen(screen), template->format,
1106                              template->bind) != format) {
1107       unsigned f1 = svga_translate_format(svga_screen(screen),
1108                                           template->format, template->bind);
1109       unsigned f2 = format;
1110
1111       /* It's okay for XRGB and ARGB or depth with/out stencil to get mixed up.
1112        */
1113       if (f1 == SVGA3D_B8G8R8A8_UNORM)
1114          f1 = SVGA3D_A8R8G8B8;
1115       if (f1 == SVGA3D_B8G8R8X8_UNORM)
1116          f1 = SVGA3D_X8R8G8B8;
1117
1118       if ( !( (f1 == f2) ||
1119               (f1 == SVGA3D_X8R8G8B8 && f2 == SVGA3D_A8R8G8B8) ||
1120               (f1 == SVGA3D_X8R8G8B8 && f2 == SVGA3D_B8G8R8X8_UNORM) ||
1121               (f1 == SVGA3D_A8R8G8B8 && f2 == SVGA3D_X8R8G8B8) ||
1122               (f1 == SVGA3D_A8R8G8B8 && f2 == SVGA3D_B8G8R8A8_UNORM) ||
1123               (f1 == SVGA3D_Z_D24X8 && f2 == SVGA3D_Z_D24S8) ||
1124               (f1 == SVGA3D_Z_DF24 && f2 == SVGA3D_Z_D24S8_INT) ) ) {
1125          debug_printf("%s wrong format %s != %s\n", __FUNCTION__,
1126                       svga_format_name(f1), svga_format_name(f2));
1127          return NULL;
1128       }
1129    }
1130
1131    tex = CALLOC_STRUCT(svga_texture);
1132    if (!tex)
1133       return NULL;
1134
1135    tex->defined = CALLOC(template->depth0 * template->array_size,
1136                          sizeof(tex->defined[0]));
1137    if (!tex->defined) {
1138       FREE(tex);
1139       return NULL;
1140    }
1141
1142    tex->b.b = *template;
1143    tex->b.vtbl = &svga_texture_vtbl;
1144    pipe_reference_init(&tex->b.b.reference, 1);
1145    tex->b.b.screen = screen;
1146
1147    SVGA_DBG(DEBUG_DMA, "wrap surface sid %p\n", srf);
1148
1149    tex->key.cachable = 0;
1150    tex->key.format = format;
1151    tex->handle = srf;
1152
1153    tex->rendered_to = CALLOC(1, sizeof(tex->rendered_to[0]));
1154    if (!tex->rendered_to)
1155       goto fail;
1156
1157    tex->dirty = CALLOC(1, sizeof(tex->dirty[0]));
1158    if (!tex->dirty)
1159       goto fail;
1160
1161    tex->imported = TRUE;
1162
1163    ss->hud.num_resources++;
1164
1165    return &tex->b.b;
1166
1167 fail:
1168    if (tex->defined)
1169       FREE(tex->defined);
1170    if (tex->rendered_to)
1171       FREE(tex->rendered_to);
1172    if (tex->dirty)
1173       FREE(tex->dirty);
1174    FREE(tex);
1175    return NULL;
1176 }
1177
1178 boolean
1179 svga_texture_generate_mipmap(struct pipe_context *pipe,
1180                              struct pipe_resource *pt,
1181                              enum pipe_format format,
1182                              unsigned base_level,
1183                              unsigned last_level,
1184                              unsigned first_layer,
1185                              unsigned last_layer)
1186 {
1187    struct pipe_sampler_view templ, *psv;
1188    struct svga_pipe_sampler_view *sv;
1189    struct svga_context *svga = svga_context(pipe);
1190    struct svga_texture *tex = svga_texture(pt);
1191    enum pipe_error ret;
1192
1193    assert(svga_have_vgpu10(svga));
1194
1195    /* Only support 2D texture for now */
1196    if (pt->target != PIPE_TEXTURE_2D)
1197       return FALSE;
1198
1199    /* Fallback to the mipmap generation utility for those formats that
1200     * do not support hw generate mipmap
1201     */
1202    if (!svga_format_support_gen_mips(format))
1203       return FALSE;
1204
1205    /* Make sure the texture surface was created with
1206     * SVGA3D_SURFACE_BIND_RENDER_TARGET
1207     */
1208    if (!tex->handle || !(tex->key.flags & SVGA3D_SURFACE_BIND_RENDER_TARGET))
1209       return FALSE;
1210
1211    templ.format = format;
1212    templ.u.tex.first_layer = first_layer;
1213    templ.u.tex.last_layer = last_layer;
1214    templ.u.tex.first_level = base_level;
1215    templ.u.tex.last_level = last_level;
1216
1217    psv = pipe->create_sampler_view(pipe, pt, &templ);
1218    if (psv == NULL)
1219       return FALSE;
1220
1221    sv = svga_pipe_sampler_view(psv);
1222    ret = svga_validate_pipe_sampler_view(svga, sv);
1223    if (ret != PIPE_OK) {
1224       svga_context_flush(svga, NULL);
1225       ret = svga_validate_pipe_sampler_view(svga, sv);
1226       assert(ret == PIPE_OK);
1227    }
1228
1229    ret = SVGA3D_vgpu10_GenMips(svga->swc, sv->id, tex->handle);
1230    if (ret != PIPE_OK) {
1231       svga_context_flush(svga, NULL);
1232       ret = SVGA3D_vgpu10_GenMips(svga->swc, sv->id, tex->handle);
1233    }
1234    pipe_sampler_view_reference(&psv, NULL);
1235
1236    svga->hud.num_generate_mipmap++;
1237
1238    return TRUE;
1239 }