src/gallium/drivers/svga/svga_resource_texture.c

   1 /**********************************************************
   2  * Copyright 2008-2009 VMware, Inc.  All rights reserved.
   3  *
   4  * Permission is hereby granted, free of charge, to any person
   5  * obtaining a copy of this software and associated documentation
   6  * files (the "Software"), to deal in the Software without
   7  * restriction, including without limitation the rights to use, copy,
   8  * modify, merge, publish, distribute, sublicense, and/or sell copies
   9  * of the Software, and to permit persons to whom the Software is
  10  * furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be
  13  * included in all copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  16  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  17  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  18  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  19  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  20  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  21  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  22  * SOFTWARE.
  23  *
  24  **********************************************************/
  25
  26 #include "svga_cmd.h"
  27
  28 #include "pipe/p_state.h"
  29 #include "pipe/p_defines.h"
  30 #include "util/u_inlines.h"
  31 #include "os/os_thread.h"
  32 #include "util/u_format.h"
  33 #include "util/u_math.h"
  34 #include "util/u_memory.h"
  35
  36 #include "svga_screen.h"
  37 #include "svga_context.h"
  38 #include "svga_resource_texture.h"
  39 #include "svga_resource_buffer.h"
  40 #include "svga_sampler_view.h"
  41 #include "svga_winsys.h"
  42 #include "svga_debug.h"
  43
  44
  45 /* XXX: This isn't a real hardware flag, but just a hack for kernel to
  46  * know about primary surfaces. Find a better way to accomplish this.
  47  */
  48 #define SVGA3D_SURFACE_HINT_SCANOUT (1 << 9)
  49
  50
  51 /*
  52  * Helper function and arrays
  53  */
  54
  55 SVGA3dSurfaceFormat
  56 svga_translate_format(enum pipe_format format)
  57 {
  58    switch(format) {
  59
  60    case PIPE_FORMAT_B8G8R8A8_UNORM:
  61       return SVGA3D_A8R8G8B8;
  62    case PIPE_FORMAT_B8G8R8X8_UNORM:
  63       return SVGA3D_X8R8G8B8;
  64
  65       /* Required for GL2.1:
  66        */
  67    case PIPE_FORMAT_B8G8R8A8_SRGB:
  68       return SVGA3D_A8R8G8B8;
  69
  70    case PIPE_FORMAT_B5G6R5_UNORM:
  71       return SVGA3D_R5G6B5;
  72    case PIPE_FORMAT_B5G5R5A1_UNORM:
  73       return SVGA3D_A1R5G5B5;
  74    case PIPE_FORMAT_B4G4R4A4_UNORM:
  75       return SVGA3D_A4R4G4B4;
  76
  77
  78    /* XXX: Doesn't seem to work properly.
  79    case PIPE_FORMAT_Z32_UNORM:
  80       return SVGA3D_Z_D32;
  81     */
  82    case PIPE_FORMAT_Z16_UNORM:
  83       return SVGA3D_Z_D16;
  84    case PIPE_FORMAT_S8_USCALED_Z24_UNORM:
  85       return SVGA3D_Z_D24S8;
  86    case PIPE_FORMAT_X8Z24_UNORM:
  87       return SVGA3D_Z_D24X8;
  88
  89    case PIPE_FORMAT_A8_UNORM:
  90       return SVGA3D_ALPHA8;
  91    case PIPE_FORMAT_L8_UNORM:
  92       return SVGA3D_LUMINANCE8;
  93
  94    case PIPE_FORMAT_DXT1_RGB:
  95    case PIPE_FORMAT_DXT1_RGBA:
  96       return SVGA3D_DXT1;
  97    case PIPE_FORMAT_DXT3_RGBA:
  98       return SVGA3D_DXT3;
  99    case PIPE_FORMAT_DXT5_RGBA:
 100       return SVGA3D_DXT5;
 101
 102    default:
 103       return SVGA3D_FORMAT_INVALID;
 104    }
 105 }
 106
 107
 108 SVGA3dSurfaceFormat
 109 svga_translate_format_render(enum pipe_format format)
 110 {
 111    switch(format) {
 112    case PIPE_FORMAT_B8G8R8A8_UNORM:
 113    case PIPE_FORMAT_B8G8R8X8_UNORM:
 114    case PIPE_FORMAT_B5G5R5A1_UNORM:
 115    case PIPE_FORMAT_B4G4R4A4_UNORM:
 116    case PIPE_FORMAT_B5G6R5_UNORM:
 117    case PIPE_FORMAT_S8_USCALED_Z24_UNORM:
 118    case PIPE_FORMAT_X8Z24_UNORM:
 119    case PIPE_FORMAT_Z32_UNORM:
 120    case PIPE_FORMAT_Z16_UNORM:
 121    case PIPE_FORMAT_L8_UNORM:
 122       return svga_translate_format(format);
 123
 124    default:
 125       return SVGA3D_FORMAT_INVALID;
 126    }
 127 }
 128
 129
 130 static INLINE void
 131 svga_transfer_dma_band(struct svga_context *svga,
 132                        struct svga_transfer *st,
 133                        SVGA3dTransferType transfer,
 134                        unsigned y, unsigned h, unsigned srcy,
 135                        SVGA3dSurfaceDMAFlags flags)
 136 {
 137    struct svga_texture *texture = svga_texture(st->base.resource);
 138    SVGA3dCopyBox box;
 139    enum pipe_error ret;
 140
 141    box.x = st->base.box.x;
 142    box.y = y;
 143    box.z = st->base.box.z;
 144    box.w = st->base.box.width;
 145    box.h = h;
 146    box.d = 1;
 147    box.srcx = 0;
 148    box.srcy = srcy;
 149    box.srcz = 0;
 150
 151    if (st->base.resource->target == PIPE_TEXTURE_CUBE) {
 152       st->face = st->base.box.z;
 153       box.z = 0;
 154    }
 155    else
 156       st->face = 0;
 157
 158    SVGA_DBG(DEBUG_DMA, "dma %s sid %p, face %u, (%u, %u, %u) - (%u, %u, %u), %ubpp\n",
 159                 transfer == SVGA3D_WRITE_HOST_VRAM ? "to" : "from",
 160                 texture->handle,
 161                 st->face,
 162                 st->base.box.x,
 163                 y,
 164                 box.z,
 165                 st->base.box.x + st->base.box.width,
 166                 y + h,
 167                 box.z + 1,
 168                 util_format_get_blocksize(texture->b.b.format) * 8 /
 169                 (util_format_get_blockwidth(texture->b.b.format)*util_format_get_blockheight(texture->b.b.format)));
 170
 171    ret = SVGA3D_SurfaceDMA(svga->swc, st, transfer, &box, 1, flags);
 172    if(ret != PIPE_OK) {
 173       svga_context_flush(svga, NULL);
 174       ret = SVGA3D_SurfaceDMA(svga->swc, st, transfer, &box, 1, flags);
 175       assert(ret == PIPE_OK);
 176    }
 177 }
 178
 179
 180 static INLINE void
 181 svga_transfer_dma(struct svga_context *svga,
 182                   struct svga_transfer *st,
 183                   SVGA3dTransferType transfer,
 184                   SVGA3dSurfaceDMAFlags flags)
 185 {
 186    struct svga_texture *texture = svga_texture(st->base.resource);
 187    struct svga_screen *screen = svga_screen(texture->b.b.screen);
 188    struct svga_winsys_screen *sws = screen->sws;
 189    struct pipe_fence_handle *fence = NULL;
 190
 191    if (transfer == SVGA3D_READ_HOST_VRAM) {
 192       SVGA_DBG(DEBUG_PERF, "%s: readback transfer\n", __FUNCTION__);
 193    }
 194
 195    /* Ensure any pending operations on host surfaces are queued on the command
 196     * buffer first.
 197     */
 198    svga_surfaces_flush( svga );
 199
 200    if(!st->swbuf) {
 201       /* Do the DMA transfer in a single go */
 202
 203       svga_transfer_dma_band(svga, st, transfer,
 204                              st->base.box.y, st->base.box.height, 0,
 205                              flags);
 206
 207       if(transfer == SVGA3D_READ_HOST_VRAM) {
 208          svga_context_flush(svga, &fence);
 209          sws->fence_finish(sws, fence, 0);
 210          sws->fence_reference(sws, &fence, NULL);
 211       }
 212    }
 213    else {
 214       unsigned y, h, srcy;
 215       unsigned blockheight = util_format_get_blockheight(st->base.resource->format);
 216       h = st->hw_nblocksy * blockheight;
 217       srcy = 0;
 218       for(y = 0; y < st->base.box.height; y += h) {
 219          unsigned offset, length;
 220          void *hw, *sw;
 221
 222          if (y + h > st->base.box.height)
 223             h = st->base.box.height - y;
 224
 225          /* Transfer band must be aligned to pixel block boundaries */
 226          assert(y % blockheight == 0);
 227          assert(h % blockheight == 0);
 228
 229          offset = y * st->base.stride / blockheight;
 230          length = h * st->base.stride / blockheight;
 231
 232          sw = (uint8_t *)st->swbuf + offset;
 233
 234          if (transfer == SVGA3D_WRITE_HOST_VRAM) {
 235             unsigned usage = PIPE_TRANSFER_WRITE;
 236
 237             /* Wait for the previous DMAs to complete */
 238             /* TODO: keep one DMA (at half the size) in the background */
 239             if (y) {
 240                svga_context_flush(svga, NULL);
 241                usage |= PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE;
 242             }
 243
 244             hw = sws->buffer_map(sws, st->hwbuf, usage);
 245             assert(hw);
 246             if (hw) {
 247                memcpy(hw, sw, length);
 248                sws->buffer_unmap(sws, st->hwbuf);
 249             }
 250          }
 251
 252          svga_transfer_dma_band(svga, st, transfer, y, h, srcy, flags);
 253
 254          /*
 255           * Prevent the texture contents to be discarded on the next band
 256           * upload.
 257           */
 258
 259          flags.discard = FALSE;
 260
 261          if(transfer == SVGA3D_READ_HOST_VRAM) {
 262             svga_context_flush(svga, &fence);
 263             sws->fence_finish(sws, fence, 0);
 264
 265             hw = sws->buffer_map(sws, st->hwbuf, PIPE_TRANSFER_READ);
 266             assert(hw);
 267             if(hw) {
 268                memcpy(sw, hw, length);
 269                sws->buffer_unmap(sws, st->hwbuf);
 270             }
 271          }
 272       }
 273    }
 274 }
 275
 276
 277
 278
 279
 280 static boolean
 281 svga_texture_get_handle(struct pipe_screen *screen,
 282                                struct pipe_resource *texture,
 283                                struct winsys_handle *whandle)
 284 {
 285    struct svga_winsys_screen *sws = svga_winsys_screen(texture->screen);
 286    unsigned stride;
 287
 288    assert(svga_texture(texture)->key.cachable == 0);
 289    svga_texture(texture)->key.cachable = 0;
 290    stride = util_format_get_nblocksx(texture->format, texture->width0) *
 291             util_format_get_blocksize(texture->format);
 292    return sws->surface_get_handle(sws, svga_texture(texture)->handle, stride, whandle);
 293 }
 294
 295
 296 static void
 297 svga_texture_destroy(struct pipe_screen *screen,
 298                      struct pipe_resource *pt)
 299 {
 300    struct svga_screen *ss = svga_screen(screen);
 301    struct svga_texture *tex = (struct svga_texture *)pt;
 302
 303    ss->texture_timestamp++;
 304
 305    svga_sampler_view_reference(&tex->cached_view, NULL);
 306
 307    /*
 308      DBG("%s deleting %p\n", __FUNCTION__, (void *) tex);
 309    */
 310    SVGA_DBG(DEBUG_DMA, "unref sid %p (texture)\n", tex->handle);
 311    svga_screen_surface_destroy(ss, &tex->key, &tex->handle);
 312
 313    FREE(tex);
 314 }
 315
 316
 317
 318
 319
 320
 321
 322 /* XXX: Still implementing this as if it was a screen function, but
 323  * can now modify it to queue transfers on the context.
 324  */
 325 static struct pipe_transfer *
 326 svga_texture_get_transfer(struct pipe_context *pipe,
 327                           struct pipe_resource *texture,
 328                           unsigned level,
 329                           unsigned usage,
 330                           const struct pipe_box *box)
 331 {
 332    struct svga_context *svga = svga_context(pipe);
 333    struct svga_screen *ss = svga_screen(pipe->screen);
 334    struct svga_winsys_screen *sws = ss->sws;
 335    struct svga_transfer *st;
 336    unsigned nblocksx = util_format_get_nblocksx(texture->format, box->width);
 337    unsigned nblocksy = util_format_get_nblocksy(texture->format, box->height);
 338
 339    /* We can't map texture storage directly */
 340    if (usage & PIPE_TRANSFER_MAP_DIRECTLY)
 341       return NULL;
 342
 343    assert(box->depth == 1);
 344    st = CALLOC_STRUCT(svga_transfer);
 345    if (!st)
 346       return NULL;
 347
 348    pipe_resource_reference(&st->base.resource, texture);
 349    st->base.level = level;
 350    st->base.usage = usage;
 351    st->base.box = *box;
 352    st->base.stride = nblocksx*util_format_get_blocksize(texture->format);
 353    st->base.layer_stride = 0;
 354
 355    st->hw_nblocksy = nblocksy;
 356
 357    st->hwbuf = svga_winsys_buffer_create(svga,
 358                                          1,
 359                                          0,
 360                                          st->hw_nblocksy*st->base.stride);
 361    while(!st->hwbuf && (st->hw_nblocksy /= 2)) {
 362       st->hwbuf = svga_winsys_buffer_create(svga,
 363                                             1,
 364                                             0,
 365                                             st->hw_nblocksy*st->base.stride);
 366    }
 367
 368    if(!st->hwbuf)
 369       goto no_hwbuf;
 370
 371    if(st->hw_nblocksy < nblocksy) {
 372       /* We couldn't allocate a hardware buffer big enough for the transfer,
 373        * so allocate regular malloc memory instead */
 374       if (0) {
 375          debug_printf("%s: failed to allocate %u KB of DMA, "
 376                       "splitting into %u x %u KB DMA transfers\n",
 377                       __FUNCTION__,
 378                       (nblocksy*st->base.stride + 1023)/1024,
 379                       (nblocksy + st->hw_nblocksy - 1)/st->hw_nblocksy,
 380                       (st->hw_nblocksy*st->base.stride + 1023)/1024);
 381       }
 382
 383       st->swbuf = MALLOC(nblocksy*st->base.stride);
 384       if(!st->swbuf)
 385          goto no_swbuf;
 386    }
 387
 388    if (usage & PIPE_TRANSFER_READ) {
 389       SVGA3dSurfaceDMAFlags flags;
 390       memset(&flags, 0, sizeof flags);
 391       svga_transfer_dma(svga, st, SVGA3D_READ_HOST_VRAM, flags);
 392    }
 393
 394    return &st->base;
 395
 396 no_swbuf:
 397    sws->buffer_destroy(sws, st->hwbuf);
 398 no_hwbuf:
 399    FREE(st);
 400    return NULL;
 401 }
 402
 403
 404 /* XXX: Still implementing this as if it was a screen function, but
 405  * can now modify it to queue transfers on the context.
 406  */
 407 static void *
 408 svga_texture_transfer_map( struct pipe_context *pipe,
 409                            struct pipe_transfer *transfer )
 410 {
 411    struct svga_screen *ss = svga_screen(pipe->screen);
 412    struct svga_winsys_screen *sws = ss->sws;
 413    struct svga_transfer *st = svga_transfer(transfer);
 414
 415    if(st->swbuf)
 416       return st->swbuf;
 417    else
 418       /* The wait for read transfers already happened when svga_transfer_dma
 419        * was called. */
 420       return sws->buffer_map(sws, st->hwbuf, transfer->usage);
 421 }
 422
 423
 424 /* XXX: Still implementing this as if it was a screen function, but
 425  * can now modify it to queue transfers on the context.
 426  */
 427 static void
 428 svga_texture_transfer_unmap(struct pipe_context *pipe,
 429                             struct pipe_transfer *transfer)
 430 {
 431    struct svga_screen *ss = svga_screen(pipe->screen);
 432    struct svga_winsys_screen *sws = ss->sws;
 433    struct svga_transfer *st = svga_transfer(transfer);
 434
 435    if(!st->swbuf)
 436       sws->buffer_unmap(sws, st->hwbuf);
 437 }
 438
 439
 440 static void
 441 svga_texture_transfer_destroy(struct pipe_context *pipe,
 442                               struct pipe_transfer *transfer)
 443 {
 444    struct svga_context *svga = svga_context(pipe);
 445    struct svga_texture *tex = svga_texture(transfer->resource);
 446    struct svga_screen *ss = svga_screen(pipe->screen);
 447    struct svga_winsys_screen *sws = ss->sws;
 448    struct svga_transfer *st = svga_transfer(transfer);
 449
 450    if (st->base.usage & PIPE_TRANSFER_WRITE) {
 451       SVGA3dSurfaceDMAFlags flags;
 452
 453       memset(&flags, 0, sizeof flags);
 454       if (transfer->usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) {
 455          flags.discard = TRUE;
 456       }
 457       if (transfer->usage & PIPE_TRANSFER_UNSYNCHRONIZED) {
 458          flags.unsynchronized = TRUE;
 459       }
 460
 461       svga_transfer_dma(svga, st, SVGA3D_WRITE_HOST_VRAM, flags);
 462       ss->texture_timestamp++;
 463       tex->view_age[transfer->level] = ++(tex->age);
 464       if (transfer->resource->target == PIPE_TEXTURE_CUBE)
 465          tex->defined[transfer->box.z][transfer->level] = TRUE;
 466       else
 467          tex->defined[0][transfer->level] = TRUE;
 468    }
 469
 470    pipe_resource_reference(&st->base.resource, NULL);
 471    FREE(st->swbuf);
 472    sws->buffer_destroy(sws, st->hwbuf);
 473    FREE(st);
 474 }
 475
 476
 477
 478
 479
 480 struct u_resource_vtbl svga_texture_vtbl =
 481 {
 482    svga_texture_get_handle,           /* get_handle */
 483    svga_texture_destroy,              /* resource_destroy */
 484    svga_texture_get_transfer,         /* get_transfer */
 485    svga_texture_transfer_destroy,     /* transfer_destroy */
 486    svga_texture_transfer_map,         /* transfer_map */
 487    u_default_transfer_flush_region,   /* transfer_flush_region */
 488    svga_texture_transfer_unmap,       /* transfer_unmap */
 489    u_default_transfer_inline_write    /* transfer_inline_write */
 490 };
 491
 492
 493
 494
 495 struct pipe_resource *
 496 svga_texture_create(struct pipe_screen *screen,
 497                     const struct pipe_resource *template)
 498 {
 499    struct svga_screen *svgascreen = svga_screen(screen);
 500    struct svga_texture *tex = CALLOC_STRUCT(svga_texture);
 501
 502    if (!tex)
 503       goto error1;
 504
 505    tex->b.b = *template;
 506    tex->b.vtbl = &svga_texture_vtbl;
 507    pipe_reference_init(&tex->b.b.reference, 1);
 508    tex->b.b.screen = screen;
 509
 510    assert(template->last_level < SVGA_MAX_TEXTURE_LEVELS);
 511    if(template->last_level >= SVGA_MAX_TEXTURE_LEVELS)
 512       goto error2;
 513
 514    tex->key.flags = 0;
 515    tex->key.size.width = template->width0;
 516    tex->key.size.height = template->height0;
 517    tex->key.size.depth = template->depth0;
 518
 519    if(template->target == PIPE_TEXTURE_CUBE) {
 520       tex->key.flags |= SVGA3D_SURFACE_CUBEMAP;
 521       tex->key.numFaces = 6;
 522    }
 523    else {
 524       tex->key.numFaces = 1;
 525    }
 526
 527    /* XXX: Disabled for now */
 528    tex->key.cachable = 0;
 529
 530    if (template->bind & PIPE_BIND_SAMPLER_VIEW)
 531       tex->key.flags |= SVGA3D_SURFACE_HINT_TEXTURE;
 532
 533    if (template->bind & PIPE_BIND_DISPLAY_TARGET) {
 534       tex->key.cachable = 0;
 535    }
 536
 537    if (template->bind & PIPE_BIND_SHARED) {
 538       tex->key.cachable = 0;
 539    }
 540
 541    if (template->bind & PIPE_BIND_SCANOUT) {
 542       tex->key.flags |= SVGA3D_SURFACE_HINT_SCANOUT;
 543       tex->key.cachable = 0;
 544    }
 545
 546    /*
 547     * XXX: Never pass the SVGA3D_SURFACE_HINT_RENDERTARGET hint. Mesa cannot
 548     * know beforehand whether a texture will be used as a rendertarget or not
 549     * and it always requests PIPE_BIND_RENDER_TARGET, therefore
 550     * passing the SVGA3D_SURFACE_HINT_RENDERTARGET here defeats its purpose.
 551     */
 552 #if 0
 553    if((template->bind & PIPE_BIND_RENDER_TARGET) &&
 554       !util_format_is_s3tc(template->format))
 555       tex->key.flags |= SVGA3D_SURFACE_HINT_RENDERTARGET;
 556 #endif
 557
 558    if(template->bind & PIPE_BIND_DEPTH_STENCIL)
 559       tex->key.flags |= SVGA3D_SURFACE_HINT_DEPTHSTENCIL;
 560
 561    tex->key.numMipLevels = template->last_level + 1;
 562
 563    tex->key.format = svga_translate_format(template->format);
 564    if(tex->key.format == SVGA3D_FORMAT_INVALID)
 565       goto error2;
 566
 567    SVGA_DBG(DEBUG_DMA, "surface_create for texture\n", tex->handle);
 568    tex->handle = svga_screen_surface_create(svgascreen, &tex->key);
 569    if (tex->handle)
 570       SVGA_DBG(DEBUG_DMA, "  --> got sid %p (texture)\n", tex->handle);
 571
 572    debug_reference(&tex->b.b.reference,
 573                    (debug_reference_descriptor)debug_describe_resource, 0);
 574
 575    return &tex->b.b;
 576
 577 error2:
 578    FREE(tex);
 579 error1:
 580    return NULL;
 581 }
 582
 583
 584
 585
 586 struct pipe_resource *
 587 svga_texture_from_handle(struct pipe_screen *screen,
 588                          const struct pipe_resource *template,
 589                          struct winsys_handle *whandle)
 590 {
 591    struct svga_winsys_screen *sws = svga_winsys_screen(screen);
 592    struct svga_winsys_surface *srf;
 593    struct svga_texture *tex;
 594    enum SVGA3dSurfaceFormat format = 0;
 595    assert(screen);
 596
 597    /* Only supports one type */
 598    if ((template->target != PIPE_TEXTURE_2D &&
 599        template->target != PIPE_TEXTURE_RECT) ||
 600        template->last_level != 0 ||
 601        template->depth0 != 1) {
 602       return NULL;
 603    }
 604
 605    srf = sws->surface_from_handle(sws, whandle, &format);
 606
 607    if (!srf)
 608       return NULL;
 609
 610    if (svga_translate_format(template->format) != format) {
 611       unsigned f1 = svga_translate_format(template->format);
 612       unsigned f2 = format;
 613
 614       /* It's okay for XRGB and ARGB or depth with/out stencil to get mixed up */
 615       if ( !( (f1 == SVGA3D_X8R8G8B8 && f2 == SVGA3D_A8R8G8B8) ||
 616               (f1 == SVGA3D_A8R8G8B8 && f2 == SVGA3D_X8R8G8B8) ||
 617               (f1 == SVGA3D_Z_D24X8 && f2 == SVGA3D_Z_D24S8) ) ) {
 618          debug_printf("%s wrong format %u != %u\n", __FUNCTION__, f1, f2);
 619          return NULL;
 620       }
 621    }
 622
 623    tex = CALLOC_STRUCT(svga_texture);
 624    if (!tex)
 625       return NULL;
 626
 627    tex->b.b = *template;
 628    tex->b.vtbl = &svga_texture_vtbl;
 629    pipe_reference_init(&tex->b.b.reference, 1);
 630    tex->b.b.screen = screen;
 631
 632    if (format == SVGA3D_X8R8G8B8)
 633       tex->b.b.format = PIPE_FORMAT_B8G8R8X8_UNORM;
 634    else if (format == SVGA3D_A8R8G8B8)
 635       tex->b.b.format = PIPE_FORMAT_B8G8R8A8_UNORM;
 636    else {
 637       /* ?? */
 638    }
 639
 640    SVGA_DBG(DEBUG_DMA, "wrap surface sid %p\n", srf);
 641
 642    tex->key.cachable = 0;
 643    tex->handle = srf;
 644
 645    return &tex->b.b;
 646 }
 647