src/gallium/drivers/svga/svga_screen.c

   1 /**********************************************************
   2  * Copyright 2008-2009 VMware, Inc.  All rights reserved.
   3  *
   4  * Permission is hereby granted, free of charge, to any person
   5  * obtaining a copy of this software and associated documentation
   6  * files (the "Software"), to deal in the Software without
   7  * restriction, including without limitation the rights to use, copy,
   8  * modify, merge, publish, distribute, sublicense, and/or sell copies
   9  * of the Software, and to permit persons to whom the Software is
  10  * furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be
  13  * included in all copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  16  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  17  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  18  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  19  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  20  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  21  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  22  * SOFTWARE.
  23  *
  24  **********************************************************/
  25
  26 #include "util/u_format.h"
  27 #include "util/u_memory.h"
  28 #include "util/u_inlines.h"
  29 #include "util/u_string.h"
  30 #include "util/u_math.h"
  31
  32 #include "svga_winsys.h"
  33 #include "svga_public.h"
  34 #include "svga_context.h"
  35 #include "svga_format.h"
  36 #include "svga_screen.h"
  37 #include "svga_tgsi.h"
  38 #include "svga_resource_texture.h"
  39 #include "svga_resource.h"
  40 #include "svga_debug.h"
  41
  42 #include "svga3d_shaderdefs.h"
  43 #include "VGPU10ShaderTokens.h"
  44
  45 /* NOTE: this constant may get moved into a svga3d*.h header file */
  46 #define SVGA3D_DX_MAX_RESOURCE_SIZE (128 * 1024 * 1024)
  47
  48 #ifdef DEBUG
  49 int SVGA_DEBUG = 0;
  50
  51 static const struct debug_named_value svga_debug_flags[] = {
  52    { "dma",         DEBUG_DMA, NULL },
  53    { "tgsi",        DEBUG_TGSI, NULL },
  54    { "pipe",        DEBUG_PIPE, NULL },
  55    { "state",       DEBUG_STATE, NULL },
  56    { "screen",      DEBUG_SCREEN, NULL },
  57    { "tex",         DEBUG_TEX, NULL },
  58    { "swtnl",       DEBUG_SWTNL, NULL },
  59    { "const",       DEBUG_CONSTS, NULL },
  60    { "viewport",    DEBUG_VIEWPORT, NULL },
  61    { "views",       DEBUG_VIEWS, NULL },
  62    { "perf",        DEBUG_PERF, NULL },
  63    { "flush",       DEBUG_FLUSH, NULL },
  64    { "sync",        DEBUG_SYNC, NULL },
  65    { "cache",       DEBUG_CACHE, NULL },
  66    { "streamout",   DEBUG_STREAMOUT, NULL },
  67    { "query",       DEBUG_QUERY, NULL },
  68    DEBUG_NAMED_VALUE_END
  69 };
  70 #endif
  71
  72 static const char *
  73 svga_get_vendor( struct pipe_screen *pscreen )
  74 {
  75    return "VMware, Inc.";
  76 }
  77
  78
  79 static const char *
  80 svga_get_name( struct pipe_screen *pscreen )
  81 {
  82    const char *build = "", *llvm = "", *mutex = "";
  83    static char name[100];
  84 #ifdef DEBUG
  85    /* Only return internal details in the DEBUG version:
  86     */
  87    build = "build: DEBUG;";
  88    mutex = "mutex: " PIPE_ATOMIC ";";
  89 #else
  90    build = "build: RELEASE;";
  91 #endif
  92 #ifdef HAVE_LLVM
  93    llvm = "LLVM;";
  94 #endif
  95
  96    util_snprintf(name, sizeof(name), "SVGA3D; %s %s %s", build, mutex, llvm);
  97    return name;
  98 }
  99
 100
 101 /** Helper for querying float-valued device cap */
 102 static float
 103 get_float_cap(struct svga_winsys_screen *sws, unsigned cap, float defaultVal)
 104 {
 105    SVGA3dDevCapResult result;
 106    if (sws->get_cap(sws, cap, &result))
 107       return result.f;
 108    else
 109       return defaultVal;
 110 }
 111
 112
 113 /** Helper for querying uint-valued device cap */
 114 static unsigned
 115 get_uint_cap(struct svga_winsys_screen *sws, unsigned cap, unsigned defaultVal)
 116 {
 117    SVGA3dDevCapResult result;
 118    if (sws->get_cap(sws, cap, &result))
 119       return result.u;
 120    else
 121       return defaultVal;
 122 }
 123
 124
 125 /** Helper for querying boolean-valued device cap */
 126 static boolean
 127 get_bool_cap(struct svga_winsys_screen *sws, unsigned cap, boolean defaultVal)
 128 {
 129    SVGA3dDevCapResult result;
 130    if (sws->get_cap(sws, cap, &result))
 131       return result.b;
 132    else
 133       return defaultVal;
 134 }
 135
 136
 137 static float
 138 svga_get_paramf(struct pipe_screen *screen, enum pipe_capf param)
 139 {
 140    struct svga_screen *svgascreen = svga_screen(screen);
 141    struct svga_winsys_screen *sws = svgascreen->sws;
 142
 143    switch (param) {
 144    case PIPE_CAPF_MAX_LINE_WIDTH:
 145       return svgascreen->maxLineWidth;
 146    case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 147       return svgascreen->maxLineWidthAA;
 148
 149    case PIPE_CAPF_MAX_POINT_WIDTH:
 150       /* fall-through */
 151    case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 152       return svgascreen->maxPointSize;
 153
 154    case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 155       return (float) get_uint_cap(sws, SVGA3D_DEVCAP_MAX_TEXTURE_ANISOTROPY, 4);
 156
 157    case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 158       return 15.0;
 159
 160    case PIPE_CAPF_GUARD_BAND_LEFT:
 161    case PIPE_CAPF_GUARD_BAND_TOP:
 162    case PIPE_CAPF_GUARD_BAND_RIGHT:
 163    case PIPE_CAPF_GUARD_BAND_BOTTOM:
 164       return 0.0;
 165    }
 166
 167    debug_printf("Unexpected PIPE_CAPF_ query %u\n", param);
 168    return 0;
 169 }
 170
 171
 172 static int
 173 svga_get_param(struct pipe_screen *screen, enum pipe_cap param)
 174 {
 175    struct svga_screen *svgascreen = svga_screen(screen);
 176    struct svga_winsys_screen *sws = svgascreen->sws;
 177    SVGA3dDevCapResult result;
 178
 179    switch (param) {
 180    case PIPE_CAP_NPOT_TEXTURES:
 181    case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
 182       return 1;
 183    case PIPE_CAP_TWO_SIDED_STENCIL:
 184       return 1;
 185    case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
 186       /*
 187        * "In virtually every OpenGL implementation and hardware,
 188        * GL_MAX_DUAL_SOURCE_DRAW_BUFFERS is 1"
 189        * http://www.opengl.org/wiki/Blending
 190        */
 191       return sws->have_vgpu10 ? 1 : 0;
 192    case PIPE_CAP_ANISOTROPIC_FILTER:
 193       return 1;
 194    case PIPE_CAP_POINT_SPRITE:
 195       return 1;
 196    case PIPE_CAP_TGSI_TEXCOORD:
 197       return 0;
 198    case PIPE_CAP_MAX_RENDER_TARGETS:
 199       return svgascreen->max_color_buffers;
 200    case PIPE_CAP_OCCLUSION_QUERY:
 201       return 1;
 202    case PIPE_CAP_QUERY_TIME_ELAPSED:
 203       return 0;
 204    case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 205       return sws->have_vgpu10;
 206    case PIPE_CAP_TEXTURE_SHADOW_MAP:
 207       return 1;
 208    case PIPE_CAP_TEXTURE_SWIZZLE:
 209       return 1;
 210    case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
 211       return 0;
 212    case PIPE_CAP_USER_VERTEX_BUFFERS:
 213    case PIPE_CAP_USER_INDEX_BUFFERS:
 214       return 0;
 215    case PIPE_CAP_USER_CONSTANT_BUFFERS:
 216       return 1;
 217    case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 218       return 256;
 219
 220    case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 221       {
 222          unsigned levels = SVGA_MAX_TEXTURE_LEVELS;
 223          if (sws->get_cap(sws, SVGA3D_DEVCAP_MAX_TEXTURE_WIDTH, &result))
 224             levels = MIN2(util_logbase2(result.u) + 1, levels);
 225          else
 226             levels = 12 /* 2048x2048 */;
 227          if (sws->get_cap(sws, SVGA3D_DEVCAP_MAX_TEXTURE_HEIGHT, &result))
 228             levels = MIN2(util_logbase2(result.u) + 1, levels);
 229          else
 230             levels = 12 /* 2048x2048 */;
 231          return levels;
 232       }
 233
 234    case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 235       if (!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_VOLUME_EXTENT, &result))
 236          return 8;  /* max 128x128x128 */
 237       return MIN2(util_logbase2(result.u) + 1, SVGA_MAX_TEXTURE_LEVELS);
 238
 239    case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 240       /*
 241        * No mechanism to query the host, and at least limited to 2048x2048 on
 242        * certain hardware.
 243        */
 244       return MIN2(screen->get_param(screen, PIPE_CAP_MAX_TEXTURE_2D_LEVELS),
 245                   12 /* 2048x2048 */);
 246
 247    case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 248       return sws->have_vgpu10 ? SVGA3D_MAX_SURFACE_ARRAYSIZE : 0;
 249
 250    case PIPE_CAP_BLEND_EQUATION_SEPARATE: /* req. for GL 1.5 */
 251       return 1;
 252
 253    case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 254       return 1;
 255    case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 256       return sws->have_vgpu10;
 257    case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 258       return 0;
 259    case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 260       return !sws->have_vgpu10;
 261
 262    case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
 263       return 1; /* The color outputs of vertex shaders are not clamped */
 264    case PIPE_CAP_VERTEX_COLOR_CLAMPED:
 265       return 0; /* The driver can't clamp vertex colors */
 266    case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
 267       return 0; /* The driver can't clamp fragment colors */
 268
 269    case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 270       return 1; /* expected for GL_ARB_framebuffer_object */
 271
 272    case PIPE_CAP_GLSL_FEATURE_LEVEL:
 273       return sws->have_vgpu10 ? 330 : 120;
 274
 275    case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 276       return 0;
 277
 278    case PIPE_CAP_SM3:
 279       return 1;
 280
 281    case PIPE_CAP_DEPTH_CLIP_DISABLE:
 282    case PIPE_CAP_INDEP_BLEND_ENABLE:
 283    case PIPE_CAP_CONDITIONAL_RENDER:
 284    case PIPE_CAP_QUERY_TIMESTAMP:
 285    case PIPE_CAP_TGSI_INSTANCEID:
 286    case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 287    case PIPE_CAP_SEAMLESS_CUBE_MAP:
 288    case PIPE_CAP_FAKE_SW_MSAA:
 289       return sws->have_vgpu10;
 290
 291    case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 292       return sws->have_vgpu10 ? SVGA3D_DX_MAX_SOTARGETS : 0;
 293    case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 294       return sws->have_vgpu10 ? 4 : 0;
 295    case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 296       return sws->have_vgpu10 ? SVGA3D_MAX_STREAMOUT_DECLS : 0;
 297    case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
 298       return 0;
 299    case PIPE_CAP_TEXTURE_MULTISAMPLE:
 300       return svgascreen->ms_samples ? 1 : 0;
 301
 302    case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
 303       return SVGA3D_DX_MAX_RESOURCE_SIZE;
 304
 305    case PIPE_CAP_MIN_TEXEL_OFFSET:
 306       return sws->have_vgpu10 ? VGPU10_MIN_TEXEL_FETCH_OFFSET : 0;
 307    case PIPE_CAP_MAX_TEXEL_OFFSET:
 308       return sws->have_vgpu10 ? VGPU10_MAX_TEXEL_FETCH_OFFSET : 0;
 309
 310    case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
 311    case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
 312       return 0;
 313
 314    case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
 315       return sws->have_vgpu10 ? 256 : 0;
 316    case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
 317       return sws->have_vgpu10 ? 1024 : 0;
 318
 319    case PIPE_CAP_PRIMITIVE_RESTART:
 320       return 1; /* may be a sw fallback, depending on restart index */
 321
 322    /* Unsupported features */
 323    case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
 324    case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 325    case PIPE_CAP_SHADER_STENCIL_EXPORT:
 326    case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 327    case PIPE_CAP_INDEP_BLEND_FUNC:
 328    case PIPE_CAP_TEXTURE_BARRIER:
 329    case PIPE_CAP_MAX_VERTEX_STREAMS:
 330    case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
 331    case PIPE_CAP_COMPUTE:
 332    case PIPE_CAP_START_INSTANCE:
 333    case PIPE_CAP_CUBE_MAP_ARRAY:
 334    case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
 335    case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 336    case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
 337    case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
 338    case PIPE_CAP_TEXTURE_GATHER_SM5:
 339    case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
 340    case PIPE_CAP_TEXTURE_QUERY_LOD:
 341    case PIPE_CAP_SAMPLE_SHADING:
 342    case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
 343    case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
 344    case PIPE_CAP_DRAW_INDIRECT:
 345    case PIPE_CAP_MULTI_DRAW_INDIRECT:
 346    case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
 347    case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
 348    case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
 349    case PIPE_CAP_SAMPLER_VIEW_TARGET:
 350    case PIPE_CAP_CLIP_HALFZ:
 351    case PIPE_CAP_VERTEXID_NOBASE:
 352    case PIPE_CAP_POLYGON_OFFSET_CLAMP:
 353    case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
 354    case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
 355    case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
 356       return 0;
 357    case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
 358       return 64;
 359    case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
 360    case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
 361    case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
 362       return 1;  /* need 4-byte alignment for all offsets and strides */
 363    case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
 364       return 2048;
 365    case PIPE_CAP_MAX_VIEWPORTS:
 366       return 1;
 367    case PIPE_CAP_ENDIANNESS:
 368       return PIPE_ENDIAN_LITTLE;
 369
 370    case PIPE_CAP_VENDOR_ID:
 371       return 0x15ad; /* VMware Inc. */
 372    case PIPE_CAP_DEVICE_ID:
 373       return 0x0405; /* assume SVGA II */
 374    case PIPE_CAP_ACCELERATED:
 375       return 0; /* XXX: */
 376    case PIPE_CAP_VIDEO_MEMORY:
 377       /* XXX: Query the host ? */
 378       return 1;
 379    case PIPE_CAP_UMA:
 380    case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
 381    case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
 382    case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
 383    case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
 384    case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
 385    case PIPE_CAP_DEPTH_BOUNDS_TEST:
 386    case PIPE_CAP_TGSI_TXQS:
 387    case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
 388    case PIPE_CAP_SHAREABLE_SHADERS:
 389    case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
 390    case PIPE_CAP_CLEAR_TEXTURE:
 391    case PIPE_CAP_DRAW_PARAMETERS:
 392    case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
 393    case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
 394       return 0;
 395    }
 396
 397    debug_printf("Unexpected PIPE_CAP_ query %u\n", param);
 398    return 0;
 399 }
 400
 401
 402 static int
 403 vgpu9_get_shader_param(struct pipe_screen *screen, unsigned shader,
 404                        enum pipe_shader_cap param)
 405 {
 406    struct svga_screen *svgascreen = svga_screen(screen);
 407    struct svga_winsys_screen *sws = svgascreen->sws;
 408    unsigned val;
 409
 410    assert(!sws->have_vgpu10);
 411
 412    switch (shader)
 413    {
 414    case PIPE_SHADER_FRAGMENT:
 415       switch (param)
 416       {
 417       case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 418       case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 419       case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 420       case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 421          return 512;
 422       case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 423          return SVGA3D_MAX_NESTING_LEVEL;
 424       case PIPE_SHADER_CAP_MAX_INPUTS:
 425          return 10;
 426       case PIPE_SHADER_CAP_MAX_OUTPUTS:
 427          return svgascreen->max_color_buffers;
 428       case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 429          return 224 * sizeof(float[4]);
 430       case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 431          return 1;
 432       case PIPE_SHADER_CAP_MAX_TEMPS:
 433          val = get_uint_cap(sws, SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_TEMPS, 32);
 434          return MIN2(val, SVGA3D_TEMPREG_MAX);
 435       case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 436          /*
 437           * Although PS 3.0 has some addressing abilities it can only represent
 438           * loops that can be statically determined and unrolled. Given we can
 439           * only handle a subset of the cases that the state tracker already
 440           * does it is better to defer loop unrolling to the state tracker.
 441           */
 442          return 0;
 443       case PIPE_SHADER_CAP_MAX_PREDS:
 444          return 1;
 445       case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 446          return 0;
 447       case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 448          return 0;
 449       case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 450       case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 451       case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 452          return 0;
 453       case PIPE_SHADER_CAP_SUBROUTINES:
 454          return 0;
 455       case PIPE_SHADER_CAP_INTEGERS:
 456          return 0;
 457       case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 458       case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 459          return 16;
 460       case PIPE_SHADER_CAP_PREFERRED_IR:
 461          return PIPE_SHADER_IR_TGSI;
 462       case PIPE_SHADER_CAP_DOUBLES:
 463       case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 464       case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 465       case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 466       case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 467       case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 468          return 0;
 469       case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 470          return 32;
 471       }
 472       /* If we get here, we failed to handle a cap above */
 473       debug_printf("Unexpected fragment shader query %u\n", param);
 474       return 0;
 475    case PIPE_SHADER_VERTEX:
 476       switch (param)
 477       {
 478       case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 479       case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 480          return get_uint_cap(sws, SVGA3D_DEVCAP_MAX_VERTEX_SHADER_INSTRUCTIONS,
 481                              512);
 482       case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 483       case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 484          /* XXX: until we have vertex texture support */
 485          return 0;
 486       case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 487          return SVGA3D_MAX_NESTING_LEVEL;
 488       case PIPE_SHADER_CAP_MAX_INPUTS:
 489          return 16;
 490       case PIPE_SHADER_CAP_MAX_OUTPUTS:
 491          return 10;
 492       case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 493          return 256 * sizeof(float[4]);
 494       case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 495          return 1;
 496       case PIPE_SHADER_CAP_MAX_TEMPS:
 497          val = get_uint_cap(sws, SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEMPS, 32);
 498          return MIN2(val, SVGA3D_TEMPREG_MAX);
 499       case PIPE_SHADER_CAP_MAX_PREDS:
 500          return 1;
 501       case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 502          return 0;
 503       case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 504          return 0;
 505       case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 506       case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 507          return 1;
 508       case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 509          return 0;
 510       case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 511          return 1;
 512       case PIPE_SHADER_CAP_SUBROUTINES:
 513          return 0;
 514       case PIPE_SHADER_CAP_INTEGERS:
 515          return 0;
 516       case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 517       case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 518          return 0;
 519       case PIPE_SHADER_CAP_PREFERRED_IR:
 520          return PIPE_SHADER_IR_TGSI;
 521       case PIPE_SHADER_CAP_DOUBLES:
 522       case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 523       case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 524       case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 525       case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 526       case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 527          return 0;
 528       case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 529          return 32;
 530       }
 531       /* If we get here, we failed to handle a cap above */
 532       debug_printf("Unexpected vertex shader query %u\n", param);
 533       return 0;
 534    case PIPE_SHADER_GEOMETRY:
 535    case PIPE_SHADER_COMPUTE:
 536    case PIPE_SHADER_TESS_CTRL:
 537    case PIPE_SHADER_TESS_EVAL:
 538       /* no support for geometry, tess or compute shaders at this time */
 539       return 0;
 540    default:
 541       debug_printf("Unexpected shader type (%u) query\n", shader);
 542       return 0;
 543    }
 544    return 0;
 545 }
 546
 547
 548 static int
 549 vgpu10_get_shader_param(struct pipe_screen *screen, unsigned shader,
 550                         enum pipe_shader_cap param)
 551 {
 552    struct svga_screen *svgascreen = svga_screen(screen);
 553    struct svga_winsys_screen *sws = svgascreen->sws;
 554
 555    assert(sws->have_vgpu10);
 556    (void) sws;  /* silence unused var warnings in non-debug builds */
 557
 558    /* Only VS, GS, FS supported */
 559    if (shader != PIPE_SHADER_VERTEX &&
 560        shader != PIPE_SHADER_GEOMETRY &&
 561        shader != PIPE_SHADER_FRAGMENT) {
 562       return 0;
 563    }
 564
 565    /* NOTE: we do not query the device for any caps/limits at this time */
 566
 567    /* Generally the same limits for vertex, geometry and fragment shaders */
 568    switch (param) {
 569    case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 570    case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 571    case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 572    case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 573       return 64 * 1024;
 574    case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 575       return 64;
 576    case PIPE_SHADER_CAP_MAX_INPUTS:
 577       if (shader == PIPE_SHADER_FRAGMENT)
 578          return VGPU10_MAX_FS_INPUTS;
 579       else if (shader == PIPE_SHADER_GEOMETRY)
 580          return VGPU10_MAX_GS_INPUTS;
 581       else
 582          return VGPU10_MAX_VS_INPUTS;
 583    case PIPE_SHADER_CAP_MAX_OUTPUTS:
 584       if (shader == PIPE_SHADER_FRAGMENT)
 585          return VGPU10_MAX_FS_OUTPUTS;
 586       else if (shader == PIPE_SHADER_GEOMETRY)
 587          return VGPU10_MAX_GS_OUTPUTS;
 588       else
 589          return VGPU10_MAX_VS_OUTPUTS;
 590    case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 591       return VGPU10_MAX_CONSTANT_BUFFER_ELEMENT_COUNT * sizeof(float[4]);
 592    case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 593       return svgascreen->max_const_buffers;
 594    case PIPE_SHADER_CAP_MAX_TEMPS:
 595       return VGPU10_MAX_TEMPS;
 596    case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 597    case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 598    case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 599    case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 600       return TRUE; /* XXX verify */
 601    case PIPE_SHADER_CAP_MAX_PREDS:
 602       return 0;
 603    case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 604    case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 605    case PIPE_SHADER_CAP_SUBROUTINES:
 606    case PIPE_SHADER_CAP_INTEGERS:
 607       return TRUE;
 608    case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 609    case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 610       return SVGA3D_DX_MAX_SAMPLERS;
 611    case PIPE_SHADER_CAP_PREFERRED_IR:
 612       return PIPE_SHADER_IR_TGSI;
 613    case PIPE_SHADER_CAP_DOUBLES:
 614    case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 615    case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 616    case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 617    case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 618    case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 619       return 0;
 620    case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 621       return 32;
 622    default:
 623       debug_printf("Unexpected vgpu10 shader query %u\n", param);
 624       return 0;
 625    }
 626    return 0;
 627 }
 628
 629
 630 static int
 631 svga_get_shader_param(struct pipe_screen *screen, unsigned shader,
 632                       enum pipe_shader_cap param)
 633 {
 634    struct svga_screen *svgascreen = svga_screen(screen);
 635    struct svga_winsys_screen *sws = svgascreen->sws;
 636    if (sws->have_vgpu10) {
 637       return vgpu10_get_shader_param(screen, shader, param);
 638    }
 639    else {
 640       return vgpu9_get_shader_param(screen, shader, param);
 641    }
 642 }
 643
 644
 645 /**
 646  * Implement pipe_screen::is_format_supported().
 647  * \param bindings  bitmask of PIPE_BIND_x flags
 648  */
 649 static boolean
 650 svga_is_format_supported( struct pipe_screen *screen,
 651                           enum pipe_format format,
 652                           enum pipe_texture_target target,
 653                           unsigned sample_count,
 654                           unsigned bindings)
 655 {
 656    struct svga_screen *ss = svga_screen(screen);
 657    SVGA3dSurfaceFormat svga_format;
 658    SVGA3dSurfaceFormatCaps caps;
 659    SVGA3dSurfaceFormatCaps mask;
 660
 661    assert(bindings);
 662
 663    if (sample_count > 1) {
 664       /* In ms_samples, if bit N is set it means that we support
 665        * multisample with N+1 samples per pixel.
 666        */
 667       if ((ss->ms_samples & (1 << (sample_count - 1))) == 0) {
 668          return FALSE;
 669       }
 670    }
 671
 672    svga_format = svga_translate_format(ss, format, bindings);
 673    if (svga_format == SVGA3D_FORMAT_INVALID) {
 674       return FALSE;
 675    }
 676
 677    /* we don't support sRGB rendering into display targets */
 678    if (util_format_is_srgb(format) && (bindings & PIPE_BIND_DISPLAY_TARGET)) {
 679       return FALSE;
 680    }
 681
 682    /*
 683     * For VGPU10 vertex formats, skip querying host capabilities
 684     */
 685
 686    if (ss->sws->have_vgpu10 && (bindings & PIPE_BIND_VERTEX_BUFFER)) {
 687       SVGA3dSurfaceFormat svga_format;
 688       unsigned flags;
 689       svga_translate_vertex_format_vgpu10(format, &svga_format, &flags);
 690       return svga_format != SVGA3D_FORMAT_INVALID;
 691    }
 692
 693    /*
 694     * Override host capabilities, so that we end up with the same
 695     * visuals for all virtual hardware implementations.
 696     */
 697
 698    if (bindings & PIPE_BIND_DISPLAY_TARGET) {
 699       switch (svga_format) {
 700       case SVGA3D_A8R8G8B8:
 701       case SVGA3D_X8R8G8B8:
 702       case SVGA3D_R5G6B5:
 703          break;
 704
 705       /* VGPU10 formats */
 706       case SVGA3D_B8G8R8A8_UNORM:
 707       case SVGA3D_B8G8R8X8_UNORM:
 708       case SVGA3D_B5G6R5_UNORM:
 709          break;
 710
 711       /* Often unsupported/problematic. This means we end up with the same
 712        * visuals for all virtual hardware implementations.
 713        */
 714       case SVGA3D_A4R4G4B4:
 715       case SVGA3D_A1R5G5B5:
 716          return FALSE;
 717
 718       default:
 719          return FALSE;
 720       }
 721    }
 722
 723    /*
 724     * Query the host capabilities.
 725     */
 726
 727    svga_get_format_cap(ss, svga_format, &caps);
 728
 729    if (bindings & PIPE_BIND_RENDER_TARGET) {
 730       /* Check that the color surface is blendable, unless it's an
 731        * integer format.
 732        */
 733       if (!svga_format_is_integer(svga_format) &&
 734           (caps.value & SVGA3DFORMAT_OP_NOALPHABLEND)) {
 735          return FALSE;
 736       }
 737    }
 738
 739    mask.value = 0;
 740    if (bindings & PIPE_BIND_RENDER_TARGET) {
 741       mask.value |= SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET;
 742    }
 743    if (bindings & PIPE_BIND_DEPTH_STENCIL) {
 744       mask.value |= SVGA3DFORMAT_OP_ZSTENCIL;
 745    }
 746    if (bindings & PIPE_BIND_SAMPLER_VIEW) {
 747       mask.value |= SVGA3DFORMAT_OP_TEXTURE;
 748    }
 749
 750    if (target == PIPE_TEXTURE_CUBE) {
 751       mask.value |= SVGA3DFORMAT_OP_CUBETEXTURE;
 752    }
 753    else if (target == PIPE_TEXTURE_3D) {
 754       mask.value |= SVGA3DFORMAT_OP_VOLUMETEXTURE;
 755    }
 756
 757    return (caps.value & mask.value) == mask.value;
 758 }
 759
 760
 761 static void
 762 svga_fence_reference(struct pipe_screen *screen,
 763                      struct pipe_fence_handle **ptr,
 764                      struct pipe_fence_handle *fence)
 765 {
 766    struct svga_winsys_screen *sws = svga_screen(screen)->sws;
 767    sws->fence_reference(sws, ptr, fence);
 768 }
 769
 770
 771 static boolean
 772 svga_fence_finish(struct pipe_screen *screen,
 773                   struct pipe_fence_handle *fence,
 774                   uint64_t timeout)
 775 {
 776    struct svga_winsys_screen *sws = svga_screen(screen)->sws;
 777
 778    if (!timeout)
 779       return sws->fence_signalled(sws, fence, 0) == 0;
 780
 781    SVGA_DBG(DEBUG_DMA|DEBUG_PERF, "%s fence_ptr %p\n",
 782             __FUNCTION__, fence);
 783
 784    return sws->fence_finish(sws, fence, 0) == 0;
 785 }
 786
 787
 788 static int
 789 svga_get_driver_query_info(struct pipe_screen *screen,
 790                            unsigned index,
 791                            struct pipe_driver_query_info *info)
 792 {
 793 #define QUERY(NAME, ENUM, UNITS) \
 794    {NAME, ENUM, {0}, UNITS, PIPE_DRIVER_QUERY_RESULT_TYPE_AVERAGE, 0, 0x0}
 795
 796    static const struct pipe_driver_query_info queries[] = {
 797       /* per-frame counters */
 798       QUERY("num-draw-calls", SVGA_QUERY_NUM_DRAW_CALLS,
 799             PIPE_DRIVER_QUERY_TYPE_UINT64),
 800       QUERY("num-fallbacks", SVGA_QUERY_NUM_FALLBACKS,
 801             PIPE_DRIVER_QUERY_TYPE_UINT64),
 802       QUERY("num-flushes", SVGA_QUERY_NUM_FLUSHES,
 803             PIPE_DRIVER_QUERY_TYPE_UINT64),
 804       QUERY("num-validations", SVGA_QUERY_NUM_VALIDATIONS,
 805             PIPE_DRIVER_QUERY_TYPE_UINT64),
 806       QUERY("map-buffer-time", SVGA_QUERY_MAP_BUFFER_TIME,
 807             PIPE_DRIVER_QUERY_TYPE_MICROSECONDS),
 808       QUERY("num-resources-mapped", SVGA_QUERY_NUM_RESOURCES_MAPPED,
 809             PIPE_DRIVER_QUERY_TYPE_UINT64),
 810       QUERY("num-bytes-uploaded", SVGA_QUERY_NUM_BYTES_UPLOADED,
 811             PIPE_DRIVER_QUERY_TYPE_BYTES),
 812
 813       /* running total counters */
 814       QUERY("memory-used", SVGA_QUERY_MEMORY_USED,
 815             PIPE_DRIVER_QUERY_TYPE_BYTES),
 816       QUERY("num-shaders", SVGA_QUERY_NUM_SHADERS,
 817             PIPE_DRIVER_QUERY_TYPE_UINT64),
 818       QUERY("num-resources", SVGA_QUERY_NUM_RESOURCES,
 819             PIPE_DRIVER_QUERY_TYPE_UINT64),
 820       QUERY("num-state-objects", SVGA_QUERY_NUM_STATE_OBJECTS,
 821             PIPE_DRIVER_QUERY_TYPE_UINT64),
 822       QUERY("num-surface-views", SVGA_QUERY_NUM_SURFACE_VIEWS,
 823             PIPE_DRIVER_QUERY_TYPE_UINT64),
 824    };
 825 #undef QUERY
 826
 827    if (!info)
 828       return Elements(queries);
 829
 830    if (index >= Elements(queries))
 831       return 0;
 832
 833    *info = queries[index];
 834    return 1;
 835 }
 836
 837
 838 static void
 839 svga_destroy_screen( struct pipe_screen *screen )
 840 {
 841    struct svga_screen *svgascreen = svga_screen(screen);
 842
 843    svga_screen_cache_cleanup(svgascreen);
 844
 845    pipe_mutex_destroy(svgascreen->swc_mutex);
 846    pipe_mutex_destroy(svgascreen->tex_mutex);
 847
 848    svgascreen->sws->destroy(svgascreen->sws);
 849
 850    FREE(svgascreen);
 851 }
 852
 853
 854 /**
 855  * Create a new svga_screen object
 856  */
 857 struct pipe_screen *
 858 svga_screen_create(struct svga_winsys_screen *sws)
 859 {
 860    struct svga_screen *svgascreen;
 861    struct pipe_screen *screen;
 862
 863 #ifdef DEBUG
 864    SVGA_DEBUG = debug_get_flags_option("SVGA_DEBUG", svga_debug_flags, 0 );
 865 #endif
 866
 867    svgascreen = CALLOC_STRUCT(svga_screen);
 868    if (!svgascreen)
 869       goto error1;
 870
 871    svgascreen->debug.force_level_surface_view =
 872       debug_get_bool_option("SVGA_FORCE_LEVEL_SURFACE_VIEW", FALSE);
 873    svgascreen->debug.force_surface_view =
 874       debug_get_bool_option("SVGA_FORCE_SURFACE_VIEW", FALSE);
 875    svgascreen->debug.force_sampler_view =
 876       debug_get_bool_option("SVGA_FORCE_SAMPLER_VIEW", FALSE);
 877    svgascreen->debug.no_surface_view =
 878       debug_get_bool_option("SVGA_NO_SURFACE_VIEW", FALSE);
 879    svgascreen->debug.no_sampler_view =
 880       debug_get_bool_option("SVGA_NO_SAMPLER_VIEW", FALSE);
 881
 882    screen = &svgascreen->screen;
 883
 884    screen->destroy = svga_destroy_screen;
 885    screen->get_name = svga_get_name;
 886    screen->get_vendor = svga_get_vendor;
 887    screen->get_device_vendor = svga_get_vendor; // TODO actual device vendor
 888    screen->get_param = svga_get_param;
 889    screen->get_shader_param = svga_get_shader_param;
 890    screen->get_paramf = svga_get_paramf;
 891    screen->get_timestamp = NULL;
 892    screen->is_format_supported = svga_is_format_supported;
 893    screen->context_create = svga_context_create;
 894    screen->fence_reference = svga_fence_reference;
 895    screen->fence_finish = svga_fence_finish;
 896    screen->get_driver_query_info = svga_get_driver_query_info;
 897    svgascreen->sws = sws;
 898
 899    svga_init_screen_resource_functions(svgascreen);
 900
 901    if (sws->get_hw_version) {
 902       svgascreen->hw_version = sws->get_hw_version(sws);
 903    } else {
 904       svgascreen->hw_version = SVGA3D_HWVERSION_WS65_B1;
 905    }
 906
 907    /*
 908     * The D16, D24X8, and D24S8 formats always do an implicit shadow compare
 909     * when sampled from, where as the DF16, DF24, and D24S8_INT do not.  So
 910     * we prefer the later when available.
 911     *
 912     * This mimics hardware vendors extensions for D3D depth sampling. See also
 913     * http://aras-p.info/texts/D3D9GPUHacks.html
 914     */
 915
 916    {
 917       boolean has_df16, has_df24, has_d24s8_int;
 918       SVGA3dSurfaceFormatCaps caps;
 919       SVGA3dSurfaceFormatCaps mask;
 920       mask.value = 0;
 921       mask.zStencil = 1;
 922       mask.texture = 1;
 923
 924       svgascreen->depth.z16 = SVGA3D_Z_D16;
 925       svgascreen->depth.x8z24 = SVGA3D_Z_D24X8;
 926       svgascreen->depth.s8z24 = SVGA3D_Z_D24S8;
 927
 928       svga_get_format_cap(svgascreen, SVGA3D_Z_DF16, &caps);
 929       has_df16 = (caps.value & mask.value) == mask.value;
 930
 931       svga_get_format_cap(svgascreen, SVGA3D_Z_DF24, &caps);
 932       has_df24 = (caps.value & mask.value) == mask.value;
 933
 934       svga_get_format_cap(svgascreen, SVGA3D_Z_D24S8_INT, &caps);
 935       has_d24s8_int = (caps.value & mask.value) == mask.value;
 936
 937       /* XXX: We might want some other logic here.
 938        * Like if we only have d24s8_int we should
 939        * emulate the other formats with that.
 940        */
 941       if (has_df16) {
 942          svgascreen->depth.z16 = SVGA3D_Z_DF16;
 943       }
 944       if (has_df24) {
 945          svgascreen->depth.x8z24 = SVGA3D_Z_DF24;
 946       }
 947       if (has_d24s8_int) {
 948          svgascreen->depth.s8z24 = SVGA3D_Z_D24S8_INT;
 949       }
 950    }
 951
 952    /* Query device caps
 953     */
 954    if (sws->have_vgpu10) {
 955       svgascreen->haveProvokingVertex
 956          = get_bool_cap(sws, SVGA3D_DEVCAP_DX_PROVOKING_VERTEX, FALSE);
 957       svgascreen->haveLineSmooth = TRUE;
 958       svgascreen->maxPointSize = 80.0F;
 959       svgascreen->max_color_buffers = SVGA3D_DX_MAX_RENDER_TARGETS;
 960
 961       /* Multisample samples per pixel */
 962       svgascreen->ms_samples =
 963          get_uint_cap(sws, SVGA3D_DEVCAP_MULTISAMPLE_MASKABLESAMPLES, 0);
 964
 965       /* Maximum number of constant buffers */
 966       svgascreen->max_const_buffers =
 967          get_uint_cap(sws, SVGA3D_DEVCAP_DX_MAX_CONSTANT_BUFFERS, 1);
 968       assert(svgascreen->max_const_buffers <= SVGA_MAX_CONST_BUFS);
 969    }
 970    else {
 971       /* VGPU9 */
 972       unsigned vs_ver = get_uint_cap(sws, SVGA3D_DEVCAP_VERTEX_SHADER_VERSION,
 973                                      SVGA3DVSVERSION_NONE);
 974       unsigned fs_ver = get_uint_cap(sws, SVGA3D_DEVCAP_FRAGMENT_SHADER_VERSION,
 975                                      SVGA3DPSVERSION_NONE);
 976
 977       /* we require Shader model 3.0 or later */
 978       if (fs_ver < SVGA3DPSVERSION_30 || vs_ver < SVGA3DVSVERSION_30) {
 979          goto error2;
 980       }
 981
 982       svgascreen->haveProvokingVertex = FALSE;
 983
 984       svgascreen->haveLineSmooth =
 985          get_bool_cap(sws, SVGA3D_DEVCAP_LINE_AA, FALSE);
 986
 987       svgascreen->maxPointSize =
 988          get_float_cap(sws, SVGA3D_DEVCAP_MAX_POINT_SIZE, 1.0f);
 989       /* Keep this to a reasonable size to avoid failures in conform/pntaa.c */
 990       svgascreen->maxPointSize = MIN2(svgascreen->maxPointSize, 80.0f);
 991
 992       /* The SVGA3D device always supports 4 targets at this time, regardless
 993        * of what querying SVGA3D_DEVCAP_MAX_RENDER_TARGETS might return.
 994        */
 995       svgascreen->max_color_buffers = 4;
 996
 997       /* Only support one constant buffer
 998        */
 999       svgascreen->max_const_buffers = 1;
1000
1001       /* No multisampling */
1002       svgascreen->ms_samples = 0;
1003    }
1004
1005    /* common VGPU9 / VGPU10 caps */
1006    svgascreen->haveLineStipple =
1007       get_bool_cap(sws, SVGA3D_DEVCAP_LINE_STIPPLE, FALSE);
1008
1009    svgascreen->maxLineWidth =
1010       get_float_cap(sws, SVGA3D_DEVCAP_MAX_LINE_WIDTH, 1.0f);
1011
1012    svgascreen->maxLineWidthAA =
1013       get_float_cap(sws, SVGA3D_DEVCAP_MAX_AA_LINE_WIDTH, 1.0f);
1014
1015    if (0) {
1016       debug_printf("svga: haveProvokingVertex %u\n",
1017                    svgascreen->haveProvokingVertex);
1018       debug_printf("svga: haveLineStip %u  "
1019                    "haveLineSmooth %u  maxLineWidth %f\n",
1020                    svgascreen->haveLineStipple, svgascreen->haveLineSmooth,
1021                    svgascreen->maxLineWidth);
1022       debug_printf("svga: maxPointSize %g\n", svgascreen->maxPointSize);
1023    }
1024
1025    pipe_mutex_init(svgascreen->tex_mutex);
1026    pipe_mutex_init(svgascreen->swc_mutex);
1027
1028    svga_screen_cache_init(svgascreen);
1029
1030    return screen;
1031 error2:
1032    FREE(svgascreen);
1033 error1:
1034    return NULL;
1035 }
1036
1037 struct svga_winsys_screen *
1038 svga_winsys_screen(struct pipe_screen *screen)
1039 {
1040    return svga_screen(screen)->sws;
1041 }
1042
1043 #ifdef DEBUG
1044 struct svga_screen *
1045 svga_screen(struct pipe_screen *screen)
1046 {
1047    assert(screen);
1048    assert(screen->destroy == svga_destroy_screen);
1049    return (struct svga_screen *)screen;
1050 }
1051 #endif