src/gallium/drivers/svga/svga_screen.c

   1 /**********************************************************
   2  * Copyright 2008-2009 VMware, Inc.  All rights reserved.
   3  *
   4  * Permission is hereby granted, free of charge, to any person
   5  * obtaining a copy of this software and associated documentation
   6  * files (the "Software"), to deal in the Software without
   7  * restriction, including without limitation the rights to use, copy,
   8  * modify, merge, publish, distribute, sublicense, and/or sell copies
   9  * of the Software, and to permit persons to whom the Software is
  10  * furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be
  13  * included in all copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  16  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  17  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  18  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  19  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  20  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  21  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  22  * SOFTWARE.
  23  *
  24  **********************************************************/
  25
  26 #include "util/u_format.h"
  27 #include "util/u_memory.h"
  28 #include "util/u_inlines.h"
  29 #include "util/u_string.h"
  30 #include "util/u_math.h"
  31
  32 #include "svga_winsys.h"
  33 #include "svga_public.h"
  34 #include "svga_context.h"
  35 #include "svga_format.h"
  36 #include "svga_screen.h"
  37 #include "svga_resource_texture.h"
  38 #include "svga_resource.h"
  39 #include "svga_debug.h"
  40
  41 #include "svga3d_shaderdefs.h"
  42
  43
  44 #ifdef DEBUG
  45 int SVGA_DEBUG = 0;
  46
  47 static const struct debug_named_value svga_debug_flags[] = {
  48    { "dma",      DEBUG_DMA, NULL },
  49    { "tgsi",     DEBUG_TGSI, NULL },
  50    { "pipe",     DEBUG_PIPE, NULL },
  51    { "state",    DEBUG_STATE, NULL },
  52    { "screen",   DEBUG_SCREEN, NULL },
  53    { "tex",      DEBUG_TEX, NULL },
  54    { "swtnl",    DEBUG_SWTNL, NULL },
  55    { "const",    DEBUG_CONSTS, NULL },
  56    { "viewport", DEBUG_VIEWPORT, NULL },
  57    { "views",    DEBUG_VIEWS, NULL },
  58    { "perf",     DEBUG_PERF, NULL },
  59    { "flush",    DEBUG_FLUSH, NULL },
  60    { "sync",     DEBUG_SYNC, NULL },
  61    { "cache",    DEBUG_CACHE, NULL },
  62    DEBUG_NAMED_VALUE_END
  63 };
  64 #endif
  65
  66 static const char *
  67 svga_get_vendor( struct pipe_screen *pscreen )
  68 {
  69    return "VMware, Inc.";
  70 }
  71
  72
  73 static const char *
  74 svga_get_name( struct pipe_screen *pscreen )
  75 {
  76    const char *build = "", *llvm = "", *mutex = "";
  77    static char name[100];
  78 #ifdef DEBUG
  79    /* Only return internal details in the DEBUG version:
  80     */
  81    build = "build: DEBUG;";
  82    mutex = "mutex: " PIPE_ATOMIC ";";
  83 #ifdef HAVE_LLVM
  84    llvm = "LLVM;";
  85 #endif
  86 #else
  87    build = "build: RELEASE;";
  88 #endif
  89
  90    util_snprintf(name, sizeof(name), "SVGA3D; %s %s %s", build, mutex, llvm);
  91    return name;
  92 }
  93
  94
  95
  96
  97 static float
  98 svga_get_paramf(struct pipe_screen *screen, enum pipe_capf param)
  99 {
 100    struct svga_screen *svgascreen = svga_screen(screen);
 101    struct svga_winsys_screen *sws = svgascreen->sws;
 102    SVGA3dDevCapResult result;
 103
 104    switch (param) {
 105    case PIPE_CAPF_MAX_LINE_WIDTH:
 106       return svgascreen->maxLineWidth;
 107    case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 108       return svgascreen->maxLineWidthAA;
 109
 110    case PIPE_CAPF_MAX_POINT_WIDTH:
 111       /* fall-through */
 112    case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 113       return svgascreen->maxPointSize;
 114
 115    case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 116       if(!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_TEXTURE_ANISOTROPY, &result))
 117          return 4.0f;
 118       return (float) result.u;
 119
 120    case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 121       return 15.0;
 122    case PIPE_CAPF_GUARD_BAND_LEFT:
 123    case PIPE_CAPF_GUARD_BAND_TOP:
 124    case PIPE_CAPF_GUARD_BAND_RIGHT:
 125    case PIPE_CAPF_GUARD_BAND_BOTTOM:
 126       return 0.0;
 127    }
 128
 129    debug_printf("Unexpected PIPE_CAPF_ query %u\n", param);
 130    return 0;
 131 }
 132
 133
 134 static int
 135 svga_get_param(struct pipe_screen *screen, enum pipe_cap param)
 136 {
 137    struct svga_screen *svgascreen = svga_screen(screen);
 138    struct svga_winsys_screen *sws = svgascreen->sws;
 139    SVGA3dDevCapResult result;
 140
 141    switch (param) {
 142    case PIPE_CAP_NPOT_TEXTURES:
 143    case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
 144       return 1;
 145    case PIPE_CAP_TWO_SIDED_STENCIL:
 146       return 1;
 147    case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
 148       return 0;
 149    case PIPE_CAP_ANISOTROPIC_FILTER:
 150       return 1;
 151    case PIPE_CAP_POINT_SPRITE:
 152       return 1;
 153    case PIPE_CAP_TGSI_TEXCOORD:
 154       return 0;
 155    case PIPE_CAP_MAX_RENDER_TARGETS:
 156       return svgascreen->max_color_buffers;
 157    case PIPE_CAP_OCCLUSION_QUERY:
 158       return 1;
 159    case PIPE_CAP_QUERY_TIME_ELAPSED:
 160       return 0;
 161    case PIPE_CAP_TEXTURE_SHADOW_MAP:
 162       return 1;
 163    case PIPE_CAP_TEXTURE_SWIZZLE:
 164       return 1;
 165    case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
 166       return 0;
 167    case PIPE_CAP_USER_VERTEX_BUFFERS:
 168    case PIPE_CAP_USER_INDEX_BUFFERS:
 169       return 0;
 170    case PIPE_CAP_USER_CONSTANT_BUFFERS:
 171       return 1;
 172    case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 173       return 16;
 174
 175    case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 176       {
 177          unsigned levels = SVGA_MAX_TEXTURE_LEVELS;
 178          if (sws->get_cap(sws, SVGA3D_DEVCAP_MAX_TEXTURE_WIDTH, &result))
 179             levels = MIN2(util_logbase2(result.u) + 1, levels);
 180          else
 181             levels = 12 /* 2048x2048 */;
 182          if (sws->get_cap(sws, SVGA3D_DEVCAP_MAX_TEXTURE_HEIGHT, &result))
 183             levels = MIN2(util_logbase2(result.u) + 1, levels);
 184          else
 185             levels = 12 /* 2048x2048 */;
 186          return levels;
 187       }
 188
 189    case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 190       if (!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_VOLUME_EXTENT, &result))
 191          return 8;  /* max 128x128x128 */
 192       return MIN2(util_logbase2(result.u) + 1, SVGA_MAX_TEXTURE_LEVELS);
 193
 194    case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 195       /*
 196        * No mechanism to query the host, and at least limited to 2048x2048 on
 197        * certain hardware.
 198        */
 199       return MIN2(screen->get_param(screen, PIPE_CAP_MAX_TEXTURE_2D_LEVELS),
 200                   12 /* 2048x2048 */);
 201
 202    case PIPE_CAP_BLEND_EQUATION_SEPARATE: /* req. for GL 1.5 */
 203       return 1;
 204
 205    case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 206       return 1;
 207    case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 208       return 0;
 209    case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 210       return 0;
 211    case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 212       return 1;
 213
 214    case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
 215       return 1; /* The color outputs of vertex shaders are not clamped */
 216    case PIPE_CAP_VERTEX_COLOR_CLAMPED:
 217       return 0; /* The driver can't clamp vertex colors */
 218    case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
 219       return 0; /* The driver can't clamp fragment colors */
 220
 221    case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 222       return 1; /* expected for GL_ARB_framebuffer_object */
 223
 224    case PIPE_CAP_GLSL_FEATURE_LEVEL:
 225       return 120;
 226
 227    case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 228       return 0;
 229
 230    case PIPE_CAP_SM3:
 231       return 1;
 232
 233    /* Unsupported features */
 234    case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
 235    case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 236    case PIPE_CAP_SHADER_STENCIL_EXPORT:
 237    case PIPE_CAP_DEPTH_CLIP_DISABLE:
 238    case PIPE_CAP_SEAMLESS_CUBE_MAP:
 239    case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 240    case PIPE_CAP_INDEP_BLEND_ENABLE:
 241    case PIPE_CAP_INDEP_BLEND_FUNC:
 242    case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 243    case PIPE_CAP_PRIMITIVE_RESTART:
 244    case PIPE_CAP_TGSI_INSTANCEID:
 245    case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 246    case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 247    case PIPE_CAP_MIN_TEXEL_OFFSET:
 248    case PIPE_CAP_MAX_TEXEL_OFFSET:
 249    case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
 250    case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
 251    case PIPE_CAP_CONDITIONAL_RENDER:
 252    case PIPE_CAP_TEXTURE_BARRIER:
 253    case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 254    case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 255    case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
 256    case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
 257    case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
 258    case PIPE_CAP_MAX_VERTEX_STREAMS:
 259    case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
 260    case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
 261    case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
 262    case PIPE_CAP_COMPUTE:
 263    case PIPE_CAP_START_INSTANCE:
 264    case PIPE_CAP_QUERY_TIMESTAMP:
 265    case PIPE_CAP_TEXTURE_MULTISAMPLE:
 266    case PIPE_CAP_CUBE_MAP_ARRAY:
 267    case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 268    case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
 269    case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 270    case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
 271    case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
 272    case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
 273    case PIPE_CAP_TEXTURE_GATHER_SM5:
 274    case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
 275    case PIPE_CAP_FAKE_SW_MSAA:
 276    case PIPE_CAP_TEXTURE_QUERY_LOD:
 277    case PIPE_CAP_SAMPLE_SHADING:
 278    case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
 279    case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
 280    case PIPE_CAP_DRAW_INDIRECT:
 281    case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
 282    case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
 283    case PIPE_CAP_SAMPLER_VIEW_TARGET:
 284    case PIPE_CAP_CLIP_HALFZ:
 285    case PIPE_CAP_VERTEXID_NOBASE:
 286    case PIPE_CAP_POLYGON_OFFSET_CLAMP:
 287    case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
 288       return 0;
 289    case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
 290       return 64;
 291    case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
 292       return 1;
 293    case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
 294       return 2048;
 295    case PIPE_CAP_MAX_VIEWPORTS:
 296       return 1;
 297    case PIPE_CAP_ENDIANNESS:
 298       return PIPE_ENDIAN_LITTLE;
 299
 300    case PIPE_CAP_VENDOR_ID:
 301       return 0x15ad; /* VMware Inc. */
 302    case PIPE_CAP_DEVICE_ID:
 303       return 0x0405; /* assume SVGA II */
 304    case PIPE_CAP_ACCELERATED:
 305       return 0; /* XXX: */
 306    case PIPE_CAP_VIDEO_MEMORY:
 307       /* XXX: Query the host ? */
 308       return 1;
 309    case PIPE_CAP_UMA:
 310    case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
 311    case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
 312       return 0;
 313    }
 314
 315    debug_printf("Unexpected PIPE_CAP_ query %u\n", param);
 316    return 0;
 317 }
 318
 319 static int svga_get_shader_param(struct pipe_screen *screen, unsigned shader, enum pipe_shader_cap param)
 320 {
 321    struct svga_screen *svgascreen = svga_screen(screen);
 322    struct svga_winsys_screen *sws = svgascreen->sws;
 323    SVGA3dDevCapResult result;
 324
 325    switch (shader)
 326    {
 327    case PIPE_SHADER_FRAGMENT:
 328       switch (param)
 329       {
 330       case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 331       case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 332       case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 333       case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 334          return 512;
 335       case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 336          return SVGA3D_MAX_NESTING_LEVEL;
 337       case PIPE_SHADER_CAP_MAX_INPUTS:
 338          return 10;
 339       case PIPE_SHADER_CAP_MAX_OUTPUTS:
 340          return svgascreen->max_color_buffers;
 341       case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 342          return 224 * sizeof(float[4]);
 343       case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 344          return 1;
 345       case PIPE_SHADER_CAP_MAX_TEMPS:
 346          if (!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_TEMPS, &result))
 347             return 32;
 348          return MIN2(result.u, SVGA3D_TEMPREG_MAX);
 349       case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 350          /*
 351           * Although PS 3.0 has some addressing abilities it can only represent
 352           * loops that can be statically determined and unrolled. Given we can
 353           * only handle a subset of the cases that the state tracker already
 354           * does it is better to defer loop unrolling to the state tracker.
 355           */
 356          return 0;
 357       case PIPE_SHADER_CAP_MAX_PREDS:
 358          return 1;
 359       case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 360          return 0;
 361       case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 362          return 0;
 363       case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 364       case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 365       case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 366          return 0;
 367       case PIPE_SHADER_CAP_SUBROUTINES:
 368          return 0;
 369       case PIPE_SHADER_CAP_INTEGERS:
 370          return 0;
 371       case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 372       case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 373          return 16;
 374       case PIPE_SHADER_CAP_PREFERRED_IR:
 375          return PIPE_SHADER_IR_TGSI;
 376       case PIPE_SHADER_CAP_DOUBLES:
 377       case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 378       case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 379       case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 380       case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 381          return 0;
 382       }
 383       /* If we get here, we failed to handle a cap above */
 384       debug_printf("Unexpected fragment shader query %u\n", param);
 385       return 0;
 386    case PIPE_SHADER_VERTEX:
 387       switch (param)
 388       {
 389       case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 390       case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 391          if (!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_VERTEX_SHADER_INSTRUCTIONS, &result))
 392             return 512;
 393          return result.u;
 394       case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 395       case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 396          /* XXX: until we have vertex texture support */
 397          return 0;
 398       case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 399          return SVGA3D_MAX_NESTING_LEVEL;
 400       case PIPE_SHADER_CAP_MAX_INPUTS:
 401          return 16;
 402       case PIPE_SHADER_CAP_MAX_OUTPUTS:
 403          return 10;
 404       case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 405          return 256 * sizeof(float[4]);
 406       case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 407          return 1;
 408       case PIPE_SHADER_CAP_MAX_TEMPS:
 409          if (!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEMPS, &result))
 410             return 32;
 411          return MIN2(result.u, SVGA3D_TEMPREG_MAX);
 412       case PIPE_SHADER_CAP_MAX_PREDS:
 413          return 1;
 414       case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 415          return 0;
 416       case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 417          return 0;
 418       case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 419       case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 420          return 1;
 421       case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 422          return 0;
 423       case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 424          return 1;
 425       case PIPE_SHADER_CAP_SUBROUTINES:
 426          return 0;
 427       case PIPE_SHADER_CAP_INTEGERS:
 428          return 0;
 429       case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 430       case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 431          return 0;
 432       case PIPE_SHADER_CAP_PREFERRED_IR:
 433          return PIPE_SHADER_IR_TGSI;
 434       case PIPE_SHADER_CAP_DOUBLES:
 435       case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 436       case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 437       case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 438       case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 439          return 0;
 440       }
 441       /* If we get here, we failed to handle a cap above */
 442       debug_printf("Unexpected vertex shader query %u\n", param);
 443       return 0;
 444    case PIPE_SHADER_GEOMETRY:
 445    case PIPE_SHADER_COMPUTE:
 446       /* no support for geometry or compute shaders at this time */
 447       return 0;
 448    default:
 449       debug_printf("Unexpected shader type (%u) query\n", shader);
 450       return 0;
 451    }
 452    return 0;
 453 }
 454
 455
 456 /**
 457  * Implemnt pipe_screen::is_format_supported().
 458  * \param bindings  bitmask of PIPE_BIND_x flags
 459  */
 460 static boolean
 461 svga_is_format_supported( struct pipe_screen *screen,
 462                           enum pipe_format format,
 463                           enum pipe_texture_target target,
 464                           unsigned sample_count,
 465                           unsigned bindings)
 466 {
 467    struct svga_screen *ss = svga_screen(screen);
 468    SVGA3dSurfaceFormat svga_format;
 469    SVGA3dSurfaceFormatCaps caps;
 470    SVGA3dSurfaceFormatCaps mask;
 471
 472    assert(bindings);
 473
 474    if (sample_count > 1) {
 475       return FALSE;
 476    }
 477
 478    svga_format = svga_translate_format(ss, format, bindings);
 479    if (svga_format == SVGA3D_FORMAT_INVALID) {
 480       return FALSE;
 481    }
 482
 483    /*
 484     * Override host capabilities, so that we end up with the same
 485     * visuals for all virtual hardware implementations.
 486     */
 487
 488    if (bindings & PIPE_BIND_DISPLAY_TARGET) {
 489       switch (svga_format) {
 490       case SVGA3D_A8R8G8B8:
 491       case SVGA3D_X8R8G8B8:
 492       case SVGA3D_R5G6B5:
 493          break;
 494
 495       /* Often unsupported/problematic. This means we end up with the same
 496        * visuals for all virtual hardware implementations.
 497        */
 498       case SVGA3D_A4R4G4B4:
 499       case SVGA3D_A1R5G5B5:
 500          return FALSE;
 501
 502       default:
 503          return FALSE;
 504       }
 505    }
 506
 507    /*
 508     * Query the host capabilities.
 509     */
 510
 511    svga_get_format_cap(ss, svga_format, &caps);
 512
 513    mask.value = 0;
 514    if (bindings & PIPE_BIND_RENDER_TARGET) {
 515       mask.offscreenRenderTarget = 1;
 516    }
 517    if (bindings & PIPE_BIND_DEPTH_STENCIL) {
 518       mask.zStencil = 1;
 519    }
 520    if (bindings & PIPE_BIND_SAMPLER_VIEW) {
 521       mask.texture = 1;
 522    }
 523
 524    if (target == PIPE_TEXTURE_CUBE) {
 525       mask.cubeTexture = 1;
 526    }
 527    if (target == PIPE_TEXTURE_3D) {
 528       mask.volumeTexture = 1;
 529    }
 530
 531    return (caps.value & mask.value) == mask.value;
 532 }
 533
 534
 535 static void
 536 svga_fence_reference(struct pipe_screen *screen,
 537                      struct pipe_fence_handle **ptr,
 538                      struct pipe_fence_handle *fence)
 539 {
 540    struct svga_winsys_screen *sws = svga_screen(screen)->sws;
 541    sws->fence_reference(sws, ptr, fence);
 542 }
 543
 544
 545 static boolean
 546 svga_fence_signalled(struct pipe_screen *screen,
 547                      struct pipe_fence_handle *fence)
 548 {
 549    struct svga_winsys_screen *sws = svga_screen(screen)->sws;
 550    return sws->fence_signalled(sws, fence, 0) == 0;
 551 }
 552
 553
 554 static boolean
 555 svga_fence_finish(struct pipe_screen *screen,
 556                   struct pipe_fence_handle *fence,
 557                   uint64_t timeout)
 558 {
 559    struct svga_winsys_screen *sws = svga_screen(screen)->sws;
 560
 561    SVGA_DBG(DEBUG_DMA|DEBUG_PERF, "%s fence_ptr %p\n",
 562             __FUNCTION__, fence);
 563
 564    return sws->fence_finish(sws, fence, 0) == 0;
 565 }
 566
 567
 568 static int
 569 svga_get_driver_query_info(struct pipe_screen *screen,
 570                            unsigned index,
 571                            struct pipe_driver_query_info *info)
 572 {
 573    static const struct pipe_driver_query_info queries[] = {
 574       {"draw-calls", SVGA_QUERY_DRAW_CALLS, {0}},
 575       {"fallbacks", SVGA_QUERY_FALLBACKS, {0}},
 576       {"memory-used", SVGA_QUERY_MEMORY_USED, {0}, PIPE_DRIVER_QUERY_TYPE_BYTES}
 577    };
 578
 579    if (!info)
 580       return Elements(queries);
 581
 582    if (index >= Elements(queries))
 583       return 0;
 584
 585    *info = queries[index];
 586    return 1;
 587 }
 588
 589
 590 static void
 591 svga_destroy_screen( struct pipe_screen *screen )
 592 {
 593    struct svga_screen *svgascreen = svga_screen(screen);
 594
 595    svga_screen_cache_cleanup(svgascreen);
 596
 597    pipe_mutex_destroy(svgascreen->swc_mutex);
 598    pipe_mutex_destroy(svgascreen->tex_mutex);
 599
 600    svgascreen->sws->destroy(svgascreen->sws);
 601
 602    FREE(svgascreen);
 603 }
 604
 605
 606 /**
 607  * Create a new svga_screen object
 608  */
 609 struct pipe_screen *
 610 svga_screen_create(struct svga_winsys_screen *sws)
 611 {
 612    struct svga_screen *svgascreen;
 613    struct pipe_screen *screen;
 614    SVGA3dDevCapResult result;
 615    boolean use_vs30, use_ps30;
 616
 617 #ifdef DEBUG
 618    SVGA_DEBUG = debug_get_flags_option("SVGA_DEBUG", svga_debug_flags, 0 );
 619 #endif
 620
 621    svgascreen = CALLOC_STRUCT(svga_screen);
 622    if (!svgascreen)
 623       goto error1;
 624
 625    svgascreen->debug.force_level_surface_view =
 626       debug_get_bool_option("SVGA_FORCE_LEVEL_SURFACE_VIEW", FALSE);
 627    svgascreen->debug.force_surface_view =
 628       debug_get_bool_option("SVGA_FORCE_SURFACE_VIEW", FALSE);
 629    svgascreen->debug.force_sampler_view =
 630       debug_get_bool_option("SVGA_FORCE_SAMPLER_VIEW", FALSE);
 631    svgascreen->debug.no_surface_view =
 632       debug_get_bool_option("SVGA_NO_SURFACE_VIEW", FALSE);
 633    svgascreen->debug.no_sampler_view =
 634       debug_get_bool_option("SVGA_NO_SAMPLER_VIEW", FALSE);
 635
 636    screen = &svgascreen->screen;
 637
 638    screen->destroy = svga_destroy_screen;
 639    screen->get_name = svga_get_name;
 640    screen->get_vendor = svga_get_vendor;
 641    screen->get_device_vendor = svga_get_vendor; // TODO actual device vendor
 642    screen->get_param = svga_get_param;
 643    screen->get_shader_param = svga_get_shader_param;
 644    screen->get_paramf = svga_get_paramf;
 645    screen->is_format_supported = svga_is_format_supported;
 646    screen->context_create = svga_context_create;
 647    screen->fence_reference = svga_fence_reference;
 648    screen->fence_signalled = svga_fence_signalled;
 649    screen->fence_finish = svga_fence_finish;
 650    screen->get_driver_query_info = svga_get_driver_query_info;
 651    svgascreen->sws = sws;
 652
 653    svga_init_screen_resource_functions(svgascreen);
 654
 655    if (sws->get_hw_version) {
 656       svgascreen->hw_version = sws->get_hw_version(sws);
 657    } else {
 658       svgascreen->hw_version = SVGA3D_HWVERSION_WS65_B1;
 659    }
 660
 661    use_ps30 =
 662       sws->get_cap(sws, SVGA3D_DEVCAP_FRAGMENT_SHADER_VERSION, &result) &&
 663       result.u >= SVGA3DPSVERSION_30 ? TRUE : FALSE;
 664
 665    use_vs30 =
 666       sws->get_cap(sws, SVGA3D_DEVCAP_VERTEX_SHADER_VERSION, &result) &&
 667       result.u >= SVGA3DVSVERSION_30 ? TRUE : FALSE;
 668
 669    /* we require Shader model 3.0 or later */
 670    if (!use_ps30 || !use_vs30)
 671       goto error2;
 672
 673    /*
 674     * The D16, D24X8, and D24S8 formats always do an implicit shadow compare
 675     * when sampled from, where as the DF16, DF24, and D24S8_INT do not.  So
 676     * we prefer the later when available.
 677     *
 678     * This mimics hardware vendors extensions for D3D depth sampling. See also
 679     * http://aras-p.info/texts/D3D9GPUHacks.html
 680     */
 681
 682    {
 683       boolean has_df16, has_df24, has_d24s8_int;
 684       SVGA3dSurfaceFormatCaps caps;
 685       SVGA3dSurfaceFormatCaps mask;
 686       mask.value = 0;
 687       mask.zStencil = 1;
 688       mask.texture = 1;
 689
 690       svgascreen->depth.z16 = SVGA3D_Z_D16;
 691       svgascreen->depth.x8z24 = SVGA3D_Z_D24X8;
 692       svgascreen->depth.s8z24 = SVGA3D_Z_D24S8;
 693
 694       svga_get_format_cap(svgascreen, SVGA3D_Z_DF16, &caps);
 695       has_df16 = (caps.value & mask.value) == mask.value;
 696
 697       svga_get_format_cap(svgascreen, SVGA3D_Z_DF24, &caps);
 698       has_df24 = (caps.value & mask.value) == mask.value;
 699
 700       svga_get_format_cap(svgascreen, SVGA3D_Z_D24S8_INT, &caps);
 701       has_d24s8_int = (caps.value & mask.value) == mask.value;
 702
 703       /* XXX: We might want some other logic here.
 704        * Like if we only have d24s8_int we should
 705        * emulate the other formats with that.
 706        */
 707       if (has_df16) {
 708          svgascreen->depth.z16 = SVGA3D_Z_DF16;
 709       }
 710       if (has_df24) {
 711          svgascreen->depth.x8z24 = SVGA3D_Z_DF24;
 712       }
 713       if (has_d24s8_int) {
 714          svgascreen->depth.s8z24 = SVGA3D_Z_D24S8_INT;
 715       }
 716    }
 717
 718    /* Query device caps
 719     */
 720    if (!sws->get_cap(sws, SVGA3D_DEVCAP_LINE_STIPPLE, &result))
 721       svgascreen->haveLineStipple = FALSE;
 722    else
 723       svgascreen->haveLineStipple = result.u;
 724
 725    if (!sws->get_cap(sws, SVGA3D_DEVCAP_LINE_AA, &result))
 726       svgascreen->haveLineSmooth = FALSE;
 727    else
 728       svgascreen->haveLineSmooth = result.u;
 729
 730    if (!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_LINE_WIDTH, &result))
 731       svgascreen->maxLineWidth = 1.0F;
 732    else
 733       svgascreen->maxLineWidth = result.f;
 734
 735    if (!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_AA_LINE_WIDTH, &result))
 736       svgascreen->maxLineWidthAA = 1.0F;
 737    else
 738       svgascreen->maxLineWidthAA = result.f;
 739
 740    if (0)
 741       debug_printf("svga: haveLineStip %u  "
 742                    "haveLineSmooth %u  maxLineWidth %f\n",
 743                    svgascreen->haveLineStipple, svgascreen->haveLineSmooth,
 744                    svgascreen->maxLineWidth);
 745
 746    if (!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_POINT_SIZE, &result)) {
 747       svgascreen->maxPointSize = 1.0F;
 748    } else {
 749       /* Keep this to a reasonable size to avoid failures in
 750        * conform/pntaa.c:
 751        */
 752       svgascreen->maxPointSize = MIN2(result.f, 80.0f);
 753    }
 754
 755    /* The SVGA3D device always supports 4 targets at this time, regardless
 756     * of what querying SVGA3D_DEVCAP_MAX_RENDER_TARGETS might return.
 757     */
 758    svgascreen->max_color_buffers = 4;
 759
 760    pipe_mutex_init(svgascreen->tex_mutex);
 761    pipe_mutex_init(svgascreen->swc_mutex);
 762
 763    svga_screen_cache_init(svgascreen);
 764
 765    return screen;
 766 error2:
 767    FREE(svgascreen);
 768 error1:
 769    return NULL;
 770 }
 771
 772 struct svga_winsys_screen *
 773 svga_winsys_screen(struct pipe_screen *screen)
 774 {
 775    return svga_screen(screen)->sws;
 776 }
 777
 778 #ifdef DEBUG
 779 struct svga_screen *
 780 svga_screen(struct pipe_screen *screen)
 781 {
 782    assert(screen);
 783    assert(screen->destroy == svga_destroy_screen);
 784    return (struct svga_screen *)screen;
 785 }
 786 #endif