src/gallium/drivers/svga/svga_screen.c

   1 /**********************************************************
   2  * Copyright 2008-2009 VMware, Inc.  All rights reserved.
   3  *
   4  * Permission is hereby granted, free of charge, to any person
   5  * obtaining a copy of this software and associated documentation
   6  * files (the "Software"), to deal in the Software without
   7  * restriction, including without limitation the rights to use, copy,
   8  * modify, merge, publish, distribute, sublicense, and/or sell copies
   9  * of the Software, and to permit persons to whom the Software is
  10  * furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be
  13  * included in all copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  16  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  17  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  18  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  19  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  20  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  21  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  22  * SOFTWARE.
  23  *
  24  **********************************************************/
  25
  26 #include "util/u_format.h"
  27 #include "util/u_memory.h"
  28 #include "util/u_inlines.h"
  29 #include "util/u_string.h"
  30 #include "util/u_math.h"
  31
  32 #include "svga_winsys.h"
  33 #include "svga_public.h"
  34 #include "svga_context.h"
  35 #include "svga_format.h"
  36 #include "svga_screen.h"
  37 #include "svga_tgsi.h"
  38 #include "svga_resource_texture.h"
  39 #include "svga_resource.h"
  40 #include "svga_debug.h"
  41
  42 #include "svga3d_shaderdefs.h"
  43 #include "VGPU10ShaderTokens.h"
  44
  45 /* NOTE: this constant may get moved into a svga3d*.h header file */
  46 #define SVGA3D_DX_MAX_RESOURCE_SIZE (128 * 1024 * 1024)
  47
  48 #ifdef DEBUG
  49 int SVGA_DEBUG = 0;
  50
  51 static const struct debug_named_value svga_debug_flags[] = {
  52    { "dma",         DEBUG_DMA, NULL },
  53    { "tgsi",        DEBUG_TGSI, NULL },
  54    { "pipe",        DEBUG_PIPE, NULL },
  55    { "state",       DEBUG_STATE, NULL },
  56    { "screen",      DEBUG_SCREEN, NULL },
  57    { "tex",         DEBUG_TEX, NULL },
  58    { "swtnl",       DEBUG_SWTNL, NULL },
  59    { "const",       DEBUG_CONSTS, NULL },
  60    { "viewport",    DEBUG_VIEWPORT, NULL },
  61    { "views",       DEBUG_VIEWS, NULL },
  62    { "perf",        DEBUG_PERF, NULL },
  63    { "flush",       DEBUG_FLUSH, NULL },
  64    { "sync",        DEBUG_SYNC, NULL },
  65    { "cache",       DEBUG_CACHE, NULL },
  66    { "streamout",   DEBUG_STREAMOUT, NULL },
  67    { "query",       DEBUG_QUERY, NULL },
  68    DEBUG_NAMED_VALUE_END
  69 };
  70 #endif
  71
  72 static const char *
  73 svga_get_vendor( struct pipe_screen *pscreen )
  74 {
  75    return "VMware, Inc.";
  76 }
  77
  78
  79 static const char *
  80 svga_get_name( struct pipe_screen *pscreen )
  81 {
  82    const char *build = "", *llvm = "", *mutex = "";
  83    static char name[100];
  84 #ifdef DEBUG
  85    /* Only return internal details in the DEBUG version:
  86     */
  87    build = "build: DEBUG;";
  88    mutex = "mutex: " PIPE_ATOMIC ";";
  89 #else
  90    build = "build: RELEASE;";
  91 #endif
  92 #ifdef HAVE_LLVM
  93    llvm = "LLVM;";
  94 #endif
  95
  96    util_snprintf(name, sizeof(name), "SVGA3D; %s %s %s", build, mutex, llvm);
  97    return name;
  98 }
  99
 100
 101 /** Helper for querying float-valued device cap */
 102 static float
 103 get_float_cap(struct svga_winsys_screen *sws, unsigned cap, float defaultVal)
 104 {
 105    SVGA3dDevCapResult result;
 106    if (sws->get_cap(sws, cap, &result))
 107       return result.f;
 108    else
 109       return defaultVal;
 110 }
 111
 112
 113 /** Helper for querying uint-valued device cap */
 114 static unsigned
 115 get_uint_cap(struct svga_winsys_screen *sws, unsigned cap, unsigned defaultVal)
 116 {
 117    SVGA3dDevCapResult result;
 118    if (sws->get_cap(sws, cap, &result))
 119       return result.u;
 120    else
 121       return defaultVal;
 122 }
 123
 124
 125 /** Helper for querying boolean-valued device cap */
 126 static boolean
 127 get_bool_cap(struct svga_winsys_screen *sws, unsigned cap, boolean defaultVal)
 128 {
 129    SVGA3dDevCapResult result;
 130    if (sws->get_cap(sws, cap, &result))
 131       return result.b;
 132    else
 133       return defaultVal;
 134 }
 135
 136
 137 static float
 138 svga_get_paramf(struct pipe_screen *screen, enum pipe_capf param)
 139 {
 140    struct svga_screen *svgascreen = svga_screen(screen);
 141    struct svga_winsys_screen *sws = svgascreen->sws;
 142
 143    switch (param) {
 144    case PIPE_CAPF_MAX_LINE_WIDTH:
 145       return svgascreen->maxLineWidth;
 146    case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 147       return svgascreen->maxLineWidthAA;
 148
 149    case PIPE_CAPF_MAX_POINT_WIDTH:
 150       /* fall-through */
 151    case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 152       return svgascreen->maxPointSize;
 153
 154    case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 155       return (float) get_uint_cap(sws, SVGA3D_DEVCAP_MAX_TEXTURE_ANISOTROPY, 4);
 156
 157    case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 158       return 15.0;
 159
 160    case PIPE_CAPF_GUARD_BAND_LEFT:
 161    case PIPE_CAPF_GUARD_BAND_TOP:
 162    case PIPE_CAPF_GUARD_BAND_RIGHT:
 163    case PIPE_CAPF_GUARD_BAND_BOTTOM:
 164       return 0.0;
 165    }
 166
 167    debug_printf("Unexpected PIPE_CAPF_ query %u\n", param);
 168    return 0;
 169 }
 170
 171
 172 static int
 173 svga_get_param(struct pipe_screen *screen, enum pipe_cap param)
 174 {
 175    struct svga_screen *svgascreen = svga_screen(screen);
 176    struct svga_winsys_screen *sws = svgascreen->sws;
 177    SVGA3dDevCapResult result;
 178
 179    switch (param) {
 180    case PIPE_CAP_NPOT_TEXTURES:
 181    case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
 182       return 1;
 183    case PIPE_CAP_TWO_SIDED_STENCIL:
 184       return 1;
 185    case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
 186       /*
 187        * "In virtually every OpenGL implementation and hardware,
 188        * GL_MAX_DUAL_SOURCE_DRAW_BUFFERS is 1"
 189        * http://www.opengl.org/wiki/Blending
 190        */
 191       return sws->have_vgpu10 ? 1 : 0;
 192    case PIPE_CAP_ANISOTROPIC_FILTER:
 193       return 1;
 194    case PIPE_CAP_POINT_SPRITE:
 195       return 1;
 196    case PIPE_CAP_TGSI_TEXCOORD:
 197       return 0;
 198    case PIPE_CAP_MAX_RENDER_TARGETS:
 199       return svgascreen->max_color_buffers;
 200    case PIPE_CAP_OCCLUSION_QUERY:
 201       return 1;
 202    case PIPE_CAP_QUERY_TIME_ELAPSED:
 203       return 0;
 204    case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 205       return sws->have_vgpu10;
 206    case PIPE_CAP_TEXTURE_SHADOW_MAP:
 207       return 1;
 208    case PIPE_CAP_TEXTURE_SWIZZLE:
 209       return 1;
 210    case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
 211       return 0;
 212    case PIPE_CAP_USER_VERTEX_BUFFERS:
 213    case PIPE_CAP_USER_INDEX_BUFFERS:
 214       return 0;
 215    case PIPE_CAP_USER_CONSTANT_BUFFERS:
 216       return 1;
 217    case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 218       return 256;
 219
 220    case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 221       {
 222          unsigned levels = SVGA_MAX_TEXTURE_LEVELS;
 223          if (sws->get_cap(sws, SVGA3D_DEVCAP_MAX_TEXTURE_WIDTH, &result))
 224             levels = MIN2(util_logbase2(result.u) + 1, levels);
 225          else
 226             levels = 12 /* 2048x2048 */;
 227          if (sws->get_cap(sws, SVGA3D_DEVCAP_MAX_TEXTURE_HEIGHT, &result))
 228             levels = MIN2(util_logbase2(result.u) + 1, levels);
 229          else
 230             levels = 12 /* 2048x2048 */;
 231          return levels;
 232       }
 233
 234    case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 235       if (!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_VOLUME_EXTENT, &result))
 236          return 8;  /* max 128x128x128 */
 237       return MIN2(util_logbase2(result.u) + 1, SVGA_MAX_TEXTURE_LEVELS);
 238
 239    case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 240       /*
 241        * No mechanism to query the host, and at least limited to 2048x2048 on
 242        * certain hardware.
 243        */
 244       return MIN2(screen->get_param(screen, PIPE_CAP_MAX_TEXTURE_2D_LEVELS),
 245                   12 /* 2048x2048 */);
 246
 247    case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 248       return sws->have_vgpu10 ? SVGA3D_MAX_SURFACE_ARRAYSIZE : 0;
 249
 250    case PIPE_CAP_BLEND_EQUATION_SEPARATE: /* req. for GL 1.5 */
 251       return 1;
 252
 253    case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 254       return 1;
 255    case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 256       return sws->have_vgpu10;
 257    case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 258       return 0;
 259    case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 260       return !sws->have_vgpu10;
 261
 262    case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
 263       return 1; /* The color outputs of vertex shaders are not clamped */
 264    case PIPE_CAP_VERTEX_COLOR_CLAMPED:
 265       return 0; /* The driver can't clamp vertex colors */
 266    case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
 267       return 0; /* The driver can't clamp fragment colors */
 268
 269    case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 270       return 1; /* expected for GL_ARB_framebuffer_object */
 271
 272    case PIPE_CAP_GLSL_FEATURE_LEVEL:
 273       return sws->have_vgpu10 ? 330 : 120;
 274
 275    case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 276       return 0;
 277
 278    case PIPE_CAP_SM3:
 279       return 1;
 280
 281    case PIPE_CAP_DEPTH_CLIP_DISABLE:
 282    case PIPE_CAP_INDEP_BLEND_ENABLE:
 283    case PIPE_CAP_CONDITIONAL_RENDER:
 284    case PIPE_CAP_QUERY_TIMESTAMP:
 285    case PIPE_CAP_TGSI_INSTANCEID:
 286    case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 287    case PIPE_CAP_SEAMLESS_CUBE_MAP:
 288    case PIPE_CAP_FAKE_SW_MSAA:
 289       return sws->have_vgpu10;
 290
 291    case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 292       return sws->have_vgpu10 ? SVGA3D_DX_MAX_SOTARGETS : 0;
 293    case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 294       return sws->have_vgpu10 ? 4 : 0;
 295    case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 296       return sws->have_vgpu10 ? SVGA3D_MAX_STREAMOUT_DECLS : 0;
 297    case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
 298       return 0;
 299    case PIPE_CAP_TEXTURE_MULTISAMPLE:
 300       return svgascreen->ms_samples ? 1 : 0;
 301
 302    case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
 303       return SVGA3D_DX_MAX_RESOURCE_SIZE;
 304
 305    case PIPE_CAP_MIN_TEXEL_OFFSET:
 306       return sws->have_vgpu10 ? VGPU10_MIN_TEXEL_FETCH_OFFSET : 0;
 307    case PIPE_CAP_MAX_TEXEL_OFFSET:
 308       return sws->have_vgpu10 ? VGPU10_MAX_TEXEL_FETCH_OFFSET : 0;
 309
 310    case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
 311    case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
 312       return 0;
 313
 314    case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
 315       return sws->have_vgpu10 ? 256 : 0;
 316    case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
 317       return sws->have_vgpu10 ? 1024 : 0;
 318
 319    case PIPE_CAP_PRIMITIVE_RESTART:
 320       return 1; /* may be a sw fallback, depending on restart index */
 321
 322    /* Unsupported features */
 323    case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
 324    case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 325    case PIPE_CAP_SHADER_STENCIL_EXPORT:
 326    case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 327    case PIPE_CAP_INDEP_BLEND_FUNC:
 328    case PIPE_CAP_TEXTURE_BARRIER:
 329    case PIPE_CAP_MAX_VERTEX_STREAMS:
 330    case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
 331    case PIPE_CAP_COMPUTE:
 332    case PIPE_CAP_START_INSTANCE:
 333    case PIPE_CAP_CUBE_MAP_ARRAY:
 334    case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
 335    case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 336    case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
 337    case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
 338    case PIPE_CAP_TEXTURE_GATHER_SM5:
 339    case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
 340    case PIPE_CAP_TEXTURE_QUERY_LOD:
 341    case PIPE_CAP_SAMPLE_SHADING:
 342    case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
 343    case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
 344    case PIPE_CAP_DRAW_INDIRECT:
 345    case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
 346    case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
 347    case PIPE_CAP_SAMPLER_VIEW_TARGET:
 348    case PIPE_CAP_CLIP_HALFZ:
 349    case PIPE_CAP_VERTEXID_NOBASE:
 350    case PIPE_CAP_POLYGON_OFFSET_CLAMP:
 351    case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
 352       return 0;
 353    case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
 354       return 64;
 355    case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
 356    case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
 357    case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
 358       return 1;  /* need 4-byte alignment for all offsets and strides */
 359    case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
 360       return 2048;
 361    case PIPE_CAP_MAX_VIEWPORTS:
 362       return 1;
 363    case PIPE_CAP_ENDIANNESS:
 364       return PIPE_ENDIAN_LITTLE;
 365
 366    case PIPE_CAP_VENDOR_ID:
 367       return 0x15ad; /* VMware Inc. */
 368    case PIPE_CAP_DEVICE_ID:
 369       return 0x0405; /* assume SVGA II */
 370    case PIPE_CAP_ACCELERATED:
 371       return 0; /* XXX: */
 372    case PIPE_CAP_VIDEO_MEMORY:
 373       /* XXX: Query the host ? */
 374       return 1;
 375    case PIPE_CAP_UMA:
 376    case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
 377    case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
 378    case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
 379    case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
 380    case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
 381    case PIPE_CAP_DEPTH_BOUNDS_TEST:
 382    case PIPE_CAP_TGSI_TXQS:
 383    case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
 384    case PIPE_CAP_SHAREABLE_SHADERS:
 385    case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
 386    case PIPE_CAP_CLEAR_TEXTURE:
 387       return 0;
 388    }
 389
 390    debug_printf("Unexpected PIPE_CAP_ query %u\n", param);
 391    return 0;
 392 }
 393
 394
 395 static int
 396 vgpu9_get_shader_param(struct pipe_screen *screen, unsigned shader,
 397                        enum pipe_shader_cap param)
 398 {
 399    struct svga_screen *svgascreen = svga_screen(screen);
 400    struct svga_winsys_screen *sws = svgascreen->sws;
 401    unsigned val;
 402
 403    assert(!sws->have_vgpu10);
 404
 405    switch (shader)
 406    {
 407    case PIPE_SHADER_FRAGMENT:
 408       switch (param)
 409       {
 410       case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 411       case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 412       case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 413       case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 414          return 512;
 415       case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 416          return SVGA3D_MAX_NESTING_LEVEL;
 417       case PIPE_SHADER_CAP_MAX_INPUTS:
 418          return 10;
 419       case PIPE_SHADER_CAP_MAX_OUTPUTS:
 420          return svgascreen->max_color_buffers;
 421       case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 422          return 224 * sizeof(float[4]);
 423       case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 424          return 1;
 425       case PIPE_SHADER_CAP_MAX_TEMPS:
 426          val = get_uint_cap(sws, SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_TEMPS, 32);
 427          return MIN2(val, SVGA3D_TEMPREG_MAX);
 428       case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 429          /*
 430           * Although PS 3.0 has some addressing abilities it can only represent
 431           * loops that can be statically determined and unrolled. Given we can
 432           * only handle a subset of the cases that the state tracker already
 433           * does it is better to defer loop unrolling to the state tracker.
 434           */
 435          return 0;
 436       case PIPE_SHADER_CAP_MAX_PREDS:
 437          return 1;
 438       case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 439          return 0;
 440       case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 441          return 0;
 442       case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 443       case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 444       case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 445          return 0;
 446       case PIPE_SHADER_CAP_SUBROUTINES:
 447          return 0;
 448       case PIPE_SHADER_CAP_INTEGERS:
 449          return 0;
 450       case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 451       case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 452          return 16;
 453       case PIPE_SHADER_CAP_PREFERRED_IR:
 454          return PIPE_SHADER_IR_TGSI;
 455       case PIPE_SHADER_CAP_DOUBLES:
 456       case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 457       case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 458       case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 459       case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 460          return 0;
 461       case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 462          return 32;
 463       }
 464       /* If we get here, we failed to handle a cap above */
 465       debug_printf("Unexpected fragment shader query %u\n", param);
 466       return 0;
 467    case PIPE_SHADER_VERTEX:
 468       switch (param)
 469       {
 470       case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 471       case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 472          return get_uint_cap(sws, SVGA3D_DEVCAP_MAX_VERTEX_SHADER_INSTRUCTIONS,
 473                              512);
 474       case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 475       case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 476          /* XXX: until we have vertex texture support */
 477          return 0;
 478       case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 479          return SVGA3D_MAX_NESTING_LEVEL;
 480       case PIPE_SHADER_CAP_MAX_INPUTS:
 481          return 16;
 482       case PIPE_SHADER_CAP_MAX_OUTPUTS:
 483          return 10;
 484       case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 485          return 256 * sizeof(float[4]);
 486       case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 487          return 1;
 488       case PIPE_SHADER_CAP_MAX_TEMPS:
 489          val = get_uint_cap(sws, SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEMPS, 32);
 490          return MIN2(val, SVGA3D_TEMPREG_MAX);
 491       case PIPE_SHADER_CAP_MAX_PREDS:
 492          return 1;
 493       case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 494          return 0;
 495       case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 496          return 0;
 497       case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 498       case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 499          return 1;
 500       case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 501          return 0;
 502       case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 503          return 1;
 504       case PIPE_SHADER_CAP_SUBROUTINES:
 505          return 0;
 506       case PIPE_SHADER_CAP_INTEGERS:
 507          return 0;
 508       case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 509       case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 510          return 0;
 511       case PIPE_SHADER_CAP_PREFERRED_IR:
 512          return PIPE_SHADER_IR_TGSI;
 513       case PIPE_SHADER_CAP_DOUBLES:
 514       case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 515       case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 516       case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 517       case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 518          return 0;
 519       case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 520          return 32;
 521       }
 522       /* If we get here, we failed to handle a cap above */
 523       debug_printf("Unexpected vertex shader query %u\n", param);
 524       return 0;
 525    case PIPE_SHADER_GEOMETRY:
 526    case PIPE_SHADER_COMPUTE:
 527    case PIPE_SHADER_TESS_CTRL:
 528    case PIPE_SHADER_TESS_EVAL:
 529       /* no support for geometry, tess or compute shaders at this time */
 530       return 0;
 531    default:
 532       debug_printf("Unexpected shader type (%u) query\n", shader);
 533       return 0;
 534    }
 535    return 0;
 536 }
 537
 538
 539 static int
 540 vgpu10_get_shader_param(struct pipe_screen *screen, unsigned shader,
 541                         enum pipe_shader_cap param)
 542 {
 543    struct svga_screen *svgascreen = svga_screen(screen);
 544    struct svga_winsys_screen *sws = svgascreen->sws;
 545
 546    assert(sws->have_vgpu10);
 547    (void) sws;  /* silence unused var warnings in non-debug builds */
 548
 549    /* Only VS, GS, FS supported */
 550    if (shader != PIPE_SHADER_VERTEX &&
 551        shader != PIPE_SHADER_GEOMETRY &&
 552        shader != PIPE_SHADER_FRAGMENT) {
 553       return 0;
 554    }
 555
 556    /* NOTE: we do not query the device for any caps/limits at this time */
 557
 558    /* Generally the same limits for vertex, geometry and fragment shaders */
 559    switch (param) {
 560    case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 561    case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 562    case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 563    case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 564       return 64 * 1024;
 565    case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 566       return 64;
 567    case PIPE_SHADER_CAP_MAX_INPUTS:
 568       if (shader == PIPE_SHADER_FRAGMENT)
 569          return VGPU10_MAX_FS_INPUTS;
 570       else if (shader == PIPE_SHADER_GEOMETRY)
 571          return VGPU10_MAX_GS_INPUTS;
 572       else
 573          return VGPU10_MAX_VS_INPUTS;
 574    case PIPE_SHADER_CAP_MAX_OUTPUTS:
 575       if (shader == PIPE_SHADER_FRAGMENT)
 576          return VGPU10_MAX_FS_OUTPUTS;
 577       else if (shader == PIPE_SHADER_GEOMETRY)
 578          return VGPU10_MAX_GS_OUTPUTS;
 579       else
 580          return VGPU10_MAX_VS_OUTPUTS;
 581    case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 582       return VGPU10_MAX_CONSTANT_BUFFER_ELEMENT_COUNT * sizeof(float[4]);
 583    case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 584       return svgascreen->max_const_buffers;
 585    case PIPE_SHADER_CAP_MAX_TEMPS:
 586       return VGPU10_MAX_TEMPS;
 587    case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 588    case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 589    case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 590    case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 591       return TRUE; /* XXX verify */
 592    case PIPE_SHADER_CAP_MAX_PREDS:
 593       return 0;
 594    case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 595    case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 596    case PIPE_SHADER_CAP_SUBROUTINES:
 597    case PIPE_SHADER_CAP_INTEGERS:
 598       return TRUE;
 599    case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 600    case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 601       return SVGA3D_DX_MAX_SAMPLERS;
 602    case PIPE_SHADER_CAP_PREFERRED_IR:
 603       return PIPE_SHADER_IR_TGSI;
 604    case PIPE_SHADER_CAP_DOUBLES:
 605    case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 606    case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 607    case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 608    case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 609       return 0;
 610    case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 611       return 32;
 612    default:
 613       debug_printf("Unexpected vgpu10 shader query %u\n", param);
 614       return 0;
 615    }
 616    return 0;
 617 }
 618
 619
 620 static int
 621 svga_get_shader_param(struct pipe_screen *screen, unsigned shader,
 622                       enum pipe_shader_cap param)
 623 {
 624    struct svga_screen *svgascreen = svga_screen(screen);
 625    struct svga_winsys_screen *sws = svgascreen->sws;
 626    if (sws->have_vgpu10) {
 627       return vgpu10_get_shader_param(screen, shader, param);
 628    }
 629    else {
 630       return vgpu9_get_shader_param(screen, shader, param);
 631    }
 632 }
 633
 634
 635 /**
 636  * Implement pipe_screen::is_format_supported().
 637  * \param bindings  bitmask of PIPE_BIND_x flags
 638  */
 639 static boolean
 640 svga_is_format_supported( struct pipe_screen *screen,
 641                           enum pipe_format format,
 642                           enum pipe_texture_target target,
 643                           unsigned sample_count,
 644                           unsigned bindings)
 645 {
 646    struct svga_screen *ss = svga_screen(screen);
 647    SVGA3dSurfaceFormat svga_format;
 648    SVGA3dSurfaceFormatCaps caps;
 649    SVGA3dSurfaceFormatCaps mask;
 650
 651    assert(bindings);
 652
 653    if (sample_count > 1) {
 654       /* In ms_samples, if bit N is set it means that we support
 655        * multisample with N+1 samples per pixel.
 656        */
 657       if ((ss->ms_samples & (1 << (sample_count - 1))) == 0) {
 658          return FALSE;
 659       }
 660    }
 661
 662    svga_format = svga_translate_format(ss, format, bindings);
 663    if (svga_format == SVGA3D_FORMAT_INVALID) {
 664       return FALSE;
 665    }
 666
 667    /* we don't support sRGB rendering into display targets */
 668    if (util_format_is_srgb(format) && (bindings & PIPE_BIND_DISPLAY_TARGET)) {
 669       return FALSE;
 670    }
 671
 672    /*
 673     * For VGPU10 vertex formats, skip querying host capabilities
 674     */
 675
 676    if (ss->sws->have_vgpu10 && (bindings & PIPE_BIND_VERTEX_BUFFER)) {
 677       SVGA3dSurfaceFormat svga_format;
 678       unsigned flags;
 679       svga_translate_vertex_format_vgpu10(format, &svga_format, &flags);
 680       return svga_format != SVGA3D_FORMAT_INVALID;
 681    }
 682
 683    /*
 684     * Override host capabilities, so that we end up with the same
 685     * visuals for all virtual hardware implementations.
 686     */
 687
 688    if (bindings & PIPE_BIND_DISPLAY_TARGET) {
 689       switch (svga_format) {
 690       case SVGA3D_A8R8G8B8:
 691       case SVGA3D_X8R8G8B8:
 692       case SVGA3D_R5G6B5:
 693          break;
 694
 695       /* VGPU10 formats */
 696       case SVGA3D_B8G8R8A8_UNORM:
 697       case SVGA3D_B8G8R8X8_UNORM:
 698       case SVGA3D_B5G6R5_UNORM:
 699          break;
 700
 701       /* Often unsupported/problematic. This means we end up with the same
 702        * visuals for all virtual hardware implementations.
 703        */
 704       case SVGA3D_A4R4G4B4:
 705       case SVGA3D_A1R5G5B5:
 706          return FALSE;
 707
 708       default:
 709          return FALSE;
 710       }
 711    }
 712
 713    /*
 714     * Query the host capabilities.
 715     */
 716
 717    svga_get_format_cap(ss, svga_format, &caps);
 718
 719    if (bindings & PIPE_BIND_RENDER_TARGET) {
 720       /* Check that the color surface is blendable, unless it's an
 721        * integer format.
 722        */
 723       if (!svga_format_is_integer(svga_format) &&
 724           (caps.value & SVGA3DFORMAT_OP_NOALPHABLEND)) {
 725          return FALSE;
 726       }
 727    }
 728
 729    mask.value = 0;
 730    if (bindings & PIPE_BIND_RENDER_TARGET) {
 731       mask.value |= SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET;
 732    }
 733    if (bindings & PIPE_BIND_DEPTH_STENCIL) {
 734       mask.value |= SVGA3DFORMAT_OP_ZSTENCIL;
 735    }
 736    if (bindings & PIPE_BIND_SAMPLER_VIEW) {
 737       mask.value |= SVGA3DFORMAT_OP_TEXTURE;
 738    }
 739
 740    if (target == PIPE_TEXTURE_CUBE) {
 741       mask.value |= SVGA3DFORMAT_OP_CUBETEXTURE;
 742    }
 743    else if (target == PIPE_TEXTURE_3D) {
 744       mask.value |= SVGA3DFORMAT_OP_VOLUMETEXTURE;
 745    }
 746
 747    return (caps.value & mask.value) == mask.value;
 748 }
 749
 750
 751 static void
 752 svga_fence_reference(struct pipe_screen *screen,
 753                      struct pipe_fence_handle **ptr,
 754                      struct pipe_fence_handle *fence)
 755 {
 756    struct svga_winsys_screen *sws = svga_screen(screen)->sws;
 757    sws->fence_reference(sws, ptr, fence);
 758 }
 759
 760
 761 static boolean
 762 svga_fence_finish(struct pipe_screen *screen,
 763                   struct pipe_fence_handle *fence,
 764                   uint64_t timeout)
 765 {
 766    struct svga_winsys_screen *sws = svga_screen(screen)->sws;
 767
 768    if (!timeout)
 769       return sws->fence_signalled(sws, fence, 0) == 0;
 770
 771    SVGA_DBG(DEBUG_DMA|DEBUG_PERF, "%s fence_ptr %p\n",
 772             __FUNCTION__, fence);
 773
 774    return sws->fence_finish(sws, fence, 0) == 0;
 775 }
 776
 777
 778 static int
 779 svga_get_driver_query_info(struct pipe_screen *screen,
 780                            unsigned index,
 781                            struct pipe_driver_query_info *info)
 782 {
 783    static const struct pipe_driver_query_info queries[] = {
 784       /* per-frame counters */
 785       {"num-draw-calls", SVGA_QUERY_NUM_DRAW_CALLS, {0}},
 786       {"num-fallbacks", SVGA_QUERY_NUM_FALLBACKS, {0}},
 787       {"num-flushes", SVGA_QUERY_NUM_FLUSHES, {0}},
 788       {"num-validations", SVGA_QUERY_NUM_VALIDATIONS, {0}},
 789       {"map-buffer-time", SVGA_QUERY_MAP_BUFFER_TIME, {0},
 790        PIPE_DRIVER_QUERY_TYPE_MICROSECONDS},
 791       {"num-resources-mapped", SVGA_QUERY_NUM_RESOURCES_MAPPED, {0}},
 792
 793       /* running total counters */
 794       {"memory-used", SVGA_QUERY_MEMORY_USED, {0},
 795        PIPE_DRIVER_QUERY_TYPE_BYTES},
 796       {"num-shaders", SVGA_QUERY_NUM_SHADERS, {0}},
 797       {"num-resources", SVGA_QUERY_NUM_RESOURCES, {0}},
 798       {"num-state-objects", SVGA_QUERY_NUM_STATE_OBJECTS, {0}},
 799       {"num-surface-views", SVGA_QUERY_NUM_SURFACE_VIEWS, {0}},
 800    };
 801
 802    if (!info)
 803       return Elements(queries);
 804
 805    if (index >= Elements(queries))
 806       return 0;
 807
 808    *info = queries[index];
 809    return 1;
 810 }
 811
 812
 813 static void
 814 svga_destroy_screen( struct pipe_screen *screen )
 815 {
 816    struct svga_screen *svgascreen = svga_screen(screen);
 817
 818    svga_screen_cache_cleanup(svgascreen);
 819
 820    pipe_mutex_destroy(svgascreen->swc_mutex);
 821    pipe_mutex_destroy(svgascreen->tex_mutex);
 822
 823    svgascreen->sws->destroy(svgascreen->sws);
 824
 825    FREE(svgascreen);
 826 }
 827
 828
 829 /**
 830  * Create a new svga_screen object
 831  */
 832 struct pipe_screen *
 833 svga_screen_create(struct svga_winsys_screen *sws)
 834 {
 835    struct svga_screen *svgascreen;
 836    struct pipe_screen *screen;
 837
 838 #ifdef DEBUG
 839    SVGA_DEBUG = debug_get_flags_option("SVGA_DEBUG", svga_debug_flags, 0 );
 840 #endif
 841
 842    svgascreen = CALLOC_STRUCT(svga_screen);
 843    if (!svgascreen)
 844       goto error1;
 845
 846    svgascreen->debug.force_level_surface_view =
 847       debug_get_bool_option("SVGA_FORCE_LEVEL_SURFACE_VIEW", FALSE);
 848    svgascreen->debug.force_surface_view =
 849       debug_get_bool_option("SVGA_FORCE_SURFACE_VIEW", FALSE);
 850    svgascreen->debug.force_sampler_view =
 851       debug_get_bool_option("SVGA_FORCE_SAMPLER_VIEW", FALSE);
 852    svgascreen->debug.no_surface_view =
 853       debug_get_bool_option("SVGA_NO_SURFACE_VIEW", FALSE);
 854    svgascreen->debug.no_sampler_view =
 855       debug_get_bool_option("SVGA_NO_SAMPLER_VIEW", FALSE);
 856
 857    screen = &svgascreen->screen;
 858
 859    screen->destroy = svga_destroy_screen;
 860    screen->get_name = svga_get_name;
 861    screen->get_vendor = svga_get_vendor;
 862    screen->get_device_vendor = svga_get_vendor; // TODO actual device vendor
 863    screen->get_param = svga_get_param;
 864    screen->get_shader_param = svga_get_shader_param;
 865    screen->get_paramf = svga_get_paramf;
 866    screen->get_timestamp = NULL;
 867    screen->is_format_supported = svga_is_format_supported;
 868    screen->context_create = svga_context_create;
 869    screen->fence_reference = svga_fence_reference;
 870    screen->fence_finish = svga_fence_finish;
 871    screen->get_driver_query_info = svga_get_driver_query_info;
 872    svgascreen->sws = sws;
 873
 874    svga_init_screen_resource_functions(svgascreen);
 875
 876    if (sws->get_hw_version) {
 877       svgascreen->hw_version = sws->get_hw_version(sws);
 878    } else {
 879       svgascreen->hw_version = SVGA3D_HWVERSION_WS65_B1;
 880    }
 881
 882    /*
 883     * The D16, D24X8, and D24S8 formats always do an implicit shadow compare
 884     * when sampled from, where as the DF16, DF24, and D24S8_INT do not.  So
 885     * we prefer the later when available.
 886     *
 887     * This mimics hardware vendors extensions for D3D depth sampling. See also
 888     * http://aras-p.info/texts/D3D9GPUHacks.html
 889     */
 890
 891    {
 892       boolean has_df16, has_df24, has_d24s8_int;
 893       SVGA3dSurfaceFormatCaps caps;
 894       SVGA3dSurfaceFormatCaps mask;
 895       mask.value = 0;
 896       mask.zStencil = 1;
 897       mask.texture = 1;
 898
 899       svgascreen->depth.z16 = SVGA3D_Z_D16;
 900       svgascreen->depth.x8z24 = SVGA3D_Z_D24X8;
 901       svgascreen->depth.s8z24 = SVGA3D_Z_D24S8;
 902
 903       svga_get_format_cap(svgascreen, SVGA3D_Z_DF16, &caps);
 904       has_df16 = (caps.value & mask.value) == mask.value;
 905
 906       svga_get_format_cap(svgascreen, SVGA3D_Z_DF24, &caps);
 907       has_df24 = (caps.value & mask.value) == mask.value;
 908
 909       svga_get_format_cap(svgascreen, SVGA3D_Z_D24S8_INT, &caps);
 910       has_d24s8_int = (caps.value & mask.value) == mask.value;
 911
 912       /* XXX: We might want some other logic here.
 913        * Like if we only have d24s8_int we should
 914        * emulate the other formats with that.
 915        */
 916       if (has_df16) {
 917          svgascreen->depth.z16 = SVGA3D_Z_DF16;
 918       }
 919       if (has_df24) {
 920          svgascreen->depth.x8z24 = SVGA3D_Z_DF24;
 921       }
 922       if (has_d24s8_int) {
 923          svgascreen->depth.s8z24 = SVGA3D_Z_D24S8_INT;
 924       }
 925    }
 926
 927    /* Query device caps
 928     */
 929    if (sws->have_vgpu10) {
 930       svgascreen->haveProvokingVertex
 931          = get_bool_cap(sws, SVGA3D_DEVCAP_DX_PROVOKING_VERTEX, FALSE);
 932       svgascreen->haveLineSmooth = TRUE;
 933       svgascreen->maxPointSize = 80.0F;
 934       svgascreen->max_color_buffers = SVGA3D_DX_MAX_RENDER_TARGETS;
 935
 936       /* Multisample samples per pixel */
 937       svgascreen->ms_samples =
 938          get_uint_cap(sws, SVGA3D_DEVCAP_MULTISAMPLE_MASKABLESAMPLES, 0);
 939
 940       /* Maximum number of constant buffers */
 941       svgascreen->max_const_buffers =
 942          get_uint_cap(sws, SVGA3D_DEVCAP_DX_MAX_CONSTANT_BUFFERS, 1);
 943       assert(svgascreen->max_const_buffers <= SVGA_MAX_CONST_BUFS);
 944    }
 945    else {
 946       /* VGPU9 */
 947       unsigned vs_ver = get_uint_cap(sws, SVGA3D_DEVCAP_VERTEX_SHADER_VERSION,
 948                                      SVGA3DVSVERSION_NONE);
 949       unsigned fs_ver = get_uint_cap(sws, SVGA3D_DEVCAP_FRAGMENT_SHADER_VERSION,
 950                                      SVGA3DPSVERSION_NONE);
 951
 952       /* we require Shader model 3.0 or later */
 953       if (fs_ver < SVGA3DPSVERSION_30 || vs_ver < SVGA3DVSVERSION_30) {
 954          goto error2;
 955       }
 956
 957       svgascreen->haveProvokingVertex = FALSE;
 958
 959       svgascreen->haveLineSmooth =
 960          get_bool_cap(sws, SVGA3D_DEVCAP_LINE_AA, FALSE);
 961
 962       svgascreen->maxPointSize =
 963          get_float_cap(sws, SVGA3D_DEVCAP_MAX_POINT_SIZE, 1.0f);
 964       /* Keep this to a reasonable size to avoid failures in conform/pntaa.c */
 965       svgascreen->maxPointSize = MIN2(svgascreen->maxPointSize, 80.0f);
 966
 967       /* The SVGA3D device always supports 4 targets at this time, regardless
 968        * of what querying SVGA3D_DEVCAP_MAX_RENDER_TARGETS might return.
 969        */
 970       svgascreen->max_color_buffers = 4;
 971
 972       /* Only support one constant buffer
 973        */
 974       svgascreen->max_const_buffers = 1;
 975
 976       /* No multisampling */
 977       svgascreen->ms_samples = 0;
 978    }
 979
 980    /* common VGPU9 / VGPU10 caps */
 981    svgascreen->haveLineStipple =
 982       get_bool_cap(sws, SVGA3D_DEVCAP_LINE_STIPPLE, FALSE);
 983
 984    svgascreen->maxLineWidth =
 985       get_float_cap(sws, SVGA3D_DEVCAP_MAX_LINE_WIDTH, 1.0f);
 986
 987    svgascreen->maxLineWidthAA =
 988       get_float_cap(sws, SVGA3D_DEVCAP_MAX_AA_LINE_WIDTH, 1.0f);
 989
 990    if (0) {
 991       debug_printf("svga: haveProvokingVertex %u\n",
 992                    svgascreen->haveProvokingVertex);
 993       debug_printf("svga: haveLineStip %u  "
 994                    "haveLineSmooth %u  maxLineWidth %f\n",
 995                    svgascreen->haveLineStipple, svgascreen->haveLineSmooth,
 996                    svgascreen->maxLineWidth);
 997       debug_printf("svga: maxPointSize %g\n", svgascreen->maxPointSize);
 998    }
 999
1000    pipe_mutex_init(svgascreen->tex_mutex);
1001    pipe_mutex_init(svgascreen->swc_mutex);
1002
1003    svga_screen_cache_init(svgascreen);
1004
1005    return screen;
1006 error2:
1007    FREE(svgascreen);
1008 error1:
1009    return NULL;
1010 }
1011
1012 struct svga_winsys_screen *
1013 svga_winsys_screen(struct pipe_screen *screen)
1014 {
1015    return svga_screen(screen)->sws;
1016 }
1017
1018 #ifdef DEBUG
1019 struct svga_screen *
1020 svga_screen(struct pipe_screen *screen)
1021 {
1022    assert(screen);
1023    assert(screen->destroy == svga_destroy_screen);
1024    return (struct svga_screen *)screen;
1025 }
1026 #endif