src/gallium/drivers/svga/svga_screen.c

   1 /**********************************************************
   2  * Copyright 2008-2009 VMware, Inc.  All rights reserved.
   3  *
   4  * Permission is hereby granted, free of charge, to any person
   5  * obtaining a copy of this software and associated documentation
   6  * files (the "Software"), to deal in the Software without
   7  * restriction, including without limitation the rights to use, copy,
   8  * modify, merge, publish, distribute, sublicense, and/or sell copies
   9  * of the Software, and to permit persons to whom the Software is
  10  * furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be
  13  * included in all copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  16  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  17  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  18  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  19  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  20  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  21  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  22  * SOFTWARE.
  23  *
  24  **********************************************************/
  25
  26 #include "util/u_format.h"
  27 #include "util/u_memory.h"
  28 #include "util/u_inlines.h"
  29 #include "util/u_string.h"
  30 #include "util/u_math.h"
  31
  32 #include "svga_winsys.h"
  33 #include "svga_public.h"
  34 #include "svga_context.h"
  35 #include "svga_format.h"
  36 #include "svga_screen.h"
  37 #include "svga_tgsi.h"
  38 #include "svga_resource_texture.h"
  39 #include "svga_resource.h"
  40 #include "svga_debug.h"
  41
  42 #include "svga3d_shaderdefs.h"
  43 #include "VGPU10ShaderTokens.h"
  44
  45 /* NOTE: this constant may get moved into a svga3d*.h header file */
  46 #define SVGA3D_DX_MAX_RESOURCE_SIZE (128 * 1024 * 1024)
  47
  48 #ifdef DEBUG
  49 int SVGA_DEBUG = 0;
  50
  51 static const struct debug_named_value svga_debug_flags[] = {
  52    { "dma",         DEBUG_DMA, NULL },
  53    { "tgsi",        DEBUG_TGSI, NULL },
  54    { "pipe",        DEBUG_PIPE, NULL },
  55    { "state",       DEBUG_STATE, NULL },
  56    { "screen",      DEBUG_SCREEN, NULL },
  57    { "tex",         DEBUG_TEX, NULL },
  58    { "swtnl",       DEBUG_SWTNL, NULL },
  59    { "const",       DEBUG_CONSTS, NULL },
  60    { "viewport",    DEBUG_VIEWPORT, NULL },
  61    { "views",       DEBUG_VIEWS, NULL },
  62    { "perf",        DEBUG_PERF, NULL },
  63    { "flush",       DEBUG_FLUSH, NULL },
  64    { "sync",        DEBUG_SYNC, NULL },
  65    { "cache",       DEBUG_CACHE, NULL },
  66    { "streamout",   DEBUG_STREAMOUT, NULL },
  67    { "query",       DEBUG_QUERY, NULL },
  68    DEBUG_NAMED_VALUE_END
  69 };
  70 #endif
  71
  72 static const char *
  73 svga_get_vendor( struct pipe_screen *pscreen )
  74 {
  75    return "VMware, Inc.";
  76 }
  77
  78
  79 static const char *
  80 svga_get_name( struct pipe_screen *pscreen )
  81 {
  82    const char *build = "", *llvm = "", *mutex = "";
  83    static char name[100];
  84 #ifdef DEBUG
  85    /* Only return internal details in the DEBUG version:
  86     */
  87    build = "build: DEBUG;";
  88    mutex = "mutex: " PIPE_ATOMIC ";";
  89 #else
  90    build = "build: RELEASE;";
  91 #endif
  92 #ifdef HAVE_LLVM
  93    llvm = "LLVM;";
  94 #endif
  95
  96    util_snprintf(name, sizeof(name), "SVGA3D; %s %s %s", build, mutex, llvm);
  97    return name;
  98 }
  99
 100
 101 /** Helper for querying float-valued device cap */
 102 static float
 103 get_float_cap(struct svga_winsys_screen *sws, unsigned cap, float defaultVal)
 104 {
 105    SVGA3dDevCapResult result;
 106    if (sws->get_cap(sws, cap, &result))
 107       return result.f;
 108    else
 109       return defaultVal;
 110 }
 111
 112
 113 /** Helper for querying uint-valued device cap */
 114 static unsigned
 115 get_uint_cap(struct svga_winsys_screen *sws, unsigned cap, unsigned defaultVal)
 116 {
 117    SVGA3dDevCapResult result;
 118    if (sws->get_cap(sws, cap, &result))
 119       return result.u;
 120    else
 121       return defaultVal;
 122 }
 123
 124
 125 /** Helper for querying boolean-valued device cap */
 126 static boolean
 127 get_bool_cap(struct svga_winsys_screen *sws, unsigned cap, boolean defaultVal)
 128 {
 129    SVGA3dDevCapResult result;
 130    if (sws->get_cap(sws, cap, &result))
 131       return result.b;
 132    else
 133       return defaultVal;
 134 }
 135
 136
 137 static float
 138 svga_get_paramf(struct pipe_screen *screen, enum pipe_capf param)
 139 {
 140    struct svga_screen *svgascreen = svga_screen(screen);
 141    struct svga_winsys_screen *sws = svgascreen->sws;
 142
 143    switch (param) {
 144    case PIPE_CAPF_MAX_LINE_WIDTH:
 145       return svgascreen->maxLineWidth;
 146    case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 147       return svgascreen->maxLineWidthAA;
 148
 149    case PIPE_CAPF_MAX_POINT_WIDTH:
 150       /* fall-through */
 151    case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 152       return svgascreen->maxPointSize;
 153
 154    case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 155       return (float) get_uint_cap(sws, SVGA3D_DEVCAP_MAX_TEXTURE_ANISOTROPY, 4);
 156
 157    case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 158       return 15.0;
 159
 160    case PIPE_CAPF_GUARD_BAND_LEFT:
 161    case PIPE_CAPF_GUARD_BAND_TOP:
 162    case PIPE_CAPF_GUARD_BAND_RIGHT:
 163    case PIPE_CAPF_GUARD_BAND_BOTTOM:
 164       return 0.0;
 165    }
 166
 167    debug_printf("Unexpected PIPE_CAPF_ query %u\n", param);
 168    return 0;
 169 }
 170
 171
 172 static int
 173 svga_get_param(struct pipe_screen *screen, enum pipe_cap param)
 174 {
 175    struct svga_screen *svgascreen = svga_screen(screen);
 176    struct svga_winsys_screen *sws = svgascreen->sws;
 177    SVGA3dDevCapResult result;
 178
 179    switch (param) {
 180    case PIPE_CAP_NPOT_TEXTURES:
 181    case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
 182       return 1;
 183    case PIPE_CAP_TWO_SIDED_STENCIL:
 184       return 1;
 185    case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
 186       /*
 187        * "In virtually every OpenGL implementation and hardware,
 188        * GL_MAX_DUAL_SOURCE_DRAW_BUFFERS is 1"
 189        * http://www.opengl.org/wiki/Blending
 190        */
 191       return sws->have_vgpu10 ? 1 : 0;
 192    case PIPE_CAP_ANISOTROPIC_FILTER:
 193       return 1;
 194    case PIPE_CAP_POINT_SPRITE:
 195       return 1;
 196    case PIPE_CAP_TGSI_TEXCOORD:
 197       return 0;
 198    case PIPE_CAP_MAX_RENDER_TARGETS:
 199       return svgascreen->max_color_buffers;
 200    case PIPE_CAP_OCCLUSION_QUERY:
 201       return 1;
 202    case PIPE_CAP_QUERY_TIME_ELAPSED:
 203       return 0;
 204    case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 205       return sws->have_vgpu10;
 206    case PIPE_CAP_TEXTURE_SHADOW_MAP:
 207       return 1;
 208    case PIPE_CAP_TEXTURE_SWIZZLE:
 209       return 1;
 210    case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
 211       return 0;
 212    case PIPE_CAP_USER_VERTEX_BUFFERS:
 213    case PIPE_CAP_USER_INDEX_BUFFERS:
 214       return 0;
 215    case PIPE_CAP_USER_CONSTANT_BUFFERS:
 216       return 1;
 217    case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 218       return 256;
 219
 220    case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 221       {
 222          unsigned levels = SVGA_MAX_TEXTURE_LEVELS;
 223          if (sws->get_cap(sws, SVGA3D_DEVCAP_MAX_TEXTURE_WIDTH, &result))
 224             levels = MIN2(util_logbase2(result.u) + 1, levels);
 225          else
 226             levels = 12 /* 2048x2048 */;
 227          if (sws->get_cap(sws, SVGA3D_DEVCAP_MAX_TEXTURE_HEIGHT, &result))
 228             levels = MIN2(util_logbase2(result.u) + 1, levels);
 229          else
 230             levels = 12 /* 2048x2048 */;
 231          return levels;
 232       }
 233
 234    case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 235       if (!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_VOLUME_EXTENT, &result))
 236          return 8;  /* max 128x128x128 */
 237       return MIN2(util_logbase2(result.u) + 1, SVGA_MAX_TEXTURE_LEVELS);
 238
 239    case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 240       /*
 241        * No mechanism to query the host, and at least limited to 2048x2048 on
 242        * certain hardware.
 243        */
 244       return MIN2(screen->get_param(screen, PIPE_CAP_MAX_TEXTURE_2D_LEVELS),
 245                   12 /* 2048x2048 */);
 246
 247    case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 248       return sws->have_vgpu10 ? SVGA3D_MAX_SURFACE_ARRAYSIZE : 0;
 249
 250    case PIPE_CAP_BLEND_EQUATION_SEPARATE: /* req. for GL 1.5 */
 251       return 1;
 252
 253    case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 254       return 1;
 255    case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 256       return sws->have_vgpu10;
 257    case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 258       return 0;
 259    case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 260       return !sws->have_vgpu10;
 261
 262    case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
 263       return 1; /* The color outputs of vertex shaders are not clamped */
 264    case PIPE_CAP_VERTEX_COLOR_CLAMPED:
 265       return 0; /* The driver can't clamp vertex colors */
 266    case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
 267       return 0; /* The driver can't clamp fragment colors */
 268
 269    case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 270       return 1; /* expected for GL_ARB_framebuffer_object */
 271
 272    case PIPE_CAP_GLSL_FEATURE_LEVEL:
 273       return sws->have_vgpu10 ? 330 : 120;
 274
 275    case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 276       return 0;
 277
 278    case PIPE_CAP_SM3:
 279       return 1;
 280
 281    case PIPE_CAP_DEPTH_CLIP_DISABLE:
 282    case PIPE_CAP_INDEP_BLEND_ENABLE:
 283    case PIPE_CAP_CONDITIONAL_RENDER:
 284    case PIPE_CAP_QUERY_TIMESTAMP:
 285    case PIPE_CAP_TGSI_INSTANCEID:
 286    case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 287    case PIPE_CAP_SEAMLESS_CUBE_MAP:
 288    case PIPE_CAP_FAKE_SW_MSAA:
 289       return sws->have_vgpu10;
 290
 291    case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 292       return sws->have_vgpu10 ? SVGA3D_DX_MAX_SOTARGETS : 0;
 293    case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 294       return sws->have_vgpu10 ? 4 : 0;
 295    case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 296       return sws->have_vgpu10 ? SVGA3D_MAX_STREAMOUT_DECLS : 0;
 297    case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
 298       return 0;
 299    case PIPE_CAP_TEXTURE_MULTISAMPLE:
 300       return svgascreen->ms_samples ? 1 : 0;
 301
 302    case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
 303       return SVGA3D_DX_MAX_RESOURCE_SIZE;
 304
 305    case PIPE_CAP_MIN_TEXEL_OFFSET:
 306       return sws->have_vgpu10 ? VGPU10_MIN_TEXEL_FETCH_OFFSET : 0;
 307    case PIPE_CAP_MAX_TEXEL_OFFSET:
 308       return sws->have_vgpu10 ? VGPU10_MAX_TEXEL_FETCH_OFFSET : 0;
 309
 310    case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
 311    case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
 312       return 0;
 313
 314    case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
 315       return sws->have_vgpu10 ? 256 : 0;
 316    case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
 317       return sws->have_vgpu10 ? 1024 : 0;
 318
 319    case PIPE_CAP_PRIMITIVE_RESTART:
 320       return 1; /* may be a sw fallback, depending on restart index */
 321
 322    /* Unsupported features */
 323    case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
 324    case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 325    case PIPE_CAP_SHADER_STENCIL_EXPORT:
 326    case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 327    case PIPE_CAP_INDEP_BLEND_FUNC:
 328    case PIPE_CAP_TEXTURE_BARRIER:
 329    case PIPE_CAP_MAX_VERTEX_STREAMS:
 330    case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
 331    case PIPE_CAP_COMPUTE:
 332    case PIPE_CAP_START_INSTANCE:
 333    case PIPE_CAP_CUBE_MAP_ARRAY:
 334    case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
 335    case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 336    case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
 337    case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
 338    case PIPE_CAP_TEXTURE_GATHER_SM5:
 339    case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
 340    case PIPE_CAP_TEXTURE_QUERY_LOD:
 341    case PIPE_CAP_SAMPLE_SHADING:
 342    case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
 343    case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
 344    case PIPE_CAP_DRAW_INDIRECT:
 345    case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
 346    case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
 347    case PIPE_CAP_SAMPLER_VIEW_TARGET:
 348    case PIPE_CAP_CLIP_HALFZ:
 349    case PIPE_CAP_VERTEXID_NOBASE:
 350    case PIPE_CAP_POLYGON_OFFSET_CLAMP:
 351    case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
 352       return 0;
 353    case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
 354       return 64;
 355    case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
 356    case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
 357    case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
 358       return 1;  /* need 4-byte alignment for all offsets and strides */
 359    case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
 360       return 2048;
 361    case PIPE_CAP_MAX_VIEWPORTS:
 362       return 1;
 363    case PIPE_CAP_ENDIANNESS:
 364       return PIPE_ENDIAN_LITTLE;
 365
 366    case PIPE_CAP_VENDOR_ID:
 367       return 0x15ad; /* VMware Inc. */
 368    case PIPE_CAP_DEVICE_ID:
 369       return 0x0405; /* assume SVGA II */
 370    case PIPE_CAP_ACCELERATED:
 371       return 0; /* XXX: */
 372    case PIPE_CAP_VIDEO_MEMORY:
 373       /* XXX: Query the host ? */
 374       return 1;
 375    case PIPE_CAP_UMA:
 376    case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
 377    case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
 378    case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
 379    case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
 380    case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
 381    case PIPE_CAP_DEPTH_BOUNDS_TEST:
 382    case PIPE_CAP_TGSI_TXQS:
 383    case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
 384    case PIPE_CAP_SHAREABLE_SHADERS:
 385    case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
 386    case PIPE_CAP_CLEAR_TEXTURE:
 387    case PIPE_CAP_DRAW_PARAMETERS:
 388       return 0;
 389    }
 390
 391    debug_printf("Unexpected PIPE_CAP_ query %u\n", param);
 392    return 0;
 393 }
 394
 395
 396 static int
 397 vgpu9_get_shader_param(struct pipe_screen *screen, unsigned shader,
 398                        enum pipe_shader_cap param)
 399 {
 400    struct svga_screen *svgascreen = svga_screen(screen);
 401    struct svga_winsys_screen *sws = svgascreen->sws;
 402    unsigned val;
 403
 404    assert(!sws->have_vgpu10);
 405
 406    switch (shader)
 407    {
 408    case PIPE_SHADER_FRAGMENT:
 409       switch (param)
 410       {
 411       case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 412       case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 413       case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 414       case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 415          return 512;
 416       case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 417          return SVGA3D_MAX_NESTING_LEVEL;
 418       case PIPE_SHADER_CAP_MAX_INPUTS:
 419          return 10;
 420       case PIPE_SHADER_CAP_MAX_OUTPUTS:
 421          return svgascreen->max_color_buffers;
 422       case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 423          return 224 * sizeof(float[4]);
 424       case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 425          return 1;
 426       case PIPE_SHADER_CAP_MAX_TEMPS:
 427          val = get_uint_cap(sws, SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_TEMPS, 32);
 428          return MIN2(val, SVGA3D_TEMPREG_MAX);
 429       case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 430          /*
 431           * Although PS 3.0 has some addressing abilities it can only represent
 432           * loops that can be statically determined and unrolled. Given we can
 433           * only handle a subset of the cases that the state tracker already
 434           * does it is better to defer loop unrolling to the state tracker.
 435           */
 436          return 0;
 437       case PIPE_SHADER_CAP_MAX_PREDS:
 438          return 1;
 439       case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 440          return 0;
 441       case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 442          return 0;
 443       case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 444       case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 445       case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 446          return 0;
 447       case PIPE_SHADER_CAP_SUBROUTINES:
 448          return 0;
 449       case PIPE_SHADER_CAP_INTEGERS:
 450          return 0;
 451       case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 452       case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 453          return 16;
 454       case PIPE_SHADER_CAP_PREFERRED_IR:
 455          return PIPE_SHADER_IR_TGSI;
 456       case PIPE_SHADER_CAP_DOUBLES:
 457       case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 458       case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 459       case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 460       case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 461          return 0;
 462       case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 463          return 32;
 464       }
 465       /* If we get here, we failed to handle a cap above */
 466       debug_printf("Unexpected fragment shader query %u\n", param);
 467       return 0;
 468    case PIPE_SHADER_VERTEX:
 469       switch (param)
 470       {
 471       case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 472       case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 473          return get_uint_cap(sws, SVGA3D_DEVCAP_MAX_VERTEX_SHADER_INSTRUCTIONS,
 474                              512);
 475       case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 476       case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 477          /* XXX: until we have vertex texture support */
 478          return 0;
 479       case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 480          return SVGA3D_MAX_NESTING_LEVEL;
 481       case PIPE_SHADER_CAP_MAX_INPUTS:
 482          return 16;
 483       case PIPE_SHADER_CAP_MAX_OUTPUTS:
 484          return 10;
 485       case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 486          return 256 * sizeof(float[4]);
 487       case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 488          return 1;
 489       case PIPE_SHADER_CAP_MAX_TEMPS:
 490          val = get_uint_cap(sws, SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEMPS, 32);
 491          return MIN2(val, SVGA3D_TEMPREG_MAX);
 492       case PIPE_SHADER_CAP_MAX_PREDS:
 493          return 1;
 494       case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 495          return 0;
 496       case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 497          return 0;
 498       case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 499       case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 500          return 1;
 501       case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 502          return 0;
 503       case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 504          return 1;
 505       case PIPE_SHADER_CAP_SUBROUTINES:
 506          return 0;
 507       case PIPE_SHADER_CAP_INTEGERS:
 508          return 0;
 509       case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 510       case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 511          return 0;
 512       case PIPE_SHADER_CAP_PREFERRED_IR:
 513          return PIPE_SHADER_IR_TGSI;
 514       case PIPE_SHADER_CAP_DOUBLES:
 515       case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 516       case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 517       case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 518       case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 519          return 0;
 520       case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 521          return 32;
 522       }
 523       /* If we get here, we failed to handle a cap above */
 524       debug_printf("Unexpected vertex shader query %u\n", param);
 525       return 0;
 526    case PIPE_SHADER_GEOMETRY:
 527    case PIPE_SHADER_COMPUTE:
 528    case PIPE_SHADER_TESS_CTRL:
 529    case PIPE_SHADER_TESS_EVAL:
 530       /* no support for geometry, tess or compute shaders at this time */
 531       return 0;
 532    default:
 533       debug_printf("Unexpected shader type (%u) query\n", shader);
 534       return 0;
 535    }
 536    return 0;
 537 }
 538
 539
 540 static int
 541 vgpu10_get_shader_param(struct pipe_screen *screen, unsigned shader,
 542                         enum pipe_shader_cap param)
 543 {
 544    struct svga_screen *svgascreen = svga_screen(screen);
 545    struct svga_winsys_screen *sws = svgascreen->sws;
 546
 547    assert(sws->have_vgpu10);
 548    (void) sws;  /* silence unused var warnings in non-debug builds */
 549
 550    /* Only VS, GS, FS supported */
 551    if (shader != PIPE_SHADER_VERTEX &&
 552        shader != PIPE_SHADER_GEOMETRY &&
 553        shader != PIPE_SHADER_FRAGMENT) {
 554       return 0;
 555    }
 556
 557    /* NOTE: we do not query the device for any caps/limits at this time */
 558
 559    /* Generally the same limits for vertex, geometry and fragment shaders */
 560    switch (param) {
 561    case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 562    case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 563    case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 564    case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 565       return 64 * 1024;
 566    case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 567       return 64;
 568    case PIPE_SHADER_CAP_MAX_INPUTS:
 569       if (shader == PIPE_SHADER_FRAGMENT)
 570          return VGPU10_MAX_FS_INPUTS;
 571       else if (shader == PIPE_SHADER_GEOMETRY)
 572          return VGPU10_MAX_GS_INPUTS;
 573       else
 574          return VGPU10_MAX_VS_INPUTS;
 575    case PIPE_SHADER_CAP_MAX_OUTPUTS:
 576       if (shader == PIPE_SHADER_FRAGMENT)
 577          return VGPU10_MAX_FS_OUTPUTS;
 578       else if (shader == PIPE_SHADER_GEOMETRY)
 579          return VGPU10_MAX_GS_OUTPUTS;
 580       else
 581          return VGPU10_MAX_VS_OUTPUTS;
 582    case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 583       return VGPU10_MAX_CONSTANT_BUFFER_ELEMENT_COUNT * sizeof(float[4]);
 584    case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 585       return svgascreen->max_const_buffers;
 586    case PIPE_SHADER_CAP_MAX_TEMPS:
 587       return VGPU10_MAX_TEMPS;
 588    case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 589    case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 590    case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 591    case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 592       return TRUE; /* XXX verify */
 593    case PIPE_SHADER_CAP_MAX_PREDS:
 594       return 0;
 595    case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 596    case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 597    case PIPE_SHADER_CAP_SUBROUTINES:
 598    case PIPE_SHADER_CAP_INTEGERS:
 599       return TRUE;
 600    case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 601    case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 602       return SVGA3D_DX_MAX_SAMPLERS;
 603    case PIPE_SHADER_CAP_PREFERRED_IR:
 604       return PIPE_SHADER_IR_TGSI;
 605    case PIPE_SHADER_CAP_DOUBLES:
 606    case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 607    case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 608    case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 609    case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 610       return 0;
 611    case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 612       return 32;
 613    default:
 614       debug_printf("Unexpected vgpu10 shader query %u\n", param);
 615       return 0;
 616    }
 617    return 0;
 618 }
 619
 620
 621 static int
 622 svga_get_shader_param(struct pipe_screen *screen, unsigned shader,
 623                       enum pipe_shader_cap param)
 624 {
 625    struct svga_screen *svgascreen = svga_screen(screen);
 626    struct svga_winsys_screen *sws = svgascreen->sws;
 627    if (sws->have_vgpu10) {
 628       return vgpu10_get_shader_param(screen, shader, param);
 629    }
 630    else {
 631       return vgpu9_get_shader_param(screen, shader, param);
 632    }
 633 }
 634
 635
 636 /**
 637  * Implement pipe_screen::is_format_supported().
 638  * \param bindings  bitmask of PIPE_BIND_x flags
 639  */
 640 static boolean
 641 svga_is_format_supported( struct pipe_screen *screen,
 642                           enum pipe_format format,
 643                           enum pipe_texture_target target,
 644                           unsigned sample_count,
 645                           unsigned bindings)
 646 {
 647    struct svga_screen *ss = svga_screen(screen);
 648    SVGA3dSurfaceFormat svga_format;
 649    SVGA3dSurfaceFormatCaps caps;
 650    SVGA3dSurfaceFormatCaps mask;
 651
 652    assert(bindings);
 653
 654    if (sample_count > 1) {
 655       /* In ms_samples, if bit N is set it means that we support
 656        * multisample with N+1 samples per pixel.
 657        */
 658       if ((ss->ms_samples & (1 << (sample_count - 1))) == 0) {
 659          return FALSE;
 660       }
 661    }
 662
 663    svga_format = svga_translate_format(ss, format, bindings);
 664    if (svga_format == SVGA3D_FORMAT_INVALID) {
 665       return FALSE;
 666    }
 667
 668    /* we don't support sRGB rendering into display targets */
 669    if (util_format_is_srgb(format) && (bindings & PIPE_BIND_DISPLAY_TARGET)) {
 670       return FALSE;
 671    }
 672
 673    /*
 674     * For VGPU10 vertex formats, skip querying host capabilities
 675     */
 676
 677    if (ss->sws->have_vgpu10 && (bindings & PIPE_BIND_VERTEX_BUFFER)) {
 678       SVGA3dSurfaceFormat svga_format;
 679       unsigned flags;
 680       svga_translate_vertex_format_vgpu10(format, &svga_format, &flags);
 681       return svga_format != SVGA3D_FORMAT_INVALID;
 682    }
 683
 684    /*
 685     * Override host capabilities, so that we end up with the same
 686     * visuals for all virtual hardware implementations.
 687     */
 688
 689    if (bindings & PIPE_BIND_DISPLAY_TARGET) {
 690       switch (svga_format) {
 691       case SVGA3D_A8R8G8B8:
 692       case SVGA3D_X8R8G8B8:
 693       case SVGA3D_R5G6B5:
 694          break;
 695
 696       /* VGPU10 formats */
 697       case SVGA3D_B8G8R8A8_UNORM:
 698       case SVGA3D_B8G8R8X8_UNORM:
 699       case SVGA3D_B5G6R5_UNORM:
 700          break;
 701
 702       /* Often unsupported/problematic. This means we end up with the same
 703        * visuals for all virtual hardware implementations.
 704        */
 705       case SVGA3D_A4R4G4B4:
 706       case SVGA3D_A1R5G5B5:
 707          return FALSE;
 708
 709       default:
 710          return FALSE;
 711       }
 712    }
 713
 714    /*
 715     * Query the host capabilities.
 716     */
 717
 718    svga_get_format_cap(ss, svga_format, &caps);
 719
 720    if (bindings & PIPE_BIND_RENDER_TARGET) {
 721       /* Check that the color surface is blendable, unless it's an
 722        * integer format.
 723        */
 724       if (!svga_format_is_integer(svga_format) &&
 725           (caps.value & SVGA3DFORMAT_OP_NOALPHABLEND)) {
 726          return FALSE;
 727       }
 728    }
 729
 730    mask.value = 0;
 731    if (bindings & PIPE_BIND_RENDER_TARGET) {
 732       mask.value |= SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET;
 733    }
 734    if (bindings & PIPE_BIND_DEPTH_STENCIL) {
 735       mask.value |= SVGA3DFORMAT_OP_ZSTENCIL;
 736    }
 737    if (bindings & PIPE_BIND_SAMPLER_VIEW) {
 738       mask.value |= SVGA3DFORMAT_OP_TEXTURE;
 739    }
 740
 741    if (target == PIPE_TEXTURE_CUBE) {
 742       mask.value |= SVGA3DFORMAT_OP_CUBETEXTURE;
 743    }
 744    else if (target == PIPE_TEXTURE_3D) {
 745       mask.value |= SVGA3DFORMAT_OP_VOLUMETEXTURE;
 746    }
 747
 748    return (caps.value & mask.value) == mask.value;
 749 }
 750
 751
 752 static void
 753 svga_fence_reference(struct pipe_screen *screen,
 754                      struct pipe_fence_handle **ptr,
 755                      struct pipe_fence_handle *fence)
 756 {
 757    struct svga_winsys_screen *sws = svga_screen(screen)->sws;
 758    sws->fence_reference(sws, ptr, fence);
 759 }
 760
 761
 762 static boolean
 763 svga_fence_finish(struct pipe_screen *screen,
 764                   struct pipe_fence_handle *fence,
 765                   uint64_t timeout)
 766 {
 767    struct svga_winsys_screen *sws = svga_screen(screen)->sws;
 768
 769    if (!timeout)
 770       return sws->fence_signalled(sws, fence, 0) == 0;
 771
 772    SVGA_DBG(DEBUG_DMA|DEBUG_PERF, "%s fence_ptr %p\n",
 773             __FUNCTION__, fence);
 774
 775    return sws->fence_finish(sws, fence, 0) == 0;
 776 }
 777
 778
 779 static int
 780 svga_get_driver_query_info(struct pipe_screen *screen,
 781                            unsigned index,
 782                            struct pipe_driver_query_info *info)
 783 {
 784 #define QUERY(NAME, ENUM, UNITS) \
 785    {NAME, ENUM, {0}, UNITS, PIPE_DRIVER_QUERY_RESULT_TYPE_AVERAGE, 0, 0x0}
 786
 787    static const struct pipe_driver_query_info queries[] = {
 788       /* per-frame counters */
 789       QUERY("num-draw-calls", SVGA_QUERY_NUM_DRAW_CALLS,
 790             PIPE_DRIVER_QUERY_TYPE_UINT64),
 791       QUERY("num-fallbacks", SVGA_QUERY_NUM_FALLBACKS,
 792             PIPE_DRIVER_QUERY_TYPE_UINT64),
 793       QUERY("num-flushes", SVGA_QUERY_NUM_FLUSHES,
 794             PIPE_DRIVER_QUERY_TYPE_UINT64),
 795       QUERY("num-validations", SVGA_QUERY_NUM_VALIDATIONS,
 796             PIPE_DRIVER_QUERY_TYPE_UINT64),
 797       QUERY("map-buffer-time", SVGA_QUERY_MAP_BUFFER_TIME,
 798             PIPE_DRIVER_QUERY_TYPE_MICROSECONDS),
 799       QUERY("num-resources-mapped", SVGA_QUERY_NUM_RESOURCES_MAPPED,
 800             PIPE_DRIVER_QUERY_TYPE_UINT64),
 801       QUERY("num-bytes-uploaded", SVGA_QUERY_NUM_BYTES_UPLOADED,
 802             PIPE_DRIVER_QUERY_TYPE_BYTES),
 803
 804       /* running total counters */
 805       QUERY("memory-used", SVGA_QUERY_MEMORY_USED,
 806             PIPE_DRIVER_QUERY_TYPE_BYTES),
 807       QUERY("num-shaders", SVGA_QUERY_NUM_SHADERS,
 808             PIPE_DRIVER_QUERY_TYPE_UINT64),
 809       QUERY("num-resources", SVGA_QUERY_NUM_RESOURCES,
 810             PIPE_DRIVER_QUERY_TYPE_UINT64),
 811       QUERY("num-state-objects", SVGA_QUERY_NUM_STATE_OBJECTS,
 812             PIPE_DRIVER_QUERY_TYPE_UINT64),
 813       QUERY("num-surface-views", SVGA_QUERY_NUM_SURFACE_VIEWS,
 814             PIPE_DRIVER_QUERY_TYPE_UINT64),
 815    };
 816 #undef QUERY
 817
 818    if (!info)
 819       return Elements(queries);
 820
 821    if (index >= Elements(queries))
 822       return 0;
 823
 824    *info = queries[index];
 825    return 1;
 826 }
 827
 828
 829 static void
 830 svga_destroy_screen( struct pipe_screen *screen )
 831 {
 832    struct svga_screen *svgascreen = svga_screen(screen);
 833
 834    svga_screen_cache_cleanup(svgascreen);
 835
 836    pipe_mutex_destroy(svgascreen->swc_mutex);
 837    pipe_mutex_destroy(svgascreen->tex_mutex);
 838
 839    svgascreen->sws->destroy(svgascreen->sws);
 840
 841    FREE(svgascreen);
 842 }
 843
 844
 845 /**
 846  * Create a new svga_screen object
 847  */
 848 struct pipe_screen *
 849 svga_screen_create(struct svga_winsys_screen *sws)
 850 {
 851    struct svga_screen *svgascreen;
 852    struct pipe_screen *screen;
 853
 854 #ifdef DEBUG
 855    SVGA_DEBUG = debug_get_flags_option("SVGA_DEBUG", svga_debug_flags, 0 );
 856 #endif
 857
 858    svgascreen = CALLOC_STRUCT(svga_screen);
 859    if (!svgascreen)
 860       goto error1;
 861
 862    svgascreen->debug.force_level_surface_view =
 863       debug_get_bool_option("SVGA_FORCE_LEVEL_SURFACE_VIEW", FALSE);
 864    svgascreen->debug.force_surface_view =
 865       debug_get_bool_option("SVGA_FORCE_SURFACE_VIEW", FALSE);
 866    svgascreen->debug.force_sampler_view =
 867       debug_get_bool_option("SVGA_FORCE_SAMPLER_VIEW", FALSE);
 868    svgascreen->debug.no_surface_view =
 869       debug_get_bool_option("SVGA_NO_SURFACE_VIEW", FALSE);
 870    svgascreen->debug.no_sampler_view =
 871       debug_get_bool_option("SVGA_NO_SAMPLER_VIEW", FALSE);
 872
 873    screen = &svgascreen->screen;
 874
 875    screen->destroy = svga_destroy_screen;
 876    screen->get_name = svga_get_name;
 877    screen->get_vendor = svga_get_vendor;
 878    screen->get_device_vendor = svga_get_vendor; // TODO actual device vendor
 879    screen->get_param = svga_get_param;
 880    screen->get_shader_param = svga_get_shader_param;
 881    screen->get_paramf = svga_get_paramf;
 882    screen->get_timestamp = NULL;
 883    screen->is_format_supported = svga_is_format_supported;
 884    screen->context_create = svga_context_create;
 885    screen->fence_reference = svga_fence_reference;
 886    screen->fence_finish = svga_fence_finish;
 887    screen->get_driver_query_info = svga_get_driver_query_info;
 888    svgascreen->sws = sws;
 889
 890    svga_init_screen_resource_functions(svgascreen);
 891
 892    if (sws->get_hw_version) {
 893       svgascreen->hw_version = sws->get_hw_version(sws);
 894    } else {
 895       svgascreen->hw_version = SVGA3D_HWVERSION_WS65_B1;
 896    }
 897
 898    /*
 899     * The D16, D24X8, and D24S8 formats always do an implicit shadow compare
 900     * when sampled from, where as the DF16, DF24, and D24S8_INT do not.  So
 901     * we prefer the later when available.
 902     *
 903     * This mimics hardware vendors extensions for D3D depth sampling. See also
 904     * http://aras-p.info/texts/D3D9GPUHacks.html
 905     */
 906
 907    {
 908       boolean has_df16, has_df24, has_d24s8_int;
 909       SVGA3dSurfaceFormatCaps caps;
 910       SVGA3dSurfaceFormatCaps mask;
 911       mask.value = 0;
 912       mask.zStencil = 1;
 913       mask.texture = 1;
 914
 915       svgascreen->depth.z16 = SVGA3D_Z_D16;
 916       svgascreen->depth.x8z24 = SVGA3D_Z_D24X8;
 917       svgascreen->depth.s8z24 = SVGA3D_Z_D24S8;
 918
 919       svga_get_format_cap(svgascreen, SVGA3D_Z_DF16, &caps);
 920       has_df16 = (caps.value & mask.value) == mask.value;
 921
 922       svga_get_format_cap(svgascreen, SVGA3D_Z_DF24, &caps);
 923       has_df24 = (caps.value & mask.value) == mask.value;
 924
 925       svga_get_format_cap(svgascreen, SVGA3D_Z_D24S8_INT, &caps);
 926       has_d24s8_int = (caps.value & mask.value) == mask.value;
 927
 928       /* XXX: We might want some other logic here.
 929        * Like if we only have d24s8_int we should
 930        * emulate the other formats with that.
 931        */
 932       if (has_df16) {
 933          svgascreen->depth.z16 = SVGA3D_Z_DF16;
 934       }
 935       if (has_df24) {
 936          svgascreen->depth.x8z24 = SVGA3D_Z_DF24;
 937       }
 938       if (has_d24s8_int) {
 939          svgascreen->depth.s8z24 = SVGA3D_Z_D24S8_INT;
 940       }
 941    }
 942
 943    /* Query device caps
 944     */
 945    if (sws->have_vgpu10) {
 946       svgascreen->haveProvokingVertex
 947          = get_bool_cap(sws, SVGA3D_DEVCAP_DX_PROVOKING_VERTEX, FALSE);
 948       svgascreen->haveLineSmooth = TRUE;
 949       svgascreen->maxPointSize = 80.0F;
 950       svgascreen->max_color_buffers = SVGA3D_DX_MAX_RENDER_TARGETS;
 951
 952       /* Multisample samples per pixel */
 953       svgascreen->ms_samples =
 954          get_uint_cap(sws, SVGA3D_DEVCAP_MULTISAMPLE_MASKABLESAMPLES, 0);
 955
 956       /* Maximum number of constant buffers */
 957       svgascreen->max_const_buffers =
 958          get_uint_cap(sws, SVGA3D_DEVCAP_DX_MAX_CONSTANT_BUFFERS, 1);
 959       assert(svgascreen->max_const_buffers <= SVGA_MAX_CONST_BUFS);
 960    }
 961    else {
 962       /* VGPU9 */
 963       unsigned vs_ver = get_uint_cap(sws, SVGA3D_DEVCAP_VERTEX_SHADER_VERSION,
 964                                      SVGA3DVSVERSION_NONE);
 965       unsigned fs_ver = get_uint_cap(sws, SVGA3D_DEVCAP_FRAGMENT_SHADER_VERSION,
 966                                      SVGA3DPSVERSION_NONE);
 967
 968       /* we require Shader model 3.0 or later */
 969       if (fs_ver < SVGA3DPSVERSION_30 || vs_ver < SVGA3DVSVERSION_30) {
 970          goto error2;
 971       }
 972
 973       svgascreen->haveProvokingVertex = FALSE;
 974
 975       svgascreen->haveLineSmooth =
 976          get_bool_cap(sws, SVGA3D_DEVCAP_LINE_AA, FALSE);
 977
 978       svgascreen->maxPointSize =
 979          get_float_cap(sws, SVGA3D_DEVCAP_MAX_POINT_SIZE, 1.0f);
 980       /* Keep this to a reasonable size to avoid failures in conform/pntaa.c */
 981       svgascreen->maxPointSize = MIN2(svgascreen->maxPointSize, 80.0f);
 982
 983       /* The SVGA3D device always supports 4 targets at this time, regardless
 984        * of what querying SVGA3D_DEVCAP_MAX_RENDER_TARGETS might return.
 985        */
 986       svgascreen->max_color_buffers = 4;
 987
 988       /* Only support one constant buffer
 989        */
 990       svgascreen->max_const_buffers = 1;
 991
 992       /* No multisampling */
 993       svgascreen->ms_samples = 0;
 994    }
 995
 996    /* common VGPU9 / VGPU10 caps */
 997    svgascreen->haveLineStipple =
 998       get_bool_cap(sws, SVGA3D_DEVCAP_LINE_STIPPLE, FALSE);
 999
1000    svgascreen->maxLineWidth =
1001       get_float_cap(sws, SVGA3D_DEVCAP_MAX_LINE_WIDTH, 1.0f);
1002
1003    svgascreen->maxLineWidthAA =
1004       get_float_cap(sws, SVGA3D_DEVCAP_MAX_AA_LINE_WIDTH, 1.0f);
1005
1006    if (0) {
1007       debug_printf("svga: haveProvokingVertex %u\n",
1008                    svgascreen->haveProvokingVertex);
1009       debug_printf("svga: haveLineStip %u  "
1010                    "haveLineSmooth %u  maxLineWidth %f\n",
1011                    svgascreen->haveLineStipple, svgascreen->haveLineSmooth,
1012                    svgascreen->maxLineWidth);
1013       debug_printf("svga: maxPointSize %g\n", svgascreen->maxPointSize);
1014    }
1015
1016    pipe_mutex_init(svgascreen->tex_mutex);
1017    pipe_mutex_init(svgascreen->swc_mutex);
1018
1019    svga_screen_cache_init(svgascreen);
1020
1021    return screen;
1022 error2:
1023    FREE(svgascreen);
1024 error1:
1025    return NULL;
1026 }
1027
1028 struct svga_winsys_screen *
1029 svga_winsys_screen(struct pipe_screen *screen)
1030 {
1031    return svga_screen(screen)->sws;
1032 }
1033
1034 #ifdef DEBUG
1035 struct svga_screen *
1036 svga_screen(struct pipe_screen *screen)
1037 {
1038    assert(screen);
1039    assert(screen->destroy == svga_destroy_screen);
1040    return (struct svga_screen *)screen;
1041 }
1042 #endif