src/gallium/drivers/svga/svga_screen.c

   1 /**********************************************************
   2  * Copyright 2008-2009 VMware, Inc.  All rights reserved.
   3  *
   4  * Permission is hereby granted, free of charge, to any person
   5  * obtaining a copy of this software and associated documentation
   6  * files (the "Software"), to deal in the Software without
   7  * restriction, including without limitation the rights to use, copy,
   8  * modify, merge, publish, distribute, sublicense, and/or sell copies
   9  * of the Software, and to permit persons to whom the Software is
  10  * furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be
  13  * included in all copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  16  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  17  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  18  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  19  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  20  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  21  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  22  * SOFTWARE.
  23  *
  24  **********************************************************/
  25
  26 #include "util/u_memory.h"
  27 #include "util/u_inlines.h"
  28 #include "util/u_string.h"
  29 #include "util/u_math.h"
  30
  31 #include "svga_winsys.h"
  32 #include "svga_public.h"
  33 #include "svga_context.h"
  34 #include "svga_format.h"
  35 #include "svga_screen.h"
  36 #include "svga_resource_texture.h"
  37 #include "svga_resource.h"
  38 #include "svga_debug.h"
  39
  40 #include "svga3d_shaderdefs.h"
  41
  42
  43 #ifdef DEBUG
  44 int SVGA_DEBUG = 0;
  45
  46 static const struct debug_named_value svga_debug_flags[] = {
  47    { "dma",      DEBUG_DMA, NULL },
  48    { "tgsi",     DEBUG_TGSI, NULL },
  49    { "pipe",     DEBUG_PIPE, NULL },
  50    { "state",    DEBUG_STATE, NULL },
  51    { "screen",   DEBUG_SCREEN, NULL },
  52    { "tex",      DEBUG_TEX, NULL },
  53    { "swtnl",    DEBUG_SWTNL, NULL },
  54    { "const",    DEBUG_CONSTS, NULL },
  55    { "viewport", DEBUG_VIEWPORT, NULL },
  56    { "views",    DEBUG_VIEWS, NULL },
  57    { "perf",     DEBUG_PERF, NULL },
  58    { "flush",    DEBUG_FLUSH, NULL },
  59    { "sync",     DEBUG_SYNC, NULL },
  60    { "cache",    DEBUG_CACHE, NULL },
  61    DEBUG_NAMED_VALUE_END
  62 };
  63 #endif
  64
  65 static const char *
  66 svga_get_vendor( struct pipe_screen *pscreen )
  67 {
  68    return "VMware, Inc.";
  69 }
  70
  71
  72 static const char *
  73 svga_get_name( struct pipe_screen *pscreen )
  74 {
  75    const char *build = "", *llvm = "", *mutex = "";
  76    static char name[100];
  77 #ifdef DEBUG
  78    /* Only return internal details in the DEBUG version:
  79     */
  80    build = "build: DEBUG;";
  81    mutex = "mutex: " PIPE_ATOMIC ";";
  82 #ifdef HAVE_LLVM
  83    llvm = "LLVM;";
  84 #endif
  85 #else
  86    build = "build: RELEASE;";
  87 #endif
  88
  89    util_snprintf(name, sizeof(name), "SVGA3D; %s %s %s", build, mutex, llvm);
  90    return name;
  91 }
  92
  93
  94
  95
  96 static float
  97 svga_get_paramf(struct pipe_screen *screen, enum pipe_capf param)
  98 {
  99    struct svga_screen *svgascreen = svga_screen(screen);
 100    struct svga_winsys_screen *sws = svgascreen->sws;
 101    SVGA3dDevCapResult result;
 102
 103    switch (param) {
 104    case PIPE_CAPF_MAX_LINE_WIDTH:
 105       /* fall-through */
 106    case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 107       return 7.0;
 108
 109    case PIPE_CAPF_MAX_POINT_WIDTH:
 110       /* fall-through */
 111    case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 112       return svgascreen->maxPointSize;
 113
 114    case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 115       if(!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_TEXTURE_ANISOTROPY, &result))
 116          return 4.0f;
 117       return (float) result.u;
 118
 119    case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 120       return 15.0;
 121    case PIPE_CAPF_GUARD_BAND_LEFT:
 122    case PIPE_CAPF_GUARD_BAND_TOP:
 123    case PIPE_CAPF_GUARD_BAND_RIGHT:
 124    case PIPE_CAPF_GUARD_BAND_BOTTOM:
 125       return 0.0;
 126    }
 127
 128    debug_printf("Unexpected PIPE_CAPF_ query %u\n", param);
 129    return 0;
 130 }
 131
 132
 133 static int
 134 svga_get_param(struct pipe_screen *screen, enum pipe_cap param)
 135 {
 136    struct svga_screen *svgascreen = svga_screen(screen);
 137    struct svga_winsys_screen *sws = svgascreen->sws;
 138    SVGA3dDevCapResult result;
 139
 140    switch (param) {
 141    case PIPE_CAP_MAX_COMBINED_SAMPLERS:
 142       return 16;
 143    case PIPE_CAP_NPOT_TEXTURES:
 144       return 1;
 145    case PIPE_CAP_TWO_SIDED_STENCIL:
 146       return 1;
 147    case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
 148       return 0;
 149    case PIPE_CAP_ANISOTROPIC_FILTER:
 150       return 1;
 151    case PIPE_CAP_POINT_SPRITE:
 152       return 1;
 153    case PIPE_CAP_MAX_RENDER_TARGETS:
 154       if(!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_RENDER_TARGETS, &result))
 155          return 1;
 156       if(!result.u)
 157          return 1;
 158       return MIN2(result.u, PIPE_MAX_COLOR_BUFS);
 159    case PIPE_CAP_OCCLUSION_QUERY:
 160       return 1;
 161    case PIPE_CAP_QUERY_TIME_ELAPSED:
 162       return 0;
 163    case PIPE_CAP_TEXTURE_SHADOW_MAP:
 164       return 1;
 165    case PIPE_CAP_TEXTURE_SWIZZLE:
 166       return 1;
 167    case PIPE_CAP_USER_VERTEX_BUFFERS:
 168    case PIPE_CAP_USER_INDEX_BUFFERS:
 169       return 0;
 170    case PIPE_CAP_USER_CONSTANT_BUFFERS:
 171       return 1;
 172    case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 173       return 16;
 174
 175    case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 176       {
 177          unsigned levels = SVGA_MAX_TEXTURE_LEVELS;
 178          if (sws->get_cap(sws, SVGA3D_DEVCAP_MAX_TEXTURE_WIDTH, &result))
 179             levels = MIN2(util_logbase2(result.u) + 1, levels);
 180          else
 181             levels = 12 /* 2048x2048 */;
 182          if (sws->get_cap(sws, SVGA3D_DEVCAP_MAX_TEXTURE_HEIGHT, &result))
 183             levels = MIN2(util_logbase2(result.u) + 1, levels);
 184          else
 185             levels = 12 /* 2048x2048 */;
 186          return levels;
 187       }
 188
 189    case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 190       if (!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_VOLUME_EXTENT, &result))
 191          return 8;  /* max 128x128x128 */
 192       return MIN2(util_logbase2(result.u) + 1, SVGA_MAX_TEXTURE_LEVELS);
 193
 194    case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 195       /*
 196        * No mechanism to query the host, and at least limited to 2048x2048 on
 197        * certain hardware.
 198        */
 199       return MIN2(screen->get_param(screen, PIPE_CAP_MAX_TEXTURE_2D_LEVELS),
 200                   12 /* 2048x2048 */);
 201
 202    case PIPE_CAP_BLEND_EQUATION_SEPARATE: /* req. for GL 1.5 */
 203       return 1;
 204
 205    case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 206    case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 207       return 1;
 208    case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 209    case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 210       return 0;
 211
 212    case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
 213       return 1; /* The color outputs of vertex shaders are not clamped */
 214    case PIPE_CAP_VERTEX_COLOR_CLAMPED:
 215       return 0; /* The driver can't clamp vertex colors */
 216    case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
 217       return 0; /* The driver can't clamp fragment colors */
 218
 219    case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 220       return 1; /* expected for GL_ARB_framebuffer_object */
 221
 222    case PIPE_CAP_GLSL_FEATURE_LEVEL:
 223       return 120;
 224
 225    /* Unsupported features */
 226    case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
 227    case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 228    case PIPE_CAP_SM3:
 229    case PIPE_CAP_SHADER_STENCIL_EXPORT:
 230    case PIPE_CAP_DEPTH_CLIP_DISABLE:
 231    case PIPE_CAP_SEAMLESS_CUBE_MAP:
 232    case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 233    case PIPE_CAP_INDEP_BLEND_ENABLE:
 234    case PIPE_CAP_INDEP_BLEND_FUNC:
 235    case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 236    case PIPE_CAP_PRIMITIVE_RESTART:
 237    case PIPE_CAP_TGSI_INSTANCEID:
 238    case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 239    case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 240    case PIPE_CAP_SCALED_RESOLVE:
 241    case PIPE_CAP_MIN_TEXEL_OFFSET:
 242    case PIPE_CAP_MAX_TEXEL_OFFSET:
 243    case PIPE_CAP_CONDITIONAL_RENDER:
 244    case PIPE_CAP_TEXTURE_BARRIER:
 245    case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 246    case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 247    case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
 248    case PIPE_CAP_TGSI_CAN_COMPACT_VARYINGS:
 249    case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
 250    case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
 251    case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
 252    case PIPE_CAP_COMPUTE:
 253    case PIPE_CAP_START_INSTANCE:
 254    case PIPE_CAP_QUERY_TIMESTAMP:
 255    case PIPE_CAP_TEXTURE_MULTISAMPLE:
 256    case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
 257    case PIPE_CAP_CUBE_MAP_ARRAY:
 258    case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 259    case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
 260       return 0;
 261    case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
 262       return 1;
 263    }
 264
 265    debug_printf("Unexpected PIPE_CAP_ query %u\n", param);
 266    return 0;
 267 }
 268
 269 static int svga_get_shader_param(struct pipe_screen *screen, unsigned shader, enum pipe_shader_cap param)
 270 {
 271    struct svga_screen *svgascreen = svga_screen(screen);
 272    struct svga_winsys_screen *sws = svgascreen->sws;
 273    SVGA3dDevCapResult result;
 274
 275    switch (shader)
 276    {
 277    case PIPE_SHADER_FRAGMENT:
 278       switch (param)
 279       {
 280       case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 281       case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 282       case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 283       case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 284          return 512;
 285       case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 286          return SVGA3D_MAX_NESTING_LEVEL;
 287       case PIPE_SHADER_CAP_MAX_INPUTS:
 288          return 10;
 289       case PIPE_SHADER_CAP_MAX_CONSTS:
 290          return 224;
 291       case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 292          return 1;
 293       case PIPE_SHADER_CAP_MAX_TEMPS:
 294          if (!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_TEMPS, &result))
 295             return 32;
 296          return MIN2(result.u, SVGA3D_TEMPREG_MAX);
 297       case PIPE_SHADER_CAP_MAX_ADDRS:
 298       case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 299          /*
 300           * Although PS 3.0 has some addressing abilities it can only represent
 301           * loops that can be statically determined and unrolled. Given we can
 302           * only handle a subset of the cases that the state tracker already
 303           * does it is better to defer loop unrolling to the state tracker.
 304           */
 305          return 0;
 306       case PIPE_SHADER_CAP_MAX_PREDS:
 307          return 1;
 308       case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 309          return 1;
 310       case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 311          return 0;
 312       case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 313       case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 314       case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 315          return 0;
 316       case PIPE_SHADER_CAP_SUBROUTINES:
 317          return 0;
 318       case PIPE_SHADER_CAP_INTEGERS:
 319          return 0;
 320       case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 321          return 16;
 322       default:
 323          debug_printf("Unexpected vertex shader query %u\n", param);
 324          return 0;
 325       }
 326       break;
 327    case PIPE_SHADER_VERTEX:
 328       switch (param)
 329       {
 330       case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 331       case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 332          if (!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_VERTEX_SHADER_INSTRUCTIONS, &result))
 333             return 512;
 334          return result.u;
 335       case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 336       case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 337          /* XXX: until we have vertex texture support */
 338          return 0;
 339       case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 340          return SVGA3D_MAX_NESTING_LEVEL;
 341       case PIPE_SHADER_CAP_MAX_INPUTS:
 342          return 16;
 343       case PIPE_SHADER_CAP_MAX_CONSTS:
 344          return 256;
 345       case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 346          return 1;
 347       case PIPE_SHADER_CAP_MAX_TEMPS:
 348          if (!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEMPS, &result))
 349             return 32;
 350          return MIN2(result.u, SVGA3D_TEMPREG_MAX);
 351       case PIPE_SHADER_CAP_MAX_ADDRS:
 352          return 1;
 353       case PIPE_SHADER_CAP_MAX_PREDS:
 354          return 1;
 355       case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 356          return 1;
 357       case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 358          return 0;
 359       case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 360       case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 361          return 1;
 362       case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 363          return 0;
 364       case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 365          return 1;
 366       case PIPE_SHADER_CAP_SUBROUTINES:
 367          return 0;
 368       case PIPE_SHADER_CAP_INTEGERS:
 369          return 0;
 370       case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 371          return 0;
 372       default:
 373          debug_printf("Unexpected vertex shader query %u\n", param);
 374          return 0;
 375       }
 376       break;
 377    case PIPE_SHADER_GEOMETRY:
 378       /* no support for geometry shaders at this time */
 379       return 0;
 380    default:
 381       debug_printf("Unexpected shader type (%u) query\n", shader);
 382       return 0;
 383    }
 384    return 0;
 385 }
 386
 387
 388 static boolean
 389 svga_is_format_supported( struct pipe_screen *screen,
 390                           enum pipe_format format,
 391                           enum pipe_texture_target target,
 392                           unsigned sample_count,
 393                           unsigned tex_usage)
 394 {
 395    struct svga_screen *ss = svga_screen(screen);
 396    SVGA3dSurfaceFormat svga_format;
 397    SVGA3dSurfaceFormatCaps caps;
 398    SVGA3dSurfaceFormatCaps mask;
 399
 400    assert(tex_usage);
 401
 402    if (sample_count > 1) {
 403       return FALSE;
 404    }
 405
 406    svga_format = svga_translate_format(ss, format, tex_usage);
 407    if (svga_format == SVGA3D_FORMAT_INVALID) {
 408       return FALSE;
 409    }
 410
 411    /*
 412     * Override host capabilities, so that we end up with the same
 413     * visuals for all virtual hardware implementations.
 414     */
 415
 416    if (tex_usage & PIPE_BIND_DISPLAY_TARGET) {
 417       switch (svga_format) {
 418       case SVGA3D_A8R8G8B8:
 419       case SVGA3D_X8R8G8B8:
 420       case SVGA3D_R5G6B5:
 421          break;
 422
 423       /* Often unsupported/problematic. This means we end up with the same
 424        * visuals for all virtual hardware implementations.
 425        */
 426       case SVGA3D_A4R4G4B4:
 427       case SVGA3D_A1R5G5B5:
 428          return FALSE;
 429
 430       default:
 431          return FALSE;
 432       }
 433    }
 434
 435    /*
 436     * Query the host capabilities.
 437     */
 438
 439    svga_get_format_cap(ss, svga_format, &caps);
 440
 441    mask.value = 0;
 442    if (tex_usage & PIPE_BIND_RENDER_TARGET) {
 443       mask.offscreenRenderTarget = 1;
 444    }
 445    if (tex_usage & PIPE_BIND_DEPTH_STENCIL) {
 446       mask.zStencil = 1;
 447    }
 448    if (tex_usage & PIPE_BIND_SAMPLER_VIEW) {
 449       mask.texture = 1;
 450    }
 451
 452    return (caps.value & mask.value) == mask.value;
 453 }
 454
 455
 456 static void
 457 svga_fence_reference(struct pipe_screen *screen,
 458                      struct pipe_fence_handle **ptr,
 459                      struct pipe_fence_handle *fence)
 460 {
 461    struct svga_winsys_screen *sws = svga_screen(screen)->sws;
 462    sws->fence_reference(sws, ptr, fence);
 463 }
 464
 465
 466 static boolean
 467 svga_fence_signalled(struct pipe_screen *screen,
 468                      struct pipe_fence_handle *fence)
 469 {
 470    struct svga_winsys_screen *sws = svga_screen(screen)->sws;
 471    return sws->fence_signalled(sws, fence, 0) == 0;
 472 }
 473
 474
 475 static boolean
 476 svga_fence_finish(struct pipe_screen *screen,
 477                   struct pipe_fence_handle *fence,
 478                   uint64_t timeout)
 479 {
 480    struct svga_winsys_screen *sws = svga_screen(screen)->sws;
 481
 482    SVGA_DBG(DEBUG_DMA|DEBUG_PERF, "%s fence_ptr %p\n",
 483             __FUNCTION__, fence);
 484
 485    return sws->fence_finish(sws, fence, 0) == 0;
 486 }
 487
 488
 489 static void
 490 svga_destroy_screen( struct pipe_screen *screen )
 491 {
 492    struct svga_screen *svgascreen = svga_screen(screen);
 493
 494    svga_screen_cache_cleanup(svgascreen);
 495
 496    pipe_mutex_destroy(svgascreen->swc_mutex);
 497    pipe_mutex_destroy(svgascreen->tex_mutex);
 498
 499    svgascreen->sws->destroy(svgascreen->sws);
 500
 501    FREE(svgascreen);
 502 }
 503
 504
 505 /**
 506  * Create a new svga_screen object
 507  */
 508 struct pipe_screen *
 509 svga_screen_create(struct svga_winsys_screen *sws)
 510 {
 511    struct svga_screen *svgascreen;
 512    struct pipe_screen *screen;
 513    SVGA3dDevCapResult result;
 514    boolean use_vs30, use_ps30;
 515
 516 #ifdef DEBUG
 517    SVGA_DEBUG = debug_get_flags_option("SVGA_DEBUG", svga_debug_flags, 0 );
 518 #endif
 519
 520    svgascreen = CALLOC_STRUCT(svga_screen);
 521    if (!svgascreen)
 522       goto error1;
 523
 524    svgascreen->debug.force_level_surface_view =
 525       debug_get_bool_option("SVGA_FORCE_LEVEL_SURFACE_VIEW", FALSE);
 526    svgascreen->debug.force_surface_view =
 527       debug_get_bool_option("SVGA_FORCE_SURFACE_VIEW", FALSE);
 528    svgascreen->debug.force_sampler_view =
 529       debug_get_bool_option("SVGA_FORCE_SAMPLER_VIEW", FALSE);
 530    svgascreen->debug.no_surface_view =
 531       debug_get_bool_option("SVGA_NO_SURFACE_VIEW", FALSE);
 532    svgascreen->debug.no_sampler_view =
 533       debug_get_bool_option("SVGA_NO_SAMPLER_VIEW", FALSE);
 534
 535    screen = &svgascreen->screen;
 536
 537    screen->destroy = svga_destroy_screen;
 538    screen->get_name = svga_get_name;
 539    screen->get_vendor = svga_get_vendor;
 540    screen->get_param = svga_get_param;
 541    screen->get_shader_param = svga_get_shader_param;
 542    screen->get_paramf = svga_get_paramf;
 543    screen->is_format_supported = svga_is_format_supported;
 544    screen->context_create = svga_context_create;
 545    screen->fence_reference = svga_fence_reference;
 546    screen->fence_signalled = svga_fence_signalled;
 547    screen->fence_finish = svga_fence_finish;
 548    svgascreen->sws = sws;
 549
 550    svga_init_screen_resource_functions(svgascreen);
 551
 552    if (sws->get_hw_version) {
 553       svgascreen->hw_version = sws->get_hw_version(sws);
 554    } else {
 555       svgascreen->hw_version = SVGA3D_HWVERSION_WS65_B1;
 556    }
 557
 558    use_ps30 =
 559       sws->get_cap(sws, SVGA3D_DEVCAP_FRAGMENT_SHADER_VERSION, &result) &&
 560       result.u >= SVGA3DPSVERSION_30 ? TRUE : FALSE;
 561
 562    use_vs30 =
 563       sws->get_cap(sws, SVGA3D_DEVCAP_VERTEX_SHADER_VERSION, &result) &&
 564       result.u >= SVGA3DVSVERSION_30 ? TRUE : FALSE;
 565
 566    /* we require Shader model 3.0 or later */
 567    if (!use_ps30 || !use_vs30)
 568       goto error2;
 569
 570    /*
 571     * The D16, D24X8, and D24S8 formats always do an implicit shadow compare
 572     * when sampled from, where as the DF16, DF24, and D24S8_INT do not.  So
 573     * we prefer the later when available.
 574     *
 575     * This mimics hardware vendors extensions for D3D depth sampling. See also
 576     * http://aras-p.info/texts/D3D9GPUHacks.html
 577     */
 578
 579    {
 580       boolean has_df16, has_df24, has_d24s8_int;
 581       SVGA3dSurfaceFormatCaps caps;
 582       SVGA3dSurfaceFormatCaps mask;
 583       mask.value = 0;
 584       mask.zStencil = 1;
 585       mask.texture = 1;
 586
 587       svgascreen->depth.z16 = SVGA3D_Z_D16;
 588       svgascreen->depth.x8z24 = SVGA3D_Z_D24X8;
 589       svgascreen->depth.s8z24 = SVGA3D_Z_D24S8;
 590
 591       svga_get_format_cap(svgascreen, SVGA3D_Z_DF16, &caps);
 592       has_df16 = (caps.value & mask.value) == mask.value;
 593
 594       svga_get_format_cap(svgascreen, SVGA3D_Z_DF24, &caps);
 595       has_df24 = (caps.value & mask.value) == mask.value;
 596
 597       svga_get_format_cap(svgascreen, SVGA3D_Z_D24S8_INT, &caps);
 598       has_d24s8_int = (caps.value & mask.value) == mask.value;
 599
 600       /* XXX: We might want some other logic here.
 601        * Like if we only have d24s8_int we should
 602        * emulate the other formats with that.
 603        */
 604       if (has_df16) {
 605          svgascreen->depth.z16 = SVGA3D_Z_DF16;
 606       }
 607       if (has_df24) {
 608          svgascreen->depth.x8z24 = SVGA3D_Z_DF24;
 609       }
 610       if (has_d24s8_int) {
 611          svgascreen->depth.s8z24 = SVGA3D_Z_D24S8_INT;
 612       }
 613    }
 614
 615    if (!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_POINT_SIZE, &result)) {
 616       svgascreen->maxPointSize = 1.0F;
 617    } else {
 618       /* Keep this to a reasonable size to avoid failures in
 619        * conform/pntaa.c:
 620        */
 621       svgascreen->maxPointSize = MIN2(result.f, 80.0f);
 622    }
 623
 624    pipe_mutex_init(svgascreen->tex_mutex);
 625    pipe_mutex_init(svgascreen->swc_mutex);
 626
 627    svga_screen_cache_init(svgascreen);
 628
 629    return screen;
 630 error2:
 631    FREE(svgascreen);
 632 error1:
 633    return NULL;
 634 }
 635
 636 struct svga_winsys_screen *
 637 svga_winsys_screen(struct pipe_screen *screen)
 638 {
 639    return svga_screen(screen)->sws;
 640 }
 641
 642 #ifdef DEBUG
 643 struct svga_screen *
 644 svga_screen(struct pipe_screen *screen)
 645 {
 646    assert(screen);
 647    assert(screen->destroy == svga_destroy_screen);
 648    return (struct svga_screen *)screen;
 649 }
 650 #endif