src/gallium/drivers/svga/svga_screen.c

   1 /**********************************************************
   2  * Copyright 2008-2009 VMware, Inc.  All rights reserved.
   3  *
   4  * Permission is hereby granted, free of charge, to any person
   5  * obtaining a copy of this software and associated documentation
   6  * files (the "Software"), to deal in the Software without
   7  * restriction, including without limitation the rights to use, copy,
   8  * modify, merge, publish, distribute, sublicense, and/or sell copies
   9  * of the Software, and to permit persons to whom the Software is
  10  * furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be
  13  * included in all copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  16  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  17  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  18  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  19  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  20  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  21  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  22  * SOFTWARE.
  23  *
  24  **********************************************************/
  25
  26 #include "util/u_memory.h"
  27 #include "util/u_inlines.h"
  28 #include "util/u_string.h"
  29 #include "util/u_math.h"
  30
  31 #include "svga_winsys.h"
  32 #include "svga_public.h"
  33 #include "svga_context.h"
  34 #include "svga_format.h"
  35 #include "svga_screen.h"
  36 #include "svga_resource_texture.h"
  37 #include "svga_resource.h"
  38 #include "svga_debug.h"
  39
  40 #include "svga3d_shaderdefs.h"
  41
  42
  43 #ifdef DEBUG
  44 int SVGA_DEBUG = 0;
  45
  46 static const struct debug_named_value svga_debug_flags[] = {
  47    { "dma",      DEBUG_DMA, NULL },
  48    { "tgsi",     DEBUG_TGSI, NULL },
  49    { "pipe",     DEBUG_PIPE, NULL },
  50    { "state",    DEBUG_STATE, NULL },
  51    { "screen",   DEBUG_SCREEN, NULL },
  52    { "tex",      DEBUG_TEX, NULL },
  53    { "swtnl",    DEBUG_SWTNL, NULL },
  54    { "const",    DEBUG_CONSTS, NULL },
  55    { "viewport", DEBUG_VIEWPORT, NULL },
  56    { "views",    DEBUG_VIEWS, NULL },
  57    { "perf",     DEBUG_PERF, NULL },
  58    { "flush",    DEBUG_FLUSH, NULL },
  59    { "sync",     DEBUG_SYNC, NULL },
  60    { "cache",    DEBUG_CACHE, NULL },
  61    DEBUG_NAMED_VALUE_END
  62 };
  63 #endif
  64
  65 static const char *
  66 svga_get_vendor( struct pipe_screen *pscreen )
  67 {
  68    return "VMware, Inc.";
  69 }
  70
  71
  72 static const char *
  73 svga_get_name( struct pipe_screen *pscreen )
  74 {
  75    const char *build = "", *llvm = "", *mutex = "";
  76    static char name[100];
  77 #ifdef DEBUG
  78    /* Only return internal details in the DEBUG version:
  79     */
  80    build = "build: DEBUG;";
  81    mutex = "mutex: " PIPE_ATOMIC ";";
  82 #ifdef HAVE_LLVM
  83    llvm = "LLVM;";
  84 #endif
  85 #else
  86    build = "build: RELEASE;";
  87 #endif
  88
  89    util_snprintf(name, sizeof(name), "SVGA3D; %s %s %s", build, mutex, llvm);
  90    return name;
  91 }
  92
  93
  94
  95
  96 static float
  97 svga_get_paramf(struct pipe_screen *screen, enum pipe_capf param)
  98 {
  99    struct svga_screen *svgascreen = svga_screen(screen);
 100    struct svga_winsys_screen *sws = svgascreen->sws;
 101    SVGA3dDevCapResult result;
 102
 103    switch (param) {
 104    case PIPE_CAPF_MAX_LINE_WIDTH:
 105       /* fall-through */
 106    case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 107       return 7.0;
 108
 109    case PIPE_CAPF_MAX_POINT_WIDTH:
 110       /* fall-through */
 111    case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 112       return svgascreen->maxPointSize;
 113
 114    case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 115       if(!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_TEXTURE_ANISOTROPY, &result))
 116          return 4.0;
 117       return result.u;
 118
 119    case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 120       return 15.0;
 121
 122    default:
 123       debug_printf("Unexpected PIPE_CAPF_ query %u\n", param);
 124       return 0;
 125    }
 126 }
 127
 128
 129 static int
 130 svga_get_param(struct pipe_screen *screen, enum pipe_cap param)
 131 {
 132    struct svga_screen *svgascreen = svga_screen(screen);
 133    struct svga_winsys_screen *sws = svgascreen->sws;
 134    SVGA3dDevCapResult result;
 135
 136    switch (param) {
 137    case PIPE_CAP_MAX_COMBINED_SAMPLERS:
 138       return 16;
 139    case PIPE_CAP_NPOT_TEXTURES:
 140       return 1;
 141    case PIPE_CAP_TWO_SIDED_STENCIL:
 142       return 1;
 143    case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
 144       return 0;
 145    case PIPE_CAP_ANISOTROPIC_FILTER:
 146       return 1;
 147    case PIPE_CAP_POINT_SPRITE:
 148       return 1;
 149    case PIPE_CAP_MAX_RENDER_TARGETS:
 150       if(!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_RENDER_TARGETS, &result))
 151          return 1;
 152       if(!result.u)
 153          return 1;
 154       return MIN2(result.u, PIPE_MAX_COLOR_BUFS);
 155    case PIPE_CAP_OCCLUSION_QUERY:
 156       return 1;
 157    case PIPE_CAP_TIMER_QUERY:
 158       return 0;
 159    case PIPE_CAP_TEXTURE_SHADOW_MAP:
 160       return 1;
 161    case PIPE_CAP_TEXTURE_SWIZZLE:
 162       return 1;
 163    case PIPE_CAP_USER_VERTEX_BUFFERS:
 164    case PIPE_CAP_USER_INDEX_BUFFERS:
 165    case PIPE_CAP_USER_CONSTANT_BUFFERS:
 166       return 1;
 167    case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 168       return 16;
 169
 170    case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 171       {
 172          unsigned levels = SVGA_MAX_TEXTURE_LEVELS;
 173          if (sws->get_cap(sws, SVGA3D_DEVCAP_MAX_TEXTURE_WIDTH, &result))
 174             levels = MIN2(util_logbase2(result.u) + 1, levels);
 175          else
 176             levels = 12 /* 2048x2048 */;
 177          if (sws->get_cap(sws, SVGA3D_DEVCAP_MAX_TEXTURE_HEIGHT, &result))
 178             levels = MIN2(util_logbase2(result.u) + 1, levels);
 179          else
 180             levels = 12 /* 2048x2048 */;
 181          return levels;
 182       }
 183
 184    case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 185       if (!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_VOLUME_EXTENT, &result))
 186          return 8;  /* max 128x128x128 */
 187       return MIN2(util_logbase2(result.u) + 1, SVGA_MAX_TEXTURE_LEVELS);
 188
 189    case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 190       /*
 191        * No mechanism to query the host, and at least limited to 2048x2048 on
 192        * certain hardware.
 193        */
 194       return MIN2(screen->get_param(screen, PIPE_CAP_MAX_TEXTURE_2D_LEVELS),
 195                   12 /* 2048x2048 */);
 196
 197    case PIPE_CAP_BLEND_EQUATION_SEPARATE: /* req. for GL 1.5 */
 198       return 1;
 199
 200    case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 201    case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 202       return 1;
 203    case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 204    case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 205       return 0;
 206
 207    case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE:
 208       return 1;
 209
 210    case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
 211       return 1; /* The color outputs of vertex shaders are not clamped */
 212    case PIPE_CAP_VERTEX_COLOR_CLAMPED:
 213       return 0; /* The driver can't clamp vertex colors */
 214    case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
 215       return 0; /* The driver can't clamp fragment colors */
 216
 217    /* Unsupported features */
 218    case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 219    case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
 220    case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 221    case PIPE_CAP_SM3:
 222    case PIPE_CAP_SHADER_STENCIL_EXPORT:
 223    case PIPE_CAP_DEPTH_CLIP_DISABLE:
 224    case PIPE_CAP_SEAMLESS_CUBE_MAP:
 225    case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 226    case PIPE_CAP_INDEP_BLEND_ENABLE:
 227    case PIPE_CAP_INDEP_BLEND_FUNC:
 228    case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 229    case PIPE_CAP_PRIMITIVE_RESTART:
 230    case PIPE_CAP_TGSI_INSTANCEID:
 231    case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 232    case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 233    case PIPE_CAP_MIN_TEXEL_OFFSET:
 234    case PIPE_CAP_MAX_TEXEL_OFFSET:
 235    case PIPE_CAP_CONDITIONAL_RENDER:
 236    case PIPE_CAP_TEXTURE_BARRIER:
 237    case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 238    case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 239    case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
 240    case PIPE_CAP_TGSI_CAN_COMPACT_VARYINGS:
 241    case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
 242    case PIPE_CAP_GLSL_FEATURE_LEVEL:
 243       return 0;
 244
 245    default:
 246       debug_printf("Unexpected PIPE_CAP_ query %u\n", param);
 247       return 0;
 248    }
 249 }
 250
 251 static int svga_get_shader_param(struct pipe_screen *screen, unsigned shader, enum pipe_shader_cap param)
 252 {
 253    struct svga_screen *svgascreen = svga_screen(screen);
 254    struct svga_winsys_screen *sws = svgascreen->sws;
 255    SVGA3dDevCapResult result;
 256
 257    switch (shader)
 258    {
 259    case PIPE_SHADER_FRAGMENT:
 260       switch (param)
 261       {
 262       case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 263       case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 264       case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 265       case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 266          return 512;
 267       case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 268          return SVGA3D_MAX_NESTING_LEVEL;
 269       case PIPE_SHADER_CAP_MAX_INPUTS:
 270          return 10;
 271       case PIPE_SHADER_CAP_MAX_CONSTS:
 272          return 224;
 273       case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 274          return 1;
 275       case PIPE_SHADER_CAP_MAX_TEMPS:
 276          if (!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_TEMPS, &result))
 277             return 32;
 278          return MIN2(result.u, SVGA3D_TEMPREG_MAX);
 279       case PIPE_SHADER_CAP_MAX_ADDRS:
 280       case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 281          /*
 282           * Although PS 3.0 has some addressing abilities it can only represent
 283           * loops that can be statically determined and unrolled. Given we can
 284           * only handle a subset of the cases that the state tracker already
 285           * does it is better to defer loop unrolling to the state tracker.
 286           */
 287          return 0;
 288       case PIPE_SHADER_CAP_MAX_PREDS:
 289          return 1;
 290       case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 291          return 1;
 292       case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 293       case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 294       case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 295          return 0;
 296       case PIPE_SHADER_CAP_SUBROUTINES:
 297          return 0;
 298       case PIPE_SHADER_CAP_INTEGERS:
 299          return 0;
 300       case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 301          return 16;
 302       default:
 303          debug_printf("Unexpected vertex shader query %u\n", param);
 304          return 0;
 305       }
 306       break;
 307    case PIPE_SHADER_VERTEX:
 308       switch (param)
 309       {
 310       case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 311       case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 312          if (!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_VERTEX_SHADER_INSTRUCTIONS, &result))
 313             return 512;
 314          return result.u;
 315       case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 316       case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 317          /* XXX: until we have vertex texture support */
 318          return 0;
 319       case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 320          return SVGA3D_MAX_NESTING_LEVEL;
 321       case PIPE_SHADER_CAP_MAX_INPUTS:
 322          return 16;
 323       case PIPE_SHADER_CAP_MAX_CONSTS:
 324          return 256;
 325       case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 326          return 1;
 327       case PIPE_SHADER_CAP_MAX_TEMPS:
 328          if (!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEMPS, &result))
 329             return 32;
 330          return MIN2(result.u, SVGA3D_TEMPREG_MAX);
 331       case PIPE_SHADER_CAP_MAX_ADDRS:
 332          return 1;
 333       case PIPE_SHADER_CAP_MAX_PREDS:
 334          return 1;
 335       case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 336          return 1;
 337       case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 338       case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 339          return 1;
 340       case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 341          return 0;
 342       case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 343          return 1;
 344       case PIPE_SHADER_CAP_SUBROUTINES:
 345          return 0;
 346       case PIPE_SHADER_CAP_INTEGERS:
 347          return 0;
 348       case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 349          return 0;
 350       default:
 351          debug_printf("Unexpected vertex shader query %u\n", param);
 352          return 0;
 353       }
 354       break;
 355    case PIPE_SHADER_GEOMETRY:
 356       /* no support for geometry shaders at this time */
 357       return 0;
 358    default:
 359       debug_printf("Unexpected vertex shader query %u\n", param);
 360       return 0;
 361    }
 362    return 0;
 363 }
 364
 365
 366 static boolean
 367 svga_is_format_supported( struct pipe_screen *screen,
 368                           enum pipe_format format,
 369                           enum pipe_texture_target target,
 370                           unsigned sample_count,
 371                           unsigned tex_usage)
 372 {
 373    struct svga_screen *ss = svga_screen(screen);
 374    SVGA3dSurfaceFormat svga_format;
 375    SVGA3dSurfaceFormatCaps caps;
 376    SVGA3dSurfaceFormatCaps mask;
 377
 378    assert(tex_usage);
 379
 380    if (sample_count > 1) {
 381       return FALSE;
 382    }
 383
 384    svga_format = svga_translate_format(ss, format, tex_usage);
 385    if (svga_format == SVGA3D_FORMAT_INVALID) {
 386       return FALSE;
 387    }
 388
 389    /*
 390     * Override host capabilities, so that we end up with the same
 391     * visuals for all virtual hardware implementations.
 392     */
 393
 394    if (tex_usage & PIPE_BIND_DISPLAY_TARGET) {
 395       switch (svga_format) {
 396       case SVGA3D_A8R8G8B8:
 397       case SVGA3D_X8R8G8B8:
 398       case SVGA3D_R5G6B5:
 399          break;
 400
 401       /* Often unsupported/problematic. This means we end up with the same
 402        * visuals for all virtual hardware implementations.
 403        */
 404       case SVGA3D_A4R4G4B4:
 405       case SVGA3D_A1R5G5B5:
 406          return FALSE;
 407
 408       default:
 409          return FALSE;
 410       }
 411    }
 412
 413    /*
 414     * Query the host capabilities.
 415     */
 416
 417    svga_get_format_cap(ss, svga_format, &caps);
 418
 419    mask.value = 0;
 420    if (tex_usage & PIPE_BIND_RENDER_TARGET) {
 421       mask.offscreenRenderTarget = 1;
 422    }
 423    if (tex_usage & PIPE_BIND_DEPTH_STENCIL) {
 424       mask.zStencil = 1;
 425    }
 426    if (tex_usage & PIPE_BIND_SAMPLER_VIEW) {
 427       mask.texture = 1;
 428    }
 429
 430    return (caps.value & mask.value) == mask.value;
 431 }
 432
 433
 434 static void
 435 svga_fence_reference(struct pipe_screen *screen,
 436                      struct pipe_fence_handle **ptr,
 437                      struct pipe_fence_handle *fence)
 438 {
 439    struct svga_winsys_screen *sws = svga_screen(screen)->sws;
 440    sws->fence_reference(sws, ptr, fence);
 441 }
 442
 443
 444 static boolean
 445 svga_fence_signalled(struct pipe_screen *screen,
 446                      struct pipe_fence_handle *fence)
 447 {
 448    struct svga_winsys_screen *sws = svga_screen(screen)->sws;
 449    return sws->fence_signalled(sws, fence, 0) == 0;
 450 }
 451
 452
 453 static boolean
 454 svga_fence_finish(struct pipe_screen *screen,
 455                   struct pipe_fence_handle *fence,
 456                   uint64_t timeout)
 457 {
 458    struct svga_winsys_screen *sws = svga_screen(screen)->sws;
 459
 460    SVGA_DBG(DEBUG_DMA|DEBUG_PERF, "%s fence_ptr %p\n",
 461             __FUNCTION__, fence);
 462
 463    return sws->fence_finish(sws, fence, 0) == 0;
 464 }
 465
 466
 467 static void
 468 svga_destroy_screen( struct pipe_screen *screen )
 469 {
 470    struct svga_screen *svgascreen = svga_screen(screen);
 471
 472    svga_screen_cache_cleanup(svgascreen);
 473
 474    pipe_mutex_destroy(svgascreen->swc_mutex);
 475    pipe_mutex_destroy(svgascreen->tex_mutex);
 476
 477    svgascreen->sws->destroy(svgascreen->sws);
 478
 479    FREE(svgascreen);
 480 }
 481
 482
 483 /**
 484  * Create a new svga_screen object
 485  */
 486 struct pipe_screen *
 487 svga_screen_create(struct svga_winsys_screen *sws)
 488 {
 489    struct svga_screen *svgascreen;
 490    struct pipe_screen *screen;
 491    SVGA3dDevCapResult result;
 492    boolean use_vs30, use_ps30;
 493
 494 #ifdef DEBUG
 495    SVGA_DEBUG = debug_get_flags_option("SVGA_DEBUG", svga_debug_flags, 0 );
 496 #endif
 497
 498    svgascreen = CALLOC_STRUCT(svga_screen);
 499    if (!svgascreen)
 500       goto error1;
 501
 502    svgascreen->debug.force_level_surface_view =
 503       debug_get_bool_option("SVGA_FORCE_LEVEL_SURFACE_VIEW", FALSE);
 504    svgascreen->debug.force_surface_view =
 505       debug_get_bool_option("SVGA_FORCE_SURFACE_VIEW", FALSE);
 506    svgascreen->debug.force_sampler_view =
 507       debug_get_bool_option("SVGA_FORCE_SAMPLER_VIEW", FALSE);
 508    svgascreen->debug.no_surface_view =
 509       debug_get_bool_option("SVGA_NO_SURFACE_VIEW", FALSE);
 510    svgascreen->debug.no_sampler_view =
 511       debug_get_bool_option("SVGA_NO_SAMPLER_VIEW", FALSE);
 512
 513    screen = &svgascreen->screen;
 514
 515    screen->destroy = svga_destroy_screen;
 516    screen->get_name = svga_get_name;
 517    screen->get_vendor = svga_get_vendor;
 518    screen->get_param = svga_get_param;
 519    screen->get_shader_param = svga_get_shader_param;
 520    screen->get_paramf = svga_get_paramf;
 521    screen->is_format_supported = svga_is_format_supported;
 522    screen->context_create = svga_context_create;
 523    screen->fence_reference = svga_fence_reference;
 524    screen->fence_signalled = svga_fence_signalled;
 525    screen->fence_finish = svga_fence_finish;
 526    svgascreen->sws = sws;
 527
 528    svga_init_screen_resource_functions(svgascreen);
 529
 530    if (sws->get_hw_version) {
 531       svgascreen->hw_version = sws->get_hw_version(sws);
 532    } else {
 533       svgascreen->hw_version = SVGA3D_HWVERSION_WS65_B1;
 534    }
 535
 536    use_ps30 =
 537       sws->get_cap(sws, SVGA3D_DEVCAP_FRAGMENT_SHADER_VERSION, &result) &&
 538       result.u >= SVGA3DPSVERSION_30 ? TRUE : FALSE;
 539
 540    use_vs30 =
 541       sws->get_cap(sws, SVGA3D_DEVCAP_VERTEX_SHADER_VERSION, &result) &&
 542       result.u >= SVGA3DVSVERSION_30 ? TRUE : FALSE;
 543
 544    /* we require Shader model 3.0 or later */
 545    if (!use_ps30 || !use_vs30)
 546       goto error2;
 547
 548    /*
 549     * The D16, D24X8, and D24S8 formats always do an implicit shadow compare
 550     * when sampled from, where as the DF16, DF24, and D24S8_INT do not.  So
 551     * we prefer the later when available.
 552     *
 553     * This mimics hardware vendors extensions for D3D depth sampling. See also
 554     * http://aras-p.info/texts/D3D9GPUHacks.html
 555     */
 556
 557    {
 558       boolean has_df16, has_df24, has_d24s8_int;
 559       SVGA3dSurfaceFormatCaps caps;
 560       SVGA3dSurfaceFormatCaps mask;
 561       mask.value = 0;
 562       mask.zStencil = 1;
 563       mask.texture = 1;
 564
 565       svgascreen->depth.z16 = SVGA3D_Z_D16;
 566       svgascreen->depth.x8z24 = SVGA3D_Z_D24X8;
 567       svgascreen->depth.s8z24 = SVGA3D_Z_D24S8;
 568
 569       svga_get_format_cap(svgascreen, SVGA3D_Z_DF16, &caps);
 570       has_df16 = (caps.value & mask.value) == mask.value;
 571
 572       svga_get_format_cap(svgascreen, SVGA3D_Z_DF24, &caps);
 573       has_df24 = (caps.value & mask.value) == mask.value;
 574
 575       svga_get_format_cap(svgascreen, SVGA3D_Z_D24S8_INT, &caps);
 576       has_d24s8_int = (caps.value & mask.value) == mask.value;
 577
 578       /* XXX: We might want some other logic here.
 579        * Like if we only have d24s8_int we should
 580        * emulate the other formats with that.
 581        */
 582       if (has_df16) {
 583          svgascreen->depth.z16 = SVGA3D_Z_DF16;
 584       }
 585       if (has_df24) {
 586          svgascreen->depth.x8z24 = SVGA3D_Z_DF24;
 587       }
 588       if (has_d24s8_int) {
 589          svgascreen->depth.s8z24 = SVGA3D_Z_D24S8_INT;
 590       }
 591    }
 592
 593    if (!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_POINT_SIZE, &result)) {
 594       svgascreen->maxPointSize = 1.0F;
 595    } else {
 596       /* Keep this to a reasonable size to avoid failures in
 597        * conform/pntaa.c:
 598        */
 599       svgascreen->maxPointSize = MIN2(result.f, 80.0f);
 600    }
 601
 602    pipe_mutex_init(svgascreen->tex_mutex);
 603    pipe_mutex_init(svgascreen->swc_mutex);
 604
 605    svga_screen_cache_init(svgascreen);
 606
 607    return screen;
 608 error2:
 609    FREE(svgascreen);
 610 error1:
 611    return NULL;
 612 }
 613
 614 struct svga_winsys_screen *
 615 svga_winsys_screen(struct pipe_screen *screen)
 616 {
 617    return svga_screen(screen)->sws;
 618 }
 619
 620 #ifdef DEBUG
 621 struct svga_screen *
 622 svga_screen(struct pipe_screen *screen)
 623 {
 624    assert(screen);
 625    assert(screen->destroy == svga_destroy_screen);
 626    return (struct svga_screen *)screen;
 627 }
 628 #endif