src/gallium/drivers/svga/svga_screen.c

   1 /**********************************************************
   2  * Copyright 2008-2009 VMware, Inc.  All rights reserved.
   3  *
   4  * Permission is hereby granted, free of charge, to any person
   5  * obtaining a copy of this software and associated documentation
   6  * files (the "Software"), to deal in the Software without
   7  * restriction, including without limitation the rights to use, copy,
   8  * modify, merge, publish, distribute, sublicense, and/or sell copies
   9  * of the Software, and to permit persons to whom the Software is
  10  * furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be
  13  * included in all copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  16  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  17  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  18  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  19  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  20  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  21  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  22  * SOFTWARE.
  23  *
  24  **********************************************************/
  25
  26 #include "util/u_format.h"
  27 #include "util/u_memory.h"
  28 #include "util/u_inlines.h"
  29 #include "util/u_string.h"
  30 #include "util/u_math.h"
  31
  32 #include "svga_winsys.h"
  33 #include "svga_public.h"
  34 #include "svga_context.h"
  35 #include "svga_format.h"
  36 #include "svga_screen.h"
  37 #include "svga_resource_texture.h"
  38 #include "svga_resource.h"
  39 #include "svga_debug.h"
  40
  41 #include "svga3d_shaderdefs.h"
  42
  43
  44 #ifdef DEBUG
  45 int SVGA_DEBUG = 0;
  46
  47 static const struct debug_named_value svga_debug_flags[] = {
  48    { "dma",      DEBUG_DMA, NULL },
  49    { "tgsi",     DEBUG_TGSI, NULL },
  50    { "pipe",     DEBUG_PIPE, NULL },
  51    { "state",    DEBUG_STATE, NULL },
  52    { "screen",   DEBUG_SCREEN, NULL },
  53    { "tex",      DEBUG_TEX, NULL },
  54    { "swtnl",    DEBUG_SWTNL, NULL },
  55    { "const",    DEBUG_CONSTS, NULL },
  56    { "viewport", DEBUG_VIEWPORT, NULL },
  57    { "views",    DEBUG_VIEWS, NULL },
  58    { "perf",     DEBUG_PERF, NULL },
  59    { "flush",    DEBUG_FLUSH, NULL },
  60    { "sync",     DEBUG_SYNC, NULL },
  61    { "cache",    DEBUG_CACHE, NULL },
  62    DEBUG_NAMED_VALUE_END
  63 };
  64 #endif
  65
  66 static const char *
  67 svga_get_vendor( struct pipe_screen *pscreen )
  68 {
  69    return "VMware, Inc.";
  70 }
  71
  72
  73 static const char *
  74 svga_get_name( struct pipe_screen *pscreen )
  75 {
  76    const char *build = "", *llvm = "", *mutex = "";
  77    static char name[100];
  78 #ifdef DEBUG
  79    /* Only return internal details in the DEBUG version:
  80     */
  81    build = "build: DEBUG;";
  82    mutex = "mutex: " PIPE_ATOMIC ";";
  83 #ifdef HAVE_LLVM
  84    llvm = "LLVM;";
  85 #endif
  86 #else
  87    build = "build: RELEASE;";
  88 #endif
  89
  90    util_snprintf(name, sizeof(name), "SVGA3D; %s %s %s", build, mutex, llvm);
  91    return name;
  92 }
  93
  94
  95
  96
  97 static float
  98 svga_get_paramf(struct pipe_screen *screen, enum pipe_capf param)
  99 {
 100    struct svga_screen *svgascreen = svga_screen(screen);
 101    struct svga_winsys_screen *sws = svgascreen->sws;
 102    SVGA3dDevCapResult result;
 103
 104    switch (param) {
 105    case PIPE_CAPF_MAX_LINE_WIDTH:
 106       /* fall-through */
 107    case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 108       return 7.0;
 109
 110    case PIPE_CAPF_MAX_POINT_WIDTH:
 111       /* fall-through */
 112    case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 113       return svgascreen->maxPointSize;
 114
 115    case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 116       if(!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_TEXTURE_ANISOTROPY, &result))
 117          return 4.0f;
 118       return (float) result.u;
 119
 120    case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 121       return 15.0;
 122    case PIPE_CAPF_GUARD_BAND_LEFT:
 123    case PIPE_CAPF_GUARD_BAND_TOP:
 124    case PIPE_CAPF_GUARD_BAND_RIGHT:
 125    case PIPE_CAPF_GUARD_BAND_BOTTOM:
 126       return 0.0;
 127    }
 128
 129    debug_printf("Unexpected PIPE_CAPF_ query %u\n", param);
 130    return 0;
 131 }
 132
 133
 134 static int
 135 svga_get_param(struct pipe_screen *screen, enum pipe_cap param)
 136 {
 137    struct svga_screen *svgascreen = svga_screen(screen);
 138    struct svga_winsys_screen *sws = svgascreen->sws;
 139    SVGA3dDevCapResult result;
 140
 141    switch (param) {
 142    case PIPE_CAP_MAX_COMBINED_SAMPLERS:
 143       return 16;
 144    case PIPE_CAP_NPOT_TEXTURES:
 145    case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
 146       return 1;
 147    case PIPE_CAP_TWO_SIDED_STENCIL:
 148       return 1;
 149    case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
 150       return 0;
 151    case PIPE_CAP_ANISOTROPIC_FILTER:
 152       return 1;
 153    case PIPE_CAP_POINT_SPRITE:
 154       return 1;
 155    case PIPE_CAP_TGSI_TEXCOORD:
 156       return 0;
 157    case PIPE_CAP_MAX_RENDER_TARGETS:
 158       return svgascreen->max_color_buffers;
 159    case PIPE_CAP_OCCLUSION_QUERY:
 160       return 1;
 161    case PIPE_CAP_QUERY_TIME_ELAPSED:
 162       return 0;
 163    case PIPE_CAP_TEXTURE_SHADOW_MAP:
 164       return 1;
 165    case PIPE_CAP_TEXTURE_SWIZZLE:
 166       return 1;
 167    case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
 168       return 0;
 169    case PIPE_CAP_USER_VERTEX_BUFFERS:
 170    case PIPE_CAP_USER_INDEX_BUFFERS:
 171       return 0;
 172    case PIPE_CAP_USER_CONSTANT_BUFFERS:
 173       return 1;
 174    case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 175       return 16;
 176
 177    case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 178       {
 179          unsigned levels = SVGA_MAX_TEXTURE_LEVELS;
 180          if (sws->get_cap(sws, SVGA3D_DEVCAP_MAX_TEXTURE_WIDTH, &result))
 181             levels = MIN2(util_logbase2(result.u) + 1, levels);
 182          else
 183             levels = 12 /* 2048x2048 */;
 184          if (sws->get_cap(sws, SVGA3D_DEVCAP_MAX_TEXTURE_HEIGHT, &result))
 185             levels = MIN2(util_logbase2(result.u) + 1, levels);
 186          else
 187             levels = 12 /* 2048x2048 */;
 188          return levels;
 189       }
 190
 191    case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 192       if (!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_VOLUME_EXTENT, &result))
 193          return 8;  /* max 128x128x128 */
 194       return MIN2(util_logbase2(result.u) + 1, SVGA_MAX_TEXTURE_LEVELS);
 195
 196    case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 197       /*
 198        * No mechanism to query the host, and at least limited to 2048x2048 on
 199        * certain hardware.
 200        */
 201       return MIN2(screen->get_param(screen, PIPE_CAP_MAX_TEXTURE_2D_LEVELS),
 202                   12 /* 2048x2048 */);
 203
 204    case PIPE_CAP_BLEND_EQUATION_SEPARATE: /* req. for GL 1.5 */
 205       return 1;
 206
 207    case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 208       return 1;
 209    case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 210       return 0;
 211    case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 212       return 0;
 213    case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 214       return 1;
 215
 216    case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
 217       return 1; /* The color outputs of vertex shaders are not clamped */
 218    case PIPE_CAP_VERTEX_COLOR_CLAMPED:
 219       return 0; /* The driver can't clamp vertex colors */
 220    case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
 221       return 0; /* The driver can't clamp fragment colors */
 222
 223    case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 224       return 1; /* expected for GL_ARB_framebuffer_object */
 225
 226    case PIPE_CAP_GLSL_FEATURE_LEVEL:
 227       return 120;
 228
 229    case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 230       return 0;
 231
 232    case PIPE_CAP_SM3:
 233       return 1;
 234
 235    /* Unsupported features */
 236    case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
 237    case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 238    case PIPE_CAP_SHADER_STENCIL_EXPORT:
 239    case PIPE_CAP_DEPTH_CLIP_DISABLE:
 240    case PIPE_CAP_SEAMLESS_CUBE_MAP:
 241    case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 242    case PIPE_CAP_INDEP_BLEND_ENABLE:
 243    case PIPE_CAP_INDEP_BLEND_FUNC:
 244    case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 245    case PIPE_CAP_PRIMITIVE_RESTART:
 246    case PIPE_CAP_TGSI_INSTANCEID:
 247    case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 248    case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 249    case PIPE_CAP_SCALED_RESOLVE:
 250    case PIPE_CAP_MIN_TEXEL_OFFSET:
 251    case PIPE_CAP_MAX_TEXEL_OFFSET:
 252    case PIPE_CAP_CONDITIONAL_RENDER:
 253    case PIPE_CAP_TEXTURE_BARRIER:
 254    case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 255    case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 256    case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
 257    case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
 258    case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
 259    case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
 260    case PIPE_CAP_COMPUTE:
 261    case PIPE_CAP_START_INSTANCE:
 262    case PIPE_CAP_QUERY_TIMESTAMP:
 263    case PIPE_CAP_TEXTURE_MULTISAMPLE:
 264    case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
 265    case PIPE_CAP_CUBE_MAP_ARRAY:
 266    case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 267    case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
 268    case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 269    case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
 270       return 0;
 271    case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
 272       return 1;
 273    case PIPE_CAP_MAX_VIEWPORTS:
 274       return 1;
 275    case PIPE_CAP_ENDIANNESS:
 276       return PIPE_ENDIAN_LITTLE;
 277    }
 278
 279    debug_printf("Unexpected PIPE_CAP_ query %u\n", param);
 280    return 0;
 281 }
 282
 283 static int svga_get_shader_param(struct pipe_screen *screen, unsigned shader, enum pipe_shader_cap param)
 284 {
 285    struct svga_screen *svgascreen = svga_screen(screen);
 286    struct svga_winsys_screen *sws = svgascreen->sws;
 287    SVGA3dDevCapResult result;
 288
 289    switch (shader)
 290    {
 291    case PIPE_SHADER_FRAGMENT:
 292       switch (param)
 293       {
 294       case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 295       case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 296       case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 297       case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 298          return 512;
 299       case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 300          return SVGA3D_MAX_NESTING_LEVEL;
 301       case PIPE_SHADER_CAP_MAX_INPUTS:
 302          return 10;
 303       case PIPE_SHADER_CAP_MAX_CONSTS:
 304          return 224;
 305       case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 306          return 1;
 307       case PIPE_SHADER_CAP_MAX_TEMPS:
 308          if (!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_TEMPS, &result))
 309             return 32;
 310          return MIN2(result.u, SVGA3D_TEMPREG_MAX);
 311       case PIPE_SHADER_CAP_MAX_ADDRS:
 312       case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 313          /*
 314           * Although PS 3.0 has some addressing abilities it can only represent
 315           * loops that can be statically determined and unrolled. Given we can
 316           * only handle a subset of the cases that the state tracker already
 317           * does it is better to defer loop unrolling to the state tracker.
 318           */
 319          return 0;
 320       case PIPE_SHADER_CAP_MAX_PREDS:
 321          return 1;
 322       case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 323          return 0;
 324       case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 325          return 0;
 326       case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 327       case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 328       case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 329          return 0;
 330       case PIPE_SHADER_CAP_SUBROUTINES:
 331          return 0;
 332       case PIPE_SHADER_CAP_INTEGERS:
 333          return 0;
 334       case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 335          return 16;
 336       default:
 337          debug_printf("Unexpected fragment shader query %u\n", param);
 338          return 0;
 339       }
 340       break;
 341    case PIPE_SHADER_VERTEX:
 342       switch (param)
 343       {
 344       case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 345       case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 346          if (!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_VERTEX_SHADER_INSTRUCTIONS, &result))
 347             return 512;
 348          return result.u;
 349       case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 350       case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 351          /* XXX: until we have vertex texture support */
 352          return 0;
 353       case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 354          return SVGA3D_MAX_NESTING_LEVEL;
 355       case PIPE_SHADER_CAP_MAX_INPUTS:
 356          return 16;
 357       case PIPE_SHADER_CAP_MAX_CONSTS:
 358          return 256;
 359       case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 360          return 1;
 361       case PIPE_SHADER_CAP_MAX_TEMPS:
 362          if (!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEMPS, &result))
 363             return 32;
 364          return MIN2(result.u, SVGA3D_TEMPREG_MAX);
 365       case PIPE_SHADER_CAP_MAX_ADDRS:
 366          return 1;
 367       case PIPE_SHADER_CAP_MAX_PREDS:
 368          return 1;
 369       case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 370          return 0;
 371       case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 372          return 0;
 373       case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 374       case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 375          return 1;
 376       case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 377          return 0;
 378       case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 379          return 1;
 380       case PIPE_SHADER_CAP_SUBROUTINES:
 381          return 0;
 382       case PIPE_SHADER_CAP_INTEGERS:
 383          return 0;
 384       case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 385          return 0;
 386       default:
 387          debug_printf("Unexpected vertex shader query %u\n", param);
 388          return 0;
 389       }
 390       break;
 391    case PIPE_SHADER_GEOMETRY:
 392    case PIPE_SHADER_COMPUTE:
 393       /* no support for geometry or compute shaders at this time */
 394       return 0;
 395    default:
 396       debug_printf("Unexpected shader type (%u) query\n", shader);
 397       return 0;
 398    }
 399    return 0;
 400 }
 401
 402
 403 static boolean
 404 svga_is_format_supported( struct pipe_screen *screen,
 405                           enum pipe_format format,
 406                           enum pipe_texture_target target,
 407                           unsigned sample_count,
 408                           unsigned tex_usage)
 409 {
 410    struct svga_screen *ss = svga_screen(screen);
 411    SVGA3dSurfaceFormat svga_format;
 412    SVGA3dSurfaceFormatCaps caps;
 413    SVGA3dSurfaceFormatCaps mask;
 414
 415    assert(tex_usage);
 416
 417    if (sample_count > 1) {
 418       return FALSE;
 419    }
 420
 421    svga_format = svga_translate_format(ss, format, tex_usage);
 422    if (svga_format == SVGA3D_FORMAT_INVALID) {
 423       return FALSE;
 424    }
 425
 426    /*
 427     * Override host capabilities, so that we end up with the same
 428     * visuals for all virtual hardware implementations.
 429     */
 430
 431    if (tex_usage & PIPE_BIND_DISPLAY_TARGET) {
 432       switch (svga_format) {
 433       case SVGA3D_A8R8G8B8:
 434       case SVGA3D_X8R8G8B8:
 435       case SVGA3D_R5G6B5:
 436          break;
 437
 438       /* Often unsupported/problematic. This means we end up with the same
 439        * visuals for all virtual hardware implementations.
 440        */
 441       case SVGA3D_A4R4G4B4:
 442       case SVGA3D_A1R5G5B5:
 443          return FALSE;
 444
 445       default:
 446          return FALSE;
 447       }
 448    }
 449
 450    if (target == PIPE_TEXTURE_3D && util_format_is_compressed(format)) {
 451       /* we don't support compressed 3D textures at this time */
 452       return FALSE;
 453    }
 454
 455    /*
 456     * Query the host capabilities.
 457     */
 458
 459    svga_get_format_cap(ss, svga_format, &caps);
 460
 461    mask.value = 0;
 462    if (tex_usage & PIPE_BIND_RENDER_TARGET) {
 463       mask.offscreenRenderTarget = 1;
 464    }
 465    if (tex_usage & PIPE_BIND_DEPTH_STENCIL) {
 466       mask.zStencil = 1;
 467    }
 468    if (tex_usage & PIPE_BIND_SAMPLER_VIEW) {
 469       mask.texture = 1;
 470    }
 471
 472    return (caps.value & mask.value) == mask.value;
 473 }
 474
 475
 476 static void
 477 svga_fence_reference(struct pipe_screen *screen,
 478                      struct pipe_fence_handle **ptr,
 479                      struct pipe_fence_handle *fence)
 480 {
 481    struct svga_winsys_screen *sws = svga_screen(screen)->sws;
 482    sws->fence_reference(sws, ptr, fence);
 483 }
 484
 485
 486 static boolean
 487 svga_fence_signalled(struct pipe_screen *screen,
 488                      struct pipe_fence_handle *fence)
 489 {
 490    struct svga_winsys_screen *sws = svga_screen(screen)->sws;
 491    return sws->fence_signalled(sws, fence, 0) == 0;
 492 }
 493
 494
 495 static boolean
 496 svga_fence_finish(struct pipe_screen *screen,
 497                   struct pipe_fence_handle *fence,
 498                   uint64_t timeout)
 499 {
 500    struct svga_winsys_screen *sws = svga_screen(screen)->sws;
 501
 502    SVGA_DBG(DEBUG_DMA|DEBUG_PERF, "%s fence_ptr %p\n",
 503             __FUNCTION__, fence);
 504
 505    return sws->fence_finish(sws, fence, 0) == 0;
 506 }
 507
 508
 509 static int
 510 svga_get_driver_query_info(struct pipe_screen *screen,
 511                            unsigned index,
 512                            struct pipe_driver_query_info *info)
 513 {
 514    static const struct pipe_driver_query_info queries[] = {
 515       {"draw-calls", SVGA_QUERY_DRAW_CALLS, 0, FALSE},
 516       {"fallbacks", SVGA_QUERY_FALLBACKS, 0, FALSE},
 517       {"memory-used", SVGA_QUERY_MEMORY_USED, 0, TRUE}
 518    };
 519
 520    if (!info)
 521       return Elements(queries);
 522
 523    if (index >= Elements(queries))
 524       return 0;
 525
 526    *info = queries[index];
 527    return 1;
 528 }
 529
 530
 531 static void
 532 svga_destroy_screen( struct pipe_screen *screen )
 533 {
 534    struct svga_screen *svgascreen = svga_screen(screen);
 535
 536    svga_screen_cache_cleanup(svgascreen);
 537
 538    pipe_mutex_destroy(svgascreen->swc_mutex);
 539    pipe_mutex_destroy(svgascreen->tex_mutex);
 540
 541    svgascreen->sws->destroy(svgascreen->sws);
 542
 543    FREE(svgascreen);
 544 }
 545
 546
 547 /**
 548  * Create a new svga_screen object
 549  */
 550 struct pipe_screen *
 551 svga_screen_create(struct svga_winsys_screen *sws)
 552 {
 553    struct svga_screen *svgascreen;
 554    struct pipe_screen *screen;
 555    SVGA3dDevCapResult result;
 556    boolean use_vs30, use_ps30;
 557
 558 #ifdef DEBUG
 559    SVGA_DEBUG = debug_get_flags_option("SVGA_DEBUG", svga_debug_flags, 0 );
 560 #endif
 561
 562    svgascreen = CALLOC_STRUCT(svga_screen);
 563    if (!svgascreen)
 564       goto error1;
 565
 566    svgascreen->debug.force_level_surface_view =
 567       debug_get_bool_option("SVGA_FORCE_LEVEL_SURFACE_VIEW", FALSE);
 568    svgascreen->debug.force_surface_view =
 569       debug_get_bool_option("SVGA_FORCE_SURFACE_VIEW", FALSE);
 570    svgascreen->debug.force_sampler_view =
 571       debug_get_bool_option("SVGA_FORCE_SAMPLER_VIEW", FALSE);
 572    svgascreen->debug.no_surface_view =
 573       debug_get_bool_option("SVGA_NO_SURFACE_VIEW", FALSE);
 574    svgascreen->debug.no_sampler_view =
 575       debug_get_bool_option("SVGA_NO_SAMPLER_VIEW", FALSE);
 576
 577    screen = &svgascreen->screen;
 578
 579    screen->destroy = svga_destroy_screen;
 580    screen->get_name = svga_get_name;
 581    screen->get_vendor = svga_get_vendor;
 582    screen->get_param = svga_get_param;
 583    screen->get_shader_param = svga_get_shader_param;
 584    screen->get_paramf = svga_get_paramf;
 585    screen->is_format_supported = svga_is_format_supported;
 586    screen->context_create = svga_context_create;
 587    screen->fence_reference = svga_fence_reference;
 588    screen->fence_signalled = svga_fence_signalled;
 589    screen->fence_finish = svga_fence_finish;
 590    screen->get_driver_query_info = svga_get_driver_query_info;
 591    svgascreen->sws = sws;
 592
 593    svga_init_screen_resource_functions(svgascreen);
 594
 595    if (sws->get_hw_version) {
 596       svgascreen->hw_version = sws->get_hw_version(sws);
 597    } else {
 598       svgascreen->hw_version = SVGA3D_HWVERSION_WS65_B1;
 599    }
 600
 601    use_ps30 =
 602       sws->get_cap(sws, SVGA3D_DEVCAP_FRAGMENT_SHADER_VERSION, &result) &&
 603       result.u >= SVGA3DPSVERSION_30 ? TRUE : FALSE;
 604
 605    use_vs30 =
 606       sws->get_cap(sws, SVGA3D_DEVCAP_VERTEX_SHADER_VERSION, &result) &&
 607       result.u >= SVGA3DVSVERSION_30 ? TRUE : FALSE;
 608
 609    /* we require Shader model 3.0 or later */
 610    if (!use_ps30 || !use_vs30)
 611       goto error2;
 612
 613    /*
 614     * The D16, D24X8, and D24S8 formats always do an implicit shadow compare
 615     * when sampled from, where as the DF16, DF24, and D24S8_INT do not.  So
 616     * we prefer the later when available.
 617     *
 618     * This mimics hardware vendors extensions for D3D depth sampling. See also
 619     * http://aras-p.info/texts/D3D9GPUHacks.html
 620     */
 621
 622    {
 623       boolean has_df16, has_df24, has_d24s8_int;
 624       SVGA3dSurfaceFormatCaps caps;
 625       SVGA3dSurfaceFormatCaps mask;
 626       mask.value = 0;
 627       mask.zStencil = 1;
 628       mask.texture = 1;
 629
 630       svgascreen->depth.z16 = SVGA3D_Z_D16;
 631       svgascreen->depth.x8z24 = SVGA3D_Z_D24X8;
 632       svgascreen->depth.s8z24 = SVGA3D_Z_D24S8;
 633
 634       svga_get_format_cap(svgascreen, SVGA3D_Z_DF16, &caps);
 635       has_df16 = (caps.value & mask.value) == mask.value;
 636
 637       svga_get_format_cap(svgascreen, SVGA3D_Z_DF24, &caps);
 638       has_df24 = (caps.value & mask.value) == mask.value;
 639
 640       svga_get_format_cap(svgascreen, SVGA3D_Z_D24S8_INT, &caps);
 641       has_d24s8_int = (caps.value & mask.value) == mask.value;
 642
 643       /* XXX: We might want some other logic here.
 644        * Like if we only have d24s8_int we should
 645        * emulate the other formats with that.
 646        */
 647       if (has_df16) {
 648          svgascreen->depth.z16 = SVGA3D_Z_DF16;
 649       }
 650       if (has_df24) {
 651          svgascreen->depth.x8z24 = SVGA3D_Z_DF24;
 652       }
 653       if (has_d24s8_int) {
 654          svgascreen->depth.s8z24 = SVGA3D_Z_D24S8_INT;
 655       }
 656    }
 657
 658    if (!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_POINT_SIZE, &result)) {
 659       svgascreen->maxPointSize = 1.0F;
 660    } else {
 661       /* Keep this to a reasonable size to avoid failures in
 662        * conform/pntaa.c:
 663        */
 664       svgascreen->maxPointSize = MIN2(result.f, 80.0f);
 665    }
 666
 667    /* The SVGA3D device always supports 4 targets at this time, regardless
 668     * of what querying SVGA3D_DEVCAP_MAX_RENDER_TARGETS might return.
 669     */
 670    svgascreen->max_color_buffers = 4;
 671
 672    pipe_mutex_init(svgascreen->tex_mutex);
 673    pipe_mutex_init(svgascreen->swc_mutex);
 674
 675    svga_screen_cache_init(svgascreen);
 676
 677    return screen;
 678 error2:
 679    FREE(svgascreen);
 680 error1:
 681    return NULL;
 682 }
 683
 684 struct svga_winsys_screen *
 685 svga_winsys_screen(struct pipe_screen *screen)
 686 {
 687    return svga_screen(screen)->sws;
 688 }
 689
 690 #ifdef DEBUG
 691 struct svga_screen *
 692 svga_screen(struct pipe_screen *screen)
 693 {
 694    assert(screen);
 695    assert(screen->destroy == svga_destroy_screen);
 696    return (struct svga_screen *)screen;
 697 }
 698 #endif