gallium: add PIPE_SHADER_CAP_SUBROUTINES
[mesa.git] / src / gallium / drivers / svga / svga_screen.c
1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 **********************************************************/
25
26 #include "util/u_memory.h"
27 #include "util/u_inlines.h"
28 #include "util/u_string.h"
29 #include "util/u_math.h"
30
31 #include "svga_winsys.h"
32 #include "svga_public.h"
33 #include "svga_context.h"
34 #include "svga_screen.h"
35 #include "svga_resource_texture.h"
36 #include "svga_resource.h"
37 #include "svga_debug.h"
38 #include "svga_surface.h"
39
40 #include "svga3d_shaderdefs.h"
41
42
43 #ifdef DEBUG
44 int SVGA_DEBUG = 0;
45
46 static const struct debug_named_value svga_debug_flags[] = {
47 { "dma", DEBUG_DMA, NULL },
48 { "tgsi", DEBUG_TGSI, NULL },
49 { "pipe", DEBUG_PIPE, NULL },
50 { "state", DEBUG_STATE, NULL },
51 { "screen", DEBUG_SCREEN, NULL },
52 { "tex", DEBUG_TEX, NULL },
53 { "swtnl", DEBUG_SWTNL, NULL },
54 { "const", DEBUG_CONSTS, NULL },
55 { "viewport", DEBUG_VIEWPORT, NULL },
56 { "views", DEBUG_VIEWS, NULL },
57 { "perf", DEBUG_PERF, NULL },
58 { "flush", DEBUG_FLUSH, NULL },
59 { "sync", DEBUG_SYNC, NULL },
60 { "cache", DEBUG_CACHE, NULL },
61 DEBUG_NAMED_VALUE_END
62 };
63 #endif
64
65 static const char *
66 svga_get_vendor( struct pipe_screen *pscreen )
67 {
68 return "VMware, Inc.";
69 }
70
71
72 static const char *
73 svga_get_name( struct pipe_screen *pscreen )
74 {
75 #ifdef DEBUG
76 /* Only return internal details in the DEBUG version:
77 */
78 return "SVGA3D; build: DEBUG; mutex: " PIPE_ATOMIC;
79 #else
80 return "SVGA3D; build: RELEASE; ";
81 #endif
82 }
83
84
85
86
87 static float
88 svga_get_paramf(struct pipe_screen *screen, enum pipe_cap param)
89 {
90 struct svga_screen *svgascreen = svga_screen(screen);
91 struct svga_winsys_screen *sws = svgascreen->sws;
92 SVGA3dDevCapResult result;
93
94 switch (param) {
95 case PIPE_CAP_MAX_LINE_WIDTH:
96 /* fall-through */
97 case PIPE_CAP_MAX_LINE_WIDTH_AA:
98 return 7.0;
99
100 case PIPE_CAP_MAX_POINT_WIDTH:
101 /* fall-through */
102 case PIPE_CAP_MAX_POINT_WIDTH_AA:
103 /* Keep this to a reasonable size to avoid failures in
104 * conform/pntaa.c:
105 */
106 return SVGA_MAX_POINTSIZE;
107
108 case PIPE_CAP_MAX_TEXTURE_ANISOTROPY:
109 if(!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_TEXTURE_ANISOTROPY, &result))
110 return 4.0;
111 return result.u;
112
113 case PIPE_CAP_MAX_TEXTURE_LOD_BIAS:
114 return 16.0;
115
116 case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
117 return 16;
118 case PIPE_CAP_MAX_COMBINED_SAMPLERS:
119 return 16;
120 case PIPE_CAP_NPOT_TEXTURES:
121 return 1;
122 case PIPE_CAP_TWO_SIDED_STENCIL:
123 return 1;
124 case PIPE_CAP_GLSL:
125 return svgascreen->use_ps30 && svgascreen->use_vs30;
126 case PIPE_CAP_ANISOTROPIC_FILTER:
127 return 1;
128 case PIPE_CAP_POINT_SPRITE:
129 return 1;
130 case PIPE_CAP_MAX_RENDER_TARGETS:
131 if(!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_RENDER_TARGETS, &result))
132 return 1;
133 if(!result.u)
134 return 1;
135 return MIN2(result.u, PIPE_MAX_COLOR_BUFS);
136 case PIPE_CAP_OCCLUSION_QUERY:
137 return 1;
138 case PIPE_CAP_TIMER_QUERY:
139 return 0;
140 case PIPE_CAP_TEXTURE_SHADOW_MAP:
141 return 1;
142
143 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
144 {
145 unsigned levels = SVGA_MAX_TEXTURE_LEVELS;
146 if (sws->get_cap(sws, SVGA3D_DEVCAP_MAX_TEXTURE_WIDTH, &result))
147 levels = MIN2(util_logbase2(result.u) + 1, levels);
148 else
149 levels = 12 /* 2048x2048 */;
150 if (sws->get_cap(sws, SVGA3D_DEVCAP_MAX_TEXTURE_HEIGHT, &result))
151 levels = MIN2(util_logbase2(result.u) + 1, levels);
152 else
153 levels = 12 /* 2048x2048 */;
154 return levels;
155 }
156
157 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
158 if (!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_VOLUME_EXTENT, &result))
159 return 8; /* max 128x128x128 */
160 return MIN2(util_logbase2(result.u) + 1, SVGA_MAX_TEXTURE_LEVELS);
161
162 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
163 /*
164 * No mechanism to query the host, and at least limited to 2048x2048 on
165 * certain hardware.
166 */
167 return MIN2(screen->get_paramf(screen, PIPE_CAP_MAX_TEXTURE_2D_LEVELS),
168 12.0 /* 2048x2048 */);
169
170 case PIPE_CAP_TEXTURE_MIRROR_REPEAT: /* req. for GL 1.4 */
171 return 1;
172
173 case PIPE_CAP_BLEND_EQUATION_SEPARATE: /* req. for GL 1.5 */
174 return 1;
175
176 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
177 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
178 return 1;
179 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
180 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
181 return 0;
182
183 case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE:
184 return 1;
185
186 default:
187 return 0;
188 }
189 }
190
191
192 /* This is a fairly pointless interface
193 */
194 static int
195 svga_get_param(struct pipe_screen *screen, enum pipe_cap param)
196 {
197 return (int) svga_get_paramf( screen, param );
198 }
199
200 static int svga_get_shader_param(struct pipe_screen *screen, unsigned shader, enum pipe_shader_cap param)
201 {
202 struct svga_screen *svgascreen = svga_screen(screen);
203 struct svga_winsys_screen *sws = svgascreen->sws;
204 SVGA3dDevCapResult result;
205
206 switch (shader)
207 {
208 case PIPE_SHADER_FRAGMENT:
209 switch (param)
210 {
211 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
212 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
213 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
214 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
215 return svgascreen->use_ps30 ? 512 : 96;
216 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
217 return SVGA3D_MAX_NESTING_LEVEL;
218 case PIPE_SHADER_CAP_MAX_INPUTS:
219 return 10;
220 case PIPE_SHADER_CAP_MAX_CONSTS:
221 return svgascreen->use_ps30 ? 224 : 16;
222 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
223 return 1;
224 case PIPE_SHADER_CAP_MAX_TEMPS:
225 if (!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_TEMPS, &result))
226 return svgascreen->use_ps30 ? 32 : 12;
227 return result.u;
228 case PIPE_SHADER_CAP_MAX_ADDRS:
229 return svgascreen->use_ps30 ? 1 : 0;
230 case PIPE_SHADER_CAP_MAX_PREDS:
231 return svgascreen->use_ps30 ? 1 : 0;
232 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
233 return 1;
234 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
235 return svgascreen->use_ps30 ? 1 : 0;
236 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
237 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
238 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
239 return 0;
240 case PIPE_SHADER_CAP_SUBROUTINES:
241 return 0;
242 }
243 break;
244 case PIPE_SHADER_VERTEX:
245 switch (param)
246 {
247 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
248 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
249 if (!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_VERTEX_SHADER_INSTRUCTIONS, &result))
250 return svgascreen->use_vs30 ? 512 : 256;
251 return result.u;
252 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
253 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
254 /* XXX: until we have vertex texture support */
255 return 0;
256 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
257 return SVGA3D_MAX_NESTING_LEVEL;
258 case PIPE_SHADER_CAP_MAX_INPUTS:
259 return 16;
260 case PIPE_SHADER_CAP_MAX_CONSTS:
261 return 256;
262 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
263 return 1;
264 case PIPE_SHADER_CAP_MAX_TEMPS:
265 if (!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEMPS, &result))
266 return svgascreen->use_vs30 ? 32 : 12;
267 return result.u;
268 case PIPE_SHADER_CAP_MAX_ADDRS:
269 return svgascreen->use_vs30 ? 1 : 0;
270 case PIPE_SHADER_CAP_MAX_PREDS:
271 return svgascreen->use_vs30 ? 1 : 0;
272 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
273 return 1;
274 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
275 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
276 return svgascreen->use_vs30 ? 1 : 0;
277 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
278 return 0;
279 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
280 return 1;
281 case PIPE_SHADER_CAP_SUBROUTINES:
282 return 0;
283 default:
284 break;
285 }
286 break;
287 default:
288 break;
289 }
290 return 0;
291 }
292
293 static INLINE SVGA3dDevCapIndex
294 svga_translate_format_cap(enum pipe_format format)
295 {
296 switch(format) {
297
298 case PIPE_FORMAT_B8G8R8A8_UNORM:
299 return SVGA3D_DEVCAP_SURFACEFMT_A8R8G8B8;
300 case PIPE_FORMAT_B8G8R8X8_UNORM:
301 return SVGA3D_DEVCAP_SURFACEFMT_X8R8G8B8;
302
303 case PIPE_FORMAT_B5G6R5_UNORM:
304 return SVGA3D_DEVCAP_SURFACEFMT_R5G6B5;
305 case PIPE_FORMAT_B5G5R5A1_UNORM:
306 return SVGA3D_DEVCAP_SURFACEFMT_A1R5G5B5;
307 case PIPE_FORMAT_B4G4R4A4_UNORM:
308 return SVGA3D_DEVCAP_SURFACEFMT_A4R4G4B4;
309
310 case PIPE_FORMAT_Z16_UNORM:
311 return SVGA3D_DEVCAP_SURFACEFMT_Z_D16;
312 case PIPE_FORMAT_S8_USCALED_Z24_UNORM:
313 return SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8;
314 case PIPE_FORMAT_X8Z24_UNORM:
315 return SVGA3D_DEVCAP_SURFACEFMT_Z_D24X8;
316
317 case PIPE_FORMAT_A8_UNORM:
318 return SVGA3D_DEVCAP_SURFACEFMT_ALPHA8;
319 case PIPE_FORMAT_L8_UNORM:
320 return SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8;
321
322 case PIPE_FORMAT_DXT1_RGB:
323 case PIPE_FORMAT_DXT1_RGBA:
324 return SVGA3D_DEVCAP_SURFACEFMT_DXT1;
325 case PIPE_FORMAT_DXT3_RGBA:
326 return SVGA3D_DEVCAP_SURFACEFMT_DXT3;
327 case PIPE_FORMAT_DXT5_RGBA:
328 return SVGA3D_DEVCAP_SURFACEFMT_DXT5;
329
330 default:
331 return SVGA3D_DEVCAP_MAX;
332 }
333 }
334
335
336 static boolean
337 svga_is_format_supported( struct pipe_screen *screen,
338 enum pipe_format format,
339 enum pipe_texture_target target,
340 unsigned sample_count,
341 unsigned tex_usage,
342 unsigned geom_flags )
343 {
344 struct svga_winsys_screen *sws = svga_screen(screen)->sws;
345 SVGA3dDevCapIndex index;
346 SVGA3dDevCapResult result;
347
348 assert(tex_usage);
349
350 if (sample_count > 1)
351 return FALSE;
352
353 /* Override host capabilities */
354 if (tex_usage & PIPE_BIND_RENDER_TARGET) {
355 switch(format) {
356
357 /* Often unsupported/problematic. This means we end up with the same
358 * visuals for all virtual hardware implementations.
359 */
360 case PIPE_FORMAT_B4G4R4A4_UNORM:
361 case PIPE_FORMAT_B5G5R5A1_UNORM:
362 return FALSE;
363
364 /* Simulate ability to render into compressed textures */
365 case PIPE_FORMAT_DXT1_RGB:
366 case PIPE_FORMAT_DXT1_RGBA:
367 case PIPE_FORMAT_DXT3_RGBA:
368 case PIPE_FORMAT_DXT5_RGBA:
369 return TRUE;
370
371 default:
372 break;
373 }
374 }
375
376 /* Try to query the host */
377 index = svga_translate_format_cap(format);
378 if( index < SVGA3D_DEVCAP_MAX &&
379 sws->get_cap(sws, index, &result) )
380 {
381 SVGA3dSurfaceFormatCaps mask;
382
383 mask.value = 0;
384 if (tex_usage & PIPE_BIND_RENDER_TARGET)
385 mask.offscreenRenderTarget = 1;
386 if (tex_usage & PIPE_BIND_DEPTH_STENCIL)
387 mask.zStencil = 1;
388 if (tex_usage & PIPE_BIND_SAMPLER_VIEW)
389 mask.texture = 1;
390
391 if ((result.u & mask.value) == mask.value)
392 return TRUE;
393 else
394 return FALSE;
395 }
396
397 /* Use our translate functions directly rather than relying on a
398 * duplicated list of supported formats which is prone to getting
399 * out of sync:
400 */
401 if(tex_usage & (PIPE_BIND_RENDER_TARGET | PIPE_BIND_DEPTH_STENCIL))
402 return svga_translate_format_render(format) != SVGA3D_FORMAT_INVALID;
403 else
404 return svga_translate_format(format) != SVGA3D_FORMAT_INVALID;
405 }
406
407
408 static void
409 svga_fence_reference(struct pipe_screen *screen,
410 struct pipe_fence_handle **ptr,
411 struct pipe_fence_handle *fence)
412 {
413 struct svga_winsys_screen *sws = svga_screen(screen)->sws;
414 sws->fence_reference(sws, ptr, fence);
415 }
416
417
418 static int
419 svga_fence_signalled(struct pipe_screen *screen,
420 struct pipe_fence_handle *fence,
421 unsigned flag)
422 {
423 struct svga_winsys_screen *sws = svga_screen(screen)->sws;
424 return sws->fence_signalled(sws, fence, flag);
425 }
426
427
428 static int
429 svga_fence_finish(struct pipe_screen *screen,
430 struct pipe_fence_handle *fence,
431 unsigned flag)
432 {
433 struct svga_winsys_screen *sws = svga_screen(screen)->sws;
434
435 SVGA_DBG(DEBUG_DMA|DEBUG_PERF, "%s fence_ptr %p\n",
436 __FUNCTION__, fence);
437
438 return sws->fence_finish(sws, fence, flag);
439 }
440
441
442 static void
443 svga_destroy_screen( struct pipe_screen *screen )
444 {
445 struct svga_screen *svgascreen = svga_screen(screen);
446
447 svga_screen_cache_cleanup(svgascreen);
448
449 pipe_mutex_destroy(svgascreen->swc_mutex);
450 pipe_mutex_destroy(svgascreen->tex_mutex);
451
452 svgascreen->sws->destroy(svgascreen->sws);
453
454 FREE(svgascreen);
455 }
456
457
458 /**
459 * Create a new svga_screen object
460 */
461 struct pipe_screen *
462 svga_screen_create(struct svga_winsys_screen *sws)
463 {
464 struct svga_screen *svgascreen;
465 struct pipe_screen *screen;
466 SVGA3dDevCapResult result;
467
468 #ifdef DEBUG
469 SVGA_DEBUG = debug_get_flags_option("SVGA_DEBUG", svga_debug_flags, 0 );
470 #endif
471
472 svgascreen = CALLOC_STRUCT(svga_screen);
473 if (!svgascreen)
474 goto error1;
475
476 svgascreen->debug.force_level_surface_view =
477 debug_get_bool_option("SVGA_FORCE_LEVEL_SURFACE_VIEW", FALSE);
478 svgascreen->debug.force_surface_view =
479 debug_get_bool_option("SVGA_FORCE_SURFACE_VIEW", FALSE);
480 svgascreen->debug.force_sampler_view =
481 debug_get_bool_option("SVGA_FORCE_SAMPLER_VIEW", FALSE);
482 svgascreen->debug.no_surface_view =
483 debug_get_bool_option("SVGA_NO_SURFACE_VIEW", FALSE);
484 svgascreen->debug.no_sampler_view =
485 debug_get_bool_option("SVGA_NO_SAMPLER_VIEW", FALSE);
486
487 screen = &svgascreen->screen;
488
489 screen->destroy = svga_destroy_screen;
490 screen->get_name = svga_get_name;
491 screen->get_vendor = svga_get_vendor;
492 screen->get_param = svga_get_param;
493 screen->get_shader_param = svga_get_shader_param;
494 screen->get_paramf = svga_get_paramf;
495 screen->is_format_supported = svga_is_format_supported;
496 screen->context_create = svga_context_create;
497 screen->fence_reference = svga_fence_reference;
498 screen->fence_signalled = svga_fence_signalled;
499 screen->fence_finish = svga_fence_finish;
500 svgascreen->sws = sws;
501
502 svga_screen_init_surface_functions(screen);
503 svga_init_screen_resource_functions(svgascreen);
504
505 svgascreen->use_ps30 =
506 sws->get_cap(sws, SVGA3D_DEVCAP_FRAGMENT_SHADER_VERSION, &result) &&
507 result.u >= SVGA3DPSVERSION_30 ? TRUE : FALSE;
508
509 svgascreen->use_vs30 =
510 sws->get_cap(sws, SVGA3D_DEVCAP_VERTEX_SHADER_VERSION, &result) &&
511 result.u >= SVGA3DVSVERSION_30 ? TRUE : FALSE;
512
513 #if 1
514 /* Shader model 2.0 is unsupported at the moment. */
515 if(!svgascreen->use_ps30 || !svgascreen->use_vs30)
516 goto error2;
517 #else
518 if(debug_get_bool_option("SVGA_NO_SM30", FALSE))
519 svgascreen->use_vs30 = svgascreen->use_ps30 = FALSE;
520 #endif
521
522 pipe_mutex_init(svgascreen->tex_mutex);
523 pipe_mutex_init(svgascreen->swc_mutex);
524
525 svga_screen_cache_init(svgascreen);
526
527 return screen;
528 error2:
529 FREE(svgascreen);
530 error1:
531 return NULL;
532 }
533
534 struct svga_winsys_screen *
535 svga_winsys_screen(struct pipe_screen *screen)
536 {
537 return svga_screen(screen)->sws;
538 }
539
540 #ifdef DEBUG
541 struct svga_screen *
542 svga_screen(struct pipe_screen *screen)
543 {
544 assert(screen);
545 assert(screen->destroy == svga_destroy_screen);
546 return (struct svga_screen *)screen;
547 }
548 #endif