gallium: add PIPE_CAP_TEXTURE_MULTISAMPLE
[mesa.git] / src / gallium / drivers / svga / svga_screen.c
1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 **********************************************************/
25
26 #include "util/u_memory.h"
27 #include "util/u_inlines.h"
28 #include "util/u_string.h"
29 #include "util/u_math.h"
30
31 #include "svga_winsys.h"
32 #include "svga_public.h"
33 #include "svga_context.h"
34 #include "svga_format.h"
35 #include "svga_screen.h"
36 #include "svga_resource_texture.h"
37 #include "svga_resource.h"
38 #include "svga_debug.h"
39
40 #include "svga3d_shaderdefs.h"
41
42
43 #ifdef DEBUG
44 int SVGA_DEBUG = 0;
45
46 static const struct debug_named_value svga_debug_flags[] = {
47 { "dma", DEBUG_DMA, NULL },
48 { "tgsi", DEBUG_TGSI, NULL },
49 { "pipe", DEBUG_PIPE, NULL },
50 { "state", DEBUG_STATE, NULL },
51 { "screen", DEBUG_SCREEN, NULL },
52 { "tex", DEBUG_TEX, NULL },
53 { "swtnl", DEBUG_SWTNL, NULL },
54 { "const", DEBUG_CONSTS, NULL },
55 { "viewport", DEBUG_VIEWPORT, NULL },
56 { "views", DEBUG_VIEWS, NULL },
57 { "perf", DEBUG_PERF, NULL },
58 { "flush", DEBUG_FLUSH, NULL },
59 { "sync", DEBUG_SYNC, NULL },
60 { "cache", DEBUG_CACHE, NULL },
61 DEBUG_NAMED_VALUE_END
62 };
63 #endif
64
65 static const char *
66 svga_get_vendor( struct pipe_screen *pscreen )
67 {
68 return "VMware, Inc.";
69 }
70
71
72 static const char *
73 svga_get_name( struct pipe_screen *pscreen )
74 {
75 const char *build = "", *llvm = "", *mutex = "";
76 static char name[100];
77 #ifdef DEBUG
78 /* Only return internal details in the DEBUG version:
79 */
80 build = "build: DEBUG;";
81 mutex = "mutex: " PIPE_ATOMIC ";";
82 #ifdef HAVE_LLVM
83 llvm = "LLVM;";
84 #endif
85 #else
86 build = "build: RELEASE;";
87 #endif
88
89 util_snprintf(name, sizeof(name), "SVGA3D; %s %s %s", build, mutex, llvm);
90 return name;
91 }
92
93
94
95
96 static float
97 svga_get_paramf(struct pipe_screen *screen, enum pipe_capf param)
98 {
99 struct svga_screen *svgascreen = svga_screen(screen);
100 struct svga_winsys_screen *sws = svgascreen->sws;
101 SVGA3dDevCapResult result;
102
103 switch (param) {
104 case PIPE_CAPF_MAX_LINE_WIDTH:
105 /* fall-through */
106 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
107 return 7.0;
108
109 case PIPE_CAPF_MAX_POINT_WIDTH:
110 /* fall-through */
111 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
112 return svgascreen->maxPointSize;
113
114 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
115 if(!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_TEXTURE_ANISOTROPY, &result))
116 return 4.0;
117 return result.u;
118
119 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
120 return 15.0;
121 case PIPE_CAPF_GUARD_BAND_LEFT:
122 case PIPE_CAPF_GUARD_BAND_TOP:
123 case PIPE_CAPF_GUARD_BAND_RIGHT:
124 case PIPE_CAPF_GUARD_BAND_BOTTOM:
125 return 0.0;
126 }
127
128 debug_printf("Unexpected PIPE_CAPF_ query %u\n", param);
129 return 0;
130 }
131
132
133 static int
134 svga_get_param(struct pipe_screen *screen, enum pipe_cap param)
135 {
136 struct svga_screen *svgascreen = svga_screen(screen);
137 struct svga_winsys_screen *sws = svgascreen->sws;
138 SVGA3dDevCapResult result;
139
140 switch (param) {
141 case PIPE_CAP_MAX_COMBINED_SAMPLERS:
142 return 16;
143 case PIPE_CAP_NPOT_TEXTURES:
144 return 1;
145 case PIPE_CAP_TWO_SIDED_STENCIL:
146 return 1;
147 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
148 return 0;
149 case PIPE_CAP_ANISOTROPIC_FILTER:
150 return 1;
151 case PIPE_CAP_POINT_SPRITE:
152 return 1;
153 case PIPE_CAP_MAX_RENDER_TARGETS:
154 if(!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_RENDER_TARGETS, &result))
155 return 1;
156 if(!result.u)
157 return 1;
158 return MIN2(result.u, PIPE_MAX_COLOR_BUFS);
159 case PIPE_CAP_OCCLUSION_QUERY:
160 return 1;
161 case PIPE_CAP_TIMER_QUERY:
162 return 0;
163 case PIPE_CAP_TEXTURE_SHADOW_MAP:
164 return 1;
165 case PIPE_CAP_TEXTURE_SWIZZLE:
166 return 1;
167 case PIPE_CAP_USER_VERTEX_BUFFERS:
168 case PIPE_CAP_USER_INDEX_BUFFERS:
169 return 0;
170 case PIPE_CAP_USER_CONSTANT_BUFFERS:
171 return 1;
172 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
173 return 16;
174
175 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
176 {
177 unsigned levels = SVGA_MAX_TEXTURE_LEVELS;
178 if (sws->get_cap(sws, SVGA3D_DEVCAP_MAX_TEXTURE_WIDTH, &result))
179 levels = MIN2(util_logbase2(result.u) + 1, levels);
180 else
181 levels = 12 /* 2048x2048 */;
182 if (sws->get_cap(sws, SVGA3D_DEVCAP_MAX_TEXTURE_HEIGHT, &result))
183 levels = MIN2(util_logbase2(result.u) + 1, levels);
184 else
185 levels = 12 /* 2048x2048 */;
186 return levels;
187 }
188
189 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
190 if (!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_VOLUME_EXTENT, &result))
191 return 8; /* max 128x128x128 */
192 return MIN2(util_logbase2(result.u) + 1, SVGA_MAX_TEXTURE_LEVELS);
193
194 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
195 /*
196 * No mechanism to query the host, and at least limited to 2048x2048 on
197 * certain hardware.
198 */
199 return MIN2(screen->get_param(screen, PIPE_CAP_MAX_TEXTURE_2D_LEVELS),
200 12 /* 2048x2048 */);
201
202 case PIPE_CAP_BLEND_EQUATION_SEPARATE: /* req. for GL 1.5 */
203 return 1;
204
205 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
206 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
207 return 1;
208 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
209 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
210 return 0;
211
212 case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE:
213 return 1;
214
215 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
216 return 1; /* The color outputs of vertex shaders are not clamped */
217 case PIPE_CAP_VERTEX_COLOR_CLAMPED:
218 return 0; /* The driver can't clamp vertex colors */
219 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
220 return 0; /* The driver can't clamp fragment colors */
221
222 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
223 return 1; /* expected for GL_ARB_framebuffer_object */
224
225 case PIPE_CAP_GLSL_FEATURE_LEVEL:
226 return 120;
227
228 /* Unsupported features */
229 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
230 case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
231 case PIPE_CAP_SM3:
232 case PIPE_CAP_SHADER_STENCIL_EXPORT:
233 case PIPE_CAP_DEPTH_CLIP_DISABLE:
234 case PIPE_CAP_SEAMLESS_CUBE_MAP:
235 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
236 case PIPE_CAP_INDEP_BLEND_ENABLE:
237 case PIPE_CAP_INDEP_BLEND_FUNC:
238 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
239 case PIPE_CAP_PRIMITIVE_RESTART:
240 case PIPE_CAP_TGSI_INSTANCEID:
241 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
242 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
243 case PIPE_CAP_SCALED_RESOLVE:
244 case PIPE_CAP_MIN_TEXEL_OFFSET:
245 case PIPE_CAP_MAX_TEXEL_OFFSET:
246 case PIPE_CAP_CONDITIONAL_RENDER:
247 case PIPE_CAP_TEXTURE_BARRIER:
248 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
249 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
250 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
251 case PIPE_CAP_TGSI_CAN_COMPACT_VARYINGS:
252 case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
253 case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
254 case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
255 case PIPE_CAP_COMPUTE:
256 case PIPE_CAP_START_INSTANCE:
257 case PIPE_CAP_QUERY_TIMESTAMP:
258 case PIPE_CAP_TEXTURE_MULTISAMPLE:
259 return 0;
260 case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
261 return 1;
262 }
263
264 debug_printf("Unexpected PIPE_CAP_ query %u\n", param);
265 return 0;
266 }
267
268 static int svga_get_shader_param(struct pipe_screen *screen, unsigned shader, enum pipe_shader_cap param)
269 {
270 struct svga_screen *svgascreen = svga_screen(screen);
271 struct svga_winsys_screen *sws = svgascreen->sws;
272 SVGA3dDevCapResult result;
273
274 switch (shader)
275 {
276 case PIPE_SHADER_FRAGMENT:
277 switch (param)
278 {
279 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
280 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
281 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
282 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
283 return 512;
284 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
285 return SVGA3D_MAX_NESTING_LEVEL;
286 case PIPE_SHADER_CAP_MAX_INPUTS:
287 return 10;
288 case PIPE_SHADER_CAP_MAX_CONSTS:
289 return 224;
290 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
291 return 1;
292 case PIPE_SHADER_CAP_MAX_TEMPS:
293 if (!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_TEMPS, &result))
294 return 32;
295 return MIN2(result.u, SVGA3D_TEMPREG_MAX);
296 case PIPE_SHADER_CAP_MAX_ADDRS:
297 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
298 /*
299 * Although PS 3.0 has some addressing abilities it can only represent
300 * loops that can be statically determined and unrolled. Given we can
301 * only handle a subset of the cases that the state tracker already
302 * does it is better to defer loop unrolling to the state tracker.
303 */
304 return 0;
305 case PIPE_SHADER_CAP_MAX_PREDS:
306 return 1;
307 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
308 return 1;
309 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
310 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
311 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
312 return 0;
313 case PIPE_SHADER_CAP_SUBROUTINES:
314 return 0;
315 case PIPE_SHADER_CAP_INTEGERS:
316 return 0;
317 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
318 return 16;
319 default:
320 debug_printf("Unexpected vertex shader query %u\n", param);
321 return 0;
322 }
323 break;
324 case PIPE_SHADER_VERTEX:
325 switch (param)
326 {
327 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
328 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
329 if (!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_VERTEX_SHADER_INSTRUCTIONS, &result))
330 return 512;
331 return result.u;
332 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
333 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
334 /* XXX: until we have vertex texture support */
335 return 0;
336 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
337 return SVGA3D_MAX_NESTING_LEVEL;
338 case PIPE_SHADER_CAP_MAX_INPUTS:
339 return 16;
340 case PIPE_SHADER_CAP_MAX_CONSTS:
341 return 256;
342 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
343 return 1;
344 case PIPE_SHADER_CAP_MAX_TEMPS:
345 if (!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEMPS, &result))
346 return 32;
347 return MIN2(result.u, SVGA3D_TEMPREG_MAX);
348 case PIPE_SHADER_CAP_MAX_ADDRS:
349 return 1;
350 case PIPE_SHADER_CAP_MAX_PREDS:
351 return 1;
352 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
353 return 1;
354 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
355 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
356 return 1;
357 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
358 return 0;
359 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
360 return 1;
361 case PIPE_SHADER_CAP_SUBROUTINES:
362 return 0;
363 case PIPE_SHADER_CAP_INTEGERS:
364 return 0;
365 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
366 return 0;
367 default:
368 debug_printf("Unexpected vertex shader query %u\n", param);
369 return 0;
370 }
371 break;
372 case PIPE_SHADER_GEOMETRY:
373 /* no support for geometry shaders at this time */
374 return 0;
375 default:
376 debug_printf("Unexpected shader type (%u) query\n", shader);
377 return 0;
378 }
379 return 0;
380 }
381
382
383 static boolean
384 svga_is_format_supported( struct pipe_screen *screen,
385 enum pipe_format format,
386 enum pipe_texture_target target,
387 unsigned sample_count,
388 unsigned tex_usage)
389 {
390 struct svga_screen *ss = svga_screen(screen);
391 SVGA3dSurfaceFormat svga_format;
392 SVGA3dSurfaceFormatCaps caps;
393 SVGA3dSurfaceFormatCaps mask;
394
395 assert(tex_usage);
396
397 if (sample_count > 1) {
398 return FALSE;
399 }
400
401 svga_format = svga_translate_format(ss, format, tex_usage);
402 if (svga_format == SVGA3D_FORMAT_INVALID) {
403 return FALSE;
404 }
405
406 /*
407 * Override host capabilities, so that we end up with the same
408 * visuals for all virtual hardware implementations.
409 */
410
411 if (tex_usage & PIPE_BIND_DISPLAY_TARGET) {
412 switch (svga_format) {
413 case SVGA3D_A8R8G8B8:
414 case SVGA3D_X8R8G8B8:
415 case SVGA3D_R5G6B5:
416 break;
417
418 /* Often unsupported/problematic. This means we end up with the same
419 * visuals for all virtual hardware implementations.
420 */
421 case SVGA3D_A4R4G4B4:
422 case SVGA3D_A1R5G5B5:
423 return FALSE;
424
425 default:
426 return FALSE;
427 }
428 }
429
430 /*
431 * Query the host capabilities.
432 */
433
434 svga_get_format_cap(ss, svga_format, &caps);
435
436 mask.value = 0;
437 if (tex_usage & PIPE_BIND_RENDER_TARGET) {
438 mask.offscreenRenderTarget = 1;
439 }
440 if (tex_usage & PIPE_BIND_DEPTH_STENCIL) {
441 mask.zStencil = 1;
442 }
443 if (tex_usage & PIPE_BIND_SAMPLER_VIEW) {
444 mask.texture = 1;
445 }
446
447 return (caps.value & mask.value) == mask.value;
448 }
449
450
451 static void
452 svga_fence_reference(struct pipe_screen *screen,
453 struct pipe_fence_handle **ptr,
454 struct pipe_fence_handle *fence)
455 {
456 struct svga_winsys_screen *sws = svga_screen(screen)->sws;
457 sws->fence_reference(sws, ptr, fence);
458 }
459
460
461 static boolean
462 svga_fence_signalled(struct pipe_screen *screen,
463 struct pipe_fence_handle *fence)
464 {
465 struct svga_winsys_screen *sws = svga_screen(screen)->sws;
466 return sws->fence_signalled(sws, fence, 0) == 0;
467 }
468
469
470 static boolean
471 svga_fence_finish(struct pipe_screen *screen,
472 struct pipe_fence_handle *fence,
473 uint64_t timeout)
474 {
475 struct svga_winsys_screen *sws = svga_screen(screen)->sws;
476
477 SVGA_DBG(DEBUG_DMA|DEBUG_PERF, "%s fence_ptr %p\n",
478 __FUNCTION__, fence);
479
480 return sws->fence_finish(sws, fence, 0) == 0;
481 }
482
483
484 static void
485 svga_destroy_screen( struct pipe_screen *screen )
486 {
487 struct svga_screen *svgascreen = svga_screen(screen);
488
489 svga_screen_cache_cleanup(svgascreen);
490
491 pipe_mutex_destroy(svgascreen->swc_mutex);
492 pipe_mutex_destroy(svgascreen->tex_mutex);
493
494 svgascreen->sws->destroy(svgascreen->sws);
495
496 FREE(svgascreen);
497 }
498
499
500 /**
501 * Create a new svga_screen object
502 */
503 struct pipe_screen *
504 svga_screen_create(struct svga_winsys_screen *sws)
505 {
506 struct svga_screen *svgascreen;
507 struct pipe_screen *screen;
508 SVGA3dDevCapResult result;
509 boolean use_vs30, use_ps30;
510
511 #ifdef DEBUG
512 SVGA_DEBUG = debug_get_flags_option("SVGA_DEBUG", svga_debug_flags, 0 );
513 #endif
514
515 svgascreen = CALLOC_STRUCT(svga_screen);
516 if (!svgascreen)
517 goto error1;
518
519 svgascreen->debug.force_level_surface_view =
520 debug_get_bool_option("SVGA_FORCE_LEVEL_SURFACE_VIEW", FALSE);
521 svgascreen->debug.force_surface_view =
522 debug_get_bool_option("SVGA_FORCE_SURFACE_VIEW", FALSE);
523 svgascreen->debug.force_sampler_view =
524 debug_get_bool_option("SVGA_FORCE_SAMPLER_VIEW", FALSE);
525 svgascreen->debug.no_surface_view =
526 debug_get_bool_option("SVGA_NO_SURFACE_VIEW", FALSE);
527 svgascreen->debug.no_sampler_view =
528 debug_get_bool_option("SVGA_NO_SAMPLER_VIEW", FALSE);
529
530 screen = &svgascreen->screen;
531
532 screen->destroy = svga_destroy_screen;
533 screen->get_name = svga_get_name;
534 screen->get_vendor = svga_get_vendor;
535 screen->get_param = svga_get_param;
536 screen->get_shader_param = svga_get_shader_param;
537 screen->get_paramf = svga_get_paramf;
538 screen->is_format_supported = svga_is_format_supported;
539 screen->context_create = svga_context_create;
540 screen->fence_reference = svga_fence_reference;
541 screen->fence_signalled = svga_fence_signalled;
542 screen->fence_finish = svga_fence_finish;
543 svgascreen->sws = sws;
544
545 svga_init_screen_resource_functions(svgascreen);
546
547 if (sws->get_hw_version) {
548 svgascreen->hw_version = sws->get_hw_version(sws);
549 } else {
550 svgascreen->hw_version = SVGA3D_HWVERSION_WS65_B1;
551 }
552
553 use_ps30 =
554 sws->get_cap(sws, SVGA3D_DEVCAP_FRAGMENT_SHADER_VERSION, &result) &&
555 result.u >= SVGA3DPSVERSION_30 ? TRUE : FALSE;
556
557 use_vs30 =
558 sws->get_cap(sws, SVGA3D_DEVCAP_VERTEX_SHADER_VERSION, &result) &&
559 result.u >= SVGA3DVSVERSION_30 ? TRUE : FALSE;
560
561 /* we require Shader model 3.0 or later */
562 if (!use_ps30 || !use_vs30)
563 goto error2;
564
565 /*
566 * The D16, D24X8, and D24S8 formats always do an implicit shadow compare
567 * when sampled from, where as the DF16, DF24, and D24S8_INT do not. So
568 * we prefer the later when available.
569 *
570 * This mimics hardware vendors extensions for D3D depth sampling. See also
571 * http://aras-p.info/texts/D3D9GPUHacks.html
572 */
573
574 {
575 boolean has_df16, has_df24, has_d24s8_int;
576 SVGA3dSurfaceFormatCaps caps;
577 SVGA3dSurfaceFormatCaps mask;
578 mask.value = 0;
579 mask.zStencil = 1;
580 mask.texture = 1;
581
582 svgascreen->depth.z16 = SVGA3D_Z_D16;
583 svgascreen->depth.x8z24 = SVGA3D_Z_D24X8;
584 svgascreen->depth.s8z24 = SVGA3D_Z_D24S8;
585
586 svga_get_format_cap(svgascreen, SVGA3D_Z_DF16, &caps);
587 has_df16 = (caps.value & mask.value) == mask.value;
588
589 svga_get_format_cap(svgascreen, SVGA3D_Z_DF24, &caps);
590 has_df24 = (caps.value & mask.value) == mask.value;
591
592 svga_get_format_cap(svgascreen, SVGA3D_Z_D24S8_INT, &caps);
593 has_d24s8_int = (caps.value & mask.value) == mask.value;
594
595 /* XXX: We might want some other logic here.
596 * Like if we only have d24s8_int we should
597 * emulate the other formats with that.
598 */
599 if (has_df16) {
600 svgascreen->depth.z16 = SVGA3D_Z_DF16;
601 }
602 if (has_df24) {
603 svgascreen->depth.x8z24 = SVGA3D_Z_DF24;
604 }
605 if (has_d24s8_int) {
606 svgascreen->depth.s8z24 = SVGA3D_Z_D24S8_INT;
607 }
608 }
609
610 if (!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_POINT_SIZE, &result)) {
611 svgascreen->maxPointSize = 1.0F;
612 } else {
613 /* Keep this to a reasonable size to avoid failures in
614 * conform/pntaa.c:
615 */
616 svgascreen->maxPointSize = MIN2(result.f, 80.0f);
617 }
618
619 pipe_mutex_init(svgascreen->tex_mutex);
620 pipe_mutex_init(svgascreen->swc_mutex);
621
622 svga_screen_cache_init(svgascreen);
623
624 return screen;
625 error2:
626 FREE(svgascreen);
627 error1:
628 return NULL;
629 }
630
631 struct svga_winsys_screen *
632 svga_winsys_screen(struct pipe_screen *screen)
633 {
634 return svga_screen(screen)->sws;
635 }
636
637 #ifdef DEBUG
638 struct svga_screen *
639 svga_screen(struct pipe_screen *screen)
640 {
641 assert(screen);
642 assert(screen->destroy == svga_destroy_screen);
643 return (struct svga_screen *)screen;
644 }
645 #endif