src/gallium/drivers/svga/svga_screen.c

   1 /**********************************************************
   2  * Copyright 2008-2009 VMware, Inc.  All rights reserved.
   3  *
   4  * Permission is hereby granted, free of charge, to any person
   5  * obtaining a copy of this software and associated documentation
   6  * files (the "Software"), to deal in the Software without
   7  * restriction, including without limitation the rights to use, copy,
   8  * modify, merge, publish, distribute, sublicense, and/or sell copies
   9  * of the Software, and to permit persons to whom the Software is
  10  * furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be
  13  * included in all copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  16  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  17  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  18  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  19  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  20  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  21  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  22  * SOFTWARE.
  23  *
  24  **********************************************************/
  25
  26 #include "util/u_format.h"
  27 #include "util/u_memory.h"
  28 #include "util/u_inlines.h"
  29 #include "util/u_string.h"
  30 #include "util/u_math.h"
  31
  32 #include "svga_winsys.h"
  33 #include "svga_public.h"
  34 #include "svga_context.h"
  35 #include "svga_format.h"
  36 #include "svga_screen.h"
  37 #include "svga_tgsi.h"
  38 #include "svga_resource_texture.h"
  39 #include "svga_resource.h"
  40 #include "svga_debug.h"
  41
  42 #include "svga3d_shaderdefs.h"
  43 #include "VGPU10ShaderTokens.h"
  44
  45 /* NOTE: this constant may get moved into a svga3d*.h header file */
  46 #define SVGA3D_DX_MAX_RESOURCE_SIZE (128 * 1024 * 1024)
  47
  48 #ifdef DEBUG
  49 int SVGA_DEBUG = 0;
  50
  51 static const struct debug_named_value svga_debug_flags[] = {
  52    { "dma",         DEBUG_DMA, NULL },
  53    { "tgsi",        DEBUG_TGSI, NULL },
  54    { "pipe",        DEBUG_PIPE, NULL },
  55    { "state",       DEBUG_STATE, NULL },
  56    { "screen",      DEBUG_SCREEN, NULL },
  57    { "tex",         DEBUG_TEX, NULL },
  58    { "swtnl",       DEBUG_SWTNL, NULL },
  59    { "const",       DEBUG_CONSTS, NULL },
  60    { "viewport",    DEBUG_VIEWPORT, NULL },
  61    { "views",       DEBUG_VIEWS, NULL },
  62    { "perf",        DEBUG_PERF, NULL },
  63    { "flush",       DEBUG_FLUSH, NULL },
  64    { "sync",        DEBUG_SYNC, NULL },
  65    { "cache",       DEBUG_CACHE, NULL },
  66    { "streamout",   DEBUG_STREAMOUT, NULL },
  67    { "query",       DEBUG_QUERY, NULL },
  68    DEBUG_NAMED_VALUE_END
  69 };
  70 #endif
  71
  72 static const char *
  73 svga_get_vendor( struct pipe_screen *pscreen )
  74 {
  75    return "VMware, Inc.";
  76 }
  77
  78
  79 static const char *
  80 svga_get_name( struct pipe_screen *pscreen )
  81 {
  82    const char *build = "", *llvm = "", *mutex = "";
  83    static char name[100];
  84 #ifdef DEBUG
  85    /* Only return internal details in the DEBUG version:
  86     */
  87    build = "build: DEBUG;";
  88    mutex = "mutex: " PIPE_ATOMIC ";";
  89 #else
  90    build = "build: RELEASE;";
  91 #endif
  92 #ifdef HAVE_LLVM
  93    llvm = "LLVM;";
  94 #endif
  95
  96    util_snprintf(name, sizeof(name), "SVGA3D; %s %s %s", build, mutex, llvm);
  97    return name;
  98 }
  99
 100
 101 /** Helper for querying float-valued device cap */
 102 static float
 103 get_float_cap(struct svga_winsys_screen *sws, unsigned cap, float defaultVal)
 104 {
 105    SVGA3dDevCapResult result;
 106    if (sws->get_cap(sws, cap, &result))
 107       return result.f;
 108    else
 109       return defaultVal;
 110 }
 111
 112
 113 /** Helper for querying uint-valued device cap */
 114 static unsigned
 115 get_uint_cap(struct svga_winsys_screen *sws, unsigned cap, unsigned defaultVal)
 116 {
 117    SVGA3dDevCapResult result;
 118    if (sws->get_cap(sws, cap, &result))
 119       return result.u;
 120    else
 121       return defaultVal;
 122 }
 123
 124
 125 /** Helper for querying boolean-valued device cap */
 126 static boolean
 127 get_bool_cap(struct svga_winsys_screen *sws, unsigned cap, boolean defaultVal)
 128 {
 129    SVGA3dDevCapResult result;
 130    if (sws->get_cap(sws, cap, &result))
 131       return result.b;
 132    else
 133       return defaultVal;
 134 }
 135
 136
 137 static float
 138 svga_get_paramf(struct pipe_screen *screen, enum pipe_capf param)
 139 {
 140    struct svga_screen *svgascreen = svga_screen(screen);
 141    struct svga_winsys_screen *sws = svgascreen->sws;
 142
 143    switch (param) {
 144    case PIPE_CAPF_MAX_LINE_WIDTH:
 145       return svgascreen->maxLineWidth;
 146    case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 147       return svgascreen->maxLineWidthAA;
 148
 149    case PIPE_CAPF_MAX_POINT_WIDTH:
 150       /* fall-through */
 151    case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 152       return svgascreen->maxPointSize;
 153
 154    case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 155       return (float) get_uint_cap(sws, SVGA3D_DEVCAP_MAX_TEXTURE_ANISOTROPY, 4);
 156
 157    case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 158       return 15.0;
 159
 160    case PIPE_CAPF_GUARD_BAND_LEFT:
 161    case PIPE_CAPF_GUARD_BAND_TOP:
 162    case PIPE_CAPF_GUARD_BAND_RIGHT:
 163    case PIPE_CAPF_GUARD_BAND_BOTTOM:
 164       return 0.0;
 165    }
 166
 167    debug_printf("Unexpected PIPE_CAPF_ query %u\n", param);
 168    return 0;
 169 }
 170
 171
 172 static int
 173 svga_get_param(struct pipe_screen *screen, enum pipe_cap param)
 174 {
 175    struct svga_screen *svgascreen = svga_screen(screen);
 176    struct svga_winsys_screen *sws = svgascreen->sws;
 177    SVGA3dDevCapResult result;
 178
 179    switch (param) {
 180    case PIPE_CAP_NPOT_TEXTURES:
 181    case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
 182       return 1;
 183    case PIPE_CAP_TWO_SIDED_STENCIL:
 184       return 1;
 185    case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
 186       /*
 187        * "In virtually every OpenGL implementation and hardware,
 188        * GL_MAX_DUAL_SOURCE_DRAW_BUFFERS is 1"
 189        * http://www.opengl.org/wiki/Blending
 190        */
 191       return sws->have_vgpu10 ? 1 : 0;
 192    case PIPE_CAP_ANISOTROPIC_FILTER:
 193       return 1;
 194    case PIPE_CAP_POINT_SPRITE:
 195       return 1;
 196    case PIPE_CAP_TGSI_TEXCOORD:
 197       return 0;
 198    case PIPE_CAP_MAX_RENDER_TARGETS:
 199       return svgascreen->max_color_buffers;
 200    case PIPE_CAP_OCCLUSION_QUERY:
 201       return 1;
 202    case PIPE_CAP_QUERY_TIME_ELAPSED:
 203       return 0;
 204    case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 205       return sws->have_vgpu10;
 206    case PIPE_CAP_TEXTURE_SHADOW_MAP:
 207       return 1;
 208    case PIPE_CAP_TEXTURE_SWIZZLE:
 209       return 1;
 210    case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
 211       return 0;
 212    case PIPE_CAP_USER_VERTEX_BUFFERS:
 213    case PIPE_CAP_USER_INDEX_BUFFERS:
 214       return 0;
 215    case PIPE_CAP_USER_CONSTANT_BUFFERS:
 216       return 1;
 217    case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 218       return 256;
 219
 220    case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 221       {
 222          unsigned levels = SVGA_MAX_TEXTURE_LEVELS;
 223          if (sws->get_cap(sws, SVGA3D_DEVCAP_MAX_TEXTURE_WIDTH, &result))
 224             levels = MIN2(util_logbase2(result.u) + 1, levels);
 225          else
 226             levels = 12 /* 2048x2048 */;
 227          if (sws->get_cap(sws, SVGA3D_DEVCAP_MAX_TEXTURE_HEIGHT, &result))
 228             levels = MIN2(util_logbase2(result.u) + 1, levels);
 229          else
 230             levels = 12 /* 2048x2048 */;
 231          return levels;
 232       }
 233
 234    case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 235       if (!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_VOLUME_EXTENT, &result))
 236          return 8;  /* max 128x128x128 */
 237       return MIN2(util_logbase2(result.u) + 1, SVGA_MAX_TEXTURE_LEVELS);
 238
 239    case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 240       /*
 241        * No mechanism to query the host, and at least limited to 2048x2048 on
 242        * certain hardware.
 243        */
 244       return MIN2(screen->get_param(screen, PIPE_CAP_MAX_TEXTURE_2D_LEVELS),
 245                   12 /* 2048x2048 */);
 246
 247    case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 248       return sws->have_vgpu10 ? SVGA3D_MAX_SURFACE_ARRAYSIZE : 0;
 249
 250    case PIPE_CAP_BLEND_EQUATION_SEPARATE: /* req. for GL 1.5 */
 251       return 1;
 252
 253    case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 254       return 1;
 255    case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 256       return sws->have_vgpu10;
 257    case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 258       return 0;
 259    case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 260       return !sws->have_vgpu10;
 261
 262    case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
 263       return 1; /* The color outputs of vertex shaders are not clamped */
 264    case PIPE_CAP_VERTEX_COLOR_CLAMPED:
 265       return 0; /* The driver can't clamp vertex colors */
 266    case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
 267       return 0; /* The driver can't clamp fragment colors */
 268
 269    case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 270       return 1; /* expected for GL_ARB_framebuffer_object */
 271
 272    case PIPE_CAP_GLSL_FEATURE_LEVEL:
 273       return sws->have_vgpu10 ? 330 : 120;
 274
 275    case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 276       return 0;
 277
 278    case PIPE_CAP_SM3:
 279       return 1;
 280
 281    case PIPE_CAP_DEPTH_CLIP_DISABLE:
 282    case PIPE_CAP_INDEP_BLEND_ENABLE:
 283    case PIPE_CAP_CONDITIONAL_RENDER:
 284    case PIPE_CAP_QUERY_TIMESTAMP:
 285    case PIPE_CAP_TGSI_INSTANCEID:
 286    case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 287    case PIPE_CAP_SEAMLESS_CUBE_MAP:
 288    case PIPE_CAP_FAKE_SW_MSAA:
 289       return sws->have_vgpu10;
 290
 291    case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 292       return sws->have_vgpu10 ? SVGA3D_DX_MAX_SOTARGETS : 0;
 293    case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 294       return sws->have_vgpu10 ? 4 : 0;
 295    case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 296       return sws->have_vgpu10 ? SVGA3D_MAX_STREAMOUT_DECLS : 0;
 297    case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
 298       return 0;
 299    case PIPE_CAP_TEXTURE_MULTISAMPLE:
 300       return svgascreen->ms_samples ? 1 : 0;
 301
 302    case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
 303       return SVGA3D_DX_MAX_RESOURCE_SIZE;
 304
 305    case PIPE_CAP_MIN_TEXEL_OFFSET:
 306       return sws->have_vgpu10 ? VGPU10_MIN_TEXEL_FETCH_OFFSET : 0;
 307    case PIPE_CAP_MAX_TEXEL_OFFSET:
 308       return sws->have_vgpu10 ? VGPU10_MAX_TEXEL_FETCH_OFFSET : 0;
 309
 310    case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
 311    case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
 312       return 0;
 313
 314    case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
 315       return sws->have_vgpu10 ? 256 : 0;
 316    case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
 317       return sws->have_vgpu10 ? 1024 : 0;
 318
 319    case PIPE_CAP_PRIMITIVE_RESTART:
 320       return 1; /* may be a sw fallback, depending on restart index */
 321
 322    /* Unsupported features */
 323    case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
 324    case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 325    case PIPE_CAP_SHADER_STENCIL_EXPORT:
 326    case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 327    case PIPE_CAP_INDEP_BLEND_FUNC:
 328    case PIPE_CAP_TEXTURE_BARRIER:
 329    case PIPE_CAP_MAX_VERTEX_STREAMS:
 330    case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
 331    case PIPE_CAP_COMPUTE:
 332    case PIPE_CAP_START_INSTANCE:
 333    case PIPE_CAP_CUBE_MAP_ARRAY:
 334    case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
 335    case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 336    case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
 337    case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
 338    case PIPE_CAP_TEXTURE_GATHER_SM5:
 339    case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
 340    case PIPE_CAP_TEXTURE_QUERY_LOD:
 341    case PIPE_CAP_SAMPLE_SHADING:
 342    case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
 343    case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
 344    case PIPE_CAP_DRAW_INDIRECT:
 345    case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
 346    case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
 347    case PIPE_CAP_SAMPLER_VIEW_TARGET:
 348    case PIPE_CAP_CLIP_HALFZ:
 349    case PIPE_CAP_VERTEXID_NOBASE:
 350    case PIPE_CAP_POLYGON_OFFSET_CLAMP:
 351    case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
 352       return 0;
 353    case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
 354       return 64;
 355    case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
 356    case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
 357    case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
 358       return 1;  /* need 4-byte alignment for all offsets and strides */
 359    case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
 360       return 2048;
 361    case PIPE_CAP_MAX_VIEWPORTS:
 362       return 1;
 363    case PIPE_CAP_ENDIANNESS:
 364       return PIPE_ENDIAN_LITTLE;
 365
 366    case PIPE_CAP_VENDOR_ID:
 367       return 0x15ad; /* VMware Inc. */
 368    case PIPE_CAP_DEVICE_ID:
 369       return 0x0405; /* assume SVGA II */
 370    case PIPE_CAP_ACCELERATED:
 371       return 0; /* XXX: */
 372    case PIPE_CAP_VIDEO_MEMORY:
 373       /* XXX: Query the host ? */
 374       return 1;
 375    case PIPE_CAP_UMA:
 376    case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
 377    case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
 378    case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
 379    case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
 380    case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
 381    case PIPE_CAP_DEPTH_BOUNDS_TEST:
 382    case PIPE_CAP_TGSI_TXQS:
 383       return 0;
 384    }
 385
 386    debug_printf("Unexpected PIPE_CAP_ query %u\n", param);
 387    return 0;
 388 }
 389
 390
 391 static int
 392 vgpu9_get_shader_param(struct pipe_screen *screen, unsigned shader,
 393                        enum pipe_shader_cap param)
 394 {
 395    struct svga_screen *svgascreen = svga_screen(screen);
 396    struct svga_winsys_screen *sws = svgascreen->sws;
 397    unsigned val;
 398
 399    assert(!sws->have_vgpu10);
 400
 401    switch (shader)
 402    {
 403    case PIPE_SHADER_FRAGMENT:
 404       switch (param)
 405       {
 406       case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 407       case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 408       case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 409       case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 410          return 512;
 411       case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 412          return SVGA3D_MAX_NESTING_LEVEL;
 413       case PIPE_SHADER_CAP_MAX_INPUTS:
 414          return 10;
 415       case PIPE_SHADER_CAP_MAX_OUTPUTS:
 416          return svgascreen->max_color_buffers;
 417       case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 418          return 224 * sizeof(float[4]);
 419       case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 420          return 1;
 421       case PIPE_SHADER_CAP_MAX_TEMPS:
 422          val = get_uint_cap(sws, SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_TEMPS, 32);
 423          return MIN2(val, SVGA3D_TEMPREG_MAX);
 424       case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 425          /*
 426           * Although PS 3.0 has some addressing abilities it can only represent
 427           * loops that can be statically determined and unrolled. Given we can
 428           * only handle a subset of the cases that the state tracker already
 429           * does it is better to defer loop unrolling to the state tracker.
 430           */
 431          return 0;
 432       case PIPE_SHADER_CAP_MAX_PREDS:
 433          return 1;
 434       case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 435          return 0;
 436       case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 437          return 0;
 438       case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 439       case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 440       case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 441          return 0;
 442       case PIPE_SHADER_CAP_SUBROUTINES:
 443          return 0;
 444       case PIPE_SHADER_CAP_INTEGERS:
 445          return 0;
 446       case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 447       case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 448          return 16;
 449       case PIPE_SHADER_CAP_PREFERRED_IR:
 450          return PIPE_SHADER_IR_TGSI;
 451       case PIPE_SHADER_CAP_DOUBLES:
 452       case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 453       case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 454       case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 455       case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 456          return 0;
 457       }
 458       /* If we get here, we failed to handle a cap above */
 459       debug_printf("Unexpected fragment shader query %u\n", param);
 460       return 0;
 461    case PIPE_SHADER_VERTEX:
 462       switch (param)
 463       {
 464       case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 465       case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 466          return get_uint_cap(sws, SVGA3D_DEVCAP_MAX_VERTEX_SHADER_INSTRUCTIONS,
 467                              512);
 468       case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 469       case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 470          /* XXX: until we have vertex texture support */
 471          return 0;
 472       case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 473          return SVGA3D_MAX_NESTING_LEVEL;
 474       case PIPE_SHADER_CAP_MAX_INPUTS:
 475          return 16;
 476       case PIPE_SHADER_CAP_MAX_OUTPUTS:
 477          return 10;
 478       case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 479          return 256 * sizeof(float[4]);
 480       case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 481          return 1;
 482       case PIPE_SHADER_CAP_MAX_TEMPS:
 483          val = get_uint_cap(sws, SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEMPS, 32);
 484          return MIN2(val, SVGA3D_TEMPREG_MAX);
 485       case PIPE_SHADER_CAP_MAX_PREDS:
 486          return 1;
 487       case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 488          return 0;
 489       case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 490          return 0;
 491       case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 492       case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 493          return 1;
 494       case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 495          return 0;
 496       case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 497          return 1;
 498       case PIPE_SHADER_CAP_SUBROUTINES:
 499          return 0;
 500       case PIPE_SHADER_CAP_INTEGERS:
 501          return 0;
 502       case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 503       case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 504          return 0;
 505       case PIPE_SHADER_CAP_PREFERRED_IR:
 506          return PIPE_SHADER_IR_TGSI;
 507       case PIPE_SHADER_CAP_DOUBLES:
 508       case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 509       case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 510       case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 511       case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 512          return 0;
 513       }
 514       /* If we get here, we failed to handle a cap above */
 515       debug_printf("Unexpected vertex shader query %u\n", param);
 516       return 0;
 517    case PIPE_SHADER_GEOMETRY:
 518    case PIPE_SHADER_COMPUTE:
 519    case PIPE_SHADER_TESS_CTRL:
 520    case PIPE_SHADER_TESS_EVAL:
 521       /* no support for geometry, tess or compute shaders at this time */
 522       return 0;
 523    default:
 524       debug_printf("Unexpected shader type (%u) query\n", shader);
 525       return 0;
 526    }
 527    return 0;
 528 }
 529
 530
 531 static int
 532 vgpu10_get_shader_param(struct pipe_screen *screen, unsigned shader,
 533                         enum pipe_shader_cap param)
 534 {
 535    struct svga_screen *svgascreen = svga_screen(screen);
 536    struct svga_winsys_screen *sws = svgascreen->sws;
 537
 538    assert(sws->have_vgpu10);
 539    (void) sws;  /* silence unused var warnings in non-debug builds */
 540
 541    /* Only VS, GS, FS supported */
 542    if (shader != PIPE_SHADER_VERTEX &&
 543        shader != PIPE_SHADER_GEOMETRY &&
 544        shader != PIPE_SHADER_FRAGMENT) {
 545       return 0;
 546    }
 547
 548    /* NOTE: we do not query the device for any caps/limits at this time */
 549
 550    /* Generally the same limits for vertex, geometry and fragment shaders */
 551    switch (param) {
 552    case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 553    case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 554    case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 555    case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 556       return 64 * 1024;
 557    case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 558       return 64;
 559    case PIPE_SHADER_CAP_MAX_INPUTS:
 560       if (shader == PIPE_SHADER_FRAGMENT)
 561          return VGPU10_MAX_FS_INPUTS;
 562       else if (shader == PIPE_SHADER_GEOMETRY)
 563          return VGPU10_MAX_GS_INPUTS;
 564       else
 565          return VGPU10_MAX_VS_INPUTS;
 566    case PIPE_SHADER_CAP_MAX_OUTPUTS:
 567       if (shader == PIPE_SHADER_FRAGMENT)
 568          return VGPU10_MAX_FS_OUTPUTS;
 569       else if (shader == PIPE_SHADER_GEOMETRY)
 570          return VGPU10_MAX_GS_OUTPUTS;
 571       else
 572          return VGPU10_MAX_VS_OUTPUTS;
 573    case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 574       return VGPU10_MAX_CONSTANT_BUFFER_ELEMENT_COUNT * sizeof(float[4]);
 575    case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 576       return svgascreen->max_const_buffers;
 577    case PIPE_SHADER_CAP_MAX_TEMPS:
 578       return VGPU10_MAX_TEMPS;
 579    case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 580    case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 581    case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 582    case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 583       return TRUE; /* XXX verify */
 584    case PIPE_SHADER_CAP_MAX_PREDS:
 585       return 0;
 586    case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 587    case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 588    case PIPE_SHADER_CAP_SUBROUTINES:
 589    case PIPE_SHADER_CAP_INTEGERS:
 590       return TRUE;
 591    case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 592    case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 593       return SVGA3D_DX_MAX_SAMPLERS;
 594    case PIPE_SHADER_CAP_PREFERRED_IR:
 595       return PIPE_SHADER_IR_TGSI;
 596    case PIPE_SHADER_CAP_DOUBLES:
 597    case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 598    case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 599    case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 600    case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 601       return 0;
 602    default:
 603       debug_printf("Unexpected vgpu10 shader query %u\n", param);
 604       return 0;
 605    }
 606    return 0;
 607 }
 608
 609
 610 static int
 611 svga_get_shader_param(struct pipe_screen *screen, unsigned shader,
 612                       enum pipe_shader_cap param)
 613 {
 614    struct svga_screen *svgascreen = svga_screen(screen);
 615    struct svga_winsys_screen *sws = svgascreen->sws;
 616    if (sws->have_vgpu10) {
 617       return vgpu10_get_shader_param(screen, shader, param);
 618    }
 619    else {
 620       return vgpu9_get_shader_param(screen, shader, param);
 621    }
 622 }
 623
 624
 625 /**
 626  * Implement pipe_screen::is_format_supported().
 627  * \param bindings  bitmask of PIPE_BIND_x flags
 628  */
 629 static boolean
 630 svga_is_format_supported( struct pipe_screen *screen,
 631                           enum pipe_format format,
 632                           enum pipe_texture_target target,
 633                           unsigned sample_count,
 634                           unsigned bindings)
 635 {
 636    struct svga_screen *ss = svga_screen(screen);
 637    SVGA3dSurfaceFormat svga_format;
 638    SVGA3dSurfaceFormatCaps caps;
 639    SVGA3dSurfaceFormatCaps mask;
 640
 641    assert(bindings);
 642
 643    if (sample_count > 1) {
 644       /* In ms_samples, if bit N is set it means that we support
 645        * multisample with N+1 samples per pixel.
 646        */
 647       if ((ss->ms_samples & (1 << (sample_count - 1))) == 0) {
 648          return FALSE;
 649       }
 650    }
 651
 652    svga_format = svga_translate_format(ss, format, bindings);
 653    if (svga_format == SVGA3D_FORMAT_INVALID) {
 654       return FALSE;
 655    }
 656
 657    /* we don't support sRGB rendering into display targets */
 658    if (util_format_is_srgb(format) && (bindings & PIPE_BIND_DISPLAY_TARGET)) {
 659       return FALSE;
 660    }
 661
 662    /*
 663     * For VGPU10 vertex formats, skip querying host capabilities
 664     */
 665
 666    if (ss->sws->have_vgpu10 && (bindings & PIPE_BIND_VERTEX_BUFFER)) {
 667       SVGA3dSurfaceFormat svga_format;
 668       unsigned flags;
 669       svga_translate_vertex_format_vgpu10(format, &svga_format, &flags);
 670       return svga_format != SVGA3D_FORMAT_INVALID;
 671    }
 672
 673    /*
 674     * Override host capabilities, so that we end up with the same
 675     * visuals for all virtual hardware implementations.
 676     */
 677
 678    if (bindings & PIPE_BIND_DISPLAY_TARGET) {
 679       switch (svga_format) {
 680       case SVGA3D_A8R8G8B8:
 681       case SVGA3D_X8R8G8B8:
 682       case SVGA3D_R5G6B5:
 683          break;
 684
 685       /* VGPU10 formats */
 686       case SVGA3D_B8G8R8A8_UNORM:
 687       case SVGA3D_B8G8R8X8_UNORM:
 688       case SVGA3D_B5G6R5_UNORM:
 689          break;
 690
 691       /* Often unsupported/problematic. This means we end up with the same
 692        * visuals for all virtual hardware implementations.
 693        */
 694       case SVGA3D_A4R4G4B4:
 695       case SVGA3D_A1R5G5B5:
 696          return FALSE;
 697
 698       default:
 699          return FALSE;
 700       }
 701    }
 702
 703    /*
 704     * Query the host capabilities.
 705     */
 706
 707    svga_get_format_cap(ss, svga_format, &caps);
 708
 709    if (bindings & PIPE_BIND_RENDER_TARGET) {
 710       /* Check that the color surface is blendable, unless it's an
 711        * integer format.
 712        */
 713       if (!svga_format_is_integer(svga_format) &&
 714           (caps.value & SVGA3DFORMAT_OP_NOALPHABLEND)) {
 715          return FALSE;
 716       }
 717    }
 718
 719    mask.value = 0;
 720    if (bindings & PIPE_BIND_RENDER_TARGET) {
 721       mask.value |= SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET;
 722    }
 723    if (bindings & PIPE_BIND_DEPTH_STENCIL) {
 724       mask.value |= SVGA3DFORMAT_OP_ZSTENCIL;
 725    }
 726    if (bindings & PIPE_BIND_SAMPLER_VIEW) {
 727       mask.value |= SVGA3DFORMAT_OP_TEXTURE;
 728    }
 729
 730    if (target == PIPE_TEXTURE_CUBE) {
 731       mask.value |= SVGA3DFORMAT_OP_CUBETEXTURE;
 732    }
 733    else if (target == PIPE_TEXTURE_3D) {
 734       mask.value |= SVGA3DFORMAT_OP_VOLUMETEXTURE;
 735    }
 736
 737    return (caps.value & mask.value) == mask.value;
 738 }
 739
 740
 741 static void
 742 svga_fence_reference(struct pipe_screen *screen,
 743                      struct pipe_fence_handle **ptr,
 744                      struct pipe_fence_handle *fence)
 745 {
 746    struct svga_winsys_screen *sws = svga_screen(screen)->sws;
 747    sws->fence_reference(sws, ptr, fence);
 748 }
 749
 750
 751 static boolean
 752 svga_fence_finish(struct pipe_screen *screen,
 753                   struct pipe_fence_handle *fence,
 754                   uint64_t timeout)
 755 {
 756    struct svga_winsys_screen *sws = svga_screen(screen)->sws;
 757
 758    if (!timeout)
 759       return sws->fence_signalled(sws, fence, 0) == 0;
 760
 761    SVGA_DBG(DEBUG_DMA|DEBUG_PERF, "%s fence_ptr %p\n",
 762             __FUNCTION__, fence);
 763
 764    return sws->fence_finish(sws, fence, 0) == 0;
 765 }
 766
 767
 768 static int
 769 svga_get_driver_query_info(struct pipe_screen *screen,
 770                            unsigned index,
 771                            struct pipe_driver_query_info *info)
 772 {
 773    static const struct pipe_driver_query_info queries[] = {
 774       {"draw-calls", SVGA_QUERY_DRAW_CALLS, {0}},
 775       {"fallbacks", SVGA_QUERY_FALLBACKS, {0}},
 776       {"memory-used", SVGA_QUERY_MEMORY_USED, {0}, PIPE_DRIVER_QUERY_TYPE_BYTES}
 777    };
 778
 779    if (!info)
 780       return Elements(queries);
 781
 782    if (index >= Elements(queries))
 783       return 0;
 784
 785    *info = queries[index];
 786    return 1;
 787 }
 788
 789
 790 static void
 791 svga_destroy_screen( struct pipe_screen *screen )
 792 {
 793    struct svga_screen *svgascreen = svga_screen(screen);
 794
 795    svga_screen_cache_cleanup(svgascreen);
 796
 797    pipe_mutex_destroy(svgascreen->swc_mutex);
 798    pipe_mutex_destroy(svgascreen->tex_mutex);
 799
 800    svgascreen->sws->destroy(svgascreen->sws);
 801
 802    FREE(svgascreen);
 803 }
 804
 805
 806 /**
 807  * Create a new svga_screen object
 808  */
 809 struct pipe_screen *
 810 svga_screen_create(struct svga_winsys_screen *sws)
 811 {
 812    struct svga_screen *svgascreen;
 813    struct pipe_screen *screen;
 814
 815 #ifdef DEBUG
 816    SVGA_DEBUG = debug_get_flags_option("SVGA_DEBUG", svga_debug_flags, 0 );
 817 #endif
 818
 819    svgascreen = CALLOC_STRUCT(svga_screen);
 820    if (!svgascreen)
 821       goto error1;
 822
 823    svgascreen->debug.force_level_surface_view =
 824       debug_get_bool_option("SVGA_FORCE_LEVEL_SURFACE_VIEW", FALSE);
 825    svgascreen->debug.force_surface_view =
 826       debug_get_bool_option("SVGA_FORCE_SURFACE_VIEW", FALSE);
 827    svgascreen->debug.force_sampler_view =
 828       debug_get_bool_option("SVGA_FORCE_SAMPLER_VIEW", FALSE);
 829    svgascreen->debug.no_surface_view =
 830       debug_get_bool_option("SVGA_NO_SURFACE_VIEW", FALSE);
 831    svgascreen->debug.no_sampler_view =
 832       debug_get_bool_option("SVGA_NO_SAMPLER_VIEW", FALSE);
 833
 834    screen = &svgascreen->screen;
 835
 836    screen->destroy = svga_destroy_screen;
 837    screen->get_name = svga_get_name;
 838    screen->get_vendor = svga_get_vendor;
 839    screen->get_device_vendor = svga_get_vendor; // TODO actual device vendor
 840    screen->get_param = svga_get_param;
 841    screen->get_shader_param = svga_get_shader_param;
 842    screen->get_paramf = svga_get_paramf;
 843    screen->get_timestamp = NULL;
 844    screen->is_format_supported = svga_is_format_supported;
 845    screen->context_create = svga_context_create;
 846    screen->fence_reference = svga_fence_reference;
 847    screen->fence_finish = svga_fence_finish;
 848    screen->get_driver_query_info = svga_get_driver_query_info;
 849    svgascreen->sws = sws;
 850
 851    svga_init_screen_resource_functions(svgascreen);
 852
 853    if (sws->get_hw_version) {
 854       svgascreen->hw_version = sws->get_hw_version(sws);
 855    } else {
 856       svgascreen->hw_version = SVGA3D_HWVERSION_WS65_B1;
 857    }
 858
 859    /*
 860     * The D16, D24X8, and D24S8 formats always do an implicit shadow compare
 861     * when sampled from, where as the DF16, DF24, and D24S8_INT do not.  So
 862     * we prefer the later when available.
 863     *
 864     * This mimics hardware vendors extensions for D3D depth sampling. See also
 865     * http://aras-p.info/texts/D3D9GPUHacks.html
 866     */
 867
 868    {
 869       boolean has_df16, has_df24, has_d24s8_int;
 870       SVGA3dSurfaceFormatCaps caps;
 871       SVGA3dSurfaceFormatCaps mask;
 872       mask.value = 0;
 873       mask.zStencil = 1;
 874       mask.texture = 1;
 875
 876       svgascreen->depth.z16 = SVGA3D_Z_D16;
 877       svgascreen->depth.x8z24 = SVGA3D_Z_D24X8;
 878       svgascreen->depth.s8z24 = SVGA3D_Z_D24S8;
 879
 880       svga_get_format_cap(svgascreen, SVGA3D_Z_DF16, &caps);
 881       has_df16 = (caps.value & mask.value) == mask.value;
 882
 883       svga_get_format_cap(svgascreen, SVGA3D_Z_DF24, &caps);
 884       has_df24 = (caps.value & mask.value) == mask.value;
 885
 886       svga_get_format_cap(svgascreen, SVGA3D_Z_D24S8_INT, &caps);
 887       has_d24s8_int = (caps.value & mask.value) == mask.value;
 888
 889       /* XXX: We might want some other logic here.
 890        * Like if we only have d24s8_int we should
 891        * emulate the other formats with that.
 892        */
 893       if (has_df16) {
 894          svgascreen->depth.z16 = SVGA3D_Z_DF16;
 895       }
 896       if (has_df24) {
 897          svgascreen->depth.x8z24 = SVGA3D_Z_DF24;
 898       }
 899       if (has_d24s8_int) {
 900          svgascreen->depth.s8z24 = SVGA3D_Z_D24S8_INT;
 901       }
 902    }
 903
 904    /* Query device caps
 905     */
 906    if (sws->have_vgpu10) {
 907       svgascreen->haveProvokingVertex
 908          = get_bool_cap(sws, SVGA3D_DEVCAP_DX_PROVOKING_VERTEX, FALSE);
 909       svgascreen->haveLineSmooth = TRUE;
 910       svgascreen->maxPointSize = 80.0F;
 911       svgascreen->max_color_buffers = SVGA3D_DX_MAX_RENDER_TARGETS;
 912
 913       /* Multisample samples per pixel */
 914       svgascreen->ms_samples =
 915          get_uint_cap(sws, SVGA3D_DEVCAP_MULTISAMPLE_MASKABLESAMPLES, 0);
 916
 917       /* Maximum number of constant buffers */
 918       svgascreen->max_const_buffers =
 919          get_uint_cap(sws, SVGA3D_DEVCAP_DX_MAX_CONSTANT_BUFFERS, 1);
 920       assert(svgascreen->max_const_buffers <= SVGA_MAX_CONST_BUFS);
 921    }
 922    else {
 923       /* VGPU9 */
 924       unsigned vs_ver = get_uint_cap(sws, SVGA3D_DEVCAP_VERTEX_SHADER_VERSION,
 925                                      SVGA3DVSVERSION_NONE);
 926       unsigned fs_ver = get_uint_cap(sws, SVGA3D_DEVCAP_FRAGMENT_SHADER_VERSION,
 927                                      SVGA3DPSVERSION_NONE);
 928
 929       /* we require Shader model 3.0 or later */
 930       if (fs_ver < SVGA3DPSVERSION_30 || vs_ver < SVGA3DVSVERSION_30) {
 931          goto error2;
 932       }
 933
 934       svgascreen->haveProvokingVertex = FALSE;
 935
 936       svgascreen->haveLineSmooth =
 937          get_bool_cap(sws, SVGA3D_DEVCAP_LINE_AA, FALSE);
 938
 939       svgascreen->maxPointSize =
 940          get_float_cap(sws, SVGA3D_DEVCAP_MAX_POINT_SIZE, 1.0f);
 941       /* Keep this to a reasonable size to avoid failures in conform/pntaa.c */
 942       svgascreen->maxPointSize = MIN2(svgascreen->maxPointSize, 80.0f);
 943
 944       /* The SVGA3D device always supports 4 targets at this time, regardless
 945        * of what querying SVGA3D_DEVCAP_MAX_RENDER_TARGETS might return.
 946        */
 947       svgascreen->max_color_buffers = 4;
 948
 949       /* Only support one constant buffer
 950        */
 951       svgascreen->max_const_buffers = 1;
 952
 953       /* No multisampling */
 954       svgascreen->ms_samples = 0;
 955    }
 956
 957    /* common VGPU9 / VGPU10 caps */
 958    svgascreen->haveLineStipple =
 959       get_bool_cap(sws, SVGA3D_DEVCAP_LINE_STIPPLE, FALSE);
 960
 961    svgascreen->maxLineWidth =
 962       get_float_cap(sws, SVGA3D_DEVCAP_MAX_LINE_WIDTH, 1.0f);
 963
 964    svgascreen->maxLineWidthAA =
 965       get_float_cap(sws, SVGA3D_DEVCAP_MAX_AA_LINE_WIDTH, 1.0f);
 966
 967    if (0) {
 968       debug_printf("svga: haveProvokingVertex %u\n",
 969                    svgascreen->haveProvokingVertex);
 970       debug_printf("svga: haveLineStip %u  "
 971                    "haveLineSmooth %u  maxLineWidth %f\n",
 972                    svgascreen->haveLineStipple, svgascreen->haveLineSmooth,
 973                    svgascreen->maxLineWidth);
 974       debug_printf("svga: maxPointSize %g\n", svgascreen->maxPointSize);
 975    }
 976
 977    pipe_mutex_init(svgascreen->tex_mutex);
 978    pipe_mutex_init(svgascreen->swc_mutex);
 979
 980    svga_screen_cache_init(svgascreen);
 981
 982    return screen;
 983 error2:
 984    FREE(svgascreen);
 985 error1:
 986    return NULL;
 987 }
 988
 989 struct svga_winsys_screen *
 990 svga_winsys_screen(struct pipe_screen *screen)
 991 {
 992    return svga_screen(screen)->sws;
 993 }
 994
 995 #ifdef DEBUG
 996 struct svga_screen *
 997 svga_screen(struct pipe_screen *screen)
 998 {
 999    assert(screen);
1000    assert(screen->destroy == svga_destroy_screen);
1001    return (struct svga_screen *)screen;
1002 }
1003 #endif