src/gallium/drivers/svga/svga_screen_buffer.c

   1 /**********************************************************
   2  * Copyright 2008-2009 VMware, Inc.  All rights reserved.
   3  *
   4  * Permission is hereby granted, free of charge, to any person
   5  * obtaining a copy of this software and associated documentation
   6  * files (the "Software"), to deal in the Software without
   7  * restriction, including without limitation the rights to use, copy,
   8  * modify, merge, publish, distribute, sublicense, and/or sell copies
   9  * of the Software, and to permit persons to whom the Software is
  10  * furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be
  13  * included in all copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  16  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  17  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  18  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  19  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  20  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  21  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  22  * SOFTWARE.
  23  *
  24  **********************************************************/
  25
  26 #include "svga_cmd.h"
  27
  28 #include "pipe/p_state.h"
  29 #include "pipe/p_defines.h"
  30 #include "util/u_inlines.h"
  31 #include "os/os_thread.h"
  32 #include "util/u_math.h"
  33 #include "util/u_memory.h"
  34
  35 #include "svga_context.h"
  36 #include "svga_screen.h"
  37 #include "svga_screen_buffer.h"
  38 #include "svga_winsys.h"
  39 #include "svga_debug.h"
  40
  41
  42 /**
  43  * Vertex and index buffers have to be treated slightly differently from
  44  * regular guest memory regions because the SVGA device sees them as
  45  * surfaces, and the state tracker can create/destroy without the pipe
  46  * driver, therefore we must do the uploads from the vws.
  47  */
  48 static INLINE boolean
  49 svga_buffer_needs_hw_storage(unsigned usage)
  50 {
  51    return usage & (PIPE_BUFFER_USAGE_VERTEX | PIPE_BUFFER_USAGE_INDEX);
  52 }
  53
  54
  55 static INLINE enum pipe_error
  56 svga_buffer_create_host_surface(struct svga_screen *ss,
  57                                 struct svga_buffer *sbuf)
  58 {
  59    if(!sbuf->handle) {
  60       sbuf->key.flags = 0;
  61
  62       sbuf->key.format = SVGA3D_BUFFER;
  63       if(sbuf->base.usage & PIPE_BUFFER_USAGE_VERTEX)
  64          sbuf->key.flags |= SVGA3D_SURFACE_HINT_VERTEXBUFFER;
  65       if(sbuf->base.usage & PIPE_BUFFER_USAGE_INDEX)
  66          sbuf->key.flags |= SVGA3D_SURFACE_HINT_INDEXBUFFER;
  67
  68       sbuf->key.size.width = sbuf->base.size;
  69       sbuf->key.size.height = 1;
  70       sbuf->key.size.depth = 1;
  71
  72       sbuf->key.numFaces = 1;
  73       sbuf->key.numMipLevels = 1;
  74       sbuf->key.cachable = 1;
  75
  76       SVGA_DBG(DEBUG_DMA, "surface_create for buffer sz %d\n", sbuf->base.size);
  77
  78       sbuf->handle = svga_screen_surface_create(ss, &sbuf->key);
  79       if(!sbuf->handle)
  80          return PIPE_ERROR_OUT_OF_MEMORY;
  81
  82       /* Always set the discard flag on the first time the buffer is written
  83        * as svga_screen_surface_create might have passed a recycled host
  84        * buffer.
  85        */
  86       sbuf->hw.flags.discard = TRUE;
  87
  88       SVGA_DBG(DEBUG_DMA, "   --> got sid %p sz %d (buffer)\n", sbuf->handle, sbuf->base.size);
  89    }
  90
  91    return PIPE_OK;
  92 }
  93
  94
  95 static INLINE void
  96 svga_buffer_destroy_host_surface(struct svga_screen *ss,
  97                                  struct svga_buffer *sbuf)
  98 {
  99    if(sbuf->handle) {
 100       SVGA_DBG(DEBUG_DMA, " ungrab sid %p sz %d\n", sbuf->handle, sbuf->base.size);
 101       svga_screen_surface_destroy(ss, &sbuf->key, &sbuf->handle);
 102    }
 103 }
 104
 105
 106 static INLINE void
 107 svga_buffer_destroy_hw_storage(struct svga_screen *ss, struct svga_buffer *sbuf)
 108 {
 109    struct svga_winsys_screen *sws = ss->sws;
 110
 111    assert(!sbuf->map.count);
 112    assert(sbuf->hw.buf);
 113    if(sbuf->hw.buf) {
 114       sws->buffer_destroy(sws, sbuf->hw.buf);
 115       sbuf->hw.buf = NULL;
 116    }
 117 }
 118
 119 struct svga_winsys_buffer *
 120 svga_winsys_buffer_create( struct svga_screen *ss,
 121                            unsigned alignment,
 122                            unsigned usage,
 123                            unsigned size )
 124 {
 125    struct svga_winsys_screen *sws = ss->sws;
 126    struct svga_winsys_buffer *buf;
 127
 128    /* Just try */
 129    buf = sws->buffer_create(sws, alignment, usage, size);
 130    if(!buf) {
 131
 132       SVGA_DBG(DEBUG_DMA|DEBUG_PERF, "flushing screen to find %d bytes GMR\n",
 133                size);
 134
 135       /* Try flushing all pending DMAs */
 136       svga_screen_flush(ss, NULL);
 137       buf = sws->buffer_create(sws, alignment, usage, size);
 138
 139    }
 140
 141    return buf;
 142 }
 143
 144
 145 /**
 146  * Allocate DMA'ble storage for the buffer.
 147  *
 148  * Called before mapping a buffer.
 149  */
 150 static INLINE enum pipe_error
 151 svga_buffer_create_hw_storage(struct svga_screen *ss,
 152                               struct svga_buffer *sbuf)
 153 {
 154    if(!sbuf->hw.buf) {
 155       unsigned alignment = sbuf->base.alignment;
 156       unsigned usage = 0;
 157       unsigned size = sbuf->base.size;
 158
 159       sbuf->hw.buf = svga_winsys_buffer_create(ss, alignment, usage, size);
 160       if(!sbuf->hw.buf)
 161          return PIPE_ERROR_OUT_OF_MEMORY;
 162
 163       assert(!sbuf->needs_flush);
 164    }
 165
 166    return PIPE_OK;
 167 }
 168
 169
 170 /**
 171  * Variant of SVGA3D_BufferDMA which leaves the copy box temporarily in blank.
 172  */
 173 static enum pipe_error
 174 svga_buffer_upload_command(struct svga_context *svga,
 175                            struct svga_buffer *sbuf)
 176 {
 177    struct svga_winsys_context *swc = svga->swc;
 178    struct svga_winsys_buffer *guest = sbuf->hw.buf;
 179    struct svga_winsys_surface *host = sbuf->handle;
 180    SVGA3dTransferType transfer = SVGA3D_WRITE_HOST_VRAM;
 181    SVGA3dSurfaceDMAFlags flags = sbuf->hw.flags;
 182    SVGA3dCmdSurfaceDMA *cmd;
 183    uint32 numBoxes = sbuf->hw.num_ranges;
 184    SVGA3dCopyBox *boxes;
 185    SVGA3dCmdSurfaceDMASuffix *pSuffix;
 186    unsigned region_flags;
 187    unsigned surface_flags;
 188    struct pipe_buffer *dummy;
 189
 190    if(transfer == SVGA3D_WRITE_HOST_VRAM) {
 191       region_flags = PIPE_BUFFER_USAGE_GPU_READ;
 192       surface_flags = PIPE_BUFFER_USAGE_GPU_WRITE;
 193    }
 194    else if(transfer == SVGA3D_READ_HOST_VRAM) {
 195       region_flags = PIPE_BUFFER_USAGE_GPU_WRITE;
 196       surface_flags = PIPE_BUFFER_USAGE_GPU_READ;
 197    }
 198    else {
 199       assert(0);
 200       return PIPE_ERROR_BAD_INPUT;
 201    }
 202
 203    assert(numBoxes);
 204
 205    cmd = SVGA3D_FIFOReserve(swc,
 206                             SVGA_3D_CMD_SURFACE_DMA,
 207                             sizeof *cmd + numBoxes * sizeof *boxes + sizeof *pSuffix,
 208                             2);
 209    if(!cmd)
 210       return PIPE_ERROR_OUT_OF_MEMORY;
 211
 212    swc->region_relocation(swc, &cmd->guest.ptr, guest, 0, region_flags);
 213    cmd->guest.pitch = 0;
 214
 215    swc->surface_relocation(swc, &cmd->host.sid, host, surface_flags);
 216    cmd->host.face = 0;
 217    cmd->host.mipmap = 0;
 218
 219    cmd->transfer = transfer;
 220
 221    sbuf->hw.boxes = (SVGA3dCopyBox *)&cmd[1];
 222    sbuf->hw.svga = svga;
 223
 224    /* Increment reference count */
 225    dummy = NULL;
 226    pipe_buffer_reference(&dummy, &sbuf->base);
 227
 228    pSuffix = (SVGA3dCmdSurfaceDMASuffix *)((uint8_t*)cmd + sizeof *cmd + numBoxes * sizeof *boxes);
 229    pSuffix->suffixSize = sizeof *pSuffix;
 230    pSuffix->maximumOffset = sbuf->base.size;
 231    pSuffix->flags = flags;
 232
 233    swc->commit(swc);
 234
 235    return PIPE_OK;
 236 }
 237
 238
 239 /**
 240  * Patch up the upload DMA command reserved by svga_buffer_upload_command
 241  * with the final ranges.
 242  */
 243 static void
 244 svga_buffer_upload_flush(struct svga_context *svga,
 245                          struct svga_buffer *sbuf)
 246 {
 247    SVGA3dCopyBox *boxes;
 248    unsigned i;
 249
 250    assert(sbuf->handle);
 251    assert(sbuf->hw.buf);
 252    assert(sbuf->hw.num_ranges);
 253    assert(sbuf->hw.svga == svga);
 254    assert(sbuf->hw.boxes);
 255
 256    /*
 257     * Patch the DMA command with the final copy box.
 258     */
 259
 260    SVGA_DBG(DEBUG_DMA, "dma to sid %p\n", sbuf->handle);
 261
 262    boxes = sbuf->hw.boxes;
 263    for(i = 0; i < sbuf->hw.num_ranges; ++i) {
 264       SVGA_DBG(DEBUG_DMA, "  bytes %u - %u\n",
 265                sbuf->hw.ranges[i].start, sbuf->hw.ranges[i].end);
 266
 267       boxes[i].x = sbuf->hw.ranges[i].start;
 268       boxes[i].y = 0;
 269       boxes[i].z = 0;
 270       boxes[i].w = sbuf->hw.ranges[i].end - sbuf->hw.ranges[i].start;
 271       boxes[i].h = 1;
 272       boxes[i].d = 1;
 273       boxes[i].srcx = sbuf->hw.ranges[i].start;
 274       boxes[i].srcy = 0;
 275       boxes[i].srcz = 0;
 276    }
 277
 278    sbuf->hw.num_ranges = 0;
 279    memset(&sbuf->hw.flags, 0, sizeof sbuf->hw.flags);
 280
 281    assert(sbuf->head.prev && sbuf->head.next);
 282    LIST_DEL(&sbuf->head);
 283 #ifdef DEBUG
 284    sbuf->head.next = sbuf->head.prev = NULL;
 285 #endif
 286    sbuf->needs_flush = FALSE;
 287
 288    sbuf->hw.svga = NULL;
 289    sbuf->hw.boxes = NULL;
 290
 291    sbuf->host_written = TRUE;
 292
 293    /* Decrement reference count */
 294    pipe_reference(&(sbuf->base.reference), NULL);
 295    sbuf = NULL;
 296 }
 297
 298
 299 /**
 300  * Queue a DMA upload of a range of this buffer to the host.
 301  *
 302  * This function only notes the range down. It doesn't actually emit a DMA
 303  * upload command. That only happens when a context tries to refer to this
 304  * buffer, and the DMA upload command is added to that context's command buffer.
 305  *
 306  * We try to lump as many contiguous DMA transfers together as possible.
 307  */
 308 static void
 309 svga_buffer_upload_queue(struct svga_buffer *sbuf,
 310                          unsigned start,
 311                          unsigned end)
 312 {
 313    unsigned i;
 314    unsigned nearest_range;
 315    unsigned nearest_dist;
 316
 317    assert(sbuf->hw.buf);
 318    assert(end > start);
 319
 320    if (sbuf->hw.num_ranges < SVGA_BUFFER_MAX_RANGES) {
 321       nearest_range = sbuf->hw.num_ranges;
 322       nearest_dist = ~0;
 323    } else {
 324       nearest_range = SVGA_BUFFER_MAX_RANGES - 1;
 325       nearest_dist = 0;
 326    }
 327
 328    /*
 329     * Try to grow one of the ranges.
 330     *
 331     * Note that it is not this function task to care about overlapping ranges,
 332     * as the GMR was already given so it is too late to do anything. Situations
 333     * where overlapping ranges may pose a problem should be detected via
 334     * pipe_context::is_buffer_referenced and the context that refers to the
 335     * buffer should be flushed.
 336     */
 337
 338    for(i = 0; i < sbuf->hw.num_ranges; ++i) {
 339       int left_dist;
 340       int right_dist;
 341       int dist;
 342
 343       left_dist = start - sbuf->hw.ranges[i].end;
 344       right_dist = sbuf->hw.ranges[i].start - end;
 345       dist = MAX2(left_dist, right_dist);
 346
 347       if (dist <= 0) {
 348          /*
 349           * Ranges are contiguous or overlapping -- extend this one and return.
 350           */
 351
 352          sbuf->hw.ranges[i].start = MIN2(sbuf->hw.ranges[i].start, start);
 353          sbuf->hw.ranges[i].end   = MAX2(sbuf->hw.ranges[i].end,   end);
 354          return;
 355       }
 356       else {
 357          /*
 358           * Discontiguous ranges -- keep track of the nearest range.
 359           */
 360
 361          if (dist < nearest_dist) {
 362             nearest_range = i;
 363             nearest_dist = dist;
 364          }
 365       }
 366    }
 367
 368    /*
 369     * We cannot add a new range to an existing DMA command, so patch-up the
 370     * pending DMA upload and start clean.
 371     */
 372
 373    if(sbuf->needs_flush)
 374       svga_buffer_upload_flush(sbuf->hw.svga, sbuf);
 375
 376    assert(!sbuf->needs_flush);
 377    assert(!sbuf->hw.svga);
 378    assert(!sbuf->hw.boxes);
 379
 380    if (sbuf->hw.num_ranges < SVGA_BUFFER_MAX_RANGES) {
 381       /*
 382        * Add a new range.
 383        */
 384
 385       sbuf->hw.ranges[sbuf->hw.num_ranges].start = start;
 386       sbuf->hw.ranges[sbuf->hw.num_ranges].end = end;
 387       ++sbuf->hw.num_ranges;
 388    } else {
 389       /*
 390        * Everything else failed, so just extend the nearest range.
 391        *
 392        * It is OK to do this because we always keep a local copy of the
 393        * host buffer data, for SW TNL, and the host never modifies the buffer.
 394        */
 395
 396       assert(nearest_range < SVGA_BUFFER_MAX_RANGES);
 397       assert(nearest_range < sbuf->hw.num_ranges);
 398       sbuf->hw.ranges[nearest_range].start = MIN2(sbuf->hw.ranges[nearest_range].start, start);
 399       sbuf->hw.ranges[nearest_range].end   = MAX2(sbuf->hw.ranges[nearest_range].end,   end);
 400    }
 401 }
 402
 403
 404 static void *
 405 svga_buffer_map_range( struct pipe_screen *screen,
 406                        struct pipe_buffer *buf,
 407                        unsigned offset, unsigned length,
 408                        unsigned usage )
 409 {
 410    struct svga_screen *ss = svga_screen(screen);
 411    struct svga_winsys_screen *sws = ss->sws;
 412    struct svga_buffer *sbuf = svga_buffer( buf );
 413    void *map;
 414
 415    if(sbuf->swbuf) {
 416       /* User/malloc buffer */
 417       map = sbuf->swbuf;
 418    }
 419    else {
 420       if(!sbuf->hw.buf) {
 421          if(svga_buffer_create_hw_storage(ss, sbuf) != PIPE_OK)
 422             return NULL;
 423
 424          /* Populate the hardware storage if the host surface pre-existed */
 425          if(sbuf->host_written) {
 426             SVGA3dSurfaceDMAFlags flags;
 427             enum pipe_error ret;
 428             struct pipe_fence_handle *fence = NULL;
 429
 430             assert(sbuf->handle);
 431
 432             SVGA_DBG(DEBUG_DMA|DEBUG_PERF, "dma from sid %p (buffer), bytes %u - %u\n",
 433                      sbuf->handle, 0, sbuf->base.size);
 434
 435             memset(&flags, 0, sizeof flags);
 436
 437             ret = SVGA3D_BufferDMA(ss->swc,
 438                                    sbuf->hw.buf,
 439                                    sbuf->handle,
 440                                    SVGA3D_READ_HOST_VRAM,
 441                                    sbuf->base.size,
 442                                    0,
 443                                    flags);
 444             if(ret != PIPE_OK) {
 445                ss->swc->flush(ss->swc, NULL);
 446
 447                ret = SVGA3D_BufferDMA(ss->swc,
 448                                       sbuf->hw.buf,
 449                                       sbuf->handle,
 450                                       SVGA3D_READ_HOST_VRAM,
 451                                       sbuf->base.size,
 452                                       0,
 453                                       flags);
 454                assert(ret == PIPE_OK);
 455             }
 456
 457             ss->swc->flush(ss->swc, &fence);
 458             sws->fence_finish(sws, fence, 0);
 459             sws->fence_reference(sws, &fence, NULL);
 460          }
 461       }
 462
 463       map = sws->buffer_map(sws, sbuf->hw.buf, usage);
 464    }
 465
 466    if(map) {
 467       pipe_mutex_lock(ss->swc_mutex);
 468
 469       ++sbuf->map.count;
 470
 471       if (usage & PIPE_BUFFER_USAGE_CPU_WRITE) {
 472          assert(sbuf->map.count <= 1);
 473          sbuf->map.writing = TRUE;
 474          if (usage & PIPE_BUFFER_USAGE_FLUSH_EXPLICIT)
 475             sbuf->map.flush_explicit = TRUE;
 476       }
 477
 478       pipe_mutex_unlock(ss->swc_mutex);
 479    }
 480
 481    return map;
 482 }
 483
 484 static void
 485 svga_buffer_flush_mapped_range( struct pipe_screen *screen,
 486                                 struct pipe_buffer *buf,
 487                                 unsigned offset, unsigned length)
 488 {
 489    struct svga_buffer *sbuf = svga_buffer( buf );
 490    struct svga_screen *ss = svga_screen(screen);
 491
 492    pipe_mutex_lock(ss->swc_mutex);
 493    assert(sbuf->map.writing);
 494    if(sbuf->map.writing) {
 495       assert(sbuf->map.flush_explicit);
 496       if(sbuf->hw.buf)
 497          svga_buffer_upload_queue(sbuf, offset, offset + length);
 498    }
 499    pipe_mutex_unlock(ss->swc_mutex);
 500 }
 501
 502 static void
 503 svga_buffer_unmap( struct pipe_screen *screen,
 504                    struct pipe_buffer *buf)
 505 {
 506    struct svga_screen *ss = svga_screen(screen);
 507    struct svga_winsys_screen *sws = ss->sws;
 508    struct svga_buffer *sbuf = svga_buffer( buf );
 509
 510    pipe_mutex_lock(ss->swc_mutex);
 511
 512    assert(sbuf->map.count);
 513    if(sbuf->map.count)
 514       --sbuf->map.count;
 515
 516    if(sbuf->hw.buf)
 517       sws->buffer_unmap(sws, sbuf->hw.buf);
 518
 519    if(sbuf->map.writing) {
 520       if(!sbuf->map.flush_explicit) {
 521          /* No mapped range was flushed -- flush the whole buffer */
 522          SVGA_DBG(DEBUG_DMA, "flushing the whole buffer\n");
 523
 524          if(sbuf->hw.buf)
 525             svga_buffer_upload_queue(sbuf, 0, sbuf->base.size);
 526       }
 527
 528       sbuf->map.writing = FALSE;
 529       sbuf->map.flush_explicit = FALSE;
 530    }
 531
 532    pipe_mutex_unlock(ss->swc_mutex);
 533 }
 534
 535 static void
 536 svga_buffer_destroy( struct pipe_buffer *buf )
 537 {
 538    struct svga_screen *ss = svga_screen(buf->screen);
 539    struct svga_buffer *sbuf = svga_buffer( buf );
 540
 541    assert(!p_atomic_read(&buf->reference.count));
 542
 543    assert(!sbuf->needs_flush);
 544
 545    if(sbuf->handle)
 546       svga_buffer_destroy_host_surface(ss, sbuf);
 547
 548    if(sbuf->hw.buf)
 549       svga_buffer_destroy_hw_storage(ss, sbuf);
 550
 551    if(sbuf->swbuf && !sbuf->user)
 552       align_free(sbuf->swbuf);
 553
 554    FREE(sbuf);
 555 }
 556
 557 static struct pipe_buffer *
 558 svga_buffer_create(struct pipe_screen *screen,
 559                    unsigned alignment,
 560                    unsigned usage,
 561                    unsigned size)
 562 {
 563    struct svga_screen *ss = svga_screen(screen);
 564    struct svga_buffer *sbuf;
 565
 566    assert(size);
 567    assert(alignment);
 568
 569    sbuf = CALLOC_STRUCT(svga_buffer);
 570    if(!sbuf)
 571       goto error1;
 572
 573    sbuf->magic = SVGA_BUFFER_MAGIC;
 574
 575    pipe_reference_init(&sbuf->base.reference, 1);
 576    sbuf->base.screen = screen;
 577    sbuf->base.alignment = alignment;
 578    sbuf->base.usage = usage;
 579    sbuf->base.size = size;
 580
 581    if(svga_buffer_needs_hw_storage(usage)) {
 582       if(svga_buffer_create_host_surface(ss, sbuf) != PIPE_OK)
 583          goto error2;
 584    }
 585    else {
 586       if(alignment < sizeof(void*))
 587          alignment = sizeof(void*);
 588
 589       usage |= PIPE_BUFFER_USAGE_CPU_READ_WRITE;
 590
 591       sbuf->swbuf = align_malloc(size, alignment);
 592       if(!sbuf->swbuf)
 593          goto error2;
 594    }
 595
 596    return &sbuf->base;
 597
 598 error2:
 599    FREE(sbuf);
 600 error1:
 601    return NULL;
 602 }
 603
 604 static struct pipe_buffer *
 605 svga_user_buffer_create(struct pipe_screen *screen,
 606                         void *ptr,
 607                         unsigned bytes)
 608 {
 609    struct svga_buffer *sbuf;
 610
 611    sbuf = CALLOC_STRUCT(svga_buffer);
 612    if(!sbuf)
 613       goto no_sbuf;
 614
 615    sbuf->magic = SVGA_BUFFER_MAGIC;
 616
 617    sbuf->swbuf = ptr;
 618    sbuf->user = TRUE;
 619
 620    pipe_reference_init(&sbuf->base.reference, 1);
 621    sbuf->base.screen = screen;
 622    sbuf->base.alignment = 1;
 623    sbuf->base.usage = 0;
 624    sbuf->base.size = bytes;
 625
 626    return &sbuf->base;
 627
 628 no_sbuf:
 629    return NULL;
 630 }
 631
 632
 633 void
 634 svga_screen_init_buffer_functions(struct pipe_screen *screen)
 635 {
 636    screen->buffer_create = svga_buffer_create;
 637    screen->user_buffer_create = svga_user_buffer_create;
 638    screen->buffer_map_range = svga_buffer_map_range;
 639    screen->buffer_flush_mapped_range = svga_buffer_flush_mapped_range;
 640    screen->buffer_unmap = svga_buffer_unmap;
 641    screen->buffer_destroy = svga_buffer_destroy;
 642 }
 643
 644
 645 /**
 646  * Copy the contents of the user buffer / malloc buffer to a hardware buffer.
 647  */
 648 static INLINE enum pipe_error
 649 svga_buffer_update_hw(struct svga_screen *ss, struct svga_buffer *sbuf)
 650 {
 651    if(!sbuf->hw.buf) {
 652       enum pipe_error ret;
 653       void *map;
 654
 655       assert(sbuf->swbuf);
 656       if(!sbuf->swbuf)
 657          return PIPE_ERROR;
 658
 659       ret = svga_buffer_create_hw_storage(ss, sbuf);
 660       assert(ret == PIPE_OK);
 661       if(ret != PIPE_OK)
 662          return ret;
 663
 664       pipe_mutex_lock(ss->swc_mutex);
 665       map = ss->sws->buffer_map(ss->sws, sbuf->hw.buf, PIPE_BUFFER_USAGE_CPU_WRITE);
 666       assert(map);
 667       if(!map) {
 668          pipe_mutex_unlock(ss->swc_mutex);
 669          return PIPE_ERROR_OUT_OF_MEMORY;
 670       }
 671
 672       memcpy(map, sbuf->swbuf, sbuf->base.size);
 673       ss->sws->buffer_unmap(ss->sws, sbuf->hw.buf);
 674
 675       /* This user/malloc buffer is now indistinguishable from a gpu buffer */
 676       assert(!sbuf->map.count);
 677       if(!sbuf->map.count) {
 678          if(sbuf->user)
 679             sbuf->user = FALSE;
 680          else
 681             align_free(sbuf->swbuf);
 682          sbuf->swbuf = NULL;
 683       }
 684
 685       svga_buffer_upload_queue(sbuf, 0, sbuf->base.size);
 686    }
 687
 688    pipe_mutex_unlock(ss->swc_mutex);
 689    return PIPE_OK;
 690 }
 691
 692
 693 struct svga_winsys_surface *
 694 svga_buffer_handle(struct svga_context *svga,
 695                    struct pipe_buffer *buf)
 696 {
 697    struct pipe_screen *screen = svga->pipe.screen;
 698    struct svga_screen *ss = svga_screen(screen);
 699    struct svga_buffer *sbuf;
 700    enum pipe_error ret;
 701
 702    if(!buf)
 703       return NULL;
 704
 705    sbuf = svga_buffer(buf);
 706
 707    assert(!sbuf->map.count);
 708
 709    if(!sbuf->handle) {
 710       ret = svga_buffer_create_host_surface(ss, sbuf);
 711       if(ret != PIPE_OK)
 712          return NULL;
 713
 714       ret = svga_buffer_update_hw(ss, sbuf);
 715       if(ret != PIPE_OK)
 716          return NULL;
 717    }
 718
 719    if(!sbuf->needs_flush && sbuf->hw.num_ranges) {
 720       /* Queue the buffer for flushing */
 721       ret = svga_buffer_upload_command(svga, sbuf);
 722       if(ret != PIPE_OK)
 723          /* XXX: Should probably have a richer return value */
 724          return NULL;
 725
 726       assert(sbuf->hw.svga == svga);
 727
 728       sbuf->needs_flush = TRUE;
 729       assert(!sbuf->head.prev && !sbuf->head.next);
 730       LIST_ADDTAIL(&sbuf->head, &svga->dirty_buffers);
 731    }
 732
 733    return sbuf->handle;
 734 }
 735
 736 struct pipe_buffer *
 737 svga_screen_buffer_wrap_surface(struct pipe_screen *screen,
 738                                 enum SVGA3dSurfaceFormat format,
 739                                 struct svga_winsys_surface *srf)
 740 {
 741    struct pipe_buffer *buf;
 742    struct svga_buffer *sbuf;
 743    struct svga_winsys_screen *sws = svga_winsys_screen(screen);
 744
 745    buf = svga_buffer_create(screen, 0, SVGA_BUFFER_USAGE_WRAPPED, 0);
 746    if (!buf)
 747       return NULL;
 748
 749    sbuf = svga_buffer(buf);
 750
 751    /*
 752     * We are not the creator of this surface and therefore we must not
 753     * cache it for reuse. Set the cacheable flag to zero in the key to
 754     * prevent this.
 755     */
 756    sbuf->key.format = format;
 757    sbuf->key.cachable = 0;
 758    sws->surface_reference(sws, &sbuf->handle, srf);
 759
 760    return buf;
 761 }
 762
 763
 764 struct svga_winsys_surface *
 765 svga_screen_buffer_get_winsys_surface(struct pipe_buffer *buffer)
 766 {
 767    struct svga_winsys_screen *sws = svga_winsys_screen(buffer->screen);
 768    struct svga_winsys_surface *vsurf = NULL;
 769
 770    assert(svga_buffer(buffer)->key.cachable == 0);
 771    svga_buffer(buffer)->key.cachable = 0;
 772    sws->surface_reference(sws, &vsurf, svga_buffer(buffer)->handle);
 773    return vsurf;
 774 }
 775
 776 void
 777 svga_context_flush_buffers(struct svga_context *svga)
 778 {
 779    struct list_head *curr, *next;
 780    struct svga_buffer *sbuf;
 781
 782    curr = svga->dirty_buffers.next;
 783    next = curr->next;
 784    while(curr != &svga->dirty_buffers) {
 785       sbuf = LIST_ENTRY(struct svga_buffer, curr, head);
 786
 787       assert(p_atomic_read(&sbuf->base.reference.count) != 0);
 788       assert(sbuf->needs_flush);
 789
 790       svga_buffer_upload_flush(svga, sbuf);
 791
 792       curr = next;
 793       next = curr->next;
 794    }
 795 }