gallium: fix reference counting functions to be strict-aliasing compliant
[mesa.git] / src / gallium / drivers / svga / svga_screen_texture.c
1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 **********************************************************/
25
26 #include "svga_cmd.h"
27
28 #include "pipe/p_state.h"
29 #include "pipe/p_defines.h"
30 #include "pipe/p_inlines.h"
31 #include "pipe/p_thread.h"
32 #include "util/u_math.h"
33 #include "util/u_memory.h"
34
35 #include "svga_screen.h"
36 #include "svga_context.h"
37 #include "svga_screen_texture.h"
38 #include "svga_screen_buffer.h"
39 #include "svga_winsys.h"
40 #include "svga_debug.h"
41 #include "svga_screen_buffer.h"
42
43 #include <util/u_string.h>
44
45
46 /* XXX: This isn't a real hardware flag, but just a hack for kernel to
47 * know about primary surfaces. Find a better way to accomplish this.
48 */
49 #define SVGA3D_SURFACE_HINT_SCANOUT (1 << 9)
50
51
52 /*
53 * Helper function and arrays
54 */
55
56 SVGA3dSurfaceFormat
57 svga_translate_format(enum pipe_format format)
58 {
59 switch(format) {
60
61 case PIPE_FORMAT_A8R8G8B8_UNORM:
62 return SVGA3D_A8R8G8B8;
63 case PIPE_FORMAT_X8R8G8B8_UNORM:
64 return SVGA3D_X8R8G8B8;
65
66 /* Required for GL2.1:
67 */
68 case PIPE_FORMAT_A8R8G8B8_SRGB:
69 return SVGA3D_A8R8G8B8;
70
71 case PIPE_FORMAT_R5G6B5_UNORM:
72 return SVGA3D_R5G6B5;
73 case PIPE_FORMAT_A1R5G5B5_UNORM:
74 return SVGA3D_A1R5G5B5;
75 case PIPE_FORMAT_A4R4G4B4_UNORM:
76 return SVGA3D_A4R4G4B4;
77
78
79 /* XXX: Doesn't seem to work properly.
80 case PIPE_FORMAT_Z32_UNORM:
81 return SVGA3D_Z_D32;
82 */
83 case PIPE_FORMAT_Z16_UNORM:
84 return SVGA3D_Z_D16;
85 case PIPE_FORMAT_Z24S8_UNORM:
86 return SVGA3D_Z_D24S8;
87 case PIPE_FORMAT_Z24X8_UNORM:
88 return SVGA3D_Z_D24X8;
89
90 case PIPE_FORMAT_A8_UNORM:
91 return SVGA3D_ALPHA8;
92 case PIPE_FORMAT_L8_UNORM:
93 return SVGA3D_LUMINANCE8;
94
95 case PIPE_FORMAT_DXT1_RGB:
96 case PIPE_FORMAT_DXT1_RGBA:
97 return SVGA3D_DXT1;
98 case PIPE_FORMAT_DXT3_RGBA:
99 return SVGA3D_DXT3;
100 case PIPE_FORMAT_DXT5_RGBA:
101 return SVGA3D_DXT5;
102
103 default:
104 return SVGA3D_FORMAT_INVALID;
105 }
106 }
107
108
109 SVGA3dSurfaceFormat
110 svga_translate_format_render(enum pipe_format format)
111 {
112 switch(format) {
113 case PIPE_FORMAT_A8R8G8B8_UNORM:
114 case PIPE_FORMAT_X8R8G8B8_UNORM:
115 case PIPE_FORMAT_A1R5G5B5_UNORM:
116 case PIPE_FORMAT_A4R4G4B4_UNORM:
117 case PIPE_FORMAT_R5G6B5_UNORM:
118 case PIPE_FORMAT_Z24S8_UNORM:
119 case PIPE_FORMAT_Z24X8_UNORM:
120 case PIPE_FORMAT_Z32_UNORM:
121 case PIPE_FORMAT_Z16_UNORM:
122 case PIPE_FORMAT_L8_UNORM:
123 return svga_translate_format(format);
124
125 #if 1
126 /* For on host conversion */
127 case PIPE_FORMAT_DXT1_RGB:
128 return SVGA3D_X8R8G8B8;
129 case PIPE_FORMAT_DXT1_RGBA:
130 case PIPE_FORMAT_DXT3_RGBA:
131 case PIPE_FORMAT_DXT5_RGBA:
132 return SVGA3D_A8R8G8B8;
133 #endif
134
135 default:
136 return SVGA3D_FORMAT_INVALID;
137 }
138 }
139
140
141 static INLINE void
142 svga_transfer_dma_band(struct svga_transfer *st,
143 SVGA3dTransferType transfer,
144 unsigned y, unsigned h, unsigned srcy)
145 {
146 struct svga_texture *texture = svga_texture(st->base.texture);
147 struct svga_screen *screen = svga_screen(texture->base.screen);
148 SVGA3dCopyBox box;
149 enum pipe_error ret;
150
151 SVGA_DBG(DEBUG_DMA, "dma %s sid %p, face %u, (%u, %u, %u) - (%u, %u, %u), %ubpp\n",
152 transfer == SVGA3D_WRITE_HOST_VRAM ? "to" : "from",
153 texture->handle,
154 st->base.face,
155 st->base.x,
156 y,
157 st->base.zslice,
158 st->base.x + st->base.width,
159 y + h,
160 st->base.zslice + 1,
161 texture->base.block.size*8/(texture->base.block.width*texture->base.block.height));
162
163 box.x = st->base.x;
164 box.y = y;
165 box.z = st->base.zslice;
166 box.w = st->base.width;
167 box.h = h;
168 box.d = 1;
169 box.srcx = 0;
170 box.srcy = srcy;
171 box.srcz = 0;
172
173 pipe_mutex_lock(screen->swc_mutex);
174 ret = SVGA3D_SurfaceDMA(screen->swc, st, transfer, &box, 1);
175 if(ret != PIPE_OK) {
176 screen->swc->flush(screen->swc, NULL);
177 ret = SVGA3D_SurfaceDMA(screen->swc, st, transfer, &box, 1);
178 assert(ret == PIPE_OK);
179 }
180 pipe_mutex_unlock(screen->swc_mutex);
181 }
182
183
184 static INLINE void
185 svga_transfer_dma(struct svga_transfer *st,
186 SVGA3dTransferType transfer)
187 {
188 struct svga_texture *texture = svga_texture(st->base.texture);
189 struct svga_screen *screen = svga_screen(texture->base.screen);
190 struct svga_winsys_screen *sws = screen->sws;
191 struct pipe_fence_handle *fence = NULL;
192
193 if (transfer == SVGA3D_READ_HOST_VRAM) {
194 SVGA_DBG(DEBUG_PERF, "%s: readback transfer\n", __FUNCTION__);
195 }
196
197
198 if(!st->swbuf) {
199 /* Do the DMA transfer in a single go */
200
201 svga_transfer_dma_band(st, transfer, st->base.y, st->base.height, 0);
202
203 if(transfer == SVGA3D_READ_HOST_VRAM) {
204 svga_screen_flush(screen, &fence);
205 sws->fence_finish(sws, fence, 0);
206 //sws->fence_reference(sws, &fence, NULL);
207 }
208 }
209 else {
210 unsigned y, h, srcy;
211 h = st->hw_nblocksy * st->base.block.height;
212 srcy = 0;
213 for(y = 0; y < st->base.height; y += h) {
214 unsigned offset, length;
215 void *hw, *sw;
216
217 if (y + h > st->base.height)
218 h = st->base.height - y;
219
220 /* Transfer band must be aligned to pixel block boundaries */
221 assert(y % st->base.block.height == 0);
222 assert(h % st->base.block.height == 0);
223
224 offset = y * st->base.stride / st->base.block.height;
225 length = h * st->base.stride / st->base.block.height;
226
227 sw = (uint8_t *)st->swbuf + offset;
228
229 if(transfer == SVGA3D_WRITE_HOST_VRAM) {
230 /* Wait for the previous DMAs to complete */
231 /* TODO: keep one DMA (at half the size) in the background */
232 if(y) {
233 svga_screen_flush(screen, &fence);
234 sws->fence_finish(sws, fence, 0);
235 //sws->fence_reference(sws, &fence, NULL);
236 }
237
238 hw = sws->buffer_map(sws, st->hwbuf, PIPE_BUFFER_USAGE_CPU_WRITE);
239 assert(hw);
240 if(hw) {
241 memcpy(hw, sw, length);
242 sws->buffer_unmap(sws, st->hwbuf);
243 }
244 }
245
246 svga_transfer_dma_band(st, transfer, y, h, srcy);
247
248 if(transfer == SVGA3D_READ_HOST_VRAM) {
249 svga_screen_flush(screen, &fence);
250 sws->fence_finish(sws, fence, 0);
251
252 hw = sws->buffer_map(sws, st->hwbuf, PIPE_BUFFER_USAGE_CPU_READ);
253 assert(hw);
254 if(hw) {
255 memcpy(sw, hw, length);
256 sws->buffer_unmap(sws, st->hwbuf);
257 }
258 }
259 }
260 }
261 }
262
263
264 static struct pipe_texture *
265 svga_texture_create(struct pipe_screen *screen,
266 const struct pipe_texture *templat)
267 {
268 struct svga_screen *svgascreen = svga_screen(screen);
269 struct svga_texture *tex = CALLOC_STRUCT(svga_texture);
270 unsigned width, height, depth;
271 unsigned level;
272
273 if (!tex)
274 goto error1;
275
276 tex->base = *templat;
277 pipe_reference_init(&tex->base.reference, 1);
278 tex->base.screen = screen;
279
280 assert(templat->last_level < SVGA_MAX_TEXTURE_LEVELS);
281 if(templat->last_level >= SVGA_MAX_TEXTURE_LEVELS)
282 goto error2;
283
284 width = templat->width0;
285 height = templat->height0;
286 depth = templat->depth0;
287 for(level = 0; level <= templat->last_level; ++level) {
288 tex->base.nblocksx[level] = pf_get_nblocksx(&tex->base.block, width);
289 tex->base.nblocksy[level] = pf_get_nblocksy(&tex->base.block, height);
290 width = u_minify(width, 1);
291 height = u_minify(height, 1);
292 depth = u_minify(depth, 1);
293 }
294
295 tex->key.flags = 0;
296 tex->key.size.width = templat->width0;
297 tex->key.size.height = templat->height0;
298 tex->key.size.depth = templat->depth0;
299
300 if(templat->target == PIPE_TEXTURE_CUBE) {
301 tex->key.flags |= SVGA3D_SURFACE_CUBEMAP;
302 tex->key.numFaces = 6;
303 }
304 else {
305 tex->key.numFaces = 1;
306 }
307
308 if(templat->tex_usage & PIPE_TEXTURE_USAGE_SAMPLER)
309 tex->key.flags |= SVGA3D_SURFACE_HINT_TEXTURE;
310
311 if(templat->tex_usage & PIPE_TEXTURE_USAGE_PRIMARY)
312 tex->key.flags |= SVGA3D_SURFACE_HINT_SCANOUT;
313
314 /*
315 * XXX: Never pass the SVGA3D_SURFACE_HINT_RENDERTARGET hint. Mesa cannot
316 * know beforehand whether a texture will be used as a rendertarget or not
317 * and it always requests PIPE_TEXTURE_USAGE_RENDER_TARGET, therefore
318 * passing the SVGA3D_SURFACE_HINT_RENDERTARGET here defeats its purpose.
319 */
320 #if 0
321 if((templat->tex_usage & PIPE_TEXTURE_USAGE_RENDER_TARGET) &&
322 !pf_is_compressed(templat->format))
323 tex->key.flags |= SVGA3D_SURFACE_HINT_RENDERTARGET;
324 #endif
325
326 if(templat->tex_usage & PIPE_TEXTURE_USAGE_DEPTH_STENCIL)
327 tex->key.flags |= SVGA3D_SURFACE_HINT_DEPTHSTENCIL;
328
329 tex->key.numMipLevels = templat->last_level + 1;
330
331 tex->key.format = svga_translate_format(templat->format);
332 if(tex->key.format == SVGA3D_FORMAT_INVALID)
333 goto error2;
334
335 tex->key.cachable = 1;
336
337 SVGA_DBG(DEBUG_DMA, "surface_create for texture\n", tex->handle);
338 tex->handle = svga_screen_surface_create(svgascreen, &tex->key);
339 if (tex->handle)
340 SVGA_DBG(DEBUG_DMA, " --> got sid %p (texture)\n", tex->handle);
341
342 return &tex->base;
343
344 error2:
345 FREE(tex);
346 error1:
347 return NULL;
348 }
349
350
351 static struct pipe_texture *
352 svga_texture_blanket(struct pipe_screen * screen,
353 const struct pipe_texture *base,
354 const unsigned *stride,
355 struct pipe_buffer *buffer)
356 {
357 struct svga_texture *tex;
358 struct svga_buffer *sbuf = svga_buffer(buffer);
359 struct svga_winsys_screen *sws = svga_winsys_screen(screen);
360 assert(screen);
361
362 /* Only supports one type */
363 if (base->target != PIPE_TEXTURE_2D ||
364 base->last_level != 0 ||
365 base->depth0 != 1) {
366 return NULL;
367 }
368
369 /**
370 * We currently can't do texture blanket on
371 * SVGA3D_BUFFER. Need to blit to a temporary surface?
372 */
373
374 assert(sbuf->handle);
375 if (!sbuf->handle)
376 return NULL;
377
378 if (svga_translate_format(base->format) != sbuf->key.format) {
379 unsigned f1 = svga_translate_format(base->format);
380 unsigned f2 = sbuf->key.format;
381
382 /* It's okay for XRGB and ARGB or depth with/out stencil to get mixed up */
383 if ( !( (f1 == SVGA3D_X8R8G8B8 && f2 == SVGA3D_A8R8G8B8) ||
384 (f1 == SVGA3D_A8R8G8B8 && f2 == SVGA3D_X8R8G8B8) ||
385 (f1 == SVGA3D_Z_D24X8 && f2 == SVGA3D_Z_D24S8) ) ) {
386 debug_printf("%s wrong format %u != %u\n", __FUNCTION__, f1, f2);
387 return NULL;
388 }
389 }
390
391 tex = CALLOC_STRUCT(svga_texture);
392 if (!tex)
393 return NULL;
394
395 tex->base = *base;
396
397
398 if (sbuf->key.format == 1)
399 tex->base.format = PIPE_FORMAT_X8R8G8B8_UNORM;
400 else if (sbuf->key.format == 2)
401 tex->base.format = PIPE_FORMAT_A8R8G8B8_UNORM;
402
403 pipe_reference_init(&tex->base.reference, 1);
404 tex->base.screen = screen;
405
406 SVGA_DBG(DEBUG_DMA, "blanket sid %p\n", sbuf->handle);
407
408 /* We don't own this storage, so don't try to cache it.
409 */
410 assert(sbuf->key.cachable == 0);
411 tex->key.cachable = 0;
412 sws->surface_reference(sws, &tex->handle, sbuf->handle);
413
414 return &tex->base;
415 }
416
417
418 static void
419 svga_texture_destroy(struct pipe_texture *pt)
420 {
421 struct svga_screen *ss = svga_screen(pt->screen);
422 struct svga_texture *tex = (struct svga_texture *)pt;
423
424 ss->texture_timestamp++;
425
426 svga_sampler_view_reference(&tex->cached_view, NULL);
427
428 /*
429 DBG("%s deleting %p\n", __FUNCTION__, (void *) tex);
430 */
431 SVGA_DBG(DEBUG_DMA, "unref sid %p (texture)\n", tex->handle);
432 svga_screen_surface_destroy(ss, &tex->key, &tex->handle);
433
434 FREE(tex);
435 }
436
437
438 static void
439 svga_texture_copy_handle(struct svga_context *svga,
440 struct svga_screen *ss,
441 struct svga_winsys_surface *src_handle,
442 unsigned src_x, unsigned src_y, unsigned src_z,
443 unsigned src_level, unsigned src_face,
444 struct svga_winsys_surface *dst_handle,
445 unsigned dst_x, unsigned dst_y, unsigned dst_z,
446 unsigned dst_level, unsigned dst_face,
447 unsigned width, unsigned height, unsigned depth)
448 {
449 struct svga_surface dst, src;
450 enum pipe_error ret;
451 SVGA3dCopyBox box, *boxes;
452
453 assert(svga || ss);
454
455 src.handle = src_handle;
456 src.real_level = src_level;
457 src.real_face = src_face;
458 src.real_zslice = 0;
459
460 dst.handle = dst_handle;
461 dst.real_level = dst_level;
462 dst.real_face = dst_face;
463 dst.real_zslice = 0;
464
465 box.x = dst_x;
466 box.y = dst_y;
467 box.z = dst_z;
468 box.w = width;
469 box.h = height;
470 box.d = depth;
471 box.srcx = src_x;
472 box.srcy = src_y;
473 box.srcz = src_z;
474
475 /*
476 SVGA_DBG(DEBUG_VIEWS, "mipcopy src: %p %u (%ux%ux%u), dst: %p %u (%ux%ux%u)\n",
477 src_handle, src_level, src_x, src_y, src_z,
478 dst_handle, dst_level, dst_x, dst_y, dst_z);
479 */
480
481 if (svga) {
482 ret = SVGA3D_BeginSurfaceCopy(svga->swc,
483 &src.base,
484 &dst.base,
485 &boxes, 1);
486 if(ret != PIPE_OK) {
487 svga_context_flush(svga, NULL);
488 ret = SVGA3D_BeginSurfaceCopy(svga->swc,
489 &src.base,
490 &dst.base,
491 &boxes, 1);
492 assert(ret == PIPE_OK);
493 }
494 *boxes = box;
495 SVGA_FIFOCommitAll(svga->swc);
496 } else {
497 pipe_mutex_lock(ss->swc_mutex);
498 ret = SVGA3D_BeginSurfaceCopy(ss->swc,
499 &src.base,
500 &dst.base,
501 &boxes, 1);
502 if(ret != PIPE_OK) {
503 ss->swc->flush(ss->swc, NULL);
504 ret = SVGA3D_BeginSurfaceCopy(ss->swc,
505 &src.base,
506 &dst.base,
507 &boxes, 1);
508 assert(ret == PIPE_OK);
509 }
510 *boxes = box;
511 SVGA_FIFOCommitAll(ss->swc);
512 pipe_mutex_unlock(ss->swc_mutex);
513 }
514 }
515
516 static struct svga_winsys_surface *
517 svga_texture_view_surface(struct pipe_context *pipe,
518 struct svga_texture *tex,
519 SVGA3dSurfaceFormat format,
520 unsigned start_mip,
521 unsigned num_mip,
522 int face_pick,
523 int zslice_pick,
524 struct svga_host_surface_cache_key *key) /* OUT */
525 {
526 struct svga_screen *ss = svga_screen(tex->base.screen);
527 struct svga_winsys_surface *handle;
528 int i, j;
529 unsigned z_offset = 0;
530
531 SVGA_DBG(DEBUG_PERF,
532 "svga: Create surface view: face %d zslice %d mips %d..%d\n",
533 face_pick, zslice_pick, start_mip, start_mip+num_mip-1);
534
535 key->flags = 0;
536 key->format = format;
537 key->numMipLevels = num_mip;
538 key->size.width = u_minify(tex->base.width0, start_mip);
539 key->size.height = u_minify(tex->base.height0, start_mip);
540 key->size.depth = zslice_pick < 0 ? u_minify(tex->base.depth0, start_mip) : 1;
541 key->cachable = 1;
542 assert(key->size.depth == 1);
543
544 if(tex->base.target == PIPE_TEXTURE_CUBE && face_pick < 0) {
545 key->flags |= SVGA3D_SURFACE_CUBEMAP;
546 key->numFaces = 6;
547 } else {
548 key->numFaces = 1;
549 }
550
551 if(key->format == SVGA3D_FORMAT_INVALID) {
552 key->cachable = 0;
553 return NULL;
554 }
555
556 SVGA_DBG(DEBUG_DMA, "surface_create for texture view\n");
557 handle = svga_screen_surface_create(ss, key);
558 if (!handle) {
559 key->cachable = 0;
560 return NULL;
561 }
562
563 SVGA_DBG(DEBUG_DMA, " --> got sid %p (texture view)\n", handle);
564
565 if (face_pick < 0)
566 face_pick = 0;
567
568 if (zslice_pick >= 0)
569 z_offset = zslice_pick;
570
571 for (i = 0; i < key->numMipLevels; i++) {
572 for (j = 0; j < key->numFaces; j++) {
573 if(tex->defined[j + face_pick][i + start_mip]) {
574 unsigned depth = (zslice_pick < 0 ?
575 u_minify(tex->base.depth0, i + start_mip) :
576 1);
577
578 svga_texture_copy_handle(svga_context(pipe),
579 ss,
580 tex->handle,
581 0, 0, z_offset,
582 i + start_mip,
583 j + face_pick,
584 handle, 0, 0, 0, i, j,
585 u_minify(tex->base.width0, i + start_mip),
586 u_minify(tex->base.height0, i + start_mip),
587 depth);
588 }
589 }
590 }
591
592 return handle;
593 }
594
595
596 static struct pipe_surface *
597 svga_get_tex_surface(struct pipe_screen *screen,
598 struct pipe_texture *pt,
599 unsigned face, unsigned level, unsigned zslice,
600 unsigned flags)
601 {
602 struct svga_texture *tex = svga_texture(pt);
603 struct svga_surface *s;
604 boolean render = flags & PIPE_BUFFER_USAGE_GPU_WRITE ? TRUE : FALSE;
605 boolean view = FALSE;
606 SVGA3dSurfaceFormat format;
607
608 s = CALLOC_STRUCT(svga_surface);
609 if (!s)
610 return NULL;
611
612 pipe_reference_init(&s->base.reference, 1);
613 pipe_texture_reference(&s->base.texture, pt);
614 s->base.format = pt->format;
615 s->base.width = u_minify(pt->width0, level);
616 s->base.height = u_minify(pt->height0, level);
617 s->base.usage = flags;
618 s->base.level = level;
619 s->base.face = face;
620 s->base.zslice = zslice;
621
622 if (!render)
623 format = svga_translate_format(pt->format);
624 else
625 format = svga_translate_format_render(pt->format);
626
627 assert(format != SVGA3D_FORMAT_INVALID);
628 assert(!(flags & PIPE_BUFFER_USAGE_CPU_READ_WRITE));
629
630
631 if (svga_screen(screen)->debug.force_surface_view)
632 view = TRUE;
633
634 /* Currently only used for compressed textures */
635 if (render &&
636 format != svga_translate_format(pt->format)) {
637 view = TRUE;
638 }
639
640 if (level != 0 &&
641 svga_screen(screen)->debug.force_level_surface_view)
642 view = TRUE;
643
644 if (pt->target == PIPE_TEXTURE_3D)
645 view = TRUE;
646
647 if (svga_screen(screen)->debug.no_surface_view)
648 view = FALSE;
649
650 if (view) {
651 SVGA_DBG(DEBUG_VIEWS, "svga: Surface view: yes %p, level %u face %u z %u, %p\n",
652 pt, level, face, zslice, s);
653
654 s->handle = svga_texture_view_surface(NULL, tex, format, level, 1, face, zslice,
655 &s->key);
656 s->real_face = 0;
657 s->real_level = 0;
658 s->real_zslice = 0;
659 } else {
660 struct svga_winsys_screen *sws = svga_winsys_screen(screen);
661
662 SVGA_DBG(DEBUG_VIEWS, "svga: Surface view: no %p, level %u, face %u, z %u, %p\n",
663 pt, level, face, zslice, s);
664
665 memset(&s->key, 0, sizeof s->key);
666 sws->surface_reference(sws, &s->handle, tex->handle);
667 s->real_face = face;
668 s->real_level = level;
669 s->real_zslice = zslice;
670 }
671
672 return &s->base;
673 }
674
675
676 static void
677 svga_tex_surface_destroy(struct pipe_surface *surf)
678 {
679 struct svga_surface *s = svga_surface(surf);
680 struct svga_screen *ss = svga_screen(surf->texture->screen);
681
682 SVGA_DBG(DEBUG_DMA, "unref sid %p (tex surface)\n", s->handle);
683 assert(s->key.cachable == 0);
684 svga_screen_surface_destroy(ss, &s->key, &s->handle);
685 pipe_texture_reference(&surf->texture, NULL);
686 FREE(surf);
687 }
688
689
690 static INLINE void
691 svga_mark_surface_dirty(struct pipe_surface *surf)
692 {
693 struct svga_surface *s = svga_surface(surf);
694
695 if(!s->dirty) {
696 struct svga_texture *tex = svga_texture(surf->texture);
697
698 s->dirty = TRUE;
699
700 if (s->handle == tex->handle)
701 tex->defined[surf->face][surf->level] = TRUE;
702 else {
703 /* this will happen later in svga_propagate_surface */
704 }
705 }
706 }
707
708
709 void svga_mark_surfaces_dirty(struct svga_context *svga)
710 {
711 unsigned i;
712
713 for (i = 0; i < PIPE_MAX_COLOR_BUFS; i++) {
714 if (svga->curr.framebuffer.cbufs[i])
715 svga_mark_surface_dirty(svga->curr.framebuffer.cbufs[i]);
716 }
717 if (svga->curr.framebuffer.zsbuf)
718 svga_mark_surface_dirty(svga->curr.framebuffer.zsbuf);
719 }
720
721 /**
722 * Progagate any changes from surfaces to texture.
723 * pipe is optional context to inline the blit command in.
724 */
725 void
726 svga_propagate_surface(struct pipe_context *pipe, struct pipe_surface *surf)
727 {
728 struct svga_surface *s = svga_surface(surf);
729 struct svga_texture *tex = svga_texture(surf->texture);
730 struct svga_screen *ss = svga_screen(surf->texture->screen);
731
732 if (!s->dirty)
733 return;
734
735 s->dirty = FALSE;
736 ss->texture_timestamp++;
737 tex->view_age[surf->level] = ++(tex->age);
738
739 if (s->handle != tex->handle) {
740 SVGA_DBG(DEBUG_VIEWS, "svga: Surface propagate: tex %p, level %u, from %p\n", tex, surf->level, surf);
741 svga_texture_copy_handle(svga_context(pipe), ss,
742 s->handle, 0, 0, 0, s->real_level, s->real_face,
743 tex->handle, 0, 0, surf->zslice, surf->level, surf->face,
744 u_minify(tex->base.width0, surf->level),
745 u_minify(tex->base.height0, surf->level), 1);
746 tex->defined[surf->face][surf->level] = TRUE;
747 }
748 }
749
750 /**
751 * Check if we should call svga_propagate_surface on the surface.
752 */
753 extern boolean
754 svga_surface_needs_propagation(struct pipe_surface *surf)
755 {
756 struct svga_surface *s = svga_surface(surf);
757 struct svga_texture *tex = svga_texture(surf->texture);
758
759 return s->dirty && s->handle != tex->handle;
760 }
761
762
763 static struct pipe_transfer *
764 svga_get_tex_transfer(struct pipe_screen *screen,
765 struct pipe_texture *texture,
766 unsigned face, unsigned level, unsigned zslice,
767 enum pipe_transfer_usage usage, unsigned x, unsigned y,
768 unsigned w, unsigned h)
769 {
770 struct svga_screen *ss = svga_screen(screen);
771 struct svga_winsys_screen *sws = ss->sws;
772 struct svga_transfer *st;
773
774 /* We can't map texture storage directly */
775 if (usage & PIPE_TRANSFER_MAP_DIRECTLY)
776 return NULL;
777
778 st = CALLOC_STRUCT(svga_transfer);
779 if (!st)
780 return NULL;
781
782 st->base.format = texture->format;
783 st->base.block = texture->block;
784 st->base.x = x;
785 st->base.y = y;
786 st->base.width = w;
787 st->base.height = h;
788 st->base.nblocksx = pf_get_nblocksx(&texture->block, w);
789 st->base.nblocksy = pf_get_nblocksy(&texture->block, h);
790 st->base.stride = st->base.nblocksx*st->base.block.size;
791 st->base.usage = usage;
792 st->base.face = face;
793 st->base.level = level;
794 st->base.zslice = zslice;
795
796 st->hw_nblocksy = st->base.nblocksy;
797
798 st->hwbuf = svga_winsys_buffer_create(ss,
799 1,
800 0,
801 st->hw_nblocksy*st->base.stride);
802 while(!st->hwbuf && (st->hw_nblocksy /= 2)) {
803 st->hwbuf = svga_winsys_buffer_create(ss,
804 1,
805 0,
806 st->hw_nblocksy*st->base.stride);
807 }
808
809 if(!st->hwbuf)
810 goto no_hwbuf;
811
812 if(st->hw_nblocksy < st->base.nblocksy) {
813 /* We couldn't allocate a hardware buffer big enough for the transfer,
814 * so allocate regular malloc memory instead */
815 debug_printf("%s: failed to allocate %u KB of DMA, splitting into %u x %u KB DMA transfers\n",
816 __FUNCTION__,
817 (st->base.nblocksy*st->base.stride + 1023)/1024,
818 (st->base.nblocksy + st->hw_nblocksy - 1)/st->hw_nblocksy,
819 (st->hw_nblocksy*st->base.stride + 1023)/1024);
820 st->swbuf = MALLOC(st->base.nblocksy*st->base.stride);
821 if(!st->swbuf)
822 goto no_swbuf;
823 }
824
825 pipe_texture_reference(&st->base.texture, texture);
826
827 if (usage & PIPE_TRANSFER_READ)
828 svga_transfer_dma(st, SVGA3D_READ_HOST_VRAM);
829
830 return &st->base;
831
832 no_swbuf:
833 sws->buffer_destroy(sws, st->hwbuf);
834 no_hwbuf:
835 FREE(st);
836 return NULL;
837 }
838
839
840 static void *
841 svga_transfer_map( struct pipe_screen *screen,
842 struct pipe_transfer *transfer )
843 {
844 struct svga_screen *ss = svga_screen(screen);
845 struct svga_winsys_screen *sws = ss->sws;
846 struct svga_transfer *st = svga_transfer(transfer);
847
848 if(st->swbuf)
849 return st->swbuf;
850 else
851 /* The wait for read transfers already happened when svga_transfer_dma
852 * was called. */
853 return sws->buffer_map(sws, st->hwbuf,
854 pipe_transfer_buffer_flags(transfer));
855 }
856
857
858 static void
859 svga_transfer_unmap(struct pipe_screen *screen,
860 struct pipe_transfer *transfer)
861 {
862 struct svga_screen *ss = svga_screen(screen);
863 struct svga_winsys_screen *sws = ss->sws;
864 struct svga_transfer *st = svga_transfer(transfer);
865
866 if(!st->swbuf)
867 sws->buffer_unmap(sws, st->hwbuf);
868 }
869
870
871 static void
872 svga_tex_transfer_destroy(struct pipe_transfer *transfer)
873 {
874 struct svga_texture *tex = svga_texture(transfer->texture);
875 struct svga_screen *ss = svga_screen(transfer->texture->screen);
876 struct svga_winsys_screen *sws = ss->sws;
877 struct svga_transfer *st = svga_transfer(transfer);
878
879 if (st->base.usage & PIPE_TRANSFER_WRITE) {
880 svga_transfer_dma(st, SVGA3D_WRITE_HOST_VRAM);
881 ss->texture_timestamp++;
882 tex->view_age[transfer->level] = ++(tex->age);
883 tex->defined[transfer->face][transfer->level] = TRUE;
884 }
885
886 pipe_texture_reference(&st->base.texture, NULL);
887 FREE(st->swbuf);
888 sws->buffer_destroy(sws, st->hwbuf);
889 FREE(st);
890 }
891
892 void
893 svga_screen_init_texture_functions(struct pipe_screen *screen)
894 {
895 screen->texture_create = svga_texture_create;
896 screen->texture_destroy = svga_texture_destroy;
897 screen->get_tex_surface = svga_get_tex_surface;
898 screen->tex_surface_destroy = svga_tex_surface_destroy;
899 screen->texture_blanket = svga_texture_blanket;
900 screen->get_tex_transfer = svga_get_tex_transfer;
901 screen->transfer_map = svga_transfer_map;
902 screen->transfer_unmap = svga_transfer_unmap;
903 screen->tex_transfer_destroy = svga_tex_transfer_destroy;
904 }
905
906 /***********************************************************************
907 */
908
909 struct svga_sampler_view *
910 svga_get_tex_sampler_view(struct pipe_context *pipe, struct pipe_texture *pt,
911 unsigned min_lod, unsigned max_lod)
912 {
913 struct svga_screen *ss = svga_screen(pt->screen);
914 struct svga_winsys_screen *sws = ss->sws;
915 struct svga_texture *tex = svga_texture(pt);
916 struct svga_sampler_view *sv = NULL;
917 SVGA3dSurfaceFormat format = svga_translate_format(pt->format);
918 boolean view = TRUE;
919
920 assert(pt);
921 assert(min_lod >= 0);
922 assert(min_lod <= max_lod);
923 assert(max_lod <= pt->last_level);
924
925
926 /* Is a view needed */
927 {
928 /*
929 * Can't control max lod. For first level views and when we only
930 * look at one level we disable mip filtering to achive the same
931 * results as a view.
932 */
933 if (min_lod == 0 && max_lod >= pt->last_level)
934 view = FALSE;
935
936 if (pf_is_compressed(pt->format) && view) {
937 format = svga_translate_format_render(pt->format);
938 }
939
940 if (ss->debug.no_sampler_view)
941 view = FALSE;
942
943 if (ss->debug.force_sampler_view)
944 view = TRUE;
945 }
946
947 /* First try the cache */
948 if (view) {
949 pipe_mutex_lock(ss->tex_mutex);
950 if (tex->cached_view &&
951 tex->cached_view->min_lod == min_lod &&
952 tex->cached_view->max_lod == max_lod) {
953 svga_sampler_view_reference(&sv, tex->cached_view);
954 pipe_mutex_unlock(ss->tex_mutex);
955 SVGA_DBG(DEBUG_VIEWS, "svga: Sampler view: reuse %p, %u %u, last %u\n",
956 pt, min_lod, max_lod, pt->last_level);
957 svga_validate_sampler_view(svga_context(pipe), sv);
958 return sv;
959 }
960 pipe_mutex_unlock(ss->tex_mutex);
961 }
962
963 sv = CALLOC_STRUCT(svga_sampler_view);
964 pipe_reference_init(&sv->reference, 1);
965 sv->texture = tex;
966 sv->min_lod = min_lod;
967 sv->max_lod = max_lod;
968
969 /* No view needed just use the whole texture */
970 if (!view) {
971 SVGA_DBG(DEBUG_VIEWS,
972 "svga: Sampler view: no %p, mips %u..%u, nr %u, size (%ux%ux%u), last %u\n",
973 pt, min_lod, max_lod,
974 max_lod - min_lod + 1,
975 pt->width0,
976 pt->height0,
977 pt->depth0,
978 pt->last_level);
979 sv->key.cachable = 0;
980 sws->surface_reference(sws, &sv->handle, tex->handle);
981 return sv;
982 }
983
984 SVGA_DBG(DEBUG_VIEWS,
985 "svga: Sampler view: yes %p, mips %u..%u, nr %u, size (%ux%ux%u), last %u\n",
986 pt, min_lod, max_lod,
987 max_lod - min_lod + 1,
988 pt->width0,
989 pt->height0,
990 pt->depth0,
991 pt->last_level);
992
993 sv->age = tex->age;
994 sv->handle = svga_texture_view_surface(pipe, tex, format,
995 min_lod,
996 max_lod - min_lod + 1,
997 -1, -1,
998 &sv->key);
999
1000 if (!sv->handle) {
1001 assert(0);
1002 sv->key.cachable = 0;
1003 sws->surface_reference(sws, &sv->handle, tex->handle);
1004 return sv;
1005 }
1006
1007 pipe_mutex_lock(ss->tex_mutex);
1008 svga_sampler_view_reference(&tex->cached_view, sv);
1009 pipe_mutex_unlock(ss->tex_mutex);
1010
1011 return sv;
1012 }
1013
1014 void
1015 svga_validate_sampler_view(struct svga_context *svga, struct svga_sampler_view *v)
1016 {
1017 struct svga_texture *tex = v->texture;
1018 unsigned numFaces;
1019 unsigned age = 0;
1020 int i, k;
1021
1022 assert(svga);
1023
1024 if (v->handle == v->texture->handle)
1025 return;
1026
1027 age = tex->age;
1028
1029 if(tex->base.target == PIPE_TEXTURE_CUBE)
1030 numFaces = 6;
1031 else
1032 numFaces = 1;
1033
1034 for (i = v->min_lod; i <= v->max_lod; i++) {
1035 for (k = 0; k < numFaces; k++) {
1036 if (v->age < tex->view_age[i])
1037 svga_texture_copy_handle(svga, NULL,
1038 tex->handle, 0, 0, 0, i, k,
1039 v->handle, 0, 0, 0, i - v->min_lod, k,
1040 u_minify(tex->base.width0, i),
1041 u_minify(tex->base.height0, i),
1042 u_minify(tex->base.depth0, i));
1043 }
1044 }
1045
1046 v->age = age;
1047 }
1048
1049 void
1050 svga_destroy_sampler_view_priv(struct svga_sampler_view *v)
1051 {
1052 struct svga_screen *ss = svga_screen(v->texture->base.screen);
1053
1054 SVGA_DBG(DEBUG_DMA, "unref sid %p (sampler view)\n", v->handle);
1055 svga_screen_surface_destroy(ss, &v->key, &v->handle);
1056
1057 FREE(v);
1058 }
1059
1060 boolean
1061 svga_screen_buffer_from_texture(struct pipe_texture *texture,
1062 struct pipe_buffer **buffer,
1063 unsigned *stride)
1064 {
1065 struct svga_texture *stex = svga_texture(texture);
1066
1067 *buffer = svga_screen_buffer_wrap_surface
1068 (texture->screen,
1069 svga_translate_format(texture->format),
1070 stex->handle);
1071
1072 *stride = pf_get_nblocksx(&texture->block, texture->width0) *
1073 texture->block.size;
1074
1075 return *buffer != NULL;
1076 }
1077
1078
1079 struct svga_winsys_surface *
1080 svga_screen_texture_get_winsys_surface(struct pipe_texture *texture)
1081 {
1082 struct svga_winsys_screen *sws = svga_winsys_screen(texture->screen);
1083 struct svga_winsys_surface *vsurf = NULL;
1084
1085 assert(svga_texture(texture)->key.cachable == 0);
1086 svga_texture(texture)->key.cachable = 0;
1087 sws->surface_reference(sws, &vsurf, svga_texture(texture)->handle);
1088 return vsurf;
1089 }