Move pf_is_compressed() to u_format auxiliary module.
[mesa.git] / src / gallium / drivers / svga / svga_screen_texture.c
1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 **********************************************************/
25
26 #include "svga_cmd.h"
27
28 #include "pipe/p_state.h"
29 #include "pipe/p_defines.h"
30 #include "pipe/p_inlines.h"
31 #include "pipe/p_thread.h"
32 #include "util/u_format.h"
33 #include "util/u_math.h"
34 #include "util/u_memory.h"
35
36 #include "svga_screen.h"
37 #include "svga_context.h"
38 #include "svga_screen_texture.h"
39 #include "svga_screen_buffer.h"
40 #include "svga_winsys.h"
41 #include "svga_debug.h"
42 #include "svga_screen_buffer.h"
43
44 #include <util/u_string.h>
45
46
47 /* XXX: This isn't a real hardware flag, but just a hack for kernel to
48 * know about primary surfaces. Find a better way to accomplish this.
49 */
50 #define SVGA3D_SURFACE_HINT_SCANOUT (1 << 9)
51
52
53 /*
54 * Helper function and arrays
55 */
56
57 SVGA3dSurfaceFormat
58 svga_translate_format(enum pipe_format format)
59 {
60 switch(format) {
61
62 case PIPE_FORMAT_A8R8G8B8_UNORM:
63 return SVGA3D_A8R8G8B8;
64 case PIPE_FORMAT_X8R8G8B8_UNORM:
65 return SVGA3D_X8R8G8B8;
66
67 /* Required for GL2.1:
68 */
69 case PIPE_FORMAT_A8R8G8B8_SRGB:
70 return SVGA3D_A8R8G8B8;
71
72 case PIPE_FORMAT_R5G6B5_UNORM:
73 return SVGA3D_R5G6B5;
74 case PIPE_FORMAT_A1R5G5B5_UNORM:
75 return SVGA3D_A1R5G5B5;
76 case PIPE_FORMAT_A4R4G4B4_UNORM:
77 return SVGA3D_A4R4G4B4;
78
79
80 /* XXX: Doesn't seem to work properly.
81 case PIPE_FORMAT_Z32_UNORM:
82 return SVGA3D_Z_D32;
83 */
84 case PIPE_FORMAT_Z16_UNORM:
85 return SVGA3D_Z_D16;
86 case PIPE_FORMAT_Z24S8_UNORM:
87 return SVGA3D_Z_D24S8;
88 case PIPE_FORMAT_Z24X8_UNORM:
89 return SVGA3D_Z_D24X8;
90
91 case PIPE_FORMAT_A8_UNORM:
92 return SVGA3D_ALPHA8;
93 case PIPE_FORMAT_L8_UNORM:
94 return SVGA3D_LUMINANCE8;
95
96 case PIPE_FORMAT_DXT1_RGB:
97 case PIPE_FORMAT_DXT1_RGBA:
98 return SVGA3D_DXT1;
99 case PIPE_FORMAT_DXT3_RGBA:
100 return SVGA3D_DXT3;
101 case PIPE_FORMAT_DXT5_RGBA:
102 return SVGA3D_DXT5;
103
104 default:
105 return SVGA3D_FORMAT_INVALID;
106 }
107 }
108
109
110 SVGA3dSurfaceFormat
111 svga_translate_format_render(enum pipe_format format)
112 {
113 switch(format) {
114 case PIPE_FORMAT_A8R8G8B8_UNORM:
115 case PIPE_FORMAT_X8R8G8B8_UNORM:
116 case PIPE_FORMAT_A1R5G5B5_UNORM:
117 case PIPE_FORMAT_A4R4G4B4_UNORM:
118 case PIPE_FORMAT_R5G6B5_UNORM:
119 case PIPE_FORMAT_Z24S8_UNORM:
120 case PIPE_FORMAT_Z24X8_UNORM:
121 case PIPE_FORMAT_Z32_UNORM:
122 case PIPE_FORMAT_Z16_UNORM:
123 case PIPE_FORMAT_L8_UNORM:
124 return svga_translate_format(format);
125
126 #if 1
127 /* For on host conversion */
128 case PIPE_FORMAT_DXT1_RGB:
129 return SVGA3D_X8R8G8B8;
130 case PIPE_FORMAT_DXT1_RGBA:
131 case PIPE_FORMAT_DXT3_RGBA:
132 case PIPE_FORMAT_DXT5_RGBA:
133 return SVGA3D_A8R8G8B8;
134 #endif
135
136 default:
137 return SVGA3D_FORMAT_INVALID;
138 }
139 }
140
141
142 static INLINE void
143 svga_transfer_dma_band(struct svga_transfer *st,
144 SVGA3dTransferType transfer,
145 unsigned y, unsigned h, unsigned srcy)
146 {
147 struct svga_texture *texture = svga_texture(st->base.texture);
148 struct svga_screen *screen = svga_screen(texture->base.screen);
149 SVGA3dCopyBox box;
150 enum pipe_error ret;
151
152 SVGA_DBG(DEBUG_DMA, "dma %s sid %p, face %u, (%u, %u, %u) - (%u, %u, %u), %ubpp\n",
153 transfer == SVGA3D_WRITE_HOST_VRAM ? "to" : "from",
154 texture->handle,
155 st->base.face,
156 st->base.x,
157 y,
158 st->base.zslice,
159 st->base.x + st->base.width,
160 y + h,
161 st->base.zslice + 1,
162 texture->base.block.size*8/(texture->base.block.width*texture->base.block.height));
163
164 box.x = st->base.x;
165 box.y = y;
166 box.z = st->base.zslice;
167 box.w = st->base.width;
168 box.h = h;
169 box.d = 1;
170 box.srcx = 0;
171 box.srcy = srcy;
172 box.srcz = 0;
173
174 pipe_mutex_lock(screen->swc_mutex);
175 ret = SVGA3D_SurfaceDMA(screen->swc, st, transfer, &box, 1);
176 if(ret != PIPE_OK) {
177 screen->swc->flush(screen->swc, NULL);
178 ret = SVGA3D_SurfaceDMA(screen->swc, st, transfer, &box, 1);
179 assert(ret == PIPE_OK);
180 }
181 pipe_mutex_unlock(screen->swc_mutex);
182 }
183
184
185 static INLINE void
186 svga_transfer_dma(struct svga_transfer *st,
187 SVGA3dTransferType transfer)
188 {
189 struct svga_texture *texture = svga_texture(st->base.texture);
190 struct svga_screen *screen = svga_screen(texture->base.screen);
191 struct svga_winsys_screen *sws = screen->sws;
192 struct pipe_fence_handle *fence = NULL;
193
194 if (transfer == SVGA3D_READ_HOST_VRAM) {
195 SVGA_DBG(DEBUG_PERF, "%s: readback transfer\n", __FUNCTION__);
196 }
197
198
199 if(!st->swbuf) {
200 /* Do the DMA transfer in a single go */
201
202 svga_transfer_dma_band(st, transfer, st->base.y, st->base.height, 0);
203
204 if(transfer == SVGA3D_READ_HOST_VRAM) {
205 svga_screen_flush(screen, &fence);
206 sws->fence_finish(sws, fence, 0);
207 //sws->fence_reference(sws, &fence, NULL);
208 }
209 }
210 else {
211 unsigned y, h, srcy;
212 h = st->hw_nblocksy * st->base.block.height;
213 srcy = 0;
214 for(y = 0; y < st->base.height; y += h) {
215 unsigned offset, length;
216 void *hw, *sw;
217
218 if (y + h > st->base.height)
219 h = st->base.height - y;
220
221 /* Transfer band must be aligned to pixel block boundaries */
222 assert(y % st->base.block.height == 0);
223 assert(h % st->base.block.height == 0);
224
225 offset = y * st->base.stride / st->base.block.height;
226 length = h * st->base.stride / st->base.block.height;
227
228 sw = (uint8_t *)st->swbuf + offset;
229
230 if(transfer == SVGA3D_WRITE_HOST_VRAM) {
231 /* Wait for the previous DMAs to complete */
232 /* TODO: keep one DMA (at half the size) in the background */
233 if(y) {
234 svga_screen_flush(screen, &fence);
235 sws->fence_finish(sws, fence, 0);
236 //sws->fence_reference(sws, &fence, NULL);
237 }
238
239 hw = sws->buffer_map(sws, st->hwbuf, PIPE_BUFFER_USAGE_CPU_WRITE);
240 assert(hw);
241 if(hw) {
242 memcpy(hw, sw, length);
243 sws->buffer_unmap(sws, st->hwbuf);
244 }
245 }
246
247 svga_transfer_dma_band(st, transfer, y, h, srcy);
248
249 if(transfer == SVGA3D_READ_HOST_VRAM) {
250 svga_screen_flush(screen, &fence);
251 sws->fence_finish(sws, fence, 0);
252
253 hw = sws->buffer_map(sws, st->hwbuf, PIPE_BUFFER_USAGE_CPU_READ);
254 assert(hw);
255 if(hw) {
256 memcpy(sw, hw, length);
257 sws->buffer_unmap(sws, st->hwbuf);
258 }
259 }
260 }
261 }
262 }
263
264
265 static struct pipe_texture *
266 svga_texture_create(struct pipe_screen *screen,
267 const struct pipe_texture *templat)
268 {
269 struct svga_screen *svgascreen = svga_screen(screen);
270 struct svga_texture *tex = CALLOC_STRUCT(svga_texture);
271 unsigned width, height, depth;
272 unsigned level;
273
274 if (!tex)
275 goto error1;
276
277 tex->base = *templat;
278 pipe_reference_init(&tex->base.reference, 1);
279 tex->base.screen = screen;
280
281 assert(templat->last_level < SVGA_MAX_TEXTURE_LEVELS);
282 if(templat->last_level >= SVGA_MAX_TEXTURE_LEVELS)
283 goto error2;
284
285 width = templat->width0;
286 height = templat->height0;
287 depth = templat->depth0;
288 for(level = 0; level <= templat->last_level; ++level) {
289 tex->base.nblocksx[level] = pf_get_nblocksx(&tex->base.block, width);
290 tex->base.nblocksy[level] = pf_get_nblocksy(&tex->base.block, height);
291 width = u_minify(width, 1);
292 height = u_minify(height, 1);
293 depth = u_minify(depth, 1);
294 }
295
296 tex->key.flags = 0;
297 tex->key.size.width = templat->width0;
298 tex->key.size.height = templat->height0;
299 tex->key.size.depth = templat->depth0;
300
301 if(templat->target == PIPE_TEXTURE_CUBE) {
302 tex->key.flags |= SVGA3D_SURFACE_CUBEMAP;
303 tex->key.numFaces = 6;
304 }
305 else {
306 tex->key.numFaces = 1;
307 }
308
309 if(templat->tex_usage & PIPE_TEXTURE_USAGE_SAMPLER)
310 tex->key.flags |= SVGA3D_SURFACE_HINT_TEXTURE;
311
312 if(templat->tex_usage & PIPE_TEXTURE_USAGE_PRIMARY)
313 tex->key.flags |= SVGA3D_SURFACE_HINT_SCANOUT;
314
315 /*
316 * XXX: Never pass the SVGA3D_SURFACE_HINT_RENDERTARGET hint. Mesa cannot
317 * know beforehand whether a texture will be used as a rendertarget or not
318 * and it always requests PIPE_TEXTURE_USAGE_RENDER_TARGET, therefore
319 * passing the SVGA3D_SURFACE_HINT_RENDERTARGET here defeats its purpose.
320 */
321 #if 0
322 if((templat->tex_usage & PIPE_TEXTURE_USAGE_RENDER_TARGET) &&
323 !util_format_is_compressed(templat->format))
324 tex->key.flags |= SVGA3D_SURFACE_HINT_RENDERTARGET;
325 #endif
326
327 if(templat->tex_usage & PIPE_TEXTURE_USAGE_DEPTH_STENCIL)
328 tex->key.flags |= SVGA3D_SURFACE_HINT_DEPTHSTENCIL;
329
330 tex->key.numMipLevels = templat->last_level + 1;
331
332 tex->key.format = svga_translate_format(templat->format);
333 if(tex->key.format == SVGA3D_FORMAT_INVALID)
334 goto error2;
335
336 tex->key.cachable = 1;
337
338 SVGA_DBG(DEBUG_DMA, "surface_create for texture\n", tex->handle);
339 tex->handle = svga_screen_surface_create(svgascreen, &tex->key);
340 if (tex->handle)
341 SVGA_DBG(DEBUG_DMA, " --> got sid %p (texture)\n", tex->handle);
342
343 return &tex->base;
344
345 error2:
346 FREE(tex);
347 error1:
348 return NULL;
349 }
350
351
352 static struct pipe_texture *
353 svga_texture_blanket(struct pipe_screen * screen,
354 const struct pipe_texture *base,
355 const unsigned *stride,
356 struct pipe_buffer *buffer)
357 {
358 struct svga_texture *tex;
359 struct svga_buffer *sbuf = svga_buffer(buffer);
360 struct svga_winsys_screen *sws = svga_winsys_screen(screen);
361 assert(screen);
362
363 /* Only supports one type */
364 if (base->target != PIPE_TEXTURE_2D ||
365 base->last_level != 0 ||
366 base->depth0 != 1) {
367 return NULL;
368 }
369
370 /**
371 * We currently can't do texture blanket on
372 * SVGA3D_BUFFER. Need to blit to a temporary surface?
373 */
374
375 assert(sbuf->handle);
376 if (!sbuf->handle)
377 return NULL;
378
379 if (svga_translate_format(base->format) != sbuf->key.format) {
380 unsigned f1 = svga_translate_format(base->format);
381 unsigned f2 = sbuf->key.format;
382
383 /* It's okay for XRGB and ARGB or depth with/out stencil to get mixed up */
384 if ( !( (f1 == SVGA3D_X8R8G8B8 && f2 == SVGA3D_A8R8G8B8) ||
385 (f1 == SVGA3D_A8R8G8B8 && f2 == SVGA3D_X8R8G8B8) ||
386 (f1 == SVGA3D_Z_D24X8 && f2 == SVGA3D_Z_D24S8) ) ) {
387 debug_printf("%s wrong format %u != %u\n", __FUNCTION__, f1, f2);
388 return NULL;
389 }
390 }
391
392 tex = CALLOC_STRUCT(svga_texture);
393 if (!tex)
394 return NULL;
395
396 tex->base = *base;
397
398
399 if (sbuf->key.format == 1)
400 tex->base.format = PIPE_FORMAT_X8R8G8B8_UNORM;
401 else if (sbuf->key.format == 2)
402 tex->base.format = PIPE_FORMAT_A8R8G8B8_UNORM;
403
404 pipe_reference_init(&tex->base.reference, 1);
405 tex->base.screen = screen;
406
407 SVGA_DBG(DEBUG_DMA, "blanket sid %p\n", sbuf->handle);
408
409 /* We don't own this storage, so don't try to cache it.
410 */
411 assert(sbuf->key.cachable == 0);
412 tex->key.cachable = 0;
413 sws->surface_reference(sws, &tex->handle, sbuf->handle);
414
415 return &tex->base;
416 }
417
418
419 static void
420 svga_texture_destroy(struct pipe_texture *pt)
421 {
422 struct svga_screen *ss = svga_screen(pt->screen);
423 struct svga_texture *tex = (struct svga_texture *)pt;
424
425 ss->texture_timestamp++;
426
427 svga_sampler_view_reference(&tex->cached_view, NULL);
428
429 /*
430 DBG("%s deleting %p\n", __FUNCTION__, (void *) tex);
431 */
432 SVGA_DBG(DEBUG_DMA, "unref sid %p (texture)\n", tex->handle);
433 svga_screen_surface_destroy(ss, &tex->key, &tex->handle);
434
435 FREE(tex);
436 }
437
438
439 static void
440 svga_texture_copy_handle(struct svga_context *svga,
441 struct svga_screen *ss,
442 struct svga_winsys_surface *src_handle,
443 unsigned src_x, unsigned src_y, unsigned src_z,
444 unsigned src_level, unsigned src_face,
445 struct svga_winsys_surface *dst_handle,
446 unsigned dst_x, unsigned dst_y, unsigned dst_z,
447 unsigned dst_level, unsigned dst_face,
448 unsigned width, unsigned height, unsigned depth)
449 {
450 struct svga_surface dst, src;
451 enum pipe_error ret;
452 SVGA3dCopyBox box, *boxes;
453
454 assert(svga || ss);
455
456 src.handle = src_handle;
457 src.real_level = src_level;
458 src.real_face = src_face;
459 src.real_zslice = 0;
460
461 dst.handle = dst_handle;
462 dst.real_level = dst_level;
463 dst.real_face = dst_face;
464 dst.real_zslice = 0;
465
466 box.x = dst_x;
467 box.y = dst_y;
468 box.z = dst_z;
469 box.w = width;
470 box.h = height;
471 box.d = depth;
472 box.srcx = src_x;
473 box.srcy = src_y;
474 box.srcz = src_z;
475
476 /*
477 SVGA_DBG(DEBUG_VIEWS, "mipcopy src: %p %u (%ux%ux%u), dst: %p %u (%ux%ux%u)\n",
478 src_handle, src_level, src_x, src_y, src_z,
479 dst_handle, dst_level, dst_x, dst_y, dst_z);
480 */
481
482 if (svga) {
483 ret = SVGA3D_BeginSurfaceCopy(svga->swc,
484 &src.base,
485 &dst.base,
486 &boxes, 1);
487 if(ret != PIPE_OK) {
488 svga_context_flush(svga, NULL);
489 ret = SVGA3D_BeginSurfaceCopy(svga->swc,
490 &src.base,
491 &dst.base,
492 &boxes, 1);
493 assert(ret == PIPE_OK);
494 }
495 *boxes = box;
496 SVGA_FIFOCommitAll(svga->swc);
497 } else {
498 pipe_mutex_lock(ss->swc_mutex);
499 ret = SVGA3D_BeginSurfaceCopy(ss->swc,
500 &src.base,
501 &dst.base,
502 &boxes, 1);
503 if(ret != PIPE_OK) {
504 ss->swc->flush(ss->swc, NULL);
505 ret = SVGA3D_BeginSurfaceCopy(ss->swc,
506 &src.base,
507 &dst.base,
508 &boxes, 1);
509 assert(ret == PIPE_OK);
510 }
511 *boxes = box;
512 SVGA_FIFOCommitAll(ss->swc);
513 pipe_mutex_unlock(ss->swc_mutex);
514 }
515 }
516
517 static struct svga_winsys_surface *
518 svga_texture_view_surface(struct pipe_context *pipe,
519 struct svga_texture *tex,
520 SVGA3dSurfaceFormat format,
521 unsigned start_mip,
522 unsigned num_mip,
523 int face_pick,
524 int zslice_pick,
525 struct svga_host_surface_cache_key *key) /* OUT */
526 {
527 struct svga_screen *ss = svga_screen(tex->base.screen);
528 struct svga_winsys_surface *handle;
529 int i, j;
530 unsigned z_offset = 0;
531
532 SVGA_DBG(DEBUG_PERF,
533 "svga: Create surface view: face %d zslice %d mips %d..%d\n",
534 face_pick, zslice_pick, start_mip, start_mip+num_mip-1);
535
536 key->flags = 0;
537 key->format = format;
538 key->numMipLevels = num_mip;
539 key->size.width = u_minify(tex->base.width0, start_mip);
540 key->size.height = u_minify(tex->base.height0, start_mip);
541 key->size.depth = zslice_pick < 0 ? u_minify(tex->base.depth0, start_mip) : 1;
542 key->cachable = 1;
543 assert(key->size.depth == 1);
544
545 if(tex->base.target == PIPE_TEXTURE_CUBE && face_pick < 0) {
546 key->flags |= SVGA3D_SURFACE_CUBEMAP;
547 key->numFaces = 6;
548 } else {
549 key->numFaces = 1;
550 }
551
552 if(key->format == SVGA3D_FORMAT_INVALID) {
553 key->cachable = 0;
554 return NULL;
555 }
556
557 SVGA_DBG(DEBUG_DMA, "surface_create for texture view\n");
558 handle = svga_screen_surface_create(ss, key);
559 if (!handle) {
560 key->cachable = 0;
561 return NULL;
562 }
563
564 SVGA_DBG(DEBUG_DMA, " --> got sid %p (texture view)\n", handle);
565
566 if (face_pick < 0)
567 face_pick = 0;
568
569 if (zslice_pick >= 0)
570 z_offset = zslice_pick;
571
572 for (i = 0; i < key->numMipLevels; i++) {
573 for (j = 0; j < key->numFaces; j++) {
574 if(tex->defined[j + face_pick][i + start_mip]) {
575 unsigned depth = (zslice_pick < 0 ?
576 u_minify(tex->base.depth0, i + start_mip) :
577 1);
578
579 svga_texture_copy_handle(svga_context(pipe),
580 ss,
581 tex->handle,
582 0, 0, z_offset,
583 i + start_mip,
584 j + face_pick,
585 handle, 0, 0, 0, i, j,
586 u_minify(tex->base.width0, i + start_mip),
587 u_minify(tex->base.height0, i + start_mip),
588 depth);
589 }
590 }
591 }
592
593 return handle;
594 }
595
596
597 static struct pipe_surface *
598 svga_get_tex_surface(struct pipe_screen *screen,
599 struct pipe_texture *pt,
600 unsigned face, unsigned level, unsigned zslice,
601 unsigned flags)
602 {
603 struct svga_texture *tex = svga_texture(pt);
604 struct svga_surface *s;
605 boolean render = flags & PIPE_BUFFER_USAGE_GPU_WRITE ? TRUE : FALSE;
606 boolean view = FALSE;
607 SVGA3dSurfaceFormat format;
608
609 s = CALLOC_STRUCT(svga_surface);
610 if (!s)
611 return NULL;
612
613 pipe_reference_init(&s->base.reference, 1);
614 pipe_texture_reference(&s->base.texture, pt);
615 s->base.format = pt->format;
616 s->base.width = u_minify(pt->width0, level);
617 s->base.height = u_minify(pt->height0, level);
618 s->base.usage = flags;
619 s->base.level = level;
620 s->base.face = face;
621 s->base.zslice = zslice;
622
623 if (!render)
624 format = svga_translate_format(pt->format);
625 else
626 format = svga_translate_format_render(pt->format);
627
628 assert(format != SVGA3D_FORMAT_INVALID);
629 assert(!(flags & PIPE_BUFFER_USAGE_CPU_READ_WRITE));
630
631
632 if (svga_screen(screen)->debug.force_surface_view)
633 view = TRUE;
634
635 /* Currently only used for compressed textures */
636 if (render &&
637 format != svga_translate_format(pt->format)) {
638 view = TRUE;
639 }
640
641 if (level != 0 &&
642 svga_screen(screen)->debug.force_level_surface_view)
643 view = TRUE;
644
645 if (pt->target == PIPE_TEXTURE_3D)
646 view = TRUE;
647
648 if (svga_screen(screen)->debug.no_surface_view)
649 view = FALSE;
650
651 if (view) {
652 SVGA_DBG(DEBUG_VIEWS, "svga: Surface view: yes %p, level %u face %u z %u, %p\n",
653 pt, level, face, zslice, s);
654
655 s->handle = svga_texture_view_surface(NULL, tex, format, level, 1, face, zslice,
656 &s->key);
657 s->real_face = 0;
658 s->real_level = 0;
659 s->real_zslice = 0;
660 } else {
661 struct svga_winsys_screen *sws = svga_winsys_screen(screen);
662
663 SVGA_DBG(DEBUG_VIEWS, "svga: Surface view: no %p, level %u, face %u, z %u, %p\n",
664 pt, level, face, zslice, s);
665
666 memset(&s->key, 0, sizeof s->key);
667 sws->surface_reference(sws, &s->handle, tex->handle);
668 s->real_face = face;
669 s->real_level = level;
670 s->real_zslice = zslice;
671 }
672
673 return &s->base;
674 }
675
676
677 static void
678 svga_tex_surface_destroy(struct pipe_surface *surf)
679 {
680 struct svga_surface *s = svga_surface(surf);
681 struct svga_screen *ss = svga_screen(surf->texture->screen);
682
683 SVGA_DBG(DEBUG_DMA, "unref sid %p (tex surface)\n", s->handle);
684 assert(s->key.cachable == 0);
685 svga_screen_surface_destroy(ss, &s->key, &s->handle);
686 pipe_texture_reference(&surf->texture, NULL);
687 FREE(surf);
688 }
689
690
691 static INLINE void
692 svga_mark_surface_dirty(struct pipe_surface *surf)
693 {
694 struct svga_surface *s = svga_surface(surf);
695
696 if(!s->dirty) {
697 struct svga_texture *tex = svga_texture(surf->texture);
698
699 s->dirty = TRUE;
700
701 if (s->handle == tex->handle)
702 tex->defined[surf->face][surf->level] = TRUE;
703 else {
704 /* this will happen later in svga_propagate_surface */
705 }
706 }
707 }
708
709
710 void svga_mark_surfaces_dirty(struct svga_context *svga)
711 {
712 unsigned i;
713
714 for (i = 0; i < PIPE_MAX_COLOR_BUFS; i++) {
715 if (svga->curr.framebuffer.cbufs[i])
716 svga_mark_surface_dirty(svga->curr.framebuffer.cbufs[i]);
717 }
718 if (svga->curr.framebuffer.zsbuf)
719 svga_mark_surface_dirty(svga->curr.framebuffer.zsbuf);
720 }
721
722 /**
723 * Progagate any changes from surfaces to texture.
724 * pipe is optional context to inline the blit command in.
725 */
726 void
727 svga_propagate_surface(struct pipe_context *pipe, struct pipe_surface *surf)
728 {
729 struct svga_surface *s = svga_surface(surf);
730 struct svga_texture *tex = svga_texture(surf->texture);
731 struct svga_screen *ss = svga_screen(surf->texture->screen);
732
733 if (!s->dirty)
734 return;
735
736 s->dirty = FALSE;
737 ss->texture_timestamp++;
738 tex->view_age[surf->level] = ++(tex->age);
739
740 if (s->handle != tex->handle) {
741 SVGA_DBG(DEBUG_VIEWS, "svga: Surface propagate: tex %p, level %u, from %p\n", tex, surf->level, surf);
742 svga_texture_copy_handle(svga_context(pipe), ss,
743 s->handle, 0, 0, 0, s->real_level, s->real_face,
744 tex->handle, 0, 0, surf->zslice, surf->level, surf->face,
745 u_minify(tex->base.width0, surf->level),
746 u_minify(tex->base.height0, surf->level), 1);
747 tex->defined[surf->face][surf->level] = TRUE;
748 }
749 }
750
751 /**
752 * Check if we should call svga_propagate_surface on the surface.
753 */
754 extern boolean
755 svga_surface_needs_propagation(struct pipe_surface *surf)
756 {
757 struct svga_surface *s = svga_surface(surf);
758 struct svga_texture *tex = svga_texture(surf->texture);
759
760 return s->dirty && s->handle != tex->handle;
761 }
762
763
764 static struct pipe_transfer *
765 svga_get_tex_transfer(struct pipe_screen *screen,
766 struct pipe_texture *texture,
767 unsigned face, unsigned level, unsigned zslice,
768 enum pipe_transfer_usage usage, unsigned x, unsigned y,
769 unsigned w, unsigned h)
770 {
771 struct svga_screen *ss = svga_screen(screen);
772 struct svga_winsys_screen *sws = ss->sws;
773 struct svga_transfer *st;
774
775 /* We can't map texture storage directly */
776 if (usage & PIPE_TRANSFER_MAP_DIRECTLY)
777 return NULL;
778
779 st = CALLOC_STRUCT(svga_transfer);
780 if (!st)
781 return NULL;
782
783 st->base.format = texture->format;
784 st->base.block = texture->block;
785 st->base.x = x;
786 st->base.y = y;
787 st->base.width = w;
788 st->base.height = h;
789 st->base.nblocksx = pf_get_nblocksx(&texture->block, w);
790 st->base.nblocksy = pf_get_nblocksy(&texture->block, h);
791 st->base.stride = st->base.nblocksx*st->base.block.size;
792 st->base.usage = usage;
793 st->base.face = face;
794 st->base.level = level;
795 st->base.zslice = zslice;
796
797 st->hw_nblocksy = st->base.nblocksy;
798
799 st->hwbuf = svga_winsys_buffer_create(ss,
800 1,
801 0,
802 st->hw_nblocksy*st->base.stride);
803 while(!st->hwbuf && (st->hw_nblocksy /= 2)) {
804 st->hwbuf = svga_winsys_buffer_create(ss,
805 1,
806 0,
807 st->hw_nblocksy*st->base.stride);
808 }
809
810 if(!st->hwbuf)
811 goto no_hwbuf;
812
813 if(st->hw_nblocksy < st->base.nblocksy) {
814 /* We couldn't allocate a hardware buffer big enough for the transfer,
815 * so allocate regular malloc memory instead */
816 debug_printf("%s: failed to allocate %u KB of DMA, splitting into %u x %u KB DMA transfers\n",
817 __FUNCTION__,
818 (st->base.nblocksy*st->base.stride + 1023)/1024,
819 (st->base.nblocksy + st->hw_nblocksy - 1)/st->hw_nblocksy,
820 (st->hw_nblocksy*st->base.stride + 1023)/1024);
821 st->swbuf = MALLOC(st->base.nblocksy*st->base.stride);
822 if(!st->swbuf)
823 goto no_swbuf;
824 }
825
826 pipe_texture_reference(&st->base.texture, texture);
827
828 if (usage & PIPE_TRANSFER_READ)
829 svga_transfer_dma(st, SVGA3D_READ_HOST_VRAM);
830
831 return &st->base;
832
833 no_swbuf:
834 sws->buffer_destroy(sws, st->hwbuf);
835 no_hwbuf:
836 FREE(st);
837 return NULL;
838 }
839
840
841 static void *
842 svga_transfer_map( struct pipe_screen *screen,
843 struct pipe_transfer *transfer )
844 {
845 struct svga_screen *ss = svga_screen(screen);
846 struct svga_winsys_screen *sws = ss->sws;
847 struct svga_transfer *st = svga_transfer(transfer);
848
849 if(st->swbuf)
850 return st->swbuf;
851 else
852 /* The wait for read transfers already happened when svga_transfer_dma
853 * was called. */
854 return sws->buffer_map(sws, st->hwbuf,
855 pipe_transfer_buffer_flags(transfer));
856 }
857
858
859 static void
860 svga_transfer_unmap(struct pipe_screen *screen,
861 struct pipe_transfer *transfer)
862 {
863 struct svga_screen *ss = svga_screen(screen);
864 struct svga_winsys_screen *sws = ss->sws;
865 struct svga_transfer *st = svga_transfer(transfer);
866
867 if(!st->swbuf)
868 sws->buffer_unmap(sws, st->hwbuf);
869 }
870
871
872 static void
873 svga_tex_transfer_destroy(struct pipe_transfer *transfer)
874 {
875 struct svga_texture *tex = svga_texture(transfer->texture);
876 struct svga_screen *ss = svga_screen(transfer->texture->screen);
877 struct svga_winsys_screen *sws = ss->sws;
878 struct svga_transfer *st = svga_transfer(transfer);
879
880 if (st->base.usage & PIPE_TRANSFER_WRITE) {
881 svga_transfer_dma(st, SVGA3D_WRITE_HOST_VRAM);
882 ss->texture_timestamp++;
883 tex->view_age[transfer->level] = ++(tex->age);
884 tex->defined[transfer->face][transfer->level] = TRUE;
885 }
886
887 pipe_texture_reference(&st->base.texture, NULL);
888 FREE(st->swbuf);
889 sws->buffer_destroy(sws, st->hwbuf);
890 FREE(st);
891 }
892
893 void
894 svga_screen_init_texture_functions(struct pipe_screen *screen)
895 {
896 screen->texture_create = svga_texture_create;
897 screen->texture_destroy = svga_texture_destroy;
898 screen->get_tex_surface = svga_get_tex_surface;
899 screen->tex_surface_destroy = svga_tex_surface_destroy;
900 screen->texture_blanket = svga_texture_blanket;
901 screen->get_tex_transfer = svga_get_tex_transfer;
902 screen->transfer_map = svga_transfer_map;
903 screen->transfer_unmap = svga_transfer_unmap;
904 screen->tex_transfer_destroy = svga_tex_transfer_destroy;
905 }
906
907 /***********************************************************************
908 */
909
910 struct svga_sampler_view *
911 svga_get_tex_sampler_view(struct pipe_context *pipe, struct pipe_texture *pt,
912 unsigned min_lod, unsigned max_lod)
913 {
914 struct svga_screen *ss = svga_screen(pt->screen);
915 struct svga_winsys_screen *sws = ss->sws;
916 struct svga_texture *tex = svga_texture(pt);
917 struct svga_sampler_view *sv = NULL;
918 SVGA3dSurfaceFormat format = svga_translate_format(pt->format);
919 boolean view = TRUE;
920
921 assert(pt);
922 assert(min_lod >= 0);
923 assert(min_lod <= max_lod);
924 assert(max_lod <= pt->last_level);
925
926
927 /* Is a view needed */
928 {
929 /*
930 * Can't control max lod. For first level views and when we only
931 * look at one level we disable mip filtering to achive the same
932 * results as a view.
933 */
934 if (min_lod == 0 && max_lod >= pt->last_level)
935 view = FALSE;
936
937 if (util_format_is_compressed(pt->format) && view) {
938 format = svga_translate_format_render(pt->format);
939 }
940
941 if (ss->debug.no_sampler_view)
942 view = FALSE;
943
944 if (ss->debug.force_sampler_view)
945 view = TRUE;
946 }
947
948 /* First try the cache */
949 if (view) {
950 pipe_mutex_lock(ss->tex_mutex);
951 if (tex->cached_view &&
952 tex->cached_view->min_lod == min_lod &&
953 tex->cached_view->max_lod == max_lod) {
954 svga_sampler_view_reference(&sv, tex->cached_view);
955 pipe_mutex_unlock(ss->tex_mutex);
956 SVGA_DBG(DEBUG_VIEWS, "svga: Sampler view: reuse %p, %u %u, last %u\n",
957 pt, min_lod, max_lod, pt->last_level);
958 svga_validate_sampler_view(svga_context(pipe), sv);
959 return sv;
960 }
961 pipe_mutex_unlock(ss->tex_mutex);
962 }
963
964 sv = CALLOC_STRUCT(svga_sampler_view);
965 pipe_reference_init(&sv->reference, 1);
966 sv->texture = tex;
967 sv->min_lod = min_lod;
968 sv->max_lod = max_lod;
969
970 /* No view needed just use the whole texture */
971 if (!view) {
972 SVGA_DBG(DEBUG_VIEWS,
973 "svga: Sampler view: no %p, mips %u..%u, nr %u, size (%ux%ux%u), last %u\n",
974 pt, min_lod, max_lod,
975 max_lod - min_lod + 1,
976 pt->width0,
977 pt->height0,
978 pt->depth0,
979 pt->last_level);
980 sv->key.cachable = 0;
981 sws->surface_reference(sws, &sv->handle, tex->handle);
982 return sv;
983 }
984
985 SVGA_DBG(DEBUG_VIEWS,
986 "svga: Sampler view: yes %p, mips %u..%u, nr %u, size (%ux%ux%u), last %u\n",
987 pt, min_lod, max_lod,
988 max_lod - min_lod + 1,
989 pt->width0,
990 pt->height0,
991 pt->depth0,
992 pt->last_level);
993
994 sv->age = tex->age;
995 sv->handle = svga_texture_view_surface(pipe, tex, format,
996 min_lod,
997 max_lod - min_lod + 1,
998 -1, -1,
999 &sv->key);
1000
1001 if (!sv->handle) {
1002 assert(0);
1003 sv->key.cachable = 0;
1004 sws->surface_reference(sws, &sv->handle, tex->handle);
1005 return sv;
1006 }
1007
1008 pipe_mutex_lock(ss->tex_mutex);
1009 svga_sampler_view_reference(&tex->cached_view, sv);
1010 pipe_mutex_unlock(ss->tex_mutex);
1011
1012 return sv;
1013 }
1014
1015 void
1016 svga_validate_sampler_view(struct svga_context *svga, struct svga_sampler_view *v)
1017 {
1018 struct svga_texture *tex = v->texture;
1019 unsigned numFaces;
1020 unsigned age = 0;
1021 int i, k;
1022
1023 assert(svga);
1024
1025 if (v->handle == v->texture->handle)
1026 return;
1027
1028 age = tex->age;
1029
1030 if(tex->base.target == PIPE_TEXTURE_CUBE)
1031 numFaces = 6;
1032 else
1033 numFaces = 1;
1034
1035 for (i = v->min_lod; i <= v->max_lod; i++) {
1036 for (k = 0; k < numFaces; k++) {
1037 if (v->age < tex->view_age[i])
1038 svga_texture_copy_handle(svga, NULL,
1039 tex->handle, 0, 0, 0, i, k,
1040 v->handle, 0, 0, 0, i - v->min_lod, k,
1041 u_minify(tex->base.width0, i),
1042 u_minify(tex->base.height0, i),
1043 u_minify(tex->base.depth0, i));
1044 }
1045 }
1046
1047 v->age = age;
1048 }
1049
1050 void
1051 svga_destroy_sampler_view_priv(struct svga_sampler_view *v)
1052 {
1053 struct svga_screen *ss = svga_screen(v->texture->base.screen);
1054
1055 SVGA_DBG(DEBUG_DMA, "unref sid %p (sampler view)\n", v->handle);
1056 svga_screen_surface_destroy(ss, &v->key, &v->handle);
1057
1058 FREE(v);
1059 }
1060
1061 boolean
1062 svga_screen_buffer_from_texture(struct pipe_texture *texture,
1063 struct pipe_buffer **buffer,
1064 unsigned *stride)
1065 {
1066 struct svga_texture *stex = svga_texture(texture);
1067
1068 *buffer = svga_screen_buffer_wrap_surface
1069 (texture->screen,
1070 svga_translate_format(texture->format),
1071 stex->handle);
1072
1073 *stride = pf_get_nblocksx(&texture->block, texture->width0) *
1074 texture->block.size;
1075
1076 return *buffer != NULL;
1077 }
1078
1079
1080 struct svga_winsys_surface *
1081 svga_screen_texture_get_winsys_surface(struct pipe_texture *texture)
1082 {
1083 struct svga_winsys_screen *sws = svga_winsys_screen(texture->screen);
1084 struct svga_winsys_surface *vsurf = NULL;
1085
1086 assert(svga_texture(texture)->key.cachable == 0);
1087 svga_texture(texture)->key.cachable = 0;
1088 sws->surface_reference(sws, &vsurf, svga_texture(texture)->handle);
1089 return vsurf;
1090 }