gallium: Reorg texture usage flags
[mesa.git] / src / gallium / drivers / svga / svga_screen_texture.c
1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
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9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 **********************************************************/
25
26 #include "svga_cmd.h"
27
28 #include "pipe/p_state.h"
29 #include "pipe/p_defines.h"
30 #include "util/u_inlines.h"
31 #include "os/os_thread.h"
32 #include "util/u_format.h"
33 #include "util/u_math.h"
34 #include "util/u_memory.h"
35
36 #include "svga_screen.h"
37 #include "svga_context.h"
38 #include "svga_screen_texture.h"
39 #include "svga_screen_buffer.h"
40 #include "svga_winsys.h"
41 #include "svga_debug.h"
42 #include "svga_screen_buffer.h"
43
44 #include <util/u_string.h>
45
46
47 /* XXX: This isn't a real hardware flag, but just a hack for kernel to
48 * know about primary surfaces. Find a better way to accomplish this.
49 */
50 #define SVGA3D_SURFACE_HINT_SCANOUT (1 << 9)
51
52
53 /*
54 * Helper function and arrays
55 */
56
57 SVGA3dSurfaceFormat
58 svga_translate_format(enum pipe_format format)
59 {
60 switch(format) {
61
62 case PIPE_FORMAT_A8R8G8B8_UNORM:
63 return SVGA3D_A8R8G8B8;
64 case PIPE_FORMAT_X8R8G8B8_UNORM:
65 return SVGA3D_X8R8G8B8;
66
67 /* Required for GL2.1:
68 */
69 case PIPE_FORMAT_A8R8G8B8_SRGB:
70 return SVGA3D_A8R8G8B8;
71
72 case PIPE_FORMAT_R5G6B5_UNORM:
73 return SVGA3D_R5G6B5;
74 case PIPE_FORMAT_A1R5G5B5_UNORM:
75 return SVGA3D_A1R5G5B5;
76 case PIPE_FORMAT_A4R4G4B4_UNORM:
77 return SVGA3D_A4R4G4B4;
78
79
80 /* XXX: Doesn't seem to work properly.
81 case PIPE_FORMAT_Z32_UNORM:
82 return SVGA3D_Z_D32;
83 */
84 case PIPE_FORMAT_Z16_UNORM:
85 return SVGA3D_Z_D16;
86 case PIPE_FORMAT_Z24S8_UNORM:
87 return SVGA3D_Z_D24S8;
88 case PIPE_FORMAT_Z24X8_UNORM:
89 return SVGA3D_Z_D24X8;
90
91 case PIPE_FORMAT_A8_UNORM:
92 return SVGA3D_ALPHA8;
93 case PIPE_FORMAT_L8_UNORM:
94 return SVGA3D_LUMINANCE8;
95
96 case PIPE_FORMAT_DXT1_RGB:
97 case PIPE_FORMAT_DXT1_RGBA:
98 return SVGA3D_DXT1;
99 case PIPE_FORMAT_DXT3_RGBA:
100 return SVGA3D_DXT3;
101 case PIPE_FORMAT_DXT5_RGBA:
102 return SVGA3D_DXT5;
103
104 default:
105 return SVGA3D_FORMAT_INVALID;
106 }
107 }
108
109
110 SVGA3dSurfaceFormat
111 svga_translate_format_render(enum pipe_format format)
112 {
113 switch(format) {
114 case PIPE_FORMAT_A8R8G8B8_UNORM:
115 case PIPE_FORMAT_X8R8G8B8_UNORM:
116 case PIPE_FORMAT_A1R5G5B5_UNORM:
117 case PIPE_FORMAT_A4R4G4B4_UNORM:
118 case PIPE_FORMAT_R5G6B5_UNORM:
119 case PIPE_FORMAT_Z24S8_UNORM:
120 case PIPE_FORMAT_Z24X8_UNORM:
121 case PIPE_FORMAT_Z32_UNORM:
122 case PIPE_FORMAT_Z16_UNORM:
123 case PIPE_FORMAT_L8_UNORM:
124 return svga_translate_format(format);
125
126 #if 1
127 /* For on host conversion */
128 case PIPE_FORMAT_DXT1_RGB:
129 return SVGA3D_X8R8G8B8;
130 case PIPE_FORMAT_DXT1_RGBA:
131 case PIPE_FORMAT_DXT3_RGBA:
132 case PIPE_FORMAT_DXT5_RGBA:
133 return SVGA3D_A8R8G8B8;
134 #endif
135
136 default:
137 return SVGA3D_FORMAT_INVALID;
138 }
139 }
140
141
142 static INLINE void
143 svga_transfer_dma_band(struct svga_transfer *st,
144 SVGA3dTransferType transfer,
145 unsigned y, unsigned h, unsigned srcy)
146 {
147 struct svga_texture *texture = svga_texture(st->base.texture);
148 struct svga_screen *screen = svga_screen(texture->base.screen);
149 SVGA3dCopyBox box;
150 enum pipe_error ret;
151
152 SVGA_DBG(DEBUG_DMA, "dma %s sid %p, face %u, (%u, %u, %u) - (%u, %u, %u), %ubpp\n",
153 transfer == SVGA3D_WRITE_HOST_VRAM ? "to" : "from",
154 texture->handle,
155 st->base.face,
156 st->base.x,
157 y,
158 st->base.zslice,
159 st->base.x + st->base.width,
160 y + h,
161 st->base.zslice + 1,
162 util_format_get_blocksize(texture->base.format)*8/
163 (util_format_get_blockwidth(texture->base.format)*util_format_get_blockheight(texture->base.format)));
164
165 box.x = st->base.x;
166 box.y = y;
167 box.z = st->base.zslice;
168 box.w = st->base.width;
169 box.h = h;
170 box.d = 1;
171 box.srcx = 0;
172 box.srcy = srcy;
173 box.srcz = 0;
174
175 pipe_mutex_lock(screen->swc_mutex);
176 ret = SVGA3D_SurfaceDMA(screen->swc, st, transfer, &box, 1);
177 if(ret != PIPE_OK) {
178 screen->swc->flush(screen->swc, NULL);
179 ret = SVGA3D_SurfaceDMA(screen->swc, st, transfer, &box, 1);
180 assert(ret == PIPE_OK);
181 }
182 pipe_mutex_unlock(screen->swc_mutex);
183 }
184
185
186 static INLINE void
187 svga_transfer_dma(struct svga_transfer *st,
188 SVGA3dTransferType transfer)
189 {
190 struct svga_texture *texture = svga_texture(st->base.texture);
191 struct svga_screen *screen = svga_screen(texture->base.screen);
192 struct svga_winsys_screen *sws = screen->sws;
193 struct pipe_fence_handle *fence = NULL;
194
195 if (transfer == SVGA3D_READ_HOST_VRAM) {
196 SVGA_DBG(DEBUG_PERF, "%s: readback transfer\n", __FUNCTION__);
197 }
198
199
200 if(!st->swbuf) {
201 /* Do the DMA transfer in a single go */
202
203 svga_transfer_dma_band(st, transfer, st->base.y, st->base.height, 0);
204
205 if(transfer == SVGA3D_READ_HOST_VRAM) {
206 svga_screen_flush(screen, &fence);
207 sws->fence_finish(sws, fence, 0);
208 sws->fence_reference(sws, &fence, NULL);
209 }
210 }
211 else {
212 unsigned y, h, srcy;
213 unsigned blockheight = util_format_get_blockheight(st->base.texture->format);
214 h = st->hw_nblocksy * blockheight;
215 srcy = 0;
216 for(y = 0; y < st->base.height; y += h) {
217 unsigned offset, length;
218 void *hw, *sw;
219
220 if (y + h > st->base.height)
221 h = st->base.height - y;
222
223 /* Transfer band must be aligned to pixel block boundaries */
224 assert(y % blockheight == 0);
225 assert(h % blockheight == 0);
226
227 offset = y * st->base.stride / blockheight;
228 length = h * st->base.stride / blockheight;
229
230 sw = (uint8_t *)st->swbuf + offset;
231
232 if(transfer == SVGA3D_WRITE_HOST_VRAM) {
233 /* Wait for the previous DMAs to complete */
234 /* TODO: keep one DMA (at half the size) in the background */
235 if(y) {
236 svga_screen_flush(screen, &fence);
237 sws->fence_finish(sws, fence, 0);
238 sws->fence_reference(sws, &fence, NULL);
239 }
240
241 hw = sws->buffer_map(sws, st->hwbuf, PIPE_BUFFER_USAGE_CPU_WRITE);
242 assert(hw);
243 if(hw) {
244 memcpy(hw, sw, length);
245 sws->buffer_unmap(sws, st->hwbuf);
246 }
247 }
248
249 svga_transfer_dma_band(st, transfer, y, h, srcy);
250
251 if(transfer == SVGA3D_READ_HOST_VRAM) {
252 svga_screen_flush(screen, &fence);
253 sws->fence_finish(sws, fence, 0);
254
255 hw = sws->buffer_map(sws, st->hwbuf, PIPE_BUFFER_USAGE_CPU_READ);
256 assert(hw);
257 if(hw) {
258 memcpy(sw, hw, length);
259 sws->buffer_unmap(sws, st->hwbuf);
260 }
261 }
262 }
263 }
264 }
265
266
267 static struct pipe_texture *
268 svga_texture_create(struct pipe_screen *screen,
269 const struct pipe_texture *templat)
270 {
271 struct svga_screen *svgascreen = svga_screen(screen);
272 struct svga_texture *tex = CALLOC_STRUCT(svga_texture);
273 unsigned width, height, depth;
274 unsigned level;
275
276 if (!tex)
277 goto error1;
278
279 tex->base = *templat;
280 pipe_reference_init(&tex->base.reference, 1);
281 tex->base.screen = screen;
282
283 assert(templat->last_level < SVGA_MAX_TEXTURE_LEVELS);
284 if(templat->last_level >= SVGA_MAX_TEXTURE_LEVELS)
285 goto error2;
286
287 width = templat->width0;
288 height = templat->height0;
289 depth = templat->depth0;
290 for(level = 0; level <= templat->last_level; ++level) {
291 width = u_minify(width, 1);
292 height = u_minify(height, 1);
293 depth = u_minify(depth, 1);
294 }
295
296 tex->key.flags = 0;
297 tex->key.size.width = templat->width0;
298 tex->key.size.height = templat->height0;
299 tex->key.size.depth = templat->depth0;
300
301 if(templat->target == PIPE_TEXTURE_CUBE) {
302 tex->key.flags |= SVGA3D_SURFACE_CUBEMAP;
303 tex->key.numFaces = 6;
304 }
305 else {
306 tex->key.numFaces = 1;
307 }
308
309 tex->key.cachable = 1;
310
311 if(templat->tex_usage & PIPE_TEXTURE_USAGE_SAMPLER)
312 tex->key.flags |= SVGA3D_SURFACE_HINT_TEXTURE;
313
314 if(templat->tex_usage & PIPE_TEXTURE_USAGE_DISPLAY_TARGET) {
315 tex->key.cachable = 0;
316 }
317
318 if(templat->tex_usage & PIPE_TEXTURE_USAGE_SHARED) {
319 tex->key.cachable = 0;
320 }
321
322 if(templat->tex_usage & PIPE_TEXTURE_USAGE_SCANOUT) {
323 tex->key.flags |= SVGA3D_SURFACE_HINT_SCANOUT;
324 tex->key.cachable = 0;
325 }
326
327 /*
328 * XXX: Never pass the SVGA3D_SURFACE_HINT_RENDERTARGET hint. Mesa cannot
329 * know beforehand whether a texture will be used as a rendertarget or not
330 * and it always requests PIPE_TEXTURE_USAGE_RENDER_TARGET, therefore
331 * passing the SVGA3D_SURFACE_HINT_RENDERTARGET here defeats its purpose.
332 */
333 #if 0
334 if((templat->tex_usage & PIPE_TEXTURE_USAGE_RENDER_TARGET) &&
335 !util_format_is_compressed(templat->format))
336 tex->key.flags |= SVGA3D_SURFACE_HINT_RENDERTARGET;
337 #endif
338
339 if(templat->tex_usage & PIPE_TEXTURE_USAGE_DEPTH_STENCIL)
340 tex->key.flags |= SVGA3D_SURFACE_HINT_DEPTHSTENCIL;
341
342 tex->key.numMipLevels = templat->last_level + 1;
343
344 tex->key.format = svga_translate_format(templat->format);
345 if(tex->key.format == SVGA3D_FORMAT_INVALID)
346 goto error2;
347
348 SVGA_DBG(DEBUG_DMA, "surface_create for texture\n", tex->handle);
349 tex->handle = svga_screen_surface_create(svgascreen, &tex->key);
350 if (tex->handle)
351 SVGA_DBG(DEBUG_DMA, " --> got sid %p (texture)\n", tex->handle);
352
353 return &tex->base;
354
355 error2:
356 FREE(tex);
357 error1:
358 return NULL;
359 }
360
361
362 static struct pipe_texture *
363 svga_texture_blanket(struct pipe_screen * screen,
364 const struct pipe_texture *base,
365 const unsigned *stride,
366 struct pipe_buffer *buffer)
367 {
368 struct svga_texture *tex;
369 struct svga_buffer *sbuf = svga_buffer(buffer);
370 struct svga_winsys_screen *sws = svga_winsys_screen(screen);
371 assert(screen);
372
373 /* Only supports one type */
374 if (base->target != PIPE_TEXTURE_2D ||
375 base->last_level != 0 ||
376 base->depth0 != 1) {
377 return NULL;
378 }
379
380 /**
381 * We currently can't do texture blanket on
382 * SVGA3D_BUFFER. Need to blit to a temporary surface?
383 */
384
385 assert(sbuf->handle);
386 if (!sbuf->handle)
387 return NULL;
388
389 if (svga_translate_format(base->format) != sbuf->key.format) {
390 unsigned f1 = svga_translate_format(base->format);
391 unsigned f2 = sbuf->key.format;
392
393 /* It's okay for XRGB and ARGB or depth with/out stencil to get mixed up */
394 if ( !( (f1 == SVGA3D_X8R8G8B8 && f2 == SVGA3D_A8R8G8B8) ||
395 (f1 == SVGA3D_A8R8G8B8 && f2 == SVGA3D_X8R8G8B8) ||
396 (f1 == SVGA3D_Z_D24X8 && f2 == SVGA3D_Z_D24S8) ) ) {
397 debug_printf("%s wrong format %u != %u\n", __FUNCTION__, f1, f2);
398 return NULL;
399 }
400 }
401
402 tex = CALLOC_STRUCT(svga_texture);
403 if (!tex)
404 return NULL;
405
406 tex->base = *base;
407
408
409 if (sbuf->key.format == 1)
410 tex->base.format = PIPE_FORMAT_X8R8G8B8_UNORM;
411 else if (sbuf->key.format == 2)
412 tex->base.format = PIPE_FORMAT_A8R8G8B8_UNORM;
413
414 pipe_reference_init(&tex->base.reference, 1);
415 tex->base.screen = screen;
416
417 SVGA_DBG(DEBUG_DMA, "blanket sid %p\n", sbuf->handle);
418
419 /* We don't own this storage, so don't try to cache it.
420 */
421 assert(sbuf->key.cachable == 0);
422 tex->key.cachable = 0;
423 sws->surface_reference(sws, &tex->handle, sbuf->handle);
424
425 return &tex->base;
426 }
427
428
429 struct pipe_texture *
430 svga_screen_texture_wrap_surface(struct pipe_screen *screen,
431 struct pipe_texture *base,
432 enum SVGA3dSurfaceFormat format,
433 struct svga_winsys_surface *srf)
434 {
435 struct svga_texture *tex;
436 assert(screen);
437
438 /* Only supports one type */
439 if (base->target != PIPE_TEXTURE_2D ||
440 base->last_level != 0 ||
441 base->depth0 != 1) {
442 return NULL;
443 }
444
445 if (!srf)
446 return NULL;
447
448 if (svga_translate_format(base->format) != format) {
449 unsigned f1 = svga_translate_format(base->format);
450 unsigned f2 = format;
451
452 /* It's okay for XRGB and ARGB or depth with/out stencil to get mixed up */
453 if ( !( (f1 == SVGA3D_X8R8G8B8 && f2 == SVGA3D_A8R8G8B8) ||
454 (f1 == SVGA3D_A8R8G8B8 && f2 == SVGA3D_X8R8G8B8) ||
455 (f1 == SVGA3D_Z_D24X8 && f2 == SVGA3D_Z_D24S8) ) ) {
456 debug_printf("%s wrong format %u != %u\n", __FUNCTION__, f1, f2);
457 return NULL;
458 }
459 }
460
461 tex = CALLOC_STRUCT(svga_texture);
462 if (!tex)
463 return NULL;
464
465 tex->base = *base;
466
467
468 if (format == 1)
469 tex->base.format = PIPE_FORMAT_X8R8G8B8_UNORM;
470 else if (format == 2)
471 tex->base.format = PIPE_FORMAT_A8R8G8B8_UNORM;
472
473 pipe_reference_init(&tex->base.reference, 1);
474 tex->base.screen = screen;
475
476 SVGA_DBG(DEBUG_DMA, "wrap surface sid %p\n", srf);
477
478 tex->key.cachable = 0;
479 tex->handle = srf;
480
481 return &tex->base;
482 }
483
484
485 static void
486 svga_texture_destroy(struct pipe_texture *pt)
487 {
488 struct svga_screen *ss = svga_screen(pt->screen);
489 struct svga_texture *tex = (struct svga_texture *)pt;
490
491 ss->texture_timestamp++;
492
493 svga_sampler_view_reference(&tex->cached_view, NULL);
494
495 /*
496 DBG("%s deleting %p\n", __FUNCTION__, (void *) tex);
497 */
498 SVGA_DBG(DEBUG_DMA, "unref sid %p (texture)\n", tex->handle);
499 svga_screen_surface_destroy(ss, &tex->key, &tex->handle);
500
501 FREE(tex);
502 }
503
504
505 static void
506 svga_texture_copy_handle(struct svga_context *svga,
507 struct svga_screen *ss,
508 struct svga_winsys_surface *src_handle,
509 unsigned src_x, unsigned src_y, unsigned src_z,
510 unsigned src_level, unsigned src_face,
511 struct svga_winsys_surface *dst_handle,
512 unsigned dst_x, unsigned dst_y, unsigned dst_z,
513 unsigned dst_level, unsigned dst_face,
514 unsigned width, unsigned height, unsigned depth)
515 {
516 struct svga_surface dst, src;
517 enum pipe_error ret;
518 SVGA3dCopyBox box, *boxes;
519
520 assert(svga || ss);
521
522 src.handle = src_handle;
523 src.real_level = src_level;
524 src.real_face = src_face;
525 src.real_zslice = 0;
526
527 dst.handle = dst_handle;
528 dst.real_level = dst_level;
529 dst.real_face = dst_face;
530 dst.real_zslice = 0;
531
532 box.x = dst_x;
533 box.y = dst_y;
534 box.z = dst_z;
535 box.w = width;
536 box.h = height;
537 box.d = depth;
538 box.srcx = src_x;
539 box.srcy = src_y;
540 box.srcz = src_z;
541
542 /*
543 SVGA_DBG(DEBUG_VIEWS, "mipcopy src: %p %u (%ux%ux%u), dst: %p %u (%ux%ux%u)\n",
544 src_handle, src_level, src_x, src_y, src_z,
545 dst_handle, dst_level, dst_x, dst_y, dst_z);
546 */
547
548 if (svga) {
549 ret = SVGA3D_BeginSurfaceCopy(svga->swc,
550 &src.base,
551 &dst.base,
552 &boxes, 1);
553 if(ret != PIPE_OK) {
554 svga_context_flush(svga, NULL);
555 ret = SVGA3D_BeginSurfaceCopy(svga->swc,
556 &src.base,
557 &dst.base,
558 &boxes, 1);
559 assert(ret == PIPE_OK);
560 }
561 *boxes = box;
562 SVGA_FIFOCommitAll(svga->swc);
563 } else {
564 pipe_mutex_lock(ss->swc_mutex);
565 ret = SVGA3D_BeginSurfaceCopy(ss->swc,
566 &src.base,
567 &dst.base,
568 &boxes, 1);
569 if(ret != PIPE_OK) {
570 ss->swc->flush(ss->swc, NULL);
571 ret = SVGA3D_BeginSurfaceCopy(ss->swc,
572 &src.base,
573 &dst.base,
574 &boxes, 1);
575 assert(ret == PIPE_OK);
576 }
577 *boxes = box;
578 SVGA_FIFOCommitAll(ss->swc);
579 pipe_mutex_unlock(ss->swc_mutex);
580 }
581 }
582
583 static struct svga_winsys_surface *
584 svga_texture_view_surface(struct pipe_context *pipe,
585 struct svga_texture *tex,
586 SVGA3dSurfaceFormat format,
587 unsigned start_mip,
588 unsigned num_mip,
589 int face_pick,
590 int zslice_pick,
591 struct svga_host_surface_cache_key *key) /* OUT */
592 {
593 struct svga_screen *ss = svga_screen(tex->base.screen);
594 struct svga_winsys_surface *handle;
595 uint32_t i, j;
596 unsigned z_offset = 0;
597
598 SVGA_DBG(DEBUG_PERF,
599 "svga: Create surface view: face %d zslice %d mips %d..%d\n",
600 face_pick, zslice_pick, start_mip, start_mip+num_mip-1);
601
602 key->flags = 0;
603 key->format = format;
604 key->numMipLevels = num_mip;
605 key->size.width = u_minify(tex->base.width0, start_mip);
606 key->size.height = u_minify(tex->base.height0, start_mip);
607 key->size.depth = zslice_pick < 0 ? u_minify(tex->base.depth0, start_mip) : 1;
608 key->cachable = 1;
609 assert(key->size.depth == 1);
610
611 if(tex->base.target == PIPE_TEXTURE_CUBE && face_pick < 0) {
612 key->flags |= SVGA3D_SURFACE_CUBEMAP;
613 key->numFaces = 6;
614 } else {
615 key->numFaces = 1;
616 }
617
618 if(key->format == SVGA3D_FORMAT_INVALID) {
619 key->cachable = 0;
620 return NULL;
621 }
622
623 SVGA_DBG(DEBUG_DMA, "surface_create for texture view\n");
624 handle = svga_screen_surface_create(ss, key);
625 if (!handle) {
626 key->cachable = 0;
627 return NULL;
628 }
629
630 SVGA_DBG(DEBUG_DMA, " --> got sid %p (texture view)\n", handle);
631
632 if (face_pick < 0)
633 face_pick = 0;
634
635 if (zslice_pick >= 0)
636 z_offset = zslice_pick;
637
638 for (i = 0; i < key->numMipLevels; i++) {
639 for (j = 0; j < key->numFaces; j++) {
640 if(tex->defined[j + face_pick][i + start_mip]) {
641 unsigned depth = (zslice_pick < 0 ?
642 u_minify(tex->base.depth0, i + start_mip) :
643 1);
644
645 svga_texture_copy_handle(svga_context(pipe),
646 ss,
647 tex->handle,
648 0, 0, z_offset,
649 i + start_mip,
650 j + face_pick,
651 handle, 0, 0, 0, i, j,
652 u_minify(tex->base.width0, i + start_mip),
653 u_minify(tex->base.height0, i + start_mip),
654 depth);
655 }
656 }
657 }
658
659 return handle;
660 }
661
662
663 static struct pipe_surface *
664 svga_get_tex_surface(struct pipe_screen *screen,
665 struct pipe_texture *pt,
666 unsigned face, unsigned level, unsigned zslice,
667 unsigned flags)
668 {
669 struct svga_texture *tex = svga_texture(pt);
670 struct svga_surface *s;
671 boolean render = flags & PIPE_BUFFER_USAGE_GPU_WRITE ? TRUE : FALSE;
672 boolean view = FALSE;
673 SVGA3dSurfaceFormat format;
674
675 s = CALLOC_STRUCT(svga_surface);
676 if (!s)
677 return NULL;
678
679 pipe_reference_init(&s->base.reference, 1);
680 pipe_texture_reference(&s->base.texture, pt);
681 s->base.format = pt->format;
682 s->base.width = u_minify(pt->width0, level);
683 s->base.height = u_minify(pt->height0, level);
684 s->base.usage = flags;
685 s->base.level = level;
686 s->base.face = face;
687 s->base.zslice = zslice;
688
689 if (!render)
690 format = svga_translate_format(pt->format);
691 else
692 format = svga_translate_format_render(pt->format);
693
694 assert(format != SVGA3D_FORMAT_INVALID);
695 assert(!(flags & PIPE_BUFFER_USAGE_CPU_READ_WRITE));
696
697
698 if (svga_screen(screen)->debug.force_surface_view)
699 view = TRUE;
700
701 /* Currently only used for compressed textures */
702 if (render &&
703 format != svga_translate_format(pt->format)) {
704 view = TRUE;
705 }
706
707 if (level != 0 &&
708 svga_screen(screen)->debug.force_level_surface_view)
709 view = TRUE;
710
711 if (pt->target == PIPE_TEXTURE_3D)
712 view = TRUE;
713
714 if (svga_screen(screen)->debug.no_surface_view)
715 view = FALSE;
716
717 if (view) {
718 SVGA_DBG(DEBUG_VIEWS, "svga: Surface view: yes %p, level %u face %u z %u, %p\n",
719 pt, level, face, zslice, s);
720
721 s->handle = svga_texture_view_surface(NULL, tex, format, level, 1, face, zslice,
722 &s->key);
723 s->real_face = 0;
724 s->real_level = 0;
725 s->real_zslice = 0;
726 } else {
727 SVGA_DBG(DEBUG_VIEWS, "svga: Surface view: no %p, level %u, face %u, z %u, %p\n",
728 pt, level, face, zslice, s);
729
730 memset(&s->key, 0, sizeof s->key);
731 s->handle = tex->handle;
732 s->real_face = face;
733 s->real_level = level;
734 s->real_zslice = zslice;
735 }
736
737 return &s->base;
738 }
739
740
741 static void
742 svga_tex_surface_destroy(struct pipe_surface *surf)
743 {
744 struct svga_surface *s = svga_surface(surf);
745 struct svga_texture *t = svga_texture(surf->texture);
746 struct svga_screen *ss = svga_screen(surf->texture->screen);
747
748 if(s->handle != t->handle) {
749 SVGA_DBG(DEBUG_DMA, "unref sid %p (tex surface)\n", s->handle);
750 svga_screen_surface_destroy(ss, &s->key, &s->handle);
751 }
752
753 pipe_texture_reference(&surf->texture, NULL);
754 FREE(surf);
755 }
756
757
758 static INLINE void
759 svga_mark_surface_dirty(struct pipe_surface *surf)
760 {
761 struct svga_surface *s = svga_surface(surf);
762
763 if(!s->dirty) {
764 struct svga_texture *tex = svga_texture(surf->texture);
765
766 s->dirty = TRUE;
767
768 if (s->handle == tex->handle)
769 tex->defined[surf->face][surf->level] = TRUE;
770 else {
771 /* this will happen later in svga_propagate_surface */
772 }
773 }
774 }
775
776
777 void svga_mark_surfaces_dirty(struct svga_context *svga)
778 {
779 unsigned i;
780
781 for (i = 0; i < PIPE_MAX_COLOR_BUFS; i++) {
782 if (svga->curr.framebuffer.cbufs[i])
783 svga_mark_surface_dirty(svga->curr.framebuffer.cbufs[i]);
784 }
785 if (svga->curr.framebuffer.zsbuf)
786 svga_mark_surface_dirty(svga->curr.framebuffer.zsbuf);
787 }
788
789 /**
790 * Progagate any changes from surfaces to texture.
791 * pipe is optional context to inline the blit command in.
792 */
793 void
794 svga_propagate_surface(struct pipe_context *pipe, struct pipe_surface *surf)
795 {
796 struct svga_surface *s = svga_surface(surf);
797 struct svga_texture *tex = svga_texture(surf->texture);
798 struct svga_screen *ss = svga_screen(surf->texture->screen);
799
800 if (!s->dirty)
801 return;
802
803 s->dirty = FALSE;
804 ss->texture_timestamp++;
805 tex->view_age[surf->level] = ++(tex->age);
806
807 if (s->handle != tex->handle) {
808 SVGA_DBG(DEBUG_VIEWS, "svga: Surface propagate: tex %p, level %u, from %p\n", tex, surf->level, surf);
809 svga_texture_copy_handle(svga_context(pipe), ss,
810 s->handle, 0, 0, 0, s->real_level, s->real_face,
811 tex->handle, 0, 0, surf->zslice, surf->level, surf->face,
812 u_minify(tex->base.width0, surf->level),
813 u_minify(tex->base.height0, surf->level), 1);
814 tex->defined[surf->face][surf->level] = TRUE;
815 }
816 }
817
818 /**
819 * Check if we should call svga_propagate_surface on the surface.
820 */
821 extern boolean
822 svga_surface_needs_propagation(struct pipe_surface *surf)
823 {
824 struct svga_surface *s = svga_surface(surf);
825 struct svga_texture *tex = svga_texture(surf->texture);
826
827 return s->dirty && s->handle != tex->handle;
828 }
829
830
831 static struct pipe_transfer *
832 svga_get_tex_transfer(struct pipe_screen *screen,
833 struct pipe_texture *texture,
834 unsigned face, unsigned level, unsigned zslice,
835 enum pipe_transfer_usage usage, unsigned x, unsigned y,
836 unsigned w, unsigned h)
837 {
838 struct svga_screen *ss = svga_screen(screen);
839 struct svga_winsys_screen *sws = ss->sws;
840 struct svga_transfer *st;
841 unsigned nblocksx = util_format_get_nblocksx(texture->format, w);
842 unsigned nblocksy = util_format_get_nblocksy(texture->format, h);
843
844 /* We can't map texture storage directly */
845 if (usage & PIPE_TRANSFER_MAP_DIRECTLY)
846 return NULL;
847
848 st = CALLOC_STRUCT(svga_transfer);
849 if (!st)
850 return NULL;
851
852 st->base.x = x;
853 st->base.y = y;
854 st->base.width = w;
855 st->base.height = h;
856 st->base.stride = nblocksx*util_format_get_blocksize(texture->format);
857 st->base.usage = usage;
858 st->base.face = face;
859 st->base.level = level;
860 st->base.zslice = zslice;
861
862 st->hw_nblocksy = nblocksy;
863
864 st->hwbuf = svga_winsys_buffer_create(ss,
865 1,
866 0,
867 st->hw_nblocksy*st->base.stride);
868 while(!st->hwbuf && (st->hw_nblocksy /= 2)) {
869 st->hwbuf = svga_winsys_buffer_create(ss,
870 1,
871 0,
872 st->hw_nblocksy*st->base.stride);
873 }
874
875 if(!st->hwbuf)
876 goto no_hwbuf;
877
878 if(st->hw_nblocksy < nblocksy) {
879 /* We couldn't allocate a hardware buffer big enough for the transfer,
880 * so allocate regular malloc memory instead */
881 debug_printf("%s: failed to allocate %u KB of DMA, splitting into %u x %u KB DMA transfers\n",
882 __FUNCTION__,
883 (nblocksy*st->base.stride + 1023)/1024,
884 (nblocksy + st->hw_nblocksy - 1)/st->hw_nblocksy,
885 (st->hw_nblocksy*st->base.stride + 1023)/1024);
886 st->swbuf = MALLOC(nblocksy*st->base.stride);
887 if(!st->swbuf)
888 goto no_swbuf;
889 }
890
891 pipe_texture_reference(&st->base.texture, texture);
892
893 if (usage & PIPE_TRANSFER_READ)
894 svga_transfer_dma(st, SVGA3D_READ_HOST_VRAM);
895
896 return &st->base;
897
898 no_swbuf:
899 sws->buffer_destroy(sws, st->hwbuf);
900 no_hwbuf:
901 FREE(st);
902 return NULL;
903 }
904
905
906 static void *
907 svga_transfer_map( struct pipe_screen *screen,
908 struct pipe_transfer *transfer )
909 {
910 struct svga_screen *ss = svga_screen(screen);
911 struct svga_winsys_screen *sws = ss->sws;
912 struct svga_transfer *st = svga_transfer(transfer);
913
914 if(st->swbuf)
915 return st->swbuf;
916 else
917 /* The wait for read transfers already happened when svga_transfer_dma
918 * was called. */
919 return sws->buffer_map(sws, st->hwbuf,
920 pipe_transfer_buffer_flags(transfer));
921 }
922
923
924 static void
925 svga_transfer_unmap(struct pipe_screen *screen,
926 struct pipe_transfer *transfer)
927 {
928 struct svga_screen *ss = svga_screen(screen);
929 struct svga_winsys_screen *sws = ss->sws;
930 struct svga_transfer *st = svga_transfer(transfer);
931
932 if(!st->swbuf)
933 sws->buffer_unmap(sws, st->hwbuf);
934 }
935
936
937 static void
938 svga_tex_transfer_destroy(struct pipe_transfer *transfer)
939 {
940 struct svga_texture *tex = svga_texture(transfer->texture);
941 struct svga_screen *ss = svga_screen(transfer->texture->screen);
942 struct svga_winsys_screen *sws = ss->sws;
943 struct svga_transfer *st = svga_transfer(transfer);
944
945 if (st->base.usage & PIPE_TRANSFER_WRITE) {
946 svga_transfer_dma(st, SVGA3D_WRITE_HOST_VRAM);
947 ss->texture_timestamp++;
948 tex->view_age[transfer->level] = ++(tex->age);
949 tex->defined[transfer->face][transfer->level] = TRUE;
950 }
951
952 pipe_texture_reference(&st->base.texture, NULL);
953 FREE(st->swbuf);
954 sws->buffer_destroy(sws, st->hwbuf);
955 FREE(st);
956 }
957
958 void
959 svga_screen_init_texture_functions(struct pipe_screen *screen)
960 {
961 screen->texture_create = svga_texture_create;
962 screen->texture_destroy = svga_texture_destroy;
963 screen->get_tex_surface = svga_get_tex_surface;
964 screen->tex_surface_destroy = svga_tex_surface_destroy;
965 screen->texture_blanket = svga_texture_blanket;
966 screen->get_tex_transfer = svga_get_tex_transfer;
967 screen->transfer_map = svga_transfer_map;
968 screen->transfer_unmap = svga_transfer_unmap;
969 screen->tex_transfer_destroy = svga_tex_transfer_destroy;
970 }
971
972 /***********************************************************************
973 */
974
975 struct svga_sampler_view *
976 svga_get_tex_sampler_view(struct pipe_context *pipe, struct pipe_texture *pt,
977 unsigned min_lod, unsigned max_lod)
978 {
979 struct svga_screen *ss = svga_screen(pt->screen);
980 struct svga_texture *tex = svga_texture(pt);
981 struct svga_sampler_view *sv = NULL;
982 SVGA3dSurfaceFormat format = svga_translate_format(pt->format);
983 boolean view = TRUE;
984
985 assert(pt);
986 assert(min_lod >= 0);
987 assert(min_lod <= max_lod);
988 assert(max_lod <= pt->last_level);
989
990
991 /* Is a view needed */
992 {
993 /*
994 * Can't control max lod. For first level views and when we only
995 * look at one level we disable mip filtering to achive the same
996 * results as a view.
997 */
998 if (min_lod == 0 && max_lod >= pt->last_level)
999 view = FALSE;
1000
1001 if (util_format_is_compressed(pt->format) && view) {
1002 format = svga_translate_format_render(pt->format);
1003 }
1004
1005 if (ss->debug.no_sampler_view)
1006 view = FALSE;
1007
1008 if (ss->debug.force_sampler_view)
1009 view = TRUE;
1010 }
1011
1012 /* First try the cache */
1013 if (view) {
1014 pipe_mutex_lock(ss->tex_mutex);
1015 if (tex->cached_view &&
1016 tex->cached_view->min_lod == min_lod &&
1017 tex->cached_view->max_lod == max_lod) {
1018 svga_sampler_view_reference(&sv, tex->cached_view);
1019 pipe_mutex_unlock(ss->tex_mutex);
1020 SVGA_DBG(DEBUG_VIEWS, "svga: Sampler view: reuse %p, %u %u, last %u\n",
1021 pt, min_lod, max_lod, pt->last_level);
1022 svga_validate_sampler_view(svga_context(pipe), sv);
1023 return sv;
1024 }
1025 pipe_mutex_unlock(ss->tex_mutex);
1026 }
1027
1028 sv = CALLOC_STRUCT(svga_sampler_view);
1029 pipe_reference_init(&sv->reference, 1);
1030 pipe_texture_reference(&sv->texture, pt);
1031 sv->min_lod = min_lod;
1032 sv->max_lod = max_lod;
1033
1034 /* No view needed just use the whole texture */
1035 if (!view) {
1036 SVGA_DBG(DEBUG_VIEWS,
1037 "svga: Sampler view: no %p, mips %u..%u, nr %u, size (%ux%ux%u), last %u\n",
1038 pt, min_lod, max_lod,
1039 max_lod - min_lod + 1,
1040 pt->width0,
1041 pt->height0,
1042 pt->depth0,
1043 pt->last_level);
1044 sv->key.cachable = 0;
1045 sv->handle = tex->handle;
1046 return sv;
1047 }
1048
1049 SVGA_DBG(DEBUG_VIEWS,
1050 "svga: Sampler view: yes %p, mips %u..%u, nr %u, size (%ux%ux%u), last %u\n",
1051 pt, min_lod, max_lod,
1052 max_lod - min_lod + 1,
1053 pt->width0,
1054 pt->height0,
1055 pt->depth0,
1056 pt->last_level);
1057
1058 sv->age = tex->age;
1059 sv->handle = svga_texture_view_surface(pipe, tex, format,
1060 min_lod,
1061 max_lod - min_lod + 1,
1062 -1, -1,
1063 &sv->key);
1064
1065 if (!sv->handle) {
1066 assert(0);
1067 sv->key.cachable = 0;
1068 sv->handle = tex->handle;
1069 return sv;
1070 }
1071
1072 pipe_mutex_lock(ss->tex_mutex);
1073 svga_sampler_view_reference(&tex->cached_view, sv);
1074 pipe_mutex_unlock(ss->tex_mutex);
1075
1076 return sv;
1077 }
1078
1079 void
1080 svga_validate_sampler_view(struct svga_context *svga, struct svga_sampler_view *v)
1081 {
1082 struct svga_texture *tex = svga_texture(v->texture);
1083 unsigned numFaces;
1084 unsigned age = 0;
1085 int i, k;
1086
1087 assert(svga);
1088
1089 if (v->handle == tex->handle)
1090 return;
1091
1092 age = tex->age;
1093
1094 if(tex->base.target == PIPE_TEXTURE_CUBE)
1095 numFaces = 6;
1096 else
1097 numFaces = 1;
1098
1099 for (i = v->min_lod; i <= v->max_lod; i++) {
1100 for (k = 0; k < numFaces; k++) {
1101 if (v->age < tex->view_age[i])
1102 svga_texture_copy_handle(svga, NULL,
1103 tex->handle, 0, 0, 0, i, k,
1104 v->handle, 0, 0, 0, i - v->min_lod, k,
1105 u_minify(tex->base.width0, i),
1106 u_minify(tex->base.height0, i),
1107 u_minify(tex->base.depth0, i));
1108 }
1109 }
1110
1111 v->age = age;
1112 }
1113
1114 void
1115 svga_destroy_sampler_view_priv(struct svga_sampler_view *v)
1116 {
1117 struct svga_texture *tex = svga_texture(v->texture);
1118
1119 if(v->handle != tex->handle) {
1120 struct svga_screen *ss = svga_screen(v->texture->screen);
1121 SVGA_DBG(DEBUG_DMA, "unref sid %p (sampler view)\n", v->handle);
1122 svga_screen_surface_destroy(ss, &v->key, &v->handle);
1123 }
1124 pipe_texture_reference(&v->texture, NULL);
1125 FREE(v);
1126 }
1127
1128 boolean
1129 svga_screen_buffer_from_texture(struct pipe_texture *texture,
1130 struct pipe_buffer **buffer,
1131 unsigned *stride)
1132 {
1133 struct svga_texture *stex = svga_texture(texture);
1134
1135 *buffer = svga_screen_buffer_wrap_surface
1136 (texture->screen,
1137 svga_translate_format(texture->format),
1138 stex->handle);
1139
1140 *stride = util_format_get_stride(texture->format, texture->width0);
1141
1142 return *buffer != NULL;
1143 }
1144
1145
1146 struct svga_winsys_surface *
1147 svga_screen_texture_get_winsys_surface(struct pipe_texture *texture)
1148 {
1149 struct svga_winsys_screen *sws = svga_winsys_screen(texture->screen);
1150 struct svga_winsys_surface *vsurf = NULL;
1151
1152 assert(svga_texture(texture)->key.cachable == 0);
1153 svga_texture(texture)->key.cachable = 0;
1154 sws->surface_reference(sws, &vsurf, svga_texture(texture)->handle);
1155 return vsurf;
1156 }