1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
24 **********************************************************/
28 #include "pipe/p_state.h"
29 #include "pipe/p_defines.h"
30 #include "util/u_inlines.h"
31 #include "os/os_thread.h"
32 #include "util/u_format.h"
33 #include "util/u_math.h"
34 #include "util/u_memory.h"
36 #include "svga_screen.h"
37 #include "svga_context.h"
38 #include "svga_screen_texture.h"
39 #include "svga_screen_buffer.h"
40 #include "svga_winsys.h"
41 #include "svga_debug.h"
42 #include "svga_screen_buffer.h"
44 #include <util/u_string.h>
47 /* XXX: This isn't a real hardware flag, but just a hack for kernel to
48 * know about primary surfaces. Find a better way to accomplish this.
50 #define SVGA3D_SURFACE_HINT_SCANOUT (1 << 9)
54 * Helper function and arrays
58 svga_translate_format(enum pipe_format format
)
62 case PIPE_FORMAT_B8G8R8A8_UNORM
:
63 return SVGA3D_A8R8G8B8
;
64 case PIPE_FORMAT_B8G8R8X8_UNORM
:
65 return SVGA3D_X8R8G8B8
;
67 /* Required for GL2.1:
69 case PIPE_FORMAT_B8G8R8A8_SRGB
:
70 return SVGA3D_A8R8G8B8
;
72 case PIPE_FORMAT_B5G6R5_UNORM
:
74 case PIPE_FORMAT_B5G5R5A1_UNORM
:
75 return SVGA3D_A1R5G5B5
;
76 case PIPE_FORMAT_B4G4R4A4_UNORM
:
77 return SVGA3D_A4R4G4B4
;
80 /* XXX: Doesn't seem to work properly.
81 case PIPE_FORMAT_Z32_UNORM:
84 case PIPE_FORMAT_Z16_UNORM
:
86 case PIPE_FORMAT_S8Z24_UNORM
:
87 return SVGA3D_Z_D24S8
;
88 case PIPE_FORMAT_X8Z24_UNORM
:
89 return SVGA3D_Z_D24X8
;
91 case PIPE_FORMAT_A8_UNORM
:
93 case PIPE_FORMAT_L8_UNORM
:
94 return SVGA3D_LUMINANCE8
;
96 case PIPE_FORMAT_DXT1_RGB
:
97 case PIPE_FORMAT_DXT1_RGBA
:
99 case PIPE_FORMAT_DXT3_RGBA
:
101 case PIPE_FORMAT_DXT5_RGBA
:
105 return SVGA3D_FORMAT_INVALID
;
111 svga_translate_format_render(enum pipe_format format
)
114 case PIPE_FORMAT_B8G8R8A8_UNORM
:
115 case PIPE_FORMAT_B8G8R8X8_UNORM
:
116 case PIPE_FORMAT_B5G5R5A1_UNORM
:
117 case PIPE_FORMAT_B4G4R4A4_UNORM
:
118 case PIPE_FORMAT_B5G6R5_UNORM
:
119 case PIPE_FORMAT_S8Z24_UNORM
:
120 case PIPE_FORMAT_X8Z24_UNORM
:
121 case PIPE_FORMAT_Z32_UNORM
:
122 case PIPE_FORMAT_Z16_UNORM
:
123 case PIPE_FORMAT_L8_UNORM
:
124 return svga_translate_format(format
);
127 /* For on host conversion */
128 case PIPE_FORMAT_DXT1_RGB
:
129 return SVGA3D_X8R8G8B8
;
130 case PIPE_FORMAT_DXT1_RGBA
:
131 case PIPE_FORMAT_DXT3_RGBA
:
132 case PIPE_FORMAT_DXT5_RGBA
:
133 return SVGA3D_A8R8G8B8
;
137 return SVGA3D_FORMAT_INVALID
;
143 svga_transfer_dma_band(struct svga_transfer
*st
,
144 SVGA3dTransferType transfer
,
145 unsigned y
, unsigned h
, unsigned srcy
)
147 struct svga_texture
*texture
= svga_texture(st
->base
.texture
);
148 struct svga_screen
*screen
= svga_screen(texture
->base
.screen
);
152 SVGA_DBG(DEBUG_DMA
, "dma %s sid %p, face %u, (%u, %u, %u) - (%u, %u, %u), %ubpp\n",
153 transfer
== SVGA3D_WRITE_HOST_VRAM
? "to" : "from",
159 st
->base
.x
+ st
->base
.width
,
162 util_format_get_blocksize(texture
->base
.format
)*8/
163 (util_format_get_blockwidth(texture
->base
.format
)*util_format_get_blockheight(texture
->base
.format
)));
167 box
.z
= st
->base
.zslice
;
168 box
.w
= st
->base
.width
;
175 pipe_mutex_lock(screen
->swc_mutex
);
176 ret
= SVGA3D_SurfaceDMA(screen
->swc
, st
, transfer
, &box
, 1);
178 screen
->swc
->flush(screen
->swc
, NULL
);
179 ret
= SVGA3D_SurfaceDMA(screen
->swc
, st
, transfer
, &box
, 1);
180 assert(ret
== PIPE_OK
);
182 pipe_mutex_unlock(screen
->swc_mutex
);
187 svga_transfer_dma(struct svga_transfer
*st
,
188 SVGA3dTransferType transfer
)
190 struct svga_texture
*texture
= svga_texture(st
->base
.texture
);
191 struct svga_screen
*screen
= svga_screen(texture
->base
.screen
);
192 struct svga_winsys_screen
*sws
= screen
->sws
;
193 struct pipe_fence_handle
*fence
= NULL
;
195 if (transfer
== SVGA3D_READ_HOST_VRAM
) {
196 SVGA_DBG(DEBUG_PERF
, "%s: readback transfer\n", __FUNCTION__
);
201 /* Do the DMA transfer in a single go */
203 svga_transfer_dma_band(st
, transfer
, st
->base
.y
, st
->base
.height
, 0);
205 if(transfer
== SVGA3D_READ_HOST_VRAM
) {
206 svga_screen_flush(screen
, &fence
);
207 sws
->fence_finish(sws
, fence
, 0);
208 sws
->fence_reference(sws
, &fence
, NULL
);
213 unsigned blockheight
= util_format_get_blockheight(st
->base
.texture
->format
);
214 h
= st
->hw_nblocksy
* blockheight
;
216 for(y
= 0; y
< st
->base
.height
; y
+= h
) {
217 unsigned offset
, length
;
220 if (y
+ h
> st
->base
.height
)
221 h
= st
->base
.height
- y
;
223 /* Transfer band must be aligned to pixel block boundaries */
224 assert(y
% blockheight
== 0);
225 assert(h
% blockheight
== 0);
227 offset
= y
* st
->base
.stride
/ blockheight
;
228 length
= h
* st
->base
.stride
/ blockheight
;
230 sw
= (uint8_t *)st
->swbuf
+ offset
;
232 if(transfer
== SVGA3D_WRITE_HOST_VRAM
) {
233 /* Wait for the previous DMAs to complete */
234 /* TODO: keep one DMA (at half the size) in the background */
236 svga_screen_flush(screen
, &fence
);
237 sws
->fence_finish(sws
, fence
, 0);
238 sws
->fence_reference(sws
, &fence
, NULL
);
241 hw
= sws
->buffer_map(sws
, st
->hwbuf
, PIPE_BUFFER_USAGE_CPU_WRITE
);
244 memcpy(hw
, sw
, length
);
245 sws
->buffer_unmap(sws
, st
->hwbuf
);
249 svga_transfer_dma_band(st
, transfer
, y
, h
, srcy
);
251 if(transfer
== SVGA3D_READ_HOST_VRAM
) {
252 svga_screen_flush(screen
, &fence
);
253 sws
->fence_finish(sws
, fence
, 0);
255 hw
= sws
->buffer_map(sws
, st
->hwbuf
, PIPE_BUFFER_USAGE_CPU_READ
);
258 memcpy(sw
, hw
, length
);
259 sws
->buffer_unmap(sws
, st
->hwbuf
);
267 static struct pipe_texture
*
268 svga_texture_create(struct pipe_screen
*screen
,
269 const struct pipe_texture
*templat
)
271 struct svga_screen
*svgascreen
= svga_screen(screen
);
272 struct svga_texture
*tex
= CALLOC_STRUCT(svga_texture
);
273 unsigned width
, height
, depth
;
279 tex
->base
= *templat
;
280 pipe_reference_init(&tex
->base
.reference
, 1);
281 tex
->base
.screen
= screen
;
283 assert(templat
->last_level
< SVGA_MAX_TEXTURE_LEVELS
);
284 if(templat
->last_level
>= SVGA_MAX_TEXTURE_LEVELS
)
287 width
= templat
->width0
;
288 height
= templat
->height0
;
289 depth
= templat
->depth0
;
290 for(level
= 0; level
<= templat
->last_level
; ++level
) {
291 width
= u_minify(width
, 1);
292 height
= u_minify(height
, 1);
293 depth
= u_minify(depth
, 1);
297 tex
->key
.size
.width
= templat
->width0
;
298 tex
->key
.size
.height
= templat
->height0
;
299 tex
->key
.size
.depth
= templat
->depth0
;
301 if(templat
->target
== PIPE_TEXTURE_CUBE
) {
302 tex
->key
.flags
|= SVGA3D_SURFACE_CUBEMAP
;
303 tex
->key
.numFaces
= 6;
306 tex
->key
.numFaces
= 1;
309 tex
->key
.cachable
= 1;
311 if(templat
->tex_usage
& PIPE_TEXTURE_USAGE_SAMPLER
)
312 tex
->key
.flags
|= SVGA3D_SURFACE_HINT_TEXTURE
;
314 if(templat
->tex_usage
& PIPE_TEXTURE_USAGE_DISPLAY_TARGET
) {
315 tex
->key
.cachable
= 0;
318 if(templat
->tex_usage
& PIPE_TEXTURE_USAGE_SHARED
) {
319 tex
->key
.cachable
= 0;
322 if(templat
->tex_usage
& PIPE_TEXTURE_USAGE_SCANOUT
) {
323 tex
->key
.flags
|= SVGA3D_SURFACE_HINT_SCANOUT
;
324 tex
->key
.cachable
= 0;
328 * XXX: Never pass the SVGA3D_SURFACE_HINT_RENDERTARGET hint. Mesa cannot
329 * know beforehand whether a texture will be used as a rendertarget or not
330 * and it always requests PIPE_TEXTURE_USAGE_RENDER_TARGET, therefore
331 * passing the SVGA3D_SURFACE_HINT_RENDERTARGET here defeats its purpose.
334 if((templat
->tex_usage
& PIPE_TEXTURE_USAGE_RENDER_TARGET
) &&
335 !util_format_is_compressed(templat
->format
))
336 tex
->key
.flags
|= SVGA3D_SURFACE_HINT_RENDERTARGET
;
339 if(templat
->tex_usage
& PIPE_TEXTURE_USAGE_DEPTH_STENCIL
)
340 tex
->key
.flags
|= SVGA3D_SURFACE_HINT_DEPTHSTENCIL
;
342 tex
->key
.numMipLevels
= templat
->last_level
+ 1;
344 tex
->key
.format
= svga_translate_format(templat
->format
);
345 if(tex
->key
.format
== SVGA3D_FORMAT_INVALID
)
348 SVGA_DBG(DEBUG_DMA
, "surface_create for texture\n", tex
->handle
);
349 tex
->handle
= svga_screen_surface_create(svgascreen
, &tex
->key
);
351 SVGA_DBG(DEBUG_DMA
, " --> got sid %p (texture)\n", tex
->handle
);
365 static struct pipe_texture
*
366 svga_screen_texture_from_handle(struct pipe_screen
*screen
,
367 const struct pipe_texture
*base
,
368 struct winsys_handle
*whandle
)
370 struct svga_winsys_screen
*sws
= svga_winsys_screen(screen
);
371 struct svga_winsys_surface
*srf
;
372 struct svga_texture
*tex
;
373 enum SVGA3dSurfaceFormat format
= 0;
376 /* Only supports one type */
377 if (base
->target
!= PIPE_TEXTURE_2D
||
378 base
->last_level
!= 0 ||
383 srf
= sws
->surface_from_handle(sws
, whandle
, &format
);
388 if (svga_translate_format(base
->format
) != format
) {
389 unsigned f1
= svga_translate_format(base
->format
);
390 unsigned f2
= format
;
392 /* It's okay for XRGB and ARGB or depth with/out stencil to get mixed up */
393 if ( !( (f1
== SVGA3D_X8R8G8B8
&& f2
== SVGA3D_A8R8G8B8
) ||
394 (f1
== SVGA3D_A8R8G8B8
&& f2
== SVGA3D_X8R8G8B8
) ||
395 (f1
== SVGA3D_Z_D24X8
&& f2
== SVGA3D_Z_D24S8
) ) ) {
396 debug_printf("%s wrong format %u != %u\n", __FUNCTION__
, f1
, f2
);
401 tex
= CALLOC_STRUCT(svga_texture
);
409 tex
->base
.format
= PIPE_FORMAT_B8G8R8X8_UNORM
;
410 else if (format
== 2)
411 tex
->base
.format
= PIPE_FORMAT_B8G8R8A8_UNORM
;
413 pipe_reference_init(&tex
->base
.reference
, 1);
414 tex
->base
.screen
= screen
;
416 SVGA_DBG(DEBUG_DMA
, "wrap surface sid %p\n", srf
);
418 tex
->key
.cachable
= 0;
426 svga_screen_texture_get_handle(struct pipe_screen
*screen
,
427 struct pipe_texture
*texture
,
428 struct winsys_handle
*whandle
)
430 struct svga_winsys_screen
*sws
= svga_winsys_screen(texture
->screen
);
433 assert(svga_texture(texture
)->key
.cachable
== 0);
434 svga_texture(texture
)->key
.cachable
= 0;
435 stride
= util_format_get_nblocksx(texture
->format
, texture
->width0
) *
436 util_format_get_blocksize(texture
->format
);
437 return sws
->surface_get_handle(sws
, svga_texture(texture
)->handle
, stride
, whandle
);
442 svga_texture_destroy(struct pipe_texture
*pt
)
444 struct svga_screen
*ss
= svga_screen(pt
->screen
);
445 struct svga_texture
*tex
= (struct svga_texture
*)pt
;
447 ss
->texture_timestamp
++;
449 svga_sampler_view_reference(&tex
->cached_view
, NULL
);
452 DBG("%s deleting %p\n", __FUNCTION__, (void *) tex);
454 SVGA_DBG(DEBUG_DMA
, "unref sid %p (texture)\n", tex
->handle
);
455 svga_screen_surface_destroy(ss
, &tex
->key
, &tex
->handle
);
462 svga_texture_copy_handle(struct svga_context
*svga
,
463 struct svga_screen
*ss
,
464 struct svga_winsys_surface
*src_handle
,
465 unsigned src_x
, unsigned src_y
, unsigned src_z
,
466 unsigned src_level
, unsigned src_face
,
467 struct svga_winsys_surface
*dst_handle
,
468 unsigned dst_x
, unsigned dst_y
, unsigned dst_z
,
469 unsigned dst_level
, unsigned dst_face
,
470 unsigned width
, unsigned height
, unsigned depth
)
472 struct svga_surface dst
, src
;
474 SVGA3dCopyBox box
, *boxes
;
478 src
.handle
= src_handle
;
479 src
.real_level
= src_level
;
480 src
.real_face
= src_face
;
483 dst
.handle
= dst_handle
;
484 dst
.real_level
= dst_level
;
485 dst
.real_face
= dst_face
;
499 SVGA_DBG(DEBUG_VIEWS, "mipcopy src: %p %u (%ux%ux%u), dst: %p %u (%ux%ux%u)\n",
500 src_handle, src_level, src_x, src_y, src_z,
501 dst_handle, dst_level, dst_x, dst_y, dst_z);
505 ret
= SVGA3D_BeginSurfaceCopy(svga
->swc
,
510 svga_context_flush(svga
, NULL
);
511 ret
= SVGA3D_BeginSurfaceCopy(svga
->swc
,
515 assert(ret
== PIPE_OK
);
518 SVGA_FIFOCommitAll(svga
->swc
);
520 pipe_mutex_lock(ss
->swc_mutex
);
521 ret
= SVGA3D_BeginSurfaceCopy(ss
->swc
,
526 ss
->swc
->flush(ss
->swc
, NULL
);
527 ret
= SVGA3D_BeginSurfaceCopy(ss
->swc
,
531 assert(ret
== PIPE_OK
);
534 SVGA_FIFOCommitAll(ss
->swc
);
535 pipe_mutex_unlock(ss
->swc_mutex
);
539 static struct svga_winsys_surface
*
540 svga_texture_view_surface(struct pipe_context
*pipe
,
541 struct svga_texture
*tex
,
542 SVGA3dSurfaceFormat format
,
547 struct svga_host_surface_cache_key
*key
) /* OUT */
549 struct svga_screen
*ss
= svga_screen(tex
->base
.screen
);
550 struct svga_winsys_surface
*handle
;
552 unsigned z_offset
= 0;
555 "svga: Create surface view: face %d zslice %d mips %d..%d\n",
556 face_pick
, zslice_pick
, start_mip
, start_mip
+num_mip
-1);
559 key
->format
= format
;
560 key
->numMipLevels
= num_mip
;
561 key
->size
.width
= u_minify(tex
->base
.width0
, start_mip
);
562 key
->size
.height
= u_minify(tex
->base
.height0
, start_mip
);
563 key
->size
.depth
= zslice_pick
< 0 ? u_minify(tex
->base
.depth0
, start_mip
) : 1;
565 assert(key
->size
.depth
== 1);
567 if(tex
->base
.target
== PIPE_TEXTURE_CUBE
&& face_pick
< 0) {
568 key
->flags
|= SVGA3D_SURFACE_CUBEMAP
;
574 if(key
->format
== SVGA3D_FORMAT_INVALID
) {
579 SVGA_DBG(DEBUG_DMA
, "surface_create for texture view\n");
580 handle
= svga_screen_surface_create(ss
, key
);
586 SVGA_DBG(DEBUG_DMA
, " --> got sid %p (texture view)\n", handle
);
591 if (zslice_pick
>= 0)
592 z_offset
= zslice_pick
;
594 for (i
= 0; i
< key
->numMipLevels
; i
++) {
595 for (j
= 0; j
< key
->numFaces
; j
++) {
596 if(tex
->defined
[j
+ face_pick
][i
+ start_mip
]) {
597 unsigned depth
= (zslice_pick
< 0 ?
598 u_minify(tex
->base
.depth0
, i
+ start_mip
) :
601 svga_texture_copy_handle(svga_context(pipe
),
607 handle
, 0, 0, 0, i
, j
,
608 u_minify(tex
->base
.width0
, i
+ start_mip
),
609 u_minify(tex
->base
.height0
, i
+ start_mip
),
619 static struct pipe_surface
*
620 svga_get_tex_surface(struct pipe_screen
*screen
,
621 struct pipe_texture
*pt
,
622 unsigned face
, unsigned level
, unsigned zslice
,
625 struct svga_texture
*tex
= svga_texture(pt
);
626 struct svga_surface
*s
;
627 boolean render
= flags
& PIPE_BUFFER_USAGE_GPU_WRITE
? TRUE
: FALSE
;
628 boolean view
= FALSE
;
629 SVGA3dSurfaceFormat format
;
631 s
= CALLOC_STRUCT(svga_surface
);
635 pipe_reference_init(&s
->base
.reference
, 1);
636 pipe_texture_reference(&s
->base
.texture
, pt
);
637 s
->base
.format
= pt
->format
;
638 s
->base
.width
= u_minify(pt
->width0
, level
);
639 s
->base
.height
= u_minify(pt
->height0
, level
);
640 s
->base
.usage
= flags
;
641 s
->base
.level
= level
;
643 s
->base
.zslice
= zslice
;
646 format
= svga_translate_format(pt
->format
);
648 format
= svga_translate_format_render(pt
->format
);
650 assert(format
!= SVGA3D_FORMAT_INVALID
);
651 assert(!(flags
& PIPE_BUFFER_USAGE_CPU_READ_WRITE
));
654 if (svga_screen(screen
)->debug
.force_surface_view
)
657 /* Currently only used for compressed textures */
659 format
!= svga_translate_format(pt
->format
)) {
664 svga_screen(screen
)->debug
.force_level_surface_view
)
667 if (pt
->target
== PIPE_TEXTURE_3D
)
670 if (svga_screen(screen
)->debug
.no_surface_view
)
674 SVGA_DBG(DEBUG_VIEWS
, "svga: Surface view: yes %p, level %u face %u z %u, %p\n",
675 pt
, level
, face
, zslice
, s
);
677 s
->handle
= svga_texture_view_surface(NULL
, tex
, format
, level
, 1, face
, zslice
,
683 SVGA_DBG(DEBUG_VIEWS
, "svga: Surface view: no %p, level %u, face %u, z %u, %p\n",
684 pt
, level
, face
, zslice
, s
);
686 memset(&s
->key
, 0, sizeof s
->key
);
687 s
->handle
= tex
->handle
;
689 s
->real_level
= level
;
690 s
->real_zslice
= zslice
;
698 svga_tex_surface_destroy(struct pipe_surface
*surf
)
700 struct svga_surface
*s
= svga_surface(surf
);
701 struct svga_texture
*t
= svga_texture(surf
->texture
);
702 struct svga_screen
*ss
= svga_screen(surf
->texture
->screen
);
704 if(s
->handle
!= t
->handle
) {
705 SVGA_DBG(DEBUG_DMA
, "unref sid %p (tex surface)\n", s
->handle
);
706 svga_screen_surface_destroy(ss
, &s
->key
, &s
->handle
);
709 pipe_texture_reference(&surf
->texture
, NULL
);
715 svga_mark_surface_dirty(struct pipe_surface
*surf
)
717 struct svga_surface
*s
= svga_surface(surf
);
720 struct svga_texture
*tex
= svga_texture(surf
->texture
);
724 if (s
->handle
== tex
->handle
)
725 tex
->defined
[surf
->face
][surf
->level
] = TRUE
;
727 /* this will happen later in svga_propagate_surface */
733 void svga_mark_surfaces_dirty(struct svga_context
*svga
)
737 for (i
= 0; i
< PIPE_MAX_COLOR_BUFS
; i
++) {
738 if (svga
->curr
.framebuffer
.cbufs
[i
])
739 svga_mark_surface_dirty(svga
->curr
.framebuffer
.cbufs
[i
]);
741 if (svga
->curr
.framebuffer
.zsbuf
)
742 svga_mark_surface_dirty(svga
->curr
.framebuffer
.zsbuf
);
746 * Progagate any changes from surfaces to texture.
747 * pipe is optional context to inline the blit command in.
750 svga_propagate_surface(struct pipe_context
*pipe
, struct pipe_surface
*surf
)
752 struct svga_surface
*s
= svga_surface(surf
);
753 struct svga_texture
*tex
= svga_texture(surf
->texture
);
754 struct svga_screen
*ss
= svga_screen(surf
->texture
->screen
);
760 ss
->texture_timestamp
++;
761 tex
->view_age
[surf
->level
] = ++(tex
->age
);
763 if (s
->handle
!= tex
->handle
) {
764 SVGA_DBG(DEBUG_VIEWS
, "svga: Surface propagate: tex %p, level %u, from %p\n", tex
, surf
->level
, surf
);
765 svga_texture_copy_handle(svga_context(pipe
), ss
,
766 s
->handle
, 0, 0, 0, s
->real_level
, s
->real_face
,
767 tex
->handle
, 0, 0, surf
->zslice
, surf
->level
, surf
->face
,
768 u_minify(tex
->base
.width0
, surf
->level
),
769 u_minify(tex
->base
.height0
, surf
->level
), 1);
770 tex
->defined
[surf
->face
][surf
->level
] = TRUE
;
775 * Check if we should call svga_propagate_surface on the surface.
778 svga_surface_needs_propagation(struct pipe_surface
*surf
)
780 struct svga_surface
*s
= svga_surface(surf
);
781 struct svga_texture
*tex
= svga_texture(surf
->texture
);
783 return s
->dirty
&& s
->handle
!= tex
->handle
;
786 /* XXX: Still implementing this as if it was a screen function, but
787 * can now modify it to queue transfers on the context.
789 static struct pipe_transfer
*
790 svga_get_tex_transfer(struct pipe_context
*pipe
,
791 struct pipe_texture
*texture
,
792 unsigned face
, unsigned level
, unsigned zslice
,
793 enum pipe_transfer_usage usage
, unsigned x
, unsigned y
,
794 unsigned w
, unsigned h
)
796 struct svga_screen
*ss
= svga_screen(pipe
->screen
);
797 struct svga_winsys_screen
*sws
= ss
->sws
;
798 struct svga_transfer
*st
;
799 unsigned nblocksx
= util_format_get_nblocksx(texture
->format
, w
);
800 unsigned nblocksy
= util_format_get_nblocksy(texture
->format
, h
);
802 /* We can't map texture storage directly */
803 if (usage
& PIPE_TRANSFER_MAP_DIRECTLY
)
806 st
= CALLOC_STRUCT(svga_transfer
);
814 st
->base
.stride
= nblocksx
*util_format_get_blocksize(texture
->format
);
815 st
->base
.usage
= usage
;
816 st
->base
.face
= face
;
817 st
->base
.level
= level
;
818 st
->base
.zslice
= zslice
;
820 st
->hw_nblocksy
= nblocksy
;
822 st
->hwbuf
= svga_winsys_buffer_create(ss
,
825 st
->hw_nblocksy
*st
->base
.stride
);
826 while(!st
->hwbuf
&& (st
->hw_nblocksy
/= 2)) {
827 st
->hwbuf
= svga_winsys_buffer_create(ss
,
830 st
->hw_nblocksy
*st
->base
.stride
);
836 if(st
->hw_nblocksy
< nblocksy
) {
837 /* We couldn't allocate a hardware buffer big enough for the transfer,
838 * so allocate regular malloc memory instead */
839 debug_printf("%s: failed to allocate %u KB of DMA, splitting into %u x %u KB DMA transfers\n",
841 (nblocksy
*st
->base
.stride
+ 1023)/1024,
842 (nblocksy
+ st
->hw_nblocksy
- 1)/st
->hw_nblocksy
,
843 (st
->hw_nblocksy
*st
->base
.stride
+ 1023)/1024);
844 st
->swbuf
= MALLOC(nblocksy
*st
->base
.stride
);
849 pipe_texture_reference(&st
->base
.texture
, texture
);
851 if (usage
& PIPE_TRANSFER_READ
)
852 svga_transfer_dma(st
, SVGA3D_READ_HOST_VRAM
);
857 sws
->buffer_destroy(sws
, st
->hwbuf
);
864 /* XXX: Still implementing this as if it was a screen function, but
865 * can now modify it to queue transfers on the context.
868 svga_transfer_map( struct pipe_context
*pipe
,
869 struct pipe_transfer
*transfer
)
871 struct svga_screen
*ss
= svga_screen(pipe
->screen
);
872 struct svga_winsys_screen
*sws
= ss
->sws
;
873 struct svga_transfer
*st
= svga_transfer(transfer
);
878 /* The wait for read transfers already happened when svga_transfer_dma
880 return sws
->buffer_map(sws
, st
->hwbuf
,
881 pipe_transfer_buffer_flags(transfer
));
885 /* XXX: Still implementing this as if it was a screen function, but
886 * can now modify it to queue transfers on the context.
889 svga_transfer_unmap(struct pipe_context
*pipe
,
890 struct pipe_transfer
*transfer
)
892 struct svga_screen
*ss
= svga_screen(pipe
->screen
);
893 struct svga_winsys_screen
*sws
= ss
->sws
;
894 struct svga_transfer
*st
= svga_transfer(transfer
);
897 sws
->buffer_unmap(sws
, st
->hwbuf
);
902 svga_tex_transfer_destroy(struct pipe_context
*pipe
,
903 struct pipe_transfer
*transfer
)
905 struct svga_texture
*tex
= svga_texture(transfer
->texture
);
906 struct svga_screen
*ss
= svga_screen(pipe
->screen
);
907 struct svga_winsys_screen
*sws
= ss
->sws
;
908 struct svga_transfer
*st
= svga_transfer(transfer
);
910 if (st
->base
.usage
& PIPE_TRANSFER_WRITE
) {
911 svga_transfer_dma(st
, SVGA3D_WRITE_HOST_VRAM
);
912 ss
->texture_timestamp
++;
913 tex
->view_age
[transfer
->level
] = ++(tex
->age
);
914 tex
->defined
[transfer
->face
][transfer
->level
] = TRUE
;
917 pipe_texture_reference(&st
->base
.texture
, NULL
);
919 sws
->buffer_destroy(sws
, st
->hwbuf
);
925 svga_init_texture_functions(struct pipe_context
*pipe
)
927 pipe
->get_tex_transfer
= svga_get_tex_transfer
;
928 pipe
->transfer_map
= svga_transfer_map
;
929 pipe
->transfer_unmap
= svga_transfer_unmap
;
930 pipe
->tex_transfer_destroy
= svga_tex_transfer_destroy
;
935 svga_screen_init_texture_functions(struct pipe_screen
*screen
)
937 screen
->texture_create
= svga_texture_create
;
938 screen
->texture_from_handle
= svga_screen_texture_from_handle
;
939 screen
->texture_get_handle
= svga_screen_texture_get_handle
;
940 screen
->texture_destroy
= svga_texture_destroy
;
941 screen
->get_tex_surface
= svga_get_tex_surface
;
942 screen
->tex_surface_destroy
= svga_tex_surface_destroy
;
945 /***********************************************************************
948 struct svga_sampler_view
*
949 svga_get_tex_sampler_view(struct pipe_context
*pipe
, struct pipe_texture
*pt
,
950 unsigned min_lod
, unsigned max_lod
)
952 struct svga_screen
*ss
= svga_screen(pt
->screen
);
953 struct svga_texture
*tex
= svga_texture(pt
);
954 struct svga_sampler_view
*sv
= NULL
;
955 SVGA3dSurfaceFormat format
= svga_translate_format(pt
->format
);
959 assert(min_lod
>= 0);
960 assert(min_lod
<= max_lod
);
961 assert(max_lod
<= pt
->last_level
);
964 /* Is a view needed */
967 * Can't control max lod. For first level views and when we only
968 * look at one level we disable mip filtering to achive the same
971 if (min_lod
== 0 && max_lod
>= pt
->last_level
)
974 if (util_format_is_compressed(pt
->format
) && view
) {
975 format
= svga_translate_format_render(pt
->format
);
978 if (ss
->debug
.no_sampler_view
)
981 if (ss
->debug
.force_sampler_view
)
985 /* First try the cache */
987 pipe_mutex_lock(ss
->tex_mutex
);
988 if (tex
->cached_view
&&
989 tex
->cached_view
->min_lod
== min_lod
&&
990 tex
->cached_view
->max_lod
== max_lod
) {
991 svga_sampler_view_reference(&sv
, tex
->cached_view
);
992 pipe_mutex_unlock(ss
->tex_mutex
);
993 SVGA_DBG(DEBUG_VIEWS
, "svga: Sampler view: reuse %p, %u %u, last %u\n",
994 pt
, min_lod
, max_lod
, pt
->last_level
);
995 svga_validate_sampler_view(svga_context(pipe
), sv
);
998 pipe_mutex_unlock(ss
->tex_mutex
);
1001 sv
= CALLOC_STRUCT(svga_sampler_view
);
1002 pipe_reference_init(&sv
->reference
, 1);
1003 pipe_texture_reference(&sv
->texture
, pt
);
1004 sv
->min_lod
= min_lod
;
1005 sv
->max_lod
= max_lod
;
1007 /* No view needed just use the whole texture */
1009 SVGA_DBG(DEBUG_VIEWS
,
1010 "svga: Sampler view: no %p, mips %u..%u, nr %u, size (%ux%ux%u), last %u\n",
1011 pt
, min_lod
, max_lod
,
1012 max_lod
- min_lod
+ 1,
1017 sv
->key
.cachable
= 0;
1018 sv
->handle
= tex
->handle
;
1022 SVGA_DBG(DEBUG_VIEWS
,
1023 "svga: Sampler view: yes %p, mips %u..%u, nr %u, size (%ux%ux%u), last %u\n",
1024 pt
, min_lod
, max_lod
,
1025 max_lod
- min_lod
+ 1,
1032 sv
->handle
= svga_texture_view_surface(pipe
, tex
, format
,
1034 max_lod
- min_lod
+ 1,
1040 sv
->key
.cachable
= 0;
1041 sv
->handle
= tex
->handle
;
1045 pipe_mutex_lock(ss
->tex_mutex
);
1046 svga_sampler_view_reference(&tex
->cached_view
, sv
);
1047 pipe_mutex_unlock(ss
->tex_mutex
);
1053 svga_validate_sampler_view(struct svga_context
*svga
, struct svga_sampler_view
*v
)
1055 struct svga_texture
*tex
= svga_texture(v
->texture
);
1062 if (v
->handle
== tex
->handle
)
1067 if(tex
->base
.target
== PIPE_TEXTURE_CUBE
)
1072 for (i
= v
->min_lod
; i
<= v
->max_lod
; i
++) {
1073 for (k
= 0; k
< numFaces
; k
++) {
1074 if (v
->age
< tex
->view_age
[i
])
1075 svga_texture_copy_handle(svga
, NULL
,
1076 tex
->handle
, 0, 0, 0, i
, k
,
1077 v
->handle
, 0, 0, 0, i
- v
->min_lod
, k
,
1078 u_minify(tex
->base
.width0
, i
),
1079 u_minify(tex
->base
.height0
, i
),
1080 u_minify(tex
->base
.depth0
, i
));
1088 svga_destroy_sampler_view_priv(struct svga_sampler_view
*v
)
1090 struct svga_texture
*tex
= svga_texture(v
->texture
);
1092 if(v
->handle
!= tex
->handle
) {
1093 struct svga_screen
*ss
= svga_screen(v
->texture
->screen
);
1094 SVGA_DBG(DEBUG_DMA
, "unref sid %p (sampler view)\n", v
->handle
);
1095 svga_screen_surface_destroy(ss
, &v
->key
, &v
->handle
);
1097 pipe_texture_reference(&v
->texture
, NULL
);