Merge commit '8b0fb1c152fe191768953aa8c77b89034a377f83' into vulkan
[mesa.git] / src / gallium / drivers / svga / svga_shader.c
1 /**********************************************************
2 * Copyright 2008-2012 VMware, Inc. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 **********************************************************/
25
26 #include "util/u_bitmask.h"
27 #include "util/u_memory.h"
28 #include "svga_context.h"
29 #include "svga_cmd.h"
30 #include "svga_format.h"
31 #include "svga_shader.h"
32
33
34 /**
35 * This bit isn't really used anywhere. It only serves to help
36 * generate a unique "signature" for the vertex shader output bitmask.
37 * Shader input/output signatures are used to resolve shader linking
38 * issues.
39 */
40 #define FOG_GENERIC_BIT (((uint64_t) 1) << 63)
41
42
43 /**
44 * Use the shader info to generate a bitmask indicating which generic
45 * inputs are used by the shader. A set bit indicates that GENERIC[i]
46 * is used.
47 */
48 uint64_t
49 svga_get_generic_inputs_mask(const struct tgsi_shader_info *info)
50 {
51 unsigned i;
52 uint64_t mask = 0x0;
53
54 for (i = 0; i < info->num_inputs; i++) {
55 if (info->input_semantic_name[i] == TGSI_SEMANTIC_GENERIC) {
56 unsigned j = info->input_semantic_index[i];
57 assert(j < sizeof(mask) * 8);
58 mask |= ((uint64_t) 1) << j;
59 }
60 }
61
62 return mask;
63 }
64
65
66 /**
67 * Scan shader info to return a bitmask of written outputs.
68 */
69 uint64_t
70 svga_get_generic_outputs_mask(const struct tgsi_shader_info *info)
71 {
72 unsigned i;
73 uint64_t mask = 0x0;
74
75 for (i = 0; i < info->num_outputs; i++) {
76 switch (info->output_semantic_name[i]) {
77 case TGSI_SEMANTIC_GENERIC:
78 {
79 unsigned j = info->output_semantic_index[i];
80 assert(j < sizeof(mask) * 8);
81 mask |= ((uint64_t) 1) << j;
82 }
83 break;
84 case TGSI_SEMANTIC_FOG:
85 mask |= FOG_GENERIC_BIT;
86 break;
87 }
88 }
89
90 return mask;
91 }
92
93
94
95 /**
96 * Given a mask of used generic variables (as returned by the above functions)
97 * fill in a table which maps those indexes to small integers.
98 * This table is used by the remap_generic_index() function in
99 * svga_tgsi_decl_sm30.c
100 * Example: if generics_mask = binary(1010) it means that GENERIC[1] and
101 * GENERIC[3] are used. The remap_table will contain:
102 * table[1] = 0;
103 * table[3] = 1;
104 * The remaining table entries will be filled in with the next unused
105 * generic index (in this example, 2).
106 */
107 void
108 svga_remap_generics(uint64_t generics_mask,
109 int8_t remap_table[MAX_GENERIC_VARYING])
110 {
111 /* Note texcoord[0] is reserved so start at 1 */
112 unsigned count = 1, i;
113
114 for (i = 0; i < MAX_GENERIC_VARYING; i++) {
115 remap_table[i] = -1;
116 }
117
118 /* for each bit set in generic_mask */
119 while (generics_mask) {
120 unsigned index = ffsll(generics_mask) - 1;
121 remap_table[index] = count++;
122 generics_mask &= ~((uint64_t) 1 << index);
123 }
124 }
125
126
127 /**
128 * Use the generic remap table to map a TGSI generic varying variable
129 * index to a small integer. If the remapping table doesn't have a
130 * valid value for the given index (the table entry is -1) it means
131 * the fragment shader doesn't use that VS output. Just allocate
132 * the next free value in that case. Alternately, we could cull
133 * VS instructions that write to register, or replace the register
134 * with a dummy temp register.
135 * XXX TODO: we should do one of the later as it would save precious
136 * texcoord registers.
137 */
138 int
139 svga_remap_generic_index(int8_t remap_table[MAX_GENERIC_VARYING],
140 int generic_index)
141 {
142 assert(generic_index < MAX_GENERIC_VARYING);
143
144 if (generic_index >= MAX_GENERIC_VARYING) {
145 /* just don't return a random/garbage value */
146 generic_index = MAX_GENERIC_VARYING - 1;
147 }
148
149 if (remap_table[generic_index] == -1) {
150 /* This is a VS output that has no matching PS input. Find a
151 * free index.
152 */
153 int i, max = 0;
154 for (i = 0; i < MAX_GENERIC_VARYING; i++) {
155 max = MAX2(max, remap_table[i]);
156 }
157 remap_table[generic_index] = max + 1;
158 }
159
160 return remap_table[generic_index];
161 }
162
163
164 /**
165 * Initialize the shader-neutral fields of svga_compile_key from context
166 * state. This is basically the texture-related state.
167 */
168 void
169 svga_init_shader_key_common(const struct svga_context *svga, unsigned shader,
170 struct svga_compile_key *key)
171 {
172 unsigned i, idx = 0;
173
174 assert(shader < Elements(svga->curr.num_sampler_views));
175
176 for (i = 0; i < svga->curr.num_sampler_views[shader]; i++) {
177 struct pipe_sampler_view *view = svga->curr.sampler_views[shader][i];
178 if (view) {
179 assert(svga->curr.sampler[shader][i]);
180 assert(view->texture);
181 assert(view->texture->target < (1 << 4)); /* texture_target:4 */
182
183 key->tex[i].texture_target = view->texture->target;
184
185 /* 1D/2D array textures with one slice are treated as non-arrays
186 * by the SVGA3D device. Convert the texture type here so that
187 * we emit the right TEX/SAMPLE instruction in the shader.
188 */
189 if (view->texture->array_size == 1) {
190 if (view->texture->target == PIPE_TEXTURE_1D_ARRAY) {
191 key->tex[i].texture_target = PIPE_TEXTURE_1D;
192 }
193 else if (view->texture->target == PIPE_TEXTURE_2D_ARRAY) {
194 key->tex[i].texture_target = PIPE_TEXTURE_2D;
195 }
196 }
197
198 key->tex[i].texture_msaa = view->texture->nr_samples > 1;
199 if (!svga->curr.sampler[shader][i]->normalized_coords) {
200 assert(idx < (1 << 5)); /* width_height_idx:5 bitfield */
201 key->tex[i].width_height_idx = idx++;
202 key->tex[i].unnormalized = TRUE;
203 ++key->num_unnormalized_coords;
204 }
205
206 key->tex[i].swizzle_r = view->swizzle_r;
207 key->tex[i].swizzle_g = view->swizzle_g;
208 key->tex[i].swizzle_b = view->swizzle_b;
209 key->tex[i].swizzle_a = view->swizzle_a;
210
211 key->tex[i].return_type = svga_get_texture_datatype(view->format);
212 }
213 }
214 key->num_textures = svga->curr.num_sampler_views[shader];
215 }
216
217
218 /** Search for a compiled shader variant with the same compile key */
219 struct svga_shader_variant *
220 svga_search_shader_key(const struct svga_shader *shader,
221 const struct svga_compile_key *key)
222 {
223 struct svga_shader_variant *variant = shader->variants;
224
225 assert(key);
226
227 for ( ; variant; variant = variant->next) {
228 if (svga_compile_keys_equal(key, &variant->key))
229 return variant;
230 }
231 return NULL;
232 }
233
234 /** Search for a shader with the same token key */
235 struct svga_shader *
236 svga_search_shader_token_key(struct svga_shader *pshader,
237 const struct svga_token_key *key)
238 {
239 struct svga_shader *shader = pshader;
240
241 assert(key);
242
243 for ( ; shader; shader = shader->next) {
244 if (memcmp(key, &shader->token_key, sizeof(struct svga_token_key)) == 0)
245 return shader;
246 }
247 return NULL;
248 }
249
250 /**
251 * Helper function to define a gb shader for non-vgpu10 device
252 */
253 static enum pipe_error
254 define_gb_shader_vgpu9(struct svga_context *svga,
255 SVGA3dShaderType type,
256 struct svga_shader_variant *variant,
257 unsigned codeLen)
258 {
259 struct svga_winsys_screen *sws = svga_screen(svga->pipe.screen)->sws;
260 enum pipe_error ret;
261
262 /**
263 * Create gb memory for the shader and upload the shader code.
264 * Kernel module will allocate an id for the shader and issue
265 * the DefineGBShader command.
266 */
267 variant->gb_shader = sws->shader_create(sws, type,
268 variant->tokens, codeLen);
269
270 if (!variant->gb_shader)
271 return PIPE_ERROR_OUT_OF_MEMORY;
272
273 ret = SVGA3D_BindGBShader(svga->swc, variant->gb_shader);
274
275 return ret;
276 }
277
278 /**
279 * Helper function to define a gb shader for vgpu10 device
280 */
281 static enum pipe_error
282 define_gb_shader_vgpu10(struct svga_context *svga,
283 SVGA3dShaderType type,
284 struct svga_shader_variant *variant,
285 unsigned codeLen)
286 {
287 struct svga_winsys_context *swc = svga->swc;
288 enum pipe_error ret;
289
290 /**
291 * Shaders in VGPU10 enabled device reside in the device COTable.
292 * SVGA driver will allocate an integer ID for the shader and
293 * issue DXDefineShader and DXBindShader commands.
294 */
295 variant->id = util_bitmask_add(svga->shader_id_bm);
296 if (variant->id == UTIL_BITMASK_INVALID_INDEX) {
297 return PIPE_ERROR_OUT_OF_MEMORY;
298 }
299
300 /* Create gb memory for the shader and upload the shader code */
301 variant->gb_shader = swc->shader_create(swc,
302 variant->id, type,
303 variant->tokens, codeLen);
304
305 if (!variant->gb_shader) {
306 /* Free the shader ID */
307 assert(variant->id != UTIL_BITMASK_INVALID_INDEX);
308 goto fail_no_allocation;
309 }
310
311 /**
312 * Since we don't want to do any flush within state emission to avoid
313 * partial state in a command buffer, it's important to make sure that
314 * there is enough room to send both the DXDefineShader & DXBindShader
315 * commands in the same command buffer. So let's send both
316 * commands in one command reservation. If it fails, we'll undo
317 * the shader creation and return an error.
318 */
319 ret = SVGA3D_vgpu10_DefineAndBindShader(swc, variant->gb_shader,
320 variant->id, type, codeLen);
321
322 if (ret != PIPE_OK)
323 goto fail;
324
325 return PIPE_OK;
326
327 fail:
328 swc->shader_destroy(swc, variant->gb_shader);
329 variant->gb_shader = NULL;
330
331 fail_no_allocation:
332 util_bitmask_clear(svga->shader_id_bm, variant->id);
333 variant->id = UTIL_BITMASK_INVALID_INDEX;
334
335 return PIPE_ERROR_OUT_OF_MEMORY;
336 }
337
338 /**
339 * Issue the SVGA3D commands to define a new shader.
340 * \param variant contains the shader tokens, etc. The result->id field will
341 * be set here.
342 */
343 enum pipe_error
344 svga_define_shader(struct svga_context *svga,
345 SVGA3dShaderType type,
346 struct svga_shader_variant *variant)
347 {
348 unsigned codeLen = variant->nr_tokens * sizeof(variant->tokens[0]);
349 enum pipe_error ret;
350
351 variant->id = UTIL_BITMASK_INVALID_INDEX;
352
353 if (svga_have_gb_objects(svga)) {
354 if (svga_have_vgpu10(svga))
355 return define_gb_shader_vgpu10(svga, type, variant, codeLen);
356 else
357 return define_gb_shader_vgpu9(svga, type, variant, codeLen);
358 }
359 else {
360 /* Allocate an integer ID for the shader */
361 variant->id = util_bitmask_add(svga->shader_id_bm);
362 if (variant->id == UTIL_BITMASK_INVALID_INDEX) {
363 return PIPE_ERROR_OUT_OF_MEMORY;
364 }
365
366 /* Issue SVGA3D device command to define the shader */
367 ret = SVGA3D_DefineShader(svga->swc,
368 variant->id,
369 type,
370 variant->tokens,
371 codeLen);
372 if (ret != PIPE_OK) {
373 /* free the ID */
374 assert(variant->id != UTIL_BITMASK_INVALID_INDEX);
375 util_bitmask_clear(svga->shader_id_bm, variant->id);
376 variant->id = UTIL_BITMASK_INVALID_INDEX;
377 }
378 }
379
380 return ret;
381 }
382
383
384 /**
385 * Issue the SVGA3D commands to set/bind a shader.
386 * \param result the shader to bind.
387 */
388 enum pipe_error
389 svga_set_shader(struct svga_context *svga,
390 SVGA3dShaderType type,
391 struct svga_shader_variant *variant)
392 {
393 enum pipe_error ret;
394 unsigned id = variant ? variant->id : SVGA3D_INVALID_ID;
395
396 assert(type == SVGA3D_SHADERTYPE_VS ||
397 type == SVGA3D_SHADERTYPE_GS ||
398 type == SVGA3D_SHADERTYPE_PS);
399
400 if (svga_have_gb_objects(svga)) {
401 struct svga_winsys_gb_shader *gbshader =
402 variant ? variant->gb_shader : NULL;
403
404 if (svga_have_vgpu10(svga))
405 ret = SVGA3D_vgpu10_SetShader(svga->swc, type, gbshader, id);
406 else
407 ret = SVGA3D_SetGBShader(svga->swc, type, gbshader);
408 }
409 else {
410 ret = SVGA3D_SetShader(svga->swc, type, id);
411 }
412
413 return ret;
414 }
415
416
417 struct svga_shader_variant *
418 svga_new_shader_variant(struct svga_context *svga)
419 {
420 svga->hud.num_shaders++;
421 return CALLOC_STRUCT(svga_shader_variant);
422 }
423
424
425 enum pipe_error
426 svga_destroy_shader_variant(struct svga_context *svga,
427 SVGA3dShaderType type,
428 struct svga_shader_variant *variant)
429 {
430 enum pipe_error ret = PIPE_OK;
431
432 if (svga_have_gb_objects(svga) && variant->gb_shader) {
433 if (svga_have_vgpu10(svga)) {
434 struct svga_winsys_context *swc = svga->swc;
435 swc->shader_destroy(swc, variant->gb_shader);
436 ret = SVGA3D_vgpu10_DestroyShader(svga->swc, variant->id);
437 if (ret != PIPE_OK) {
438 /* flush and try again */
439 svga_context_flush(svga, NULL);
440 ret = SVGA3D_vgpu10_DestroyShader(svga->swc, variant->id);
441 }
442 util_bitmask_clear(svga->shader_id_bm, variant->id);
443 }
444 else {
445 struct svga_winsys_screen *sws = svga_screen(svga->pipe.screen)->sws;
446 sws->shader_destroy(sws, variant->gb_shader);
447 }
448 variant->gb_shader = NULL;
449 }
450 else {
451 if (variant->id != UTIL_BITMASK_INVALID_INDEX) {
452 ret = SVGA3D_DestroyShader(svga->swc, variant->id, type);
453 if (ret != PIPE_OK) {
454 /* flush and try again */
455 svga_context_flush(svga, NULL);
456 ret = SVGA3D_DestroyShader(svga->swc, variant->id, type);
457 assert(ret == PIPE_OK);
458 }
459 util_bitmask_clear(svga->shader_id_bm, variant->id);
460 }
461 }
462
463 FREE((unsigned *)variant->tokens);
464 FREE(variant);
465
466 svga->hud.num_shaders--;
467
468 return ret;
469 }
470
471 /*
472 * Rebind shaders.
473 * Called at the beginning of every new command buffer to ensure that
474 * shaders are properly paged-in. Instead of sending the SetShader
475 * command, this function sends a private allocation command to
476 * page in a shader. This avoids emitting redundant state to the device
477 * just to page in a resource.
478 */
479 enum pipe_error
480 svga_rebind_shaders(struct svga_context *svga)
481 {
482 struct svga_winsys_context *swc = svga->swc;
483 struct svga_hw_draw_state *hw = &svga->state.hw_draw;
484 enum pipe_error ret;
485
486 assert(svga_have_vgpu10(svga));
487
488 /**
489 * If the underlying winsys layer does not need resource rebinding,
490 * just clear the rebind flags and return.
491 */
492 if (swc->resource_rebind == NULL) {
493 svga->rebind.flags.vs = 0;
494 svga->rebind.flags.gs = 0;
495 svga->rebind.flags.fs = 0;
496
497 return PIPE_OK;
498 }
499
500 if (svga->rebind.flags.vs && hw->vs && hw->vs->gb_shader) {
501 ret = swc->resource_rebind(swc, NULL, hw->vs->gb_shader, SVGA_RELOC_READ);
502 if (ret != PIPE_OK)
503 return ret;
504 }
505 svga->rebind.flags.vs = 0;
506
507 if (svga->rebind.flags.gs && hw->gs && hw->gs->gb_shader) {
508 ret = swc->resource_rebind(swc, NULL, hw->gs->gb_shader, SVGA_RELOC_READ);
509 if (ret != PIPE_OK)
510 return ret;
511 }
512 svga->rebind.flags.gs = 0;
513
514 if (svga->rebind.flags.fs && hw->fs && hw->fs->gb_shader) {
515 ret = swc->resource_rebind(swc, NULL, hw->fs->gb_shader, SVGA_RELOC_READ);
516 if (ret != PIPE_OK)
517 return ret;
518 }
519 svga->rebind.flags.fs = 0;
520
521 return PIPE_OK;
522 }