vc4: Add real validation for MUL rotation.
[mesa.git] / src / gallium / drivers / svga / svga_shader.c
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25
26 #include "util/u_bitmask.h"
27 #include "util/u_memory.h"
28 #include "svga_context.h"
29 #include "svga_cmd.h"
30 #include "svga_format.h"
31 #include "svga_shader.h"
32
33
34 /**
35 * This bit isn't really used anywhere. It only serves to help
36 * generate a unique "signature" for the vertex shader output bitmask.
37 * Shader input/output signatures are used to resolve shader linking
38 * issues.
39 */
40 #define FOG_GENERIC_BIT (((uint64_t) 1) << 63)
41
42
43 /**
44 * Use the shader info to generate a bitmask indicating which generic
45 * inputs are used by the shader. A set bit indicates that GENERIC[i]
46 * is used.
47 */
48 uint64_t
49 svga_get_generic_inputs_mask(const struct tgsi_shader_info *info)
50 {
51 unsigned i;
52 uint64_t mask = 0x0;
53
54 for (i = 0; i < info->num_inputs; i++) {
55 if (info->input_semantic_name[i] == TGSI_SEMANTIC_GENERIC) {
56 unsigned j = info->input_semantic_index[i];
57 assert(j < sizeof(mask) * 8);
58 mask |= ((uint64_t) 1) << j;
59 }
60 }
61
62 return mask;
63 }
64
65
66 /**
67 * Scan shader info to return a bitmask of written outputs.
68 */
69 uint64_t
70 svga_get_generic_outputs_mask(const struct tgsi_shader_info *info)
71 {
72 unsigned i;
73 uint64_t mask = 0x0;
74
75 for (i = 0; i < info->num_outputs; i++) {
76 switch (info->output_semantic_name[i]) {
77 case TGSI_SEMANTIC_GENERIC:
78 {
79 unsigned j = info->output_semantic_index[i];
80 assert(j < sizeof(mask) * 8);
81 mask |= ((uint64_t) 1) << j;
82 }
83 break;
84 case TGSI_SEMANTIC_FOG:
85 mask |= FOG_GENERIC_BIT;
86 break;
87 }
88 }
89
90 return mask;
91 }
92
93
94
95 /**
96 * Given a mask of used generic variables (as returned by the above functions)
97 * fill in a table which maps those indexes to small integers.
98 * This table is used by the remap_generic_index() function in
99 * svga_tgsi_decl_sm30.c
100 * Example: if generics_mask = binary(1010) it means that GENERIC[1] and
101 * GENERIC[3] are used. The remap_table will contain:
102 * table[1] = 0;
103 * table[3] = 1;
104 * The remaining table entries will be filled in with the next unused
105 * generic index (in this example, 2).
106 */
107 void
108 svga_remap_generics(uint64_t generics_mask,
109 int8_t remap_table[MAX_GENERIC_VARYING])
110 {
111 /* Note texcoord[0] is reserved so start at 1 */
112 unsigned count = 1, i;
113
114 for (i = 0; i < MAX_GENERIC_VARYING; i++) {
115 remap_table[i] = -1;
116 }
117
118 /* for each bit set in generic_mask */
119 while (generics_mask) {
120 unsigned index = ffsll(generics_mask) - 1;
121 remap_table[index] = count++;
122 generics_mask &= ~((uint64_t) 1 << index);
123 }
124 }
125
126
127 /**
128 * Use the generic remap table to map a TGSI generic varying variable
129 * index to a small integer. If the remapping table doesn't have a
130 * valid value for the given index (the table entry is -1) it means
131 * the fragment shader doesn't use that VS output. Just allocate
132 * the next free value in that case. Alternately, we could cull
133 * VS instructions that write to register, or replace the register
134 * with a dummy temp register.
135 * XXX TODO: we should do one of the later as it would save precious
136 * texcoord registers.
137 */
138 int
139 svga_remap_generic_index(int8_t remap_table[MAX_GENERIC_VARYING],
140 int generic_index)
141 {
142 assert(generic_index < MAX_GENERIC_VARYING);
143
144 if (generic_index >= MAX_GENERIC_VARYING) {
145 /* just don't return a random/garbage value */
146 generic_index = MAX_GENERIC_VARYING - 1;
147 }
148
149 if (remap_table[generic_index] == -1) {
150 /* This is a VS output that has no matching PS input. Find a
151 * free index.
152 */
153 int i, max = 0;
154 for (i = 0; i < MAX_GENERIC_VARYING; i++) {
155 max = MAX2(max, remap_table[i]);
156 }
157 remap_table[generic_index] = max + 1;
158 }
159
160 return remap_table[generic_index];
161 }
162
163
164 /**
165 * Initialize the shader-neutral fields of svga_compile_key from context
166 * state. This is basically the texture-related state.
167 */
168 void
169 svga_init_shader_key_common(const struct svga_context *svga, unsigned shader,
170 struct svga_compile_key *key)
171 {
172 unsigned i, idx = 0;
173
174 assert(shader < ARRAY_SIZE(svga->curr.num_sampler_views));
175
176 /* In case the number of samplers and sampler_views doesn't match,
177 * loop over the lower of the two counts.
178 */
179 key->num_textures = MIN2(svga->curr.num_sampler_views[shader],
180 svga->curr.num_samplers[shader]);
181
182 for (i = 0; i < key->num_textures; i++) {
183 struct pipe_sampler_view *view = svga->curr.sampler_views[shader][i];
184 const struct svga_sampler_state *sampler = svga->curr.sampler[shader][i];
185 if (view && sampler) {
186 assert(view->texture);
187 assert(view->texture->target < (1 << 4)); /* texture_target:4 */
188
189 /* 1D/2D array textures with one slice are treated as non-arrays
190 * by the SVGA3D device. Convert the texture type here so that
191 * we emit the right TEX/SAMPLE instruction in the shader.
192 */
193 if (view->texture->target == PIPE_TEXTURE_1D_ARRAY ||
194 view->texture->target == PIPE_TEXTURE_2D_ARRAY) {
195 if (view->texture->array_size == 1) {
196 key->tex[i].is_array = 0;
197 }
198 else {
199 assert(view->texture->array_size > 1);
200 key->tex[i].is_array = 1;
201 }
202 }
203
204 if (!sampler->normalized_coords) {
205 assert(idx < (1 << 5)); /* width_height_idx:5 bitfield */
206 key->tex[i].width_height_idx = idx++;
207 key->tex[i].unnormalized = TRUE;
208 ++key->num_unnormalized_coords;
209 }
210
211 key->tex[i].swizzle_r = view->swizzle_r;
212 key->tex[i].swizzle_g = view->swizzle_g;
213 key->tex[i].swizzle_b = view->swizzle_b;
214 key->tex[i].swizzle_a = view->swizzle_a;
215 }
216 }
217 }
218
219
220 /** Search for a compiled shader variant with the same compile key */
221 struct svga_shader_variant *
222 svga_search_shader_key(const struct svga_shader *shader,
223 const struct svga_compile_key *key)
224 {
225 struct svga_shader_variant *variant = shader->variants;
226
227 assert(key);
228
229 for ( ; variant; variant = variant->next) {
230 if (svga_compile_keys_equal(key, &variant->key))
231 return variant;
232 }
233 return NULL;
234 }
235
236 /** Search for a shader with the same token key */
237 struct svga_shader *
238 svga_search_shader_token_key(struct svga_shader *pshader,
239 const struct svga_token_key *key)
240 {
241 struct svga_shader *shader = pshader;
242
243 assert(key);
244
245 for ( ; shader; shader = shader->next) {
246 if (memcmp(key, &shader->token_key, sizeof(struct svga_token_key)) == 0)
247 return shader;
248 }
249 return NULL;
250 }
251
252 /**
253 * Helper function to define a gb shader for non-vgpu10 device
254 */
255 static enum pipe_error
256 define_gb_shader_vgpu9(struct svga_context *svga,
257 SVGA3dShaderType type,
258 struct svga_shader_variant *variant,
259 unsigned codeLen)
260 {
261 struct svga_winsys_screen *sws = svga_screen(svga->pipe.screen)->sws;
262 enum pipe_error ret;
263
264 /**
265 * Create gb memory for the shader and upload the shader code.
266 * Kernel module will allocate an id for the shader and issue
267 * the DefineGBShader command.
268 */
269 variant->gb_shader = sws->shader_create(sws, type,
270 variant->tokens, codeLen);
271
272 if (!variant->gb_shader)
273 return PIPE_ERROR_OUT_OF_MEMORY;
274
275 ret = SVGA3D_BindGBShader(svga->swc, variant->gb_shader);
276
277 return ret;
278 }
279
280 /**
281 * Helper function to define a gb shader for vgpu10 device
282 */
283 static enum pipe_error
284 define_gb_shader_vgpu10(struct svga_context *svga,
285 SVGA3dShaderType type,
286 struct svga_shader_variant *variant,
287 unsigned codeLen)
288 {
289 struct svga_winsys_context *swc = svga->swc;
290 enum pipe_error ret;
291
292 /**
293 * Shaders in VGPU10 enabled device reside in the device COTable.
294 * SVGA driver will allocate an integer ID for the shader and
295 * issue DXDefineShader and DXBindShader commands.
296 */
297 variant->id = util_bitmask_add(svga->shader_id_bm);
298 if (variant->id == UTIL_BITMASK_INVALID_INDEX) {
299 return PIPE_ERROR_OUT_OF_MEMORY;
300 }
301
302 /* Create gb memory for the shader and upload the shader code */
303 variant->gb_shader = swc->shader_create(swc,
304 variant->id, type,
305 variant->tokens, codeLen);
306
307 if (!variant->gb_shader) {
308 /* Free the shader ID */
309 assert(variant->id != UTIL_BITMASK_INVALID_INDEX);
310 goto fail_no_allocation;
311 }
312
313 /**
314 * Since we don't want to do any flush within state emission to avoid
315 * partial state in a command buffer, it's important to make sure that
316 * there is enough room to send both the DXDefineShader & DXBindShader
317 * commands in the same command buffer. So let's send both
318 * commands in one command reservation. If it fails, we'll undo
319 * the shader creation and return an error.
320 */
321 ret = SVGA3D_vgpu10_DefineAndBindShader(swc, variant->gb_shader,
322 variant->id, type, codeLen);
323
324 if (ret != PIPE_OK)
325 goto fail;
326
327 return PIPE_OK;
328
329 fail:
330 swc->shader_destroy(swc, variant->gb_shader);
331 variant->gb_shader = NULL;
332
333 fail_no_allocation:
334 util_bitmask_clear(svga->shader_id_bm, variant->id);
335 variant->id = UTIL_BITMASK_INVALID_INDEX;
336
337 return PIPE_ERROR_OUT_OF_MEMORY;
338 }
339
340 /**
341 * Issue the SVGA3D commands to define a new shader.
342 * \param variant contains the shader tokens, etc. The result->id field will
343 * be set here.
344 */
345 enum pipe_error
346 svga_define_shader(struct svga_context *svga,
347 SVGA3dShaderType type,
348 struct svga_shader_variant *variant)
349 {
350 unsigned codeLen = variant->nr_tokens * sizeof(variant->tokens[0]);
351 enum pipe_error ret;
352
353 variant->id = UTIL_BITMASK_INVALID_INDEX;
354
355 if (svga_have_gb_objects(svga)) {
356 if (svga_have_vgpu10(svga))
357 return define_gb_shader_vgpu10(svga, type, variant, codeLen);
358 else
359 return define_gb_shader_vgpu9(svga, type, variant, codeLen);
360 }
361 else {
362 /* Allocate an integer ID for the shader */
363 variant->id = util_bitmask_add(svga->shader_id_bm);
364 if (variant->id == UTIL_BITMASK_INVALID_INDEX) {
365 return PIPE_ERROR_OUT_OF_MEMORY;
366 }
367
368 /* Issue SVGA3D device command to define the shader */
369 ret = SVGA3D_DefineShader(svga->swc,
370 variant->id,
371 type,
372 variant->tokens,
373 codeLen);
374 if (ret != PIPE_OK) {
375 /* free the ID */
376 assert(variant->id != UTIL_BITMASK_INVALID_INDEX);
377 util_bitmask_clear(svga->shader_id_bm, variant->id);
378 variant->id = UTIL_BITMASK_INVALID_INDEX;
379 }
380 }
381
382 return ret;
383 }
384
385
386 /**
387 * Issue the SVGA3D commands to set/bind a shader.
388 * \param result the shader to bind.
389 */
390 enum pipe_error
391 svga_set_shader(struct svga_context *svga,
392 SVGA3dShaderType type,
393 struct svga_shader_variant *variant)
394 {
395 enum pipe_error ret;
396 unsigned id = variant ? variant->id : SVGA3D_INVALID_ID;
397
398 assert(type == SVGA3D_SHADERTYPE_VS ||
399 type == SVGA3D_SHADERTYPE_GS ||
400 type == SVGA3D_SHADERTYPE_PS);
401
402 if (svga_have_gb_objects(svga)) {
403 struct svga_winsys_gb_shader *gbshader =
404 variant ? variant->gb_shader : NULL;
405
406 if (svga_have_vgpu10(svga))
407 ret = SVGA3D_vgpu10_SetShader(svga->swc, type, gbshader, id);
408 else
409 ret = SVGA3D_SetGBShader(svga->swc, type, gbshader);
410 }
411 else {
412 ret = SVGA3D_SetShader(svga->swc, type, id);
413 }
414
415 return ret;
416 }
417
418
419 struct svga_shader_variant *
420 svga_new_shader_variant(struct svga_context *svga)
421 {
422 svga->hud.num_shaders++;
423 return CALLOC_STRUCT(svga_shader_variant);
424 }
425
426
427 enum pipe_error
428 svga_destroy_shader_variant(struct svga_context *svga,
429 SVGA3dShaderType type,
430 struct svga_shader_variant *variant)
431 {
432 enum pipe_error ret = PIPE_OK;
433
434 if (svga_have_gb_objects(svga) && variant->gb_shader) {
435 if (svga_have_vgpu10(svga)) {
436 struct svga_winsys_context *swc = svga->swc;
437 swc->shader_destroy(swc, variant->gb_shader);
438 ret = SVGA3D_vgpu10_DestroyShader(svga->swc, variant->id);
439 if (ret != PIPE_OK) {
440 /* flush and try again */
441 svga_context_flush(svga, NULL);
442 ret = SVGA3D_vgpu10_DestroyShader(svga->swc, variant->id);
443 }
444 util_bitmask_clear(svga->shader_id_bm, variant->id);
445 }
446 else {
447 struct svga_winsys_screen *sws = svga_screen(svga->pipe.screen)->sws;
448 sws->shader_destroy(sws, variant->gb_shader);
449 }
450 variant->gb_shader = NULL;
451 }
452 else {
453 if (variant->id != UTIL_BITMASK_INVALID_INDEX) {
454 ret = SVGA3D_DestroyShader(svga->swc, variant->id, type);
455 if (ret != PIPE_OK) {
456 /* flush and try again */
457 svga_context_flush(svga, NULL);
458 ret = SVGA3D_DestroyShader(svga->swc, variant->id, type);
459 assert(ret == PIPE_OK);
460 }
461 util_bitmask_clear(svga->shader_id_bm, variant->id);
462 }
463 }
464
465 FREE((unsigned *)variant->tokens);
466 FREE(variant);
467
468 svga->hud.num_shaders--;
469
470 return ret;
471 }
472
473 /*
474 * Rebind shaders.
475 * Called at the beginning of every new command buffer to ensure that
476 * shaders are properly paged-in. Instead of sending the SetShader
477 * command, this function sends a private allocation command to
478 * page in a shader. This avoids emitting redundant state to the device
479 * just to page in a resource.
480 */
481 enum pipe_error
482 svga_rebind_shaders(struct svga_context *svga)
483 {
484 struct svga_winsys_context *swc = svga->swc;
485 struct svga_hw_draw_state *hw = &svga->state.hw_draw;
486 enum pipe_error ret;
487
488 assert(svga_have_vgpu10(svga));
489
490 /**
491 * If the underlying winsys layer does not need resource rebinding,
492 * just clear the rebind flags and return.
493 */
494 if (swc->resource_rebind == NULL) {
495 svga->rebind.flags.vs = 0;
496 svga->rebind.flags.gs = 0;
497 svga->rebind.flags.fs = 0;
498
499 return PIPE_OK;
500 }
501
502 if (svga->rebind.flags.vs && hw->vs && hw->vs->gb_shader) {
503 ret = swc->resource_rebind(swc, NULL, hw->vs->gb_shader, SVGA_RELOC_READ);
504 if (ret != PIPE_OK)
505 return ret;
506 }
507 svga->rebind.flags.vs = 0;
508
509 if (svga->rebind.flags.gs && hw->gs && hw->gs->gb_shader) {
510 ret = swc->resource_rebind(swc, NULL, hw->gs->gb_shader, SVGA_RELOC_READ);
511 if (ret != PIPE_OK)
512 return ret;
513 }
514 svga->rebind.flags.gs = 0;
515
516 if (svga->rebind.flags.fs && hw->fs && hw->fs->gb_shader) {
517 ret = swc->resource_rebind(swc, NULL, hw->fs->gb_shader, SVGA_RELOC_READ);
518 if (ret != PIPE_OK)
519 return ret;
520 }
521 svga->rebind.flags.fs = 0;
522
523 return PIPE_OK;
524 }