src/gallium/drivers/svga/svga_shader.c

   1 /**********************************************************
   2  * Copyright 2008-2012 VMware, Inc.  All rights reserved.
   3  *
   4  * Permission is hereby granted, free of charge, to any person
   5  * obtaining a copy of this software and associated documentation
   6  * files (the "Software"), to deal in the Software without
   7  * restriction, including without limitation the rights to use, copy,
   8  * modify, merge, publish, distribute, sublicense, and/or sell copies
   9  * of the Software, and to permit persons to whom the Software is
  10  * furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be
  13  * included in all copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  16  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  17  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  18  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  19  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  20  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  21  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  22  * SOFTWARE.
  23  *
  24  **********************************************************/
  25
  26 #include "util/u_bitmask.h"
  27 #include "util/u_memory.h"
  28 #include "util/u_format.h"
  29 #include "svga_context.h"
  30 #include "svga_cmd.h"
  31 #include "svga_format.h"
  32 #include "svga_shader.h"
  33 #include "svga_resource_texture.h"
  34 #include "svga3d_surfacedefs.h"
  35
  36
  37 /**
  38  * This bit isn't really used anywhere.  It only serves to help
  39  * generate a unique "signature" for the vertex shader output bitmask.
  40  * Shader input/output signatures are used to resolve shader linking
  41  * issues.
  42  */
  43 #define FOG_GENERIC_BIT (((uint64_t) 1) << 63)
  44
  45
  46 /**
  47  * Use the shader info to generate a bitmask indicating which generic
  48  * inputs are used by the shader.  A set bit indicates that GENERIC[i]
  49  * is used.
  50  */
  51 uint64_t
  52 svga_get_generic_inputs_mask(const struct tgsi_shader_info *info)
  53 {
  54    unsigned i;
  55    uint64_t mask = 0x0;
  56
  57    for (i = 0; i < info->num_inputs; i++) {
  58       if (info->input_semantic_name[i] == TGSI_SEMANTIC_GENERIC) {
  59          unsigned j = info->input_semantic_index[i];
  60          assert(j < sizeof(mask) * 8);
  61          mask |= ((uint64_t) 1) << j;
  62       }
  63    }
  64
  65    return mask;
  66 }
  67
  68
  69 /**
  70  * Scan shader info to return a bitmask of written outputs.
  71  */
  72 uint64_t
  73 svga_get_generic_outputs_mask(const struct tgsi_shader_info *info)
  74 {
  75    unsigned i;
  76    uint64_t mask = 0x0;
  77
  78    for (i = 0; i < info->num_outputs; i++) {
  79       switch (info->output_semantic_name[i]) {
  80       case TGSI_SEMANTIC_GENERIC:
  81          {
  82             unsigned j = info->output_semantic_index[i];
  83             assert(j < sizeof(mask) * 8);
  84             mask |= ((uint64_t) 1) << j;
  85          }
  86          break;
  87       case TGSI_SEMANTIC_FOG:
  88          mask |= FOG_GENERIC_BIT;
  89          break;
  90       }
  91    }
  92
  93    return mask;
  94 }
  95
  96
  97
  98 /**
  99  * Given a mask of used generic variables (as returned by the above functions)
 100  * fill in a table which maps those indexes to small integers.
 101  * This table is used by the remap_generic_index() function in
 102  * svga_tgsi_decl_sm30.c
 103  * Example: if generics_mask = binary(1010) it means that GENERIC[1] and
 104  * GENERIC[3] are used.  The remap_table will contain:
 105  *   table[1] = 0;
 106  *   table[3] = 1;
 107  * The remaining table entries will be filled in with the next unused
 108  * generic index (in this example, 2).
 109  */
 110 void
 111 svga_remap_generics(uint64_t generics_mask,
 112                     int8_t remap_table[MAX_GENERIC_VARYING])
 113 {
 114    /* Note texcoord[0] is reserved so start at 1 */
 115    unsigned count = 1, i;
 116
 117    for (i = 0; i < MAX_GENERIC_VARYING; i++) {
 118       remap_table[i] = -1;
 119    }
 120
 121    /* for each bit set in generic_mask */
 122    while (generics_mask) {
 123       unsigned index = ffsll(generics_mask) - 1;
 124       remap_table[index] = count++;
 125       generics_mask &= ~((uint64_t) 1 << index);
 126    }
 127 }
 128
 129
 130 /**
 131  * Use the generic remap table to map a TGSI generic varying variable
 132  * index to a small integer.  If the remapping table doesn't have a
 133  * valid value for the given index (the table entry is -1) it means
 134  * the fragment shader doesn't use that VS output.  Just allocate
 135  * the next free value in that case.  Alternately, we could cull
 136  * VS instructions that write to register, or replace the register
 137  * with a dummy temp register.
 138  * XXX TODO: we should do one of the later as it would save precious
 139  * texcoord registers.
 140  */
 141 int
 142 svga_remap_generic_index(int8_t remap_table[MAX_GENERIC_VARYING],
 143                          int generic_index)
 144 {
 145    assert(generic_index < MAX_GENERIC_VARYING);
 146
 147    if (generic_index >= MAX_GENERIC_VARYING) {
 148       /* just don't return a random/garbage value */
 149       generic_index = MAX_GENERIC_VARYING - 1;
 150    }
 151
 152    if (remap_table[generic_index] == -1) {
 153       /* This is a VS output that has no matching PS input.  Find a
 154        * free index.
 155        */
 156       int i, max = 0;
 157       for (i = 0; i < MAX_GENERIC_VARYING; i++) {
 158          max = MAX2(max, remap_table[i]);
 159       }
 160       remap_table[generic_index] = max + 1;
 161    }
 162
 163    return remap_table[generic_index];
 164 }
 165
 166
 167 /**
 168  * Initialize the shader-neutral fields of svga_compile_key from context
 169  * state.  This is basically the texture-related state.
 170  */
 171 void
 172 svga_init_shader_key_common(const struct svga_context *svga,
 173                             enum pipe_shader_type shader,
 174                             struct svga_compile_key *key)
 175 {
 176    unsigned i, idx = 0;
 177
 178    assert(shader < ARRAY_SIZE(svga->curr.num_sampler_views));
 179
 180    /* In case the number of samplers and sampler_views doesn't match,
 181     * loop over the lower of the two counts.
 182     */
 183    key->num_textures = MIN2(svga->curr.num_sampler_views[shader],
 184                             svga->curr.num_samplers[shader]);
 185
 186    for (i = 0; i < key->num_textures; i++) {
 187       struct pipe_sampler_view *view = svga->curr.sampler_views[shader][i];
 188       const struct svga_sampler_state *sampler = svga->curr.sampler[shader][i];
 189       if (view && sampler) {
 190          assert(view->texture);
 191          assert(view->texture->target < (1 << 4)); /* texture_target:4 */
 192
 193          /* 1D/2D array textures with one slice are treated as non-arrays
 194           * by the SVGA3D device.  Convert the texture type here so that
 195           * we emit the right TEX/SAMPLE instruction in the shader.
 196           */
 197          if (view->texture->target == PIPE_TEXTURE_1D_ARRAY ||
 198              view->texture->target == PIPE_TEXTURE_2D_ARRAY) {
 199             if (view->texture->array_size == 1) {
 200                key->tex[i].is_array = 0;
 201             }
 202             else {
 203                assert(view->texture->array_size > 1);
 204                key->tex[i].is_array = 1;
 205             }
 206          }
 207
 208          if (!sampler->normalized_coords) {
 209             assert(idx < (1 << 5));  /* width_height_idx:5 bitfield */
 210             key->tex[i].width_height_idx = idx++;
 211             key->tex[i].unnormalized = TRUE;
 212             ++key->num_unnormalized_coords;
 213          }
 214
 215          key->tex[i].swizzle_r = view->swizzle_r;
 216          key->tex[i].swizzle_g = view->swizzle_g;
 217          key->tex[i].swizzle_b = view->swizzle_b;
 218          key->tex[i].swizzle_a = view->swizzle_a;
 219
 220          /* If we have a non-alpha view into an svga3d surface with an
 221           * alpha channel, then explicitly set the alpha channel to 1
 222           * when sampling. Note that we need to check the svga3d format
 223           * in the svga texture key, since the imported format is
 224           * stored here and it may differ from the gallium format.
 225           */
 226          if (!util_format_has_alpha(view->format)) {
 227             enum svga3d_block_desc block_desc =
 228                svga3dsurface_get_desc(svga_texture(view->texture)->key.format)->
 229                block_desc;
 230
 231             if (block_desc & SVGA3DBLOCKDESC_ALPHA)
 232                key->tex[i].swizzle_a = PIPE_SWIZZLE_1;
 233          }
 234       }
 235    }
 236 }
 237
 238
 239 /** Search for a compiled shader variant with the same compile key */
 240 struct svga_shader_variant *
 241 svga_search_shader_key(const struct svga_shader *shader,
 242                        const struct svga_compile_key *key)
 243 {
 244    struct svga_shader_variant *variant = shader->variants;
 245
 246    assert(key);
 247
 248    for ( ; variant; variant = variant->next) {
 249       if (svga_compile_keys_equal(key, &variant->key))
 250          return variant;
 251    }
 252    return NULL;
 253 }
 254
 255 /** Search for a shader with the same token key */
 256 struct svga_shader *
 257 svga_search_shader_token_key(struct svga_shader *pshader,
 258                              const struct svga_token_key *key)
 259 {
 260    struct svga_shader *shader = pshader;
 261
 262    assert(key);
 263
 264    for ( ; shader; shader = shader->next) {
 265       if (memcmp(key, &shader->token_key, sizeof(struct svga_token_key)) == 0)
 266          return shader;
 267    }
 268    return NULL;
 269 }
 270
 271 /**
 272  * Helper function to define a gb shader for non-vgpu10 device
 273  */
 274 static enum pipe_error
 275 define_gb_shader_vgpu9(struct svga_context *svga,
 276                        SVGA3dShaderType type,
 277                        struct svga_shader_variant *variant,
 278                        unsigned codeLen)
 279 {
 280    struct svga_winsys_screen *sws = svga_screen(svga->pipe.screen)->sws;
 281    enum pipe_error ret;
 282
 283    /**
 284     * Create gb memory for the shader and upload the shader code.
 285     * Kernel module will allocate an id for the shader and issue
 286     * the DefineGBShader command.
 287     */
 288    variant->gb_shader = sws->shader_create(sws, type,
 289                                            variant->tokens, codeLen);
 290
 291    if (!variant->gb_shader)
 292       return PIPE_ERROR_OUT_OF_MEMORY;
 293
 294    ret = SVGA3D_BindGBShader(svga->swc, variant->gb_shader);
 295
 296    return ret;
 297 }
 298
 299 /**
 300  * Helper function to define a gb shader for vgpu10 device
 301  */
 302 static enum pipe_error
 303 define_gb_shader_vgpu10(struct svga_context *svga,
 304                         SVGA3dShaderType type,
 305                         struct svga_shader_variant *variant,
 306                         unsigned codeLen)
 307 {
 308    struct svga_winsys_context *swc = svga->swc;
 309    enum pipe_error ret;
 310
 311    /**
 312     * Shaders in VGPU10 enabled device reside in the device COTable.
 313     * SVGA driver will allocate an integer ID for the shader and
 314     * issue DXDefineShader and DXBindShader commands.
 315     */
 316    variant->id = util_bitmask_add(svga->shader_id_bm);
 317    if (variant->id == UTIL_BITMASK_INVALID_INDEX) {
 318       return PIPE_ERROR_OUT_OF_MEMORY;
 319    }
 320
 321    /* Create gb memory for the shader and upload the shader code */
 322    variant->gb_shader = swc->shader_create(swc,
 323                                            variant->id, type,
 324                                            variant->tokens, codeLen);
 325
 326    if (!variant->gb_shader) {
 327       /* Free the shader ID */
 328       assert(variant->id != UTIL_BITMASK_INVALID_INDEX);
 329       goto fail_no_allocation;
 330    }
 331
 332    /**
 333     * Since we don't want to do any flush within state emission to avoid
 334     * partial state in a command buffer, it's important to make sure that
 335     * there is enough room to send both the DXDefineShader & DXBindShader
 336     * commands in the same command buffer. So let's send both
 337     * commands in one command reservation. If it fails, we'll undo
 338     * the shader creation and return an error.
 339     */
 340    ret = SVGA3D_vgpu10_DefineAndBindShader(swc, variant->gb_shader,
 341                                            variant->id, type, codeLen);
 342
 343    if (ret != PIPE_OK)
 344       goto fail;
 345
 346    return PIPE_OK;
 347
 348 fail:
 349    swc->shader_destroy(swc, variant->gb_shader);
 350    variant->gb_shader = NULL;
 351
 352 fail_no_allocation:
 353    util_bitmask_clear(svga->shader_id_bm, variant->id);
 354    variant->id = UTIL_BITMASK_INVALID_INDEX;
 355
 356    return PIPE_ERROR_OUT_OF_MEMORY;
 357 }
 358
 359 /**
 360  * Issue the SVGA3D commands to define a new shader.
 361  * \param variant  contains the shader tokens, etc.  The result->id field will
 362  *                 be set here.
 363  */
 364 enum pipe_error
 365 svga_define_shader(struct svga_context *svga,
 366                    SVGA3dShaderType type,
 367                    struct svga_shader_variant *variant)
 368 {
 369    unsigned codeLen = variant->nr_tokens * sizeof(variant->tokens[0]);
 370    enum pipe_error ret;
 371
 372    SVGA_STATS_TIME_PUSH(svga_sws(svga), SVGA_STATS_TIME_DEFINESHADER);
 373
 374    variant->id = UTIL_BITMASK_INVALID_INDEX;
 375
 376    if (svga_have_gb_objects(svga)) {
 377       if (svga_have_vgpu10(svga))
 378          ret = define_gb_shader_vgpu10(svga, type, variant, codeLen);
 379       else
 380          ret = define_gb_shader_vgpu9(svga, type, variant, codeLen);
 381    }
 382    else {
 383       /* Allocate an integer ID for the shader */
 384       variant->id = util_bitmask_add(svga->shader_id_bm);
 385       if (variant->id == UTIL_BITMASK_INVALID_INDEX) {
 386          ret = PIPE_ERROR_OUT_OF_MEMORY;
 387          goto done;
 388       }
 389
 390       /* Issue SVGA3D device command to define the shader */
 391       ret = SVGA3D_DefineShader(svga->swc,
 392                                 variant->id,
 393                                 type,
 394                                 variant->tokens,
 395                                 codeLen);
 396       if (ret != PIPE_OK) {
 397          /* free the ID */
 398          assert(variant->id != UTIL_BITMASK_INVALID_INDEX);
 399          util_bitmask_clear(svga->shader_id_bm, variant->id);
 400          variant->id = UTIL_BITMASK_INVALID_INDEX;
 401       }
 402    }
 403
 404 done:
 405    SVGA_STATS_TIME_POP(svga_sws(svga));
 406    return ret;
 407 }
 408
 409
 410 /**
 411  * Issue the SVGA3D commands to set/bind a shader.
 412  * \param result  the shader to bind.
 413  */
 414 enum pipe_error
 415 svga_set_shader(struct svga_context *svga,
 416                 SVGA3dShaderType type,
 417                 struct svga_shader_variant *variant)
 418 {
 419    enum pipe_error ret;
 420    unsigned id = variant ? variant->id : SVGA3D_INVALID_ID;
 421
 422    assert(type == SVGA3D_SHADERTYPE_VS ||
 423           type == SVGA3D_SHADERTYPE_GS ||
 424           type == SVGA3D_SHADERTYPE_PS);
 425
 426    if (svga_have_gb_objects(svga)) {
 427       struct svga_winsys_gb_shader *gbshader =
 428          variant ? variant->gb_shader : NULL;
 429
 430       if (svga_have_vgpu10(svga))
 431          ret = SVGA3D_vgpu10_SetShader(svga->swc, type, gbshader, id);
 432       else
 433          ret = SVGA3D_SetGBShader(svga->swc, type, gbshader);
 434    }
 435    else {
 436       ret = SVGA3D_SetShader(svga->swc, type, id);
 437    }
 438
 439    return ret;
 440 }
 441
 442
 443 struct svga_shader_variant *
 444 svga_new_shader_variant(struct svga_context *svga)
 445 {
 446    svga->hud.num_shaders++;
 447    return CALLOC_STRUCT(svga_shader_variant);
 448 }
 449
 450
 451 enum pipe_error
 452 svga_destroy_shader_variant(struct svga_context *svga,
 453                             SVGA3dShaderType type,
 454                             struct svga_shader_variant *variant)
 455 {
 456    enum pipe_error ret = PIPE_OK;
 457
 458    if (svga_have_gb_objects(svga) && variant->gb_shader) {
 459       if (svga_have_vgpu10(svga)) {
 460          struct svga_winsys_context *swc = svga->swc;
 461          swc->shader_destroy(swc, variant->gb_shader);
 462          ret = SVGA3D_vgpu10_DestroyShader(svga->swc, variant->id);
 463          if (ret != PIPE_OK) {
 464             /* flush and try again */
 465             svga_context_flush(svga, NULL);
 466             ret = SVGA3D_vgpu10_DestroyShader(svga->swc, variant->id);
 467          }
 468          util_bitmask_clear(svga->shader_id_bm, variant->id);
 469       }
 470       else {
 471          struct svga_winsys_screen *sws = svga_screen(svga->pipe.screen)->sws;
 472          sws->shader_destroy(sws, variant->gb_shader);
 473       }
 474       variant->gb_shader = NULL;
 475    }
 476    else {
 477       if (variant->id != UTIL_BITMASK_INVALID_INDEX) {
 478          ret = SVGA3D_DestroyShader(svga->swc, variant->id, type);
 479          if (ret != PIPE_OK) {
 480             /* flush and try again */
 481             svga_context_flush(svga, NULL);
 482             ret = SVGA3D_DestroyShader(svga->swc, variant->id, type);
 483             assert(ret == PIPE_OK);
 484          }
 485          util_bitmask_clear(svga->shader_id_bm, variant->id);
 486       }
 487    }
 488
 489    FREE((unsigned *)variant->tokens);
 490    FREE(variant);
 491
 492    svga->hud.num_shaders--;
 493
 494    return ret;
 495 }
 496
 497 /*
 498  * Rebind shaders.
 499  * Called at the beginning of every new command buffer to ensure that
 500  * shaders are properly paged-in. Instead of sending the SetShader
 501  * command, this function sends a private allocation command to
 502  * page in a shader. This avoids emitting redundant state to the device
 503  * just to page in a resource.
 504  */
 505 enum pipe_error
 506 svga_rebind_shaders(struct svga_context *svga)
 507 {
 508    struct svga_winsys_context *swc = svga->swc;
 509    struct svga_hw_draw_state *hw = &svga->state.hw_draw;
 510    enum pipe_error ret;
 511
 512    assert(svga_have_vgpu10(svga));
 513
 514    /**
 515     * If the underlying winsys layer does not need resource rebinding,
 516     * just clear the rebind flags and return.
 517     */
 518    if (swc->resource_rebind == NULL) {
 519       svga->rebind.flags.vs = 0;
 520       svga->rebind.flags.gs = 0;
 521       svga->rebind.flags.fs = 0;
 522
 523       return PIPE_OK;
 524    }
 525
 526    if (svga->rebind.flags.vs && hw->vs && hw->vs->gb_shader) {
 527       ret = swc->resource_rebind(swc, NULL, hw->vs->gb_shader, SVGA_RELOC_READ);
 528       if (ret != PIPE_OK)
 529          return ret;
 530    }
 531    svga->rebind.flags.vs = 0;
 532
 533    if (svga->rebind.flags.gs && hw->gs && hw->gs->gb_shader) {
 534       ret = swc->resource_rebind(swc, NULL, hw->gs->gb_shader, SVGA_RELOC_READ);
 535       if (ret != PIPE_OK)
 536          return ret;
 537    }
 538    svga->rebind.flags.gs = 0;
 539
 540    if (svga->rebind.flags.fs && hw->fs && hw->fs->gb_shader) {
 541       ret = swc->resource_rebind(swc, NULL, hw->fs->gb_shader, SVGA_RELOC_READ);
 542       if (ret != PIPE_OK)
 543          return ret;
 544    }
 545    svga->rebind.flags.fs = 0;
 546
 547    return PIPE_OK;
 548 }