1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
24 **********************************************************/
26 #include "util/u_bitmask.h"
27 #include "util/u_debug.h"
28 #include "pipe/p_defines.h"
29 #include "util/u_memory.h"
30 #include "draw/draw_context.h"
32 #include "svga_context.h"
33 #include "svga_screen.h"
34 #include "svga_state.h"
35 #include "svga_draw.h"
37 #include "svga_hw_reg.h"
39 /* This is just enough to decide whether we need to use the draw
40 * module (swtnl) or not.
42 static const struct svga_tracked_state
*need_swtnl_state
[] =
44 &svga_update_need_swvfetch
,
45 &svga_update_need_pipeline
,
46 &svga_update_need_swtnl
,
51 /* Atoms to update hardware state prior to emitting a clear or draw
54 static const struct svga_tracked_state
*hw_clear_state
[] =
63 /* Atoms to update hardware state prior to emitting a draw packet.
65 static const struct svga_tracked_state
*hw_draw_state
[] =
67 &svga_need_tgsi_transform
,
72 &svga_hw_sampler
, /* VGPU10 */
73 &svga_hw_sampler_bindings
, /* VGPU10 */
74 &svga_hw_tss
, /* pre-VGPU10 */
75 &svga_hw_tss_binding
, /* pre-VGPU10 */
78 &svga_hw_fs_constants
,
79 &svga_hw_gs_constants
,
80 &svga_hw_vs_constants
,
85 static const struct svga_tracked_state
*swtnl_draw_state
[] =
87 &svga_update_swtnl_draw
,
88 &svga_update_swtnl_vdecl
,
92 /* Flattens the graph of state dependencies. Could swap the positions
93 * of hw_clear_state and need_swtnl_state without breaking anything.
95 static const struct svga_tracked_state
**state_levels
[] =
106 check_state(unsigned a
, unsigned b
)
112 accumulate_state(unsigned *a
, unsigned b
)
119 xor_states(unsigned *result
, unsigned a
, unsigned b
)
125 static enum pipe_error
126 update_state(struct svga_context
*svga
,
127 const struct svga_tracked_state
*atoms
[],
131 boolean debug
= TRUE
;
133 boolean debug
= FALSE
;
135 enum pipe_error ret
= PIPE_OK
;
138 ret
= svga_hwtnl_flush( svga
->hwtnl
);
143 /* Debug version which enforces various sanity checks on the
144 * state flags which are generated and checked to help ensure
145 * state atoms are ordered correctly in the list.
147 unsigned examined
, prev
;
152 for (i
= 0; atoms
[i
] != NULL
; i
++) {
155 assert(atoms
[i
]->dirty
);
156 assert(atoms
[i
]->update
);
158 if (check_state(*state
, atoms
[i
]->dirty
)) {
160 debug_printf("update: %s\n", atoms
[i
]->name
);
161 ret
= atoms
[i
]->update( svga
, *state
);
166 /* generated = (prev ^ state)
167 * if (examined & generated)
170 xor_states(&generated
, prev
, *state
);
171 if (check_state(examined
, generated
)) {
172 debug_printf("state atom %s generated state already examined\n",
178 accumulate_state(&examined
, atoms
[i
]->dirty
);
182 for (i
= 0; atoms
[i
] != NULL
; i
++) {
183 if (check_state(*state
, atoms
[i
]->dirty
)) {
184 ret
= atoms
[i
]->update( svga
, *state
);
196 svga_update_state(struct svga_context
*svga
, unsigned max_level
)
198 struct svga_screen
*screen
= svga_screen(svga
->pipe
.screen
);
199 enum pipe_error ret
= PIPE_OK
;
202 SVGA_STATS_TIME_PUSH(screen
->sws
, SVGA_STATS_TIME_UPDATESTATE
);
204 /* Check for updates to bound textures. This can't be done in an
205 * atom as there is no flag which could provoke this test, and we
208 if (svga
->state
.texture_timestamp
!= screen
->texture_timestamp
) {
209 svga
->state
.texture_timestamp
= screen
->texture_timestamp
;
210 svga
->dirty
|= SVGA_NEW_TEXTURE
;
213 for (i
= 0; i
<= max_level
; i
++) {
214 svga
->dirty
|= svga
->state
.dirty
[i
];
217 ret
= update_state( svga
,
223 svga
->state
.dirty
[i
] = 0;
227 for (; i
< SVGA_STATE_MAX
; i
++)
228 svga
->state
.dirty
[i
] |= svga
->dirty
;
232 svga
->hud
.num_validations
++;
235 SVGA_STATS_TIME_POP(screen
->sws
);
241 * Update state. If the first attempt fails, flush the command buffer
243 * \return true if success, false if second attempt fails.
246 svga_update_state_retry(struct svga_context
*svga
, unsigned max_level
)
250 ret
= svga_update_state( svga
, max_level
);
252 if (ret
!= PIPE_OK
) {
253 svga_context_flush(svga
, NULL
);
254 ret
= svga_update_state( svga
, max_level
);
257 return ret
== PIPE_OK
;
262 #define EMIT_RS(_rs, _count, _name, _value) \
264 _rs[_count].state = _name; \
265 _rs[_count].uintValue = _value; \
270 /* Setup any hardware state which will be constant through the life of
274 svga_emit_initial_state(struct svga_context
*svga
)
276 if (svga_have_vgpu10(svga
)) {
277 SVGA3dRasterizerStateId id
= util_bitmask_add(svga
->rast_object_id_bm
);
280 /* XXX preliminary code */
281 ret
= SVGA3D_vgpu10_DefineRasterizerState(svga
->swc
,
283 SVGA3D_FILLMODE_FILL
,
285 1, /* frontCounterClockwise */
287 0.0f
, /* depthBiasClamp */
288 0.0f
, /* slopeScaledDepthBiasClamp */
289 0, /* depthClampEnable */
290 0, /* scissorEnable */
291 0, /* multisampleEnable */
292 0, /* aalineEnable */
293 1.0f
, /* lineWidth */
294 0, /* lineStippleEnable */
295 0, /* lineStippleFactor */
296 0, /* lineStipplePattern */
297 0); /* provokingVertexLast */
300 assert(ret
== PIPE_OK
);
302 ret
= SVGA3D_vgpu10_SetRasterizerState(svga
->swc
, id
);
306 SVGA3dRenderState
*rs
;
308 const unsigned COUNT
= 2;
311 ret
= SVGA3D_BeginSetRenderState( svga
->swc
, &rs
, COUNT
);
315 /* Always use D3D style coordinate space as this is the only one
316 * which is implemented on all backends.
318 EMIT_RS(rs
, count
, SVGA3D_RS_COORDINATETYPE
,
319 SVGA3D_COORDINATE_LEFTHANDED
);
320 EMIT_RS(rs
, count
, SVGA3D_RS_FRONTWINDING
, SVGA3D_FRONTWINDING_CW
);
322 assert( COUNT
== count
);
323 SVGA_FIFOCommitAll( svga
->swc
);