1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
24 **********************************************************/
26 #include "util/u_inlines.h"
27 #include "pipe/p_defines.h"
28 #include "util/u_math.h"
30 #include "svga_sampler_view.h"
31 #include "svga_winsys.h"
32 #include "svga_context.h"
33 #include "svga_state.h"
37 void svga_cleanup_tss_binding(struct svga_context
*svga
)
40 unsigned count
= MAX2( svga
->curr
.num_sampler_views
,
41 svga
->state
.hw_draw
.num_views
);
43 for (i
= 0; i
< count
; i
++) {
44 struct svga_hw_view_state
*view
= &svga
->state
.hw_draw
.views
[i
];
46 svga_sampler_view_reference(&view
->v
, NULL
);
47 pipe_sampler_view_reference( &svga
->curr
.sampler_views
[i
], NULL
);
48 pipe_resource_reference( &view
->texture
, NULL
);
56 update_tss_binding(struct svga_context
*svga
,
59 boolean reemit
= !!(dirty
& SVGA_NEW_COMMAND_BUFFER
);
61 unsigned count
= MAX2( svga
->curr
.num_sampler_views
,
62 svga
->state
.hw_draw
.num_views
);
70 struct svga_hw_view_state
*view
;
71 } bind
[PIPE_MAX_SAMPLERS
];
78 for (i
= 0; i
< count
; i
++) {
79 const struct svga_sampler_state
*s
= svga
->curr
.sampler
[i
];
80 struct svga_hw_view_state
*view
= &svga
->state
.hw_draw
.views
[i
];
81 struct pipe_resource
*texture
= NULL
;
84 if (svga
->curr
.sampler_views
[i
]) {
85 min_lod
= MAX2(s
->view_min_lod
, 0);
86 max_lod
= MIN2(s
->view_max_lod
, svga
->curr
.sampler_views
[i
]->texture
->last_level
);
87 texture
= svga
->curr
.sampler_views
[i
]->texture
;
93 if (view
->texture
!= texture
||
94 view
->min_lod
!= min_lod
||
95 view
->max_lod
!= max_lod
) {
97 svga_sampler_view_reference(&view
->v
, NULL
);
98 pipe_resource_reference( &view
->texture
, texture
);
101 view
->min_lod
= min_lod
;
102 view
->max_lod
= max_lod
;
105 view
->v
= svga_get_tex_sampler_view(&svga
->pipe
,
112 * We need to reemit non-null texture bindings, even when they are not
113 * dirty, to ensure that the resources are paged in.
117 (reemit
&& view
->v
)) {
118 queue
.bind
[queue
.bind_count
].unit
= i
;
119 queue
.bind
[queue
.bind_count
].view
= view
;
122 if (!view
->dirty
&& view
->v
) {
123 svga_validate_sampler_view(svga
, view
->v
);
127 svga
->state
.hw_draw
.num_views
= svga
->curr
.num_sampler_views
;
129 if (queue
.bind_count
) {
130 SVGA3dTextureState
*ts
;
132 if (SVGA3D_BeginSetTextureState( svga
->swc
,
134 queue
.bind_count
) != PIPE_OK
)
137 for (i
= 0; i
< queue
.bind_count
; i
++) {
138 struct svga_winsys_surface
*handle
;
140 ts
[i
].stage
= queue
.bind
[i
].unit
;
141 ts
[i
].name
= SVGA3D_TS_BIND_TEXTURE
;
143 if (queue
.bind
[i
].view
->v
) {
144 handle
= queue
.bind
[i
].view
->v
->handle
;
149 svga
->swc
->surface_relocation(svga
->swc
,
154 queue
.bind
[i
].view
->dirty
= FALSE
;
157 SVGA_FIFOCommitAll( svga
->swc
);
163 return PIPE_ERROR_OUT_OF_MEMORY
;
167 struct svga_tracked_state svga_hw_tss_binding
= {
168 "texture binding emit",
169 SVGA_NEW_TEXTURE_BINDING
|
171 SVGA_NEW_COMMAND_BUFFER
,
176 /***********************************************************************
181 SVGA3dTextureState ts
[PIPE_MAX_SAMPLERS
*SVGA3D_TS_MAX
];
185 #define EMIT_TS(svga, unit, val, token, fail) \
187 if (svga->state.hw_draw.ts[unit][SVGA3D_TS_##token] != val) { \
188 svga_queue_tss( &queue, unit, SVGA3D_TS_##token, val ); \
189 svga->state.hw_draw.ts[unit][SVGA3D_TS_##token] = val; \
193 #define EMIT_TS_FLOAT(svga, unit, fvalue, token, fail) \
195 unsigned val = fui(fvalue); \
196 if (svga->state.hw_draw.ts[unit][SVGA3D_TS_##token] != val) { \
197 svga_queue_tss( &queue, unit, SVGA3D_TS_##token, val ); \
198 svga->state.hw_draw.ts[unit][SVGA3D_TS_##token] = val; \
204 svga_queue_tss( struct ts_queue
*q
,
209 assert(q
->ts_count
< sizeof(q
->ts
)/sizeof(q
->ts
[0]));
210 q
->ts
[q
->ts_count
].stage
= unit
;
211 q
->ts
[q
->ts_count
].name
= tss
;
212 q
->ts
[q
->ts_count
].value
= value
;
218 update_tss(struct svga_context
*svga
,
222 struct ts_queue queue
;
225 for (i
= 0; i
< svga
->curr
.num_samplers
; i
++) {
226 if (svga
->curr
.sampler
[i
]) {
227 const struct svga_sampler_state
*curr
= svga
->curr
.sampler
[i
];
229 EMIT_TS(svga
, i
, curr
->mipfilter
, MIPFILTER
, fail
);
230 EMIT_TS(svga
, i
, curr
->min_lod
, TEXTURE_MIPMAP_LEVEL
, fail
);
231 EMIT_TS(svga
, i
, curr
->magfilter
, MAGFILTER
, fail
);
232 EMIT_TS(svga
, i
, curr
->minfilter
, MINFILTER
, fail
);
233 EMIT_TS(svga
, i
, curr
->aniso_level
, TEXTURE_ANISOTROPIC_LEVEL
, fail
);
234 EMIT_TS_FLOAT(svga
, i
, curr
->lod_bias
, TEXTURE_LOD_BIAS
, fail
);
235 EMIT_TS(svga
, i
, curr
->addressu
, ADDRESSU
, fail
);
236 EMIT_TS(svga
, i
, curr
->addressw
, ADDRESSW
, fail
);
237 EMIT_TS(svga
, i
, curr
->bordercolor
, BORDERCOLOR
, fail
);
238 // TEXCOORDINDEX -- hopefully not needed
240 if (svga
->curr
.tex_flags
.flag_1d
& (1 << i
)) {
241 debug_printf("wrap 1d tex %d\n", i
);
242 EMIT_TS(svga
, i
, SVGA3D_TEX_ADDRESS_WRAP
, ADDRESSV
, fail
);
245 EMIT_TS(svga
, i
, curr
->addressv
, ADDRESSV
, fail
);
247 if (svga
->curr
.tex_flags
.flag_srgb
& (1 << i
))
248 EMIT_TS_FLOAT(svga
, i
, 2.2f
, GAMMA
, fail
);
250 EMIT_TS_FLOAT(svga
, i
, 1.0f
, GAMMA
, fail
);
255 if (queue
.ts_count
) {
256 SVGA3dTextureState
*ts
;
258 if (SVGA3D_BeginSetTextureState( svga
->swc
,
260 queue
.ts_count
) != PIPE_OK
)
265 queue
.ts_count
* sizeof queue
.ts
[0]);
267 SVGA_FIFOCommitAll( svga
->swc
);
273 /* XXX: need to poison cached hardware state on failure to ensure
274 * dirty state gets re-emitted. Fix this by re-instating partial
275 * FIFOCommit command and only updating cached hw state once the
276 * initial allocation has succeeded.
278 memset(svga
->state
.hw_draw
.ts
, 0xcd, sizeof(svga
->state
.hw_draw
.ts
));
280 return PIPE_ERROR_OUT_OF_MEMORY
;
284 struct svga_tracked_state svga_hw_tss
= {
285 "texture state emit",
287 SVGA_NEW_TEXTURE_FLAGS
),