1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
24 **********************************************************/
26 #include "util/u_inlines.h"
27 #include "util/u_memory.h"
28 #include "pipe/p_defines.h"
29 #include "util/u_math.h"
31 #include "svga_sampler_view.h"
32 #include "svga_winsys.h"
33 #include "svga_context.h"
34 #include "svga_shader.h"
35 #include "svga_state.h"
40 * Called when tearing down a context to free resources and samplers.
42 void svga_cleanup_tss_binding(struct svga_context
*svga
)
44 const unsigned shader
= PIPE_SHADER_FRAGMENT
;
47 for (i
= 0; i
< Elements(svga
->state
.hw_draw
.views
); i
++) {
48 struct svga_hw_view_state
*view
= &svga
->state
.hw_draw
.views
[i
];
50 svga_sampler_view_reference(&view
->v
, NULL
);
51 pipe_sampler_view_release(&svga
->pipe
,
52 &svga
->curr
.sampler_views
[shader
][i
]);
53 pipe_resource_reference(&view
->texture
, NULL
);
63 struct svga_hw_view_state
*view
;
64 } bind
[PIPE_MAX_SAMPLERS
];
71 * Update the texture binding for one texture unit.
74 emit_tex_binding_unit(struct svga_context
*svga
,
76 const struct svga_sampler_state
*s
,
77 const struct pipe_sampler_view
*sv
,
78 struct svga_hw_view_state
*view
,
80 struct bind_queue
*queue
)
82 struct pipe_resource
*texture
= NULL
;
83 unsigned last_level
, min_lod
, max_lod
;
87 if (s
->mipfilter
== SVGA3D_TEX_FILTER_NONE
) {
88 /* just use the base level image */
89 min_lod
= max_lod
= sv
->u
.tex
.first_level
;
92 last_level
= MIN2(sv
->u
.tex
.last_level
, sv
->texture
->last_level
);
93 min_lod
= s
->view_min_lod
+ sv
->u
.tex
.first_level
;
94 min_lod
= MIN2(min_lod
, last_level
);
95 max_lod
= MIN2(s
->view_max_lod
+ sv
->u
.tex
.first_level
, last_level
);
97 texture
= sv
->texture
;
104 if (view
->texture
!= texture
||
105 view
->min_lod
!= min_lod
||
106 view
->max_lod
!= max_lod
) {
108 svga_sampler_view_reference(&view
->v
, NULL
);
109 pipe_resource_reference( &view
->texture
, texture
);
112 view
->min_lod
= min_lod
;
113 view
->max_lod
= max_lod
;
116 view
->v
= svga_get_tex_sampler_view(&svga
->pipe
,
124 * We need to reemit non-null texture bindings, even when they are not
125 * dirty, to ensure that the resources are paged in.
127 if (view
->dirty
|| (reemit
&& view
->v
)) {
128 queue
->bind
[queue
->bind_count
].unit
= unit
;
129 queue
->bind
[queue
->bind_count
].view
= view
;
133 if (!view
->dirty
&& view
->v
) {
134 svga_validate_sampler_view(svga
, view
->v
);
139 static enum pipe_error
140 update_tss_binding(struct svga_context
*svga
,
143 const unsigned shader
= PIPE_SHADER_FRAGMENT
;
144 boolean reemit
= svga
->rebind
.flags
.texture_samplers
;
146 unsigned count
= MAX2( svga
->curr
.num_sampler_views
[shader
],
147 svga
->state
.hw_draw
.num_views
);
149 struct bind_queue queue
;
151 if (svga_have_vgpu10(svga
))
154 queue
.bind_count
= 0;
156 for (i
= 0; i
< count
; i
++) {
157 emit_tex_binding_unit(svga
, i
,
158 svga
->curr
.sampler
[shader
][i
],
159 svga
->curr
.sampler_views
[shader
][i
],
160 &svga
->state
.hw_draw
.views
[i
],
165 svga
->state
.hw_draw
.num_views
= svga
->curr
.num_sampler_views
[shader
];
167 /* Polygon stipple */
168 if (svga
->curr
.rast
->templ
.poly_stipple_enable
) {
169 const unsigned unit
= svga
->state
.hw_draw
.fs
->pstipple_sampler_unit
;
170 emit_tex_binding_unit(svga
, unit
,
171 svga
->polygon_stipple
.sampler
,
172 &svga
->polygon_stipple
.sampler_view
->base
,
173 &svga
->state
.hw_draw
.views
[unit
],
178 if (queue
.bind_count
) {
179 SVGA3dTextureState
*ts
;
181 if (SVGA3D_BeginSetTextureState( svga
->swc
,
183 queue
.bind_count
) != PIPE_OK
)
186 for (i
= 0; i
< queue
.bind_count
; i
++) {
187 struct svga_winsys_surface
*handle
;
189 ts
[i
].stage
= queue
.bind
[i
].unit
;
190 ts
[i
].name
= SVGA3D_TS_BIND_TEXTURE
;
192 if (queue
.bind
[i
].view
->v
) {
193 handle
= queue
.bind
[i
].view
->v
->handle
;
198 svga
->swc
->surface_relocation(svga
->swc
,
204 queue
.bind
[i
].view
->dirty
= FALSE
;
207 SVGA_FIFOCommitAll( svga
->swc
);
210 svga
->rebind
.flags
.texture_samplers
= FALSE
;
215 return PIPE_ERROR_OUT_OF_MEMORY
;
222 * Similar to update_tss_binding, but without any state checking/update.
224 * Called at the beginning of every new command buffer to ensure that
225 * non-dirty textures are properly paged-in.
228 svga_reemit_tss_bindings(struct svga_context
*svga
)
232 struct bind_queue queue
;
234 assert(!svga_have_vgpu10(svga
));
235 assert(svga
->rebind
.flags
.texture_samplers
);
237 queue
.bind_count
= 0;
239 for (i
= 0; i
< svga
->state
.hw_draw
.num_views
; i
++) {
240 struct svga_hw_view_state
*view
= &svga
->state
.hw_draw
.views
[i
];
243 queue
.bind
[queue
.bind_count
].unit
= i
;
244 queue
.bind
[queue
.bind_count
].view
= view
;
249 /* Polygon stipple */
250 if (svga
->curr
.rast
->templ
.poly_stipple_enable
) {
251 const unsigned unit
= svga
->state
.hw_draw
.fs
->pstipple_sampler_unit
;
252 struct svga_hw_view_state
*view
= &svga
->state
.hw_draw
.views
[unit
];
255 queue
.bind
[queue
.bind_count
].unit
= unit
;
256 queue
.bind
[queue
.bind_count
].view
= view
;
261 if (queue
.bind_count
) {
262 SVGA3dTextureState
*ts
;
264 ret
= SVGA3D_BeginSetTextureState(svga
->swc
,
267 if (ret
!= PIPE_OK
) {
271 for (i
= 0; i
< queue
.bind_count
; i
++) {
272 struct svga_winsys_surface
*handle
;
274 ts
[i
].stage
= queue
.bind
[i
].unit
;
275 ts
[i
].name
= SVGA3D_TS_BIND_TEXTURE
;
277 assert(queue
.bind
[i
].view
->v
);
278 handle
= queue
.bind
[i
].view
->v
->handle
;
279 svga
->swc
->surface_relocation(svga
->swc
,
286 SVGA_FIFOCommitAll(svga
->swc
);
289 svga
->rebind
.flags
.texture_samplers
= FALSE
;
295 struct svga_tracked_state svga_hw_tss_binding
= {
296 "texture binding emit",
297 SVGA_NEW_TEXTURE_BINDING
|
304 /***********************************************************************
309 SVGA3dTextureState ts
[PIPE_MAX_SAMPLERS
*SVGA3D_TS_MAX
];
314 svga_queue_tss( struct ts_queue
*q
,
319 assert(q
->ts_count
< ARRAY_SIZE(q
->ts
));
320 q
->ts
[q
->ts_count
].stage
= unit
;
321 q
->ts
[q
->ts_count
].name
= tss
;
322 q
->ts
[q
->ts_count
].value
= value
;
327 #define EMIT_TS(svga, unit, val, token) \
329 assert(unit < Elements(svga->state.hw_draw.ts)); \
330 STATIC_ASSERT(SVGA3D_TS_##token < Elements(svga->state.hw_draw.ts[unit])); \
331 if (svga->state.hw_draw.ts[unit][SVGA3D_TS_##token] != val) { \
332 svga_queue_tss( queue, unit, SVGA3D_TS_##token, val ); \
333 svga->state.hw_draw.ts[unit][SVGA3D_TS_##token] = val; \
337 #define EMIT_TS_FLOAT(svga, unit, fvalue, token) \
339 unsigned val = fui(fvalue); \
340 assert(unit < Elements(svga->state.hw_draw.ts)); \
341 STATIC_ASSERT(SVGA3D_TS_##token < Elements(svga->state.hw_draw.ts[unit])); \
342 if (svga->state.hw_draw.ts[unit][SVGA3D_TS_##token] != val) { \
343 svga_queue_tss( queue, unit, SVGA3D_TS_##token, val ); \
344 svga->state.hw_draw.ts[unit][SVGA3D_TS_##token] = val; \
350 * Emit texture sampler state (tss) for one texture unit.
353 emit_tss_unit(struct svga_context
*svga
, unsigned unit
,
354 const struct svga_sampler_state
*state
,
355 struct ts_queue
*queue
)
357 EMIT_TS(svga
, unit
, state
->mipfilter
, MIPFILTER
);
358 EMIT_TS(svga
, unit
, state
->min_lod
, TEXTURE_MIPMAP_LEVEL
);
359 EMIT_TS(svga
, unit
, state
->magfilter
, MAGFILTER
);
360 EMIT_TS(svga
, unit
, state
->minfilter
, MINFILTER
);
361 EMIT_TS(svga
, unit
, state
->aniso_level
, TEXTURE_ANISOTROPIC_LEVEL
);
362 EMIT_TS_FLOAT(svga
, unit
, state
->lod_bias
, TEXTURE_LOD_BIAS
);
363 EMIT_TS(svga
, unit
, state
->addressu
, ADDRESSU
);
364 EMIT_TS(svga
, unit
, state
->addressw
, ADDRESSW
);
365 EMIT_TS(svga
, unit
, state
->bordercolor
, BORDERCOLOR
);
366 // TEXCOORDINDEX -- hopefully not needed
368 if (svga
->curr
.tex_flags
.flag_1d
& (1 << unit
))
369 EMIT_TS(svga
, unit
, SVGA3D_TEX_ADDRESS_WRAP
, ADDRESSV
);
371 EMIT_TS(svga
, unit
, state
->addressv
, ADDRESSV
);
373 if (svga
->curr
.tex_flags
.flag_srgb
& (1 << unit
))
374 EMIT_TS_FLOAT(svga
, unit
, 2.2f
, GAMMA
);
376 EMIT_TS_FLOAT(svga
, unit
, 1.0f
, GAMMA
);
379 static enum pipe_error
380 update_tss(struct svga_context
*svga
,
383 const unsigned shader
= PIPE_SHADER_FRAGMENT
;
385 struct ts_queue queue
;
387 if (svga_have_vgpu10(svga
))
391 for (i
= 0; i
< svga
->curr
.num_samplers
[shader
]; i
++) {
392 if (svga
->curr
.sampler
[shader
][i
]) {
393 const struct svga_sampler_state
*curr
= svga
->curr
.sampler
[shader
][i
];
394 emit_tss_unit(svga
, i
, curr
, &queue
);
398 /* polygon stipple sampler */
399 if (svga
->curr
.rast
->templ
.poly_stipple_enable
) {
401 svga
->state
.hw_draw
.fs
->pstipple_sampler_unit
,
402 svga
->polygon_stipple
.sampler
,
406 if (queue
.ts_count
) {
407 SVGA3dTextureState
*ts
;
409 if (SVGA3D_BeginSetTextureState( svga
->swc
,
411 queue
.ts_count
) != PIPE_OK
)
416 queue
.ts_count
* sizeof queue
.ts
[0]);
418 SVGA_FIFOCommitAll( svga
->swc
);
424 /* XXX: need to poison cached hardware state on failure to ensure
425 * dirty state gets re-emitted. Fix this by re-instating partial
426 * FIFOCommit command and only updating cached hw state once the
427 * initial allocation has succeeded.
429 memset(svga
->state
.hw_draw
.ts
, 0xcd, sizeof(svga
->state
.hw_draw
.ts
));
431 return PIPE_ERROR_OUT_OF_MEMORY
;
435 struct svga_tracked_state svga_hw_tss
= {
436 "texture state emit",
439 SVGA_NEW_TEXTURE_FLAGS
),