gallium/u_threaded: align batches and call slots to 16 bytes
[mesa.git] / src / gallium / drivers / svga / svga_surface.c
1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 **********************************************************/
25
26 #include "svga_cmd.h"
27
28 #include "pipe/p_state.h"
29 #include "pipe/p_defines.h"
30 #include "util/u_inlines.h"
31 #include "os/os_thread.h"
32 #include "util/u_bitmask.h"
33 #include "util/u_format.h"
34 #include "util/u_math.h"
35 #include "util/u_memory.h"
36
37 #include "svga_format.h"
38 #include "svga_screen.h"
39 #include "svga_context.h"
40 #include "svga_sampler_view.h"
41 #include "svga_resource_texture.h"
42 #include "svga_surface.h"
43 #include "svga_debug.h"
44
45 static void svga_mark_surface_dirty(struct pipe_surface *surf);
46
47 void
48 svga_texture_copy_handle(struct svga_context *svga,
49 struct svga_winsys_surface *src_handle,
50 unsigned src_x, unsigned src_y, unsigned src_z,
51 unsigned src_level, unsigned src_layer,
52 struct svga_winsys_surface *dst_handle,
53 unsigned dst_x, unsigned dst_y, unsigned dst_z,
54 unsigned dst_level, unsigned dst_layer,
55 unsigned width, unsigned height, unsigned depth)
56 {
57 struct svga_surface dst, src;
58 enum pipe_error ret;
59 SVGA3dCopyBox box, *boxes;
60
61 assert(svga);
62
63 src.handle = src_handle;
64 src.real_level = src_level;
65 src.real_layer = src_layer;
66 src.real_zslice = 0;
67
68 dst.handle = dst_handle;
69 dst.real_level = dst_level;
70 dst.real_layer = dst_layer;
71 dst.real_zslice = 0;
72
73 box.x = dst_x;
74 box.y = dst_y;
75 box.z = dst_z;
76 box.w = width;
77 box.h = height;
78 box.d = depth;
79 box.srcx = src_x;
80 box.srcy = src_y;
81 box.srcz = src_z;
82
83 /*
84 SVGA_DBG(DEBUG_VIEWS, "mipcopy src: %p %u (%ux%ux%u), dst: %p %u (%ux%ux%u)\n",
85 src_handle, src_level, src_x, src_y, src_z,
86 dst_handle, dst_level, dst_x, dst_y, dst_z);
87 */
88
89 ret = SVGA3D_BeginSurfaceCopy(svga->swc,
90 &src.base,
91 &dst.base,
92 &boxes, 1);
93 if (ret != PIPE_OK) {
94 svga_context_flush(svga, NULL);
95 ret = SVGA3D_BeginSurfaceCopy(svga->swc,
96 &src.base,
97 &dst.base,
98 &boxes, 1);
99 assert(ret == PIPE_OK);
100 }
101 *boxes = box;
102 SVGA_FIFOCommitAll(svga->swc);
103 }
104
105
106 /* A helper function to sync up the two surface handles.
107 */
108 static void
109 svga_texture_copy_handle_resource(struct svga_context *svga,
110 struct svga_texture *src_tex,
111 struct svga_winsys_surface *dst,
112 unsigned int numMipLevels,
113 unsigned int numLayers,
114 int zslice_pick,
115 unsigned int mipoffset,
116 unsigned int layeroffset)
117 {
118 unsigned int i, j;
119 unsigned int zoffset = 0;
120
121 /* A negative zslice_pick implies zoffset at 0, and depth to copy is
122 * from the depth of the texture at the particular mipmap level.
123 */
124 if (zslice_pick >= 0)
125 zoffset = zslice_pick;
126
127 for (i = 0; i < numMipLevels; i++) {
128 unsigned int miplevel = i + mipoffset;
129
130 for (j = 0; j < numLayers; j++) {
131 if (svga_is_texture_level_defined(src_tex, j+layeroffset, miplevel)) {
132 unsigned depth = (zslice_pick < 0 ?
133 u_minify(src_tex->b.b.depth0, miplevel) : 1);
134
135 svga_texture_copy_handle(svga,
136 src_tex->handle,
137 0, 0, zoffset,
138 miplevel,
139 j + layeroffset,
140 dst, 0, 0, 0, i, j,
141 u_minify(src_tex->b.b.width0, miplevel),
142 u_minify(src_tex->b.b.height0, miplevel),
143 depth);
144 }
145 }
146 }
147 }
148
149
150 struct svga_winsys_surface *
151 svga_texture_view_surface(struct svga_context *svga,
152 struct svga_texture *tex,
153 unsigned bind_flags,
154 SVGA3dSurfaceFlags flags,
155 SVGA3dSurfaceFormat format,
156 unsigned start_mip,
157 unsigned num_mip,
158 int layer_pick,
159 unsigned num_layers,
160 int zslice_pick,
161 boolean cacheable,
162 struct svga_host_surface_cache_key *key) /* OUT */
163 {
164 struct svga_screen *ss = svga_screen(svga->pipe.screen);
165 struct svga_winsys_surface *handle;
166 boolean validated;
167 boolean needCopyResource;
168
169 SVGA_DBG(DEBUG_PERF,
170 "svga: Create surface view: layer %d zslice %d mips %d..%d\n",
171 layer_pick, zslice_pick, start_mip, start_mip+num_mip-1);
172
173 key->flags = flags;
174 key->format = format;
175 key->numMipLevels = num_mip;
176 key->size.width = u_minify(tex->b.b.width0, start_mip);
177 key->size.height = u_minify(tex->b.b.height0, start_mip);
178 key->size.depth = zslice_pick < 0 ? u_minify(tex->b.b.depth0, start_mip) : 1;
179 key->cachable = 1;
180 key->arraySize = 1;
181 key->numFaces = 1;
182
183 /* single sample surface can be treated as non-multisamples surface */
184 key->sampleCount = tex->b.b.nr_samples > 1 ? tex->b.b.nr_samples : 0;
185
186 if (key->sampleCount > 1) {
187 key->flags |= SVGA3D_SURFACE_MASKABLE_ANTIALIAS;
188 }
189
190 if (tex->b.b.target == PIPE_TEXTURE_CUBE && layer_pick < 0) {
191 key->flags |= SVGA3D_SURFACE_CUBEMAP;
192 key->numFaces = 6;
193 } else if (tex->b.b.target == PIPE_TEXTURE_1D_ARRAY ||
194 tex->b.b.target == PIPE_TEXTURE_2D_ARRAY) {
195 key->arraySize = num_layers;
196 }
197
198 if (key->format == SVGA3D_FORMAT_INVALID) {
199 key->cachable = 0;
200 return NULL;
201 }
202
203 if (cacheable && tex->backed_handle &&
204 memcmp(key, &tex->backed_key, sizeof *key) == 0) {
205 handle = tex->backed_handle;
206 needCopyResource = tex->backed_age < tex->age;
207 } else {
208 SVGA_DBG(DEBUG_DMA, "surface_create for texture view\n");
209 handle = svga_screen_surface_create(ss, bind_flags, PIPE_USAGE_DEFAULT,
210 &validated, key);
211 needCopyResource = TRUE;
212
213 if (cacheable && !tex->backed_handle) {
214 tex->backed_handle = handle;
215 memcpy(&tex->backed_key, key, sizeof *key);
216 }
217 }
218
219 if (!handle) {
220 key->cachable = 0;
221 return NULL;
222 }
223
224 SVGA_DBG(DEBUG_DMA, " --> got sid %p (texture view)\n", handle);
225
226 if (layer_pick < 0)
227 layer_pick = 0;
228
229 if (needCopyResource) {
230 svga_texture_copy_handle_resource(svga, tex, handle,
231 key->numMipLevels,
232 key->numFaces * key->arraySize,
233 zslice_pick, start_mip, layer_pick);
234 tex->backed_age = tex->age;
235 }
236
237 return handle;
238 }
239
240
241 /**
242 * A helper function to create a surface view.
243 * The view boolean flag specifies whether svga_texture_view_surface()
244 * will be called to create a cloned surface and resource for the view.
245 */
246 static struct pipe_surface *
247 svga_create_surface_view(struct pipe_context *pipe,
248 struct pipe_resource *pt,
249 const struct pipe_surface *surf_tmpl,
250 boolean view)
251 {
252 struct svga_context *svga = svga_context(pipe);
253 struct svga_texture *tex = svga_texture(pt);
254 struct pipe_screen *screen = pipe->screen;
255 struct svga_screen *ss = svga_screen(screen);
256 struct svga_surface *s;
257 unsigned layer, zslice, bind;
258 unsigned nlayers = 1;
259 SVGA3dSurfaceFlags flags = 0;
260 SVGA3dSurfaceFormat format;
261 struct pipe_surface *retVal = NULL;
262
263 s = CALLOC_STRUCT(svga_surface);
264 if (!s)
265 return NULL;
266
267 SVGA_STATS_TIME_PUSH(ss->sws, SVGA_STATS_TIME_CREATESURFACEVIEW);
268
269 if (pt->target == PIPE_TEXTURE_CUBE) {
270 layer = surf_tmpl->u.tex.first_layer;
271 zslice = 0;
272 }
273 else if (pt->target == PIPE_TEXTURE_1D_ARRAY ||
274 pt->target == PIPE_TEXTURE_2D_ARRAY) {
275 layer = surf_tmpl->u.tex.first_layer;
276 zslice = 0;
277 nlayers = surf_tmpl->u.tex.last_layer - surf_tmpl->u.tex.first_layer + 1;
278 }
279 else {
280 layer = 0;
281 zslice = surf_tmpl->u.tex.first_layer;
282 }
283
284 pipe_reference_init(&s->base.reference, 1);
285 pipe_resource_reference(&s->base.texture, pt);
286 s->base.context = pipe;
287 s->base.format = surf_tmpl->format;
288 s->base.width = u_minify(pt->width0, surf_tmpl->u.tex.level);
289 s->base.height = u_minify(pt->height0, surf_tmpl->u.tex.level);
290 s->base.u.tex.level = surf_tmpl->u.tex.level;
291 s->base.u.tex.first_layer = surf_tmpl->u.tex.first_layer;
292 s->base.u.tex.last_layer = surf_tmpl->u.tex.last_layer;
293 s->view_id = SVGA3D_INVALID_ID;
294
295 s->backed = NULL;
296
297 if (util_format_is_depth_or_stencil(surf_tmpl->format)) {
298 flags = SVGA3D_SURFACE_HINT_DEPTHSTENCIL |
299 SVGA3D_SURFACE_BIND_DEPTH_STENCIL;
300 bind = PIPE_BIND_DEPTH_STENCIL;
301 }
302 else {
303 flags = SVGA3D_SURFACE_HINT_RENDERTARGET |
304 SVGA3D_SURFACE_BIND_RENDER_TARGET;
305 bind = PIPE_BIND_RENDER_TARGET;
306 }
307
308 if (tex->imported) {
309 /* imported resource (a window) */
310 format = tex->key.format;
311 if (util_format_is_srgb(surf_tmpl->format)) {
312 /* sRGB rendering to window */
313 format = svga_linear_to_srgb(format);
314 }
315 }
316 else {
317 format = svga_translate_format(ss, surf_tmpl->format, bind);
318 }
319
320 assert(format != SVGA3D_FORMAT_INVALID);
321
322 if (view) {
323 SVGA_DBG(DEBUG_VIEWS,
324 "New backed surface view: resource %p, level %u layer %u z %u, %p\n",
325 pt, surf_tmpl->u.tex.level, layer, zslice, s);
326
327 if (svga_have_vgpu10(svga)) {
328 switch (pt->target) {
329 case PIPE_TEXTURE_1D:
330 flags |= SVGA3D_SURFACE_1D;
331 break;
332 case PIPE_TEXTURE_1D_ARRAY:
333 flags |= SVGA3D_SURFACE_1D | SVGA3D_SURFACE_ARRAY;
334 break;
335 case PIPE_TEXTURE_2D_ARRAY:
336 flags |= SVGA3D_SURFACE_ARRAY;
337 break;
338 case PIPE_TEXTURE_3D:
339 flags |= SVGA3D_SURFACE_VOLUME;
340 break;
341 case PIPE_TEXTURE_CUBE:
342 if (nlayers == 6)
343 flags |= SVGA3D_SURFACE_CUBEMAP;
344 break;
345 default:
346 break;
347 }
348 }
349
350 /* When we clone the surface view resource, use the format used in
351 * the creation of the original resource.
352 */
353 s->handle = svga_texture_view_surface(svga, tex, bind, flags,
354 tex->key.format,
355 surf_tmpl->u.tex.level, 1,
356 layer, nlayers, zslice,
357 TRUE, &s->key);
358 if (!s->handle) {
359 FREE(s);
360 goto done;
361 }
362
363 s->key.format = format;
364 s->real_layer = 0;
365 s->real_level = 0;
366 s->real_zslice = 0;
367 } else {
368 SVGA_DBG(DEBUG_VIEWS,
369 "New surface view: resource %p, level %u, layer %u, z %u, %p\n",
370 pt, surf_tmpl->u.tex.level, layer, zslice, s);
371
372 memset(&s->key, 0, sizeof s->key);
373 s->key.format = format;
374 s->handle = tex->handle;
375 s->real_layer = layer;
376 s->real_zslice = zslice;
377 s->real_level = surf_tmpl->u.tex.level;
378 }
379
380 svga->hud.num_surface_views++;
381 retVal = &s->base;
382
383 done:
384 SVGA_STATS_TIME_POP(ss->sws);
385 return retVal;
386 }
387
388
389 static struct pipe_surface *
390 svga_create_surface(struct pipe_context *pipe,
391 struct pipe_resource *pt,
392 const struct pipe_surface *surf_tmpl)
393 {
394 struct svga_context *svga = svga_context(pipe);
395 struct pipe_screen *screen = pipe->screen;
396 struct pipe_surface *surf = NULL;
397 boolean view = FALSE;
398
399 SVGA_STATS_TIME_PUSH(svga_sws(svga), SVGA_STATS_TIME_CREATESURFACE);
400
401 if (svga_screen(screen)->debug.force_surface_view)
402 view = TRUE;
403
404 if (surf_tmpl->u.tex.level != 0 &&
405 svga_screen(screen)->debug.force_level_surface_view)
406 view = TRUE;
407
408 if (pt->target == PIPE_TEXTURE_3D)
409 view = TRUE;
410
411 if (svga_have_vgpu10(svga) || svga_screen(screen)->debug.no_surface_view)
412 view = FALSE;
413
414 surf = svga_create_surface_view(pipe, pt, surf_tmpl, view);
415
416 SVGA_STATS_TIME_POP(svga_sws(svga));
417
418 return surf;
419 }
420
421
422 /**
423 * Clone the surface view and its associated resource.
424 */
425 static struct svga_surface *
426 create_backed_surface_view(struct svga_context *svga, struct svga_surface *s)
427 {
428 struct svga_texture *tex = svga_texture(s->base.texture);
429
430 SVGA_STATS_TIME_PUSH(svga_sws(svga),
431 SVGA_STATS_TIME_CREATEBACKEDSURFACEVIEW);
432
433 if (!s->backed) {
434 struct pipe_surface *backed_view;
435
436 backed_view = svga_create_surface_view(&svga->pipe,
437 &tex->b.b,
438 &s->base,
439 TRUE);
440 if (!backed_view)
441 return NULL;
442
443 s->backed = svga_surface(backed_view);
444 }
445 else if (s->backed->age < tex->age) {
446 /*
447 * There is already an existing backing surface, but we still need to
448 * sync the backing resource if the original resource has been modified
449 * since the last copy.
450 */
451 struct svga_surface *bs = s->backed;
452 unsigned int layer, zslice;
453
454 assert(bs->handle);
455
456 switch (tex->b.b.target) {
457 case PIPE_TEXTURE_CUBE:
458 case PIPE_TEXTURE_1D_ARRAY:
459 case PIPE_TEXTURE_2D_ARRAY:
460 layer = s->base.u.tex.first_layer;
461 zslice = 0;
462 break;
463 default:
464 layer = 0;
465 zslice = s->base.u.tex.first_layer;
466 }
467
468 svga_texture_copy_handle_resource(svga, tex, bs->handle,
469 bs->key.numMipLevels,
470 bs->key.numFaces * bs->key.arraySize,
471 zslice, s->base.u.tex.level, layer);
472 }
473
474 svga_mark_surface_dirty(&s->backed->base);
475 s->backed->age = tex->age;
476
477 SVGA_STATS_TIME_POP(svga_sws(svga));
478
479 return s->backed;
480 }
481
482 /**
483 * Create a DX RenderTarget/DepthStencil View for the given surface,
484 * if needed.
485 */
486 struct pipe_surface *
487 svga_validate_surface_view(struct svga_context *svga, struct svga_surface *s)
488 {
489 enum pipe_error ret = PIPE_OK;
490 enum pipe_shader_type shader;
491
492 assert(svga_have_vgpu10(svga));
493 assert(s);
494
495 SVGA_STATS_TIME_PUSH(svga_sws(svga),
496 SVGA_STATS_TIME_VALIDATESURFACEVIEW);
497
498 /**
499 * DX spec explicitly specifies that no resource can be bound to a render
500 * target view and a shader resource view simultanously.
501 * So first check if the resource bound to this surface view collides with
502 * a sampler view. If so, then we will clone this surface view and its
503 * associated resource. We will then use the cloned surface view for
504 * render target.
505 */
506 for (shader = PIPE_SHADER_VERTEX; shader <= PIPE_SHADER_GEOMETRY; shader++) {
507 if (svga_check_sampler_view_resource_collision(svga, s->handle, shader)) {
508 SVGA_DBG(DEBUG_VIEWS,
509 "same resource used in shaderResource and renderTarget 0x%x\n",
510 s->handle);
511 s = create_backed_surface_view(svga, s);
512
513 if (s)
514 svga->state.hw_draw.has_backed_views = TRUE;
515
516 /* s may be null here if the function failed */
517 break;
518 }
519 }
520
521 if (s && s->view_id == SVGA3D_INVALID_ID) {
522 SVGA3dResourceType resType;
523 SVGA3dRenderTargetViewDesc desc;
524 struct svga_texture *stex = svga_texture(s->base.texture);
525
526 if (stex->validated == FALSE) {
527 assert(stex->handle);
528
529 /* We are about to render into a surface that has not been validated.
530 * First invalidate the surface so that the device does not
531 * need to update the host-side copy with the invalid
532 * content when the associated mob is first bound to the surface.
533 */
534 svga->swc->surface_invalidate(svga->swc, stex->handle);
535 stex->validated = TRUE;
536 }
537
538 desc.tex.mipSlice = s->real_level;
539 desc.tex.firstArraySlice = s->real_layer + s->real_zslice;
540 desc.tex.arraySize =
541 s->base.u.tex.last_layer - s->base.u.tex.first_layer + 1;
542
543 s->view_id = util_bitmask_add(svga->surface_view_id_bm);
544
545 resType = svga_resource_type(s->base.texture->target);
546
547 if (util_format_is_depth_or_stencil(s->base.format)) {
548 ret = SVGA3D_vgpu10_DefineDepthStencilView(svga->swc,
549 s->view_id,
550 s->handle,
551 s->key.format,
552 resType,
553 &desc);
554 }
555 else {
556 SVGA3dSurfaceFormat view_format = s->key.format;
557 const struct svga_texture *stex = svga_texture(s->base.texture);
558
559 /* Can't create RGBA render target view of a RGBX surface so adjust
560 * the view format. We do something similar for texture samplers in
561 * svga_validate_pipe_sampler_view().
562 */
563 if (view_format == SVGA3D_B8G8R8A8_UNORM &&
564 (stex->key.format == SVGA3D_B8G8R8X8_UNORM ||
565 stex->key.format == SVGA3D_B8G8R8X8_TYPELESS)) {
566 view_format = SVGA3D_B8G8R8X8_UNORM;
567 }
568
569 ret = SVGA3D_vgpu10_DefineRenderTargetView(svga->swc,
570 s->view_id,
571 s->handle,
572 view_format,
573 resType,
574 &desc);
575 }
576
577 if (ret != PIPE_OK) {
578 util_bitmask_clear(svga->surface_view_id_bm, s->view_id);
579 s->view_id = SVGA3D_INVALID_ID;
580 s = NULL;
581 }
582 }
583
584 SVGA_STATS_TIME_POP(svga_sws(svga));
585
586 return s ? &s->base : NULL;
587 }
588
589
590
591 static void
592 svga_surface_destroy(struct pipe_context *pipe,
593 struct pipe_surface *surf)
594 {
595 struct svga_context *svga = svga_context(pipe);
596 struct svga_surface *s = svga_surface(surf);
597 struct svga_texture *t = svga_texture(surf->texture);
598 struct svga_screen *ss = svga_screen(surf->texture->screen);
599 enum pipe_error ret = PIPE_OK;
600
601 SVGA_STATS_TIME_PUSH(ss->sws, SVGA_STATS_TIME_DESTROYSURFACE);
602
603 /* Destroy the backed view surface if it exists */
604 if (s->backed) {
605 svga_surface_destroy(pipe, &s->backed->base);
606 s->backed = NULL;
607 }
608
609 /* Destroy the surface handle if this is a backed handle and
610 * it is not being cached in the texture.
611 */
612 if (s->handle != t->handle && s->handle != t->backed_handle) {
613 SVGA_DBG(DEBUG_DMA, "unref sid %p (tex surface)\n", s->handle);
614 svga_screen_surface_destroy(ss, &s->key, &s->handle);
615 }
616
617 if (s->view_id != SVGA3D_INVALID_ID) {
618 unsigned try;
619
620 /* The SVGA3D device will generate a device error if the
621 * render target view or depth stencil view is destroyed from
622 * a context other than the one it was created with.
623 * Similar to shader resource view, in this case, we will skip
624 * the destroy for now.
625 */
626 if (surf->context != pipe) {
627 _debug_printf("context mismatch in %s\n", __func__);
628 }
629 else {
630 assert(svga_have_vgpu10(svga));
631 for (try = 0; try < 2; try++) {
632 if (util_format_is_depth_or_stencil(s->base.format)) {
633 ret = SVGA3D_vgpu10_DestroyDepthStencilView(svga->swc, s->view_id);
634 }
635 else {
636 ret = SVGA3D_vgpu10_DestroyRenderTargetView(svga->swc, s->view_id);
637 }
638 if (ret == PIPE_OK)
639 break;
640 svga_context_flush(svga, NULL);
641 }
642 assert(ret == PIPE_OK);
643 util_bitmask_clear(svga->surface_view_id_bm, s->view_id);
644 }
645 }
646
647 pipe_resource_reference(&surf->texture, NULL);
648 FREE(surf);
649
650 svga->hud.num_surface_views--;
651 SVGA_STATS_TIME_POP(ss->sws);
652 }
653
654
655 static void
656 svga_mark_surface_dirty(struct pipe_surface *surf)
657 {
658 struct svga_surface *s = svga_surface(surf);
659 struct svga_texture *tex = svga_texture(surf->texture);
660
661 if (!s->dirty) {
662 s->dirty = TRUE;
663
664 if (s->handle == tex->handle) {
665 /* hmm so 3d textures always have all their slices marked ? */
666 svga_define_texture_level(tex, surf->u.tex.first_layer,
667 surf->u.tex.level);
668 }
669 else {
670 /* this will happen later in svga_propagate_surface */
671 }
672 }
673
674 /* Increment the view_age and texture age for this surface's mipmap
675 * level so that any sampler views into the texture are re-validated too.
676 * Note: we age the texture for backed surface view only when the
677 * backed surface is propagated to the original surface.
678 */
679 if (s->handle == tex->handle)
680 svga_age_texture_view(tex, surf->u.tex.level);
681 }
682
683
684 void
685 svga_mark_surfaces_dirty(struct svga_context *svga)
686 {
687 unsigned i;
688 struct svga_hw_clear_state *hw = &svga->state.hw_clear;
689
690 if (svga_have_vgpu10(svga)) {
691
692 /* For VGPU10, mark the dirty bit in the rendertarget/depth stencil view surface.
693 * This surface can be the backed surface.
694 */
695 for (i = 0; i < hw->num_rendertargets; i++) {
696 if (hw->rtv[i])
697 svga_mark_surface_dirty(hw->rtv[i]);
698 }
699 if (hw->dsv)
700 svga_mark_surface_dirty(hw->dsv);
701 } else {
702 for (i = 0; i < svga->curr.framebuffer.nr_cbufs; i++) {
703 if (svga->curr.framebuffer.cbufs[i])
704 svga_mark_surface_dirty(svga->curr.framebuffer.cbufs[i]);
705 }
706 if (svga->curr.framebuffer.zsbuf)
707 svga_mark_surface_dirty(svga->curr.framebuffer.zsbuf);
708 }
709 }
710
711
712 /**
713 * Progagate any changes from surfaces to texture.
714 * pipe is optional context to inline the blit command in.
715 */
716 void
717 svga_propagate_surface(struct svga_context *svga, struct pipe_surface *surf,
718 boolean reset)
719 {
720 struct svga_surface *s = svga_surface(surf);
721 struct svga_texture *tex = svga_texture(surf->texture);
722 struct svga_screen *ss = svga_screen(surf->texture->screen);
723
724 if (!s->dirty)
725 return;
726
727 SVGA_STATS_TIME_PUSH(ss->sws, SVGA_STATS_TIME_PROPAGATESURFACE);
728
729 /* Reset the dirty flag if specified. This is to ensure that
730 * the dirty flag will not be reset and stay unset when the backing
731 * surface is still being bound and rendered to.
732 * The reset flag will be set to TRUE when the surface is propagated
733 * and will be unbound.
734 */
735 s->dirty = !reset;
736
737 ss->texture_timestamp++;
738 svga_age_texture_view(tex, surf->u.tex.level);
739
740 if (s->handle != tex->handle) {
741 unsigned zslice, layer;
742 unsigned nlayers = 1;
743 unsigned i;
744
745 if (surf->texture->target == PIPE_TEXTURE_CUBE) {
746 zslice = 0;
747 layer = surf->u.tex.first_layer;
748 }
749 else if (surf->texture->target == PIPE_TEXTURE_1D_ARRAY ||
750 surf->texture->target == PIPE_TEXTURE_2D_ARRAY) {
751 zslice = 0;
752 layer = surf->u.tex.first_layer;
753 nlayers = surf->u.tex.last_layer - surf->u.tex.first_layer + 1;
754 }
755 else {
756 zslice = surf->u.tex.first_layer;
757 layer = 0;
758 }
759
760 SVGA_DBG(DEBUG_VIEWS,
761 "Propagate surface %p to resource %p, level %u\n",
762 surf, tex, surf->u.tex.level);
763 for (i = 0; i < nlayers; i++) {
764 svga_texture_copy_handle(svga,
765 s->handle, 0, 0, 0, s->real_level,
766 s->real_layer + i,
767 tex->handle, 0, 0, zslice, surf->u.tex.level,
768 layer + i,
769 u_minify(tex->b.b.width0, surf->u.tex.level),
770 u_minify(tex->b.b.height0, surf->u.tex.level),
771 1);
772 svga_define_texture_level(tex, layer + i, surf->u.tex.level);
773 }
774
775 /* Sync the surface view age with the texture age */
776 s->age = tex->age;
777
778 /* If this backed surface is cached in the texture,
779 * update the backed age as well.
780 */
781 if (tex->backed_handle == s->handle) {
782 tex->backed_age = tex->age;
783 }
784 }
785
786 SVGA_STATS_TIME_POP(ss->sws);
787 }
788
789
790 /**
791 * If any of the render targets are in backing texture views, propagate any
792 * changes to them back to the original texture.
793 */
794 void
795 svga_propagate_rendertargets(struct svga_context *svga)
796 {
797 unsigned i;
798
799 /* Early exit if there is no backing texture views in use */
800 if (!svga->state.hw_draw.has_backed_views)
801 return;
802
803 /* Note that we examine the svga->state.hw_draw.framebuffer surfaces,
804 * not the svga->curr.framebuffer surfaces, because it's the former
805 * surfaces which may be backing surface views (the actual render targets).
806 */
807 for (i = 0; i < svga->state.hw_clear.num_rendertargets; i++) {
808 struct pipe_surface *s = svga->state.hw_clear.rtv[i];
809 if (s) {
810 svga_propagate_surface(svga, s, FALSE);
811 }
812 }
813
814 if (svga->state.hw_clear.dsv) {
815 svga_propagate_surface(svga, svga->state.hw_clear.dsv, FALSE);
816 }
817 }
818
819
820 /**
821 * Check if we should call svga_propagate_surface on the surface.
822 */
823 boolean
824 svga_surface_needs_propagation(const struct pipe_surface *surf)
825 {
826 const struct svga_surface *s = svga_surface_const(surf);
827 struct svga_texture *tex = svga_texture(surf->texture);
828
829 return s->dirty && s->handle != tex->handle;
830 }
831
832
833 static void
834 svga_get_sample_position(struct pipe_context *context,
835 unsigned sample_count, unsigned sample_index,
836 float *pos_out)
837 {
838 /* We can't actually query the device to learn the sample positions.
839 * These were grabbed from nvidia's driver.
840 */
841 static const float pos1[1][2] = {
842 { 0.5, 0.5 }
843 };
844 static const float pos4[4][2] = {
845 { 0.375000, 0.125000 },
846 { 0.875000, 0.375000 },
847 { 0.125000, 0.625000 },
848 { 0.625000, 0.875000 }
849 };
850 static const float pos8[8][2] = {
851 { 0.562500, 0.312500 },
852 { 0.437500, 0.687500 },
853 { 0.812500, 0.562500 },
854 { 0.312500, 0.187500 },
855 { 0.187500, 0.812500 },
856 { 0.062500, 0.437500 },
857 { 0.687500, 0.937500 },
858 { 0.937500, 0.062500 }
859 };
860 static const float pos16[16][2] = {
861 { 0.187500, 0.062500 },
862 { 0.437500, 0.187500 },
863 { 0.062500, 0.312500 },
864 { 0.312500, 0.437500 },
865 { 0.687500, 0.062500 },
866 { 0.937500, 0.187500 },
867 { 0.562500, 0.312500 },
868 { 0.812500, 0.437500 },
869 { 0.187500, 0.562500 },
870 { 0.437500, 0.687500 },
871 { 0.062500, 0.812500 },
872 { 0.312500, 0.937500 },
873 { 0.687500, 0.562500 },
874 { 0.937500, 0.687500 },
875 { 0.562500, 0.812500 },
876 { 0.812500, 0.937500 }
877 };
878 const float (*positions)[2];
879
880 switch (sample_count) {
881 case 4:
882 positions = pos4;
883 break;
884 case 8:
885 positions = pos8;
886 break;
887 case 16:
888 positions = pos16;
889 break;
890 default:
891 positions = pos1;
892 }
893
894 pos_out[0] = positions[sample_index][0];
895 pos_out[1] = positions[sample_index][1];
896 }
897
898
899 void
900 svga_init_surface_functions(struct svga_context *svga)
901 {
902 svga->pipe.create_surface = svga_create_surface;
903 svga->pipe.surface_destroy = svga_surface_destroy;
904 svga->pipe.get_sample_position = svga_get_sample_position;
905 }